1 /* run front end support for arm
2 Copyright (C) 1995-2014 Free Software Foundation, Inc.
4 This file is part of ARM SIM.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19 /* This file provides the interface between the simulator and
20 run.c and gdb (when the simulator is linked with gdb).
21 All simulator interaction should go through this file. */
29 #include "gdb/callback.h"
30 #include "gdb/remote-sim.h"
35 #include "sim-utils.h"
37 #include "gdb/sim-arm.h"
38 #include "gdb/signals.h"
39 #include "libiberty.h"
42 host_callback
*sim_callback
;
44 static struct ARMul_State
*state
;
46 /* Who is using the simulator. */
47 static SIM_OPEN_KIND sim_kind
;
52 /* Memory size in bytes. */
53 static int mem_size
= (1 << 21);
55 /* Non-zero to display start up banner, and maybe other things. */
58 /* Non-zero to set big endian mode. */
59 static int big_endian
;
69 static struct disassemble_info info
;
70 static char opbuf
[1000];
73 op_printf (char *buf
, char *fmt
, ...)
79 ret
= vsprintf (opbuf
+ strlen (opbuf
), fmt
, ap
);
85 sim_dis_read (bfd_vma memaddr ATTRIBUTE_UNUSED
,
88 struct disassemble_info
* info
)
90 ARMword val
= (ARMword
) *((ARMword
*) info
->application_data
);
94 * ptr
++ = val
& 0xFF;
101 print_insn (ARMword instr
)
106 info
.application_data
= & instr
;
107 size
= print_insn_little_arm (0, & info
);
108 fprintf (stderr
, " %*s\n", size
, opbuf
);
111 /* Cirrus DSP registers.
113 We need to define these registers outside of maverick.c because
114 maverick.c might not be linked in unless --target=arm9e-* in which
115 case wrapper.c will not compile because it tries to access Cirrus
116 registers. This should all go away once we get the Cirrus and ARM
117 Coprocessor to coexist in armcopro.c-- aldyh. */
134 union maverick_acc_regs
136 long double ld
; /* Acc registers are 72-bits. */
139 struct maverick_regs DSPregs
[16];
140 union maverick_acc_regs DSPacc
[4];
150 ARMul_EmulateInit ();
151 state
= ARMul_NewState ();
152 state
->bigendSig
= (big_endian
? HIGH
: LOW
);
153 ARMul_MemoryInit (state
, mem_size
);
154 ARMul_OSInit (state
);
155 state
->verbose
= verbosity
;
160 /* Set verbosity level of simulator.
161 This is not intended to produce detailed tracing or debugging information.
163 /* FIXME: common/run.c doesn't do this yet. */
166 sim_set_verbose (int v
)
171 /* Set the memory size to SIZE bytes.
172 Must be called before initializing simulator. */
173 /* FIXME: Rename to sim_set_mem_size. */
182 ARMul_ConsolePrint (ARMul_State
* state
,
190 va_start (ap
, format
);
191 vprintf (format
, ap
);
197 ARMul_Debug (ARMul_State
* state ATTRIBUTE_UNUSED
,
198 ARMword pc ATTRIBUTE_UNUSED
,
199 ARMword instr ATTRIBUTE_UNUSED
)
205 sim_write (SIM_DESC sd ATTRIBUTE_UNUSED
,
207 const unsigned char * buffer
,
214 for (i
= 0; i
< size
; i
++)
215 ARMul_SafeWriteByte (state
, addr
+ i
, buffer
[i
]);
221 sim_read (SIM_DESC sd ATTRIBUTE_UNUSED
,
223 unsigned char * buffer
,
230 for (i
= 0; i
< size
; i
++)
231 buffer
[i
] = ARMul_SafeReadByte (state
, addr
+ i
);
237 sim_trace (SIM_DESC sd ATTRIBUTE_UNUSED
)
240 sim_resume (sd
, 0, 0);
245 sim_stop (SIM_DESC sd ATTRIBUTE_UNUSED
)
247 state
->Emulate
= STOP
;
253 sim_resume (SIM_DESC sd ATTRIBUTE_UNUSED
,
255 int siggnal ATTRIBUTE_UNUSED
)
257 state
->EndCondition
= 0;
262 state
->Reg
[15] = ARMul_DoInstr (state
);
263 if (state
->EndCondition
== 0)
264 state
->EndCondition
= RDIError_BreakpointReached
;
268 state
->NextInstr
= RESUME
; /* treat as PC change */
269 state
->Reg
[15] = ARMul_DoProg (state
);
276 sim_create_inferior (SIM_DESC sd ATTRIBUTE_UNUSED
,
289 ARMul_SetPC (state
, bfd_get_start_address (abfd
));
290 mach
= bfd_get_mach (abfd
);
294 ARMul_SetPC (state
, 0); /* ??? */
301 (*sim_callback
->printf_filtered
)
303 "Unknown machine type '%d'; please update sim_create_inferior.\n",
308 /* We wouldn't set the machine type with earlier toolchains, so we
309 explicitly select a processor capable of supporting all ARMs in
311 ARMul_SelectProcessor (state
, ARM_v5_Prop
| ARM_v5e_Prop
| ARM_v6_Prop
);
314 case bfd_mach_arm_XScale
:
315 ARMul_SelectProcessor (state
, ARM_v5_Prop
| ARM_v5e_Prop
| ARM_XScale_Prop
| ARM_v6_Prop
);
318 case bfd_mach_arm_iWMMXt2
:
319 case bfd_mach_arm_iWMMXt
:
321 extern int SWI_vector_installed
;
324 if (! SWI_vector_installed
)
326 /* Intialise the hardware vectors to zero. */
327 if (! SWI_vector_installed
)
328 for (i
= ARMul_ResetV
; i
<= ARMFIQV
; i
+= 4)
329 ARMul_WriteWord (state
, i
, 0);
331 /* ARM_WriteWord will have detected the write to the SWI vector,
332 but we want SWI_vector_installed to remain at 0 so that thumb
333 mode breakpoints will work. */
334 SWI_vector_installed
= 0;
337 ARMul_SelectProcessor (state
, ARM_v5_Prop
| ARM_v5e_Prop
| ARM_XScale_Prop
| ARM_iWMMXt_Prop
);
340 case bfd_mach_arm_ep9312
:
341 ARMul_SelectProcessor (state
, ARM_v4_Prop
| ARM_ep9312_Prop
);
345 if (bfd_family_coff (abfd
))
347 /* This is a special case in order to support COFF based ARM toolchains.
348 The COFF header does not have enough room to store all the different
349 kinds of ARM cpu, so the XScale, v5T and v5TE architectures all default
350 to v5. (See coff_set_flags() in bdf/coffcode.h). So if we see a v5
351 machine type here, we assume it could be any of the above architectures
352 and so select the most feature-full. */
353 ARMul_SelectProcessor (state
, ARM_v5_Prop
| ARM_v5e_Prop
| ARM_XScale_Prop
);
356 /* Otherwise drop through. */
358 case bfd_mach_arm_5T
:
359 ARMul_SelectProcessor (state
, ARM_v5_Prop
);
362 case bfd_mach_arm_5TE
:
363 ARMul_SelectProcessor (state
, ARM_v5_Prop
| ARM_v5e_Prop
);
367 case bfd_mach_arm_4T
:
368 ARMul_SelectProcessor (state
, ARM_v4_Prop
);
372 case bfd_mach_arm_3M
:
373 ARMul_SelectProcessor (state
, ARM_Lock_Prop
);
377 case bfd_mach_arm_2a
:
378 ARMul_SelectProcessor (state
, ARM_Fix26_Prop
);
382 if ( mach
!= bfd_mach_arm_3
383 && mach
!= bfd_mach_arm_3M
384 && mach
!= bfd_mach_arm_2
385 && mach
!= bfd_mach_arm_2a
)
387 /* Reset mode to ARM. A gdb user may rerun a program that had entered
388 THUMB mode from the start and cause the ARM-mode startup code to be
389 executed in THUMB mode. */
390 ARMul_SetCPSR (state
, SVC32MODE
);
393 memset (& info
, 0, sizeof (info
));
394 INIT_DISASSEMBLE_INFO (info
, stdout
, op_printf
);
395 info
.read_memory_func
= sim_dis_read
;
396 info
.arch
= bfd_get_arch (abfd
);
397 info
.mach
= bfd_get_mach (abfd
);
398 info
.endian_code
= BFD_ENDIAN_LITTLE
;
400 info
.arch
= bfd_arch_arm
;
401 disassemble_init_for_target (& info
);
405 /* Set up the command line by laboriously stringing together
406 the environment carefully picked apart by our caller. */
408 /* Free any old stuff. */
409 if (state
->CommandLine
!= NULL
)
411 free (state
->CommandLine
);
412 state
->CommandLine
= NULL
;
415 /* See how much we need. */
416 for (arg
= argv
; *arg
!= NULL
; arg
++)
417 argvlen
+= strlen (*arg
) + 1;
420 state
->CommandLine
= malloc (argvlen
+ 1);
421 if (state
->CommandLine
!= NULL
)
424 state
->CommandLine
[0] = '\0';
426 for (arg
= argv
; *arg
!= NULL
; arg
++)
428 strcat (state
->CommandLine
, *arg
);
429 strcat (state
->CommandLine
, " ");
436 /* Now see if there's a MEMSIZE spec in the environment. */
439 if (strncmp (*env
, "MEMSIZE=", sizeof ("MEMSIZE=") - 1) == 0)
443 /* Set up memory limit. */
445 strtoul (*env
+ sizeof ("MEMSIZE=") - 1, &end_of_num
, 0);
455 sim_info (SIM_DESC sd ATTRIBUTE_UNUSED
,
456 int verbose ATTRIBUTE_UNUSED
)
461 frommem (struct ARMul_State
*state
, unsigned char *memory
)
463 if (state
->bigendSig
== HIGH
)
464 return (memory
[0] << 24) | (memory
[1] << 16)
465 | (memory
[2] << 8) | (memory
[3] << 0);
467 return (memory
[3] << 24) | (memory
[2] << 16)
468 | (memory
[1] << 8) | (memory
[0] << 0);
472 tomem (struct ARMul_State
*state
,
473 unsigned char *memory
,
476 if (state
->bigendSig
== HIGH
)
478 memory
[0] = val
>> 24;
479 memory
[1] = val
>> 16;
480 memory
[2] = val
>> 8;
481 memory
[3] = val
>> 0;
485 memory
[3] = val
>> 24;
486 memory
[2] = val
>> 16;
487 memory
[1] = val
>> 8;
488 memory
[0] = val
>> 0;
493 sim_store_register (SIM_DESC sd ATTRIBUTE_UNUSED
,
495 unsigned char *memory
,
500 switch ((enum sim_arm_regs
) rn
)
502 case SIM_ARM_R0_REGNUM
:
503 case SIM_ARM_R1_REGNUM
:
504 case SIM_ARM_R2_REGNUM
:
505 case SIM_ARM_R3_REGNUM
:
506 case SIM_ARM_R4_REGNUM
:
507 case SIM_ARM_R5_REGNUM
:
508 case SIM_ARM_R6_REGNUM
:
509 case SIM_ARM_R7_REGNUM
:
510 case SIM_ARM_R8_REGNUM
:
511 case SIM_ARM_R9_REGNUM
:
512 case SIM_ARM_R10_REGNUM
:
513 case SIM_ARM_R11_REGNUM
:
514 case SIM_ARM_R12_REGNUM
:
515 case SIM_ARM_R13_REGNUM
:
516 case SIM_ARM_R14_REGNUM
:
517 case SIM_ARM_R15_REGNUM
: /* PC */
518 case SIM_ARM_FP0_REGNUM
:
519 case SIM_ARM_FP1_REGNUM
:
520 case SIM_ARM_FP2_REGNUM
:
521 case SIM_ARM_FP3_REGNUM
:
522 case SIM_ARM_FP4_REGNUM
:
523 case SIM_ARM_FP5_REGNUM
:
524 case SIM_ARM_FP6_REGNUM
:
525 case SIM_ARM_FP7_REGNUM
:
526 case SIM_ARM_FPS_REGNUM
:
527 ARMul_SetReg (state
, state
->Mode
, rn
, frommem (state
, memory
));
530 case SIM_ARM_PS_REGNUM
:
531 state
->Cpsr
= frommem (state
, memory
);
532 ARMul_CPSRAltered (state
);
535 case SIM_ARM_MAVERIC_COP0R0_REGNUM
:
536 case SIM_ARM_MAVERIC_COP0R1_REGNUM
:
537 case SIM_ARM_MAVERIC_COP0R2_REGNUM
:
538 case SIM_ARM_MAVERIC_COP0R3_REGNUM
:
539 case SIM_ARM_MAVERIC_COP0R4_REGNUM
:
540 case SIM_ARM_MAVERIC_COP0R5_REGNUM
:
541 case SIM_ARM_MAVERIC_COP0R6_REGNUM
:
542 case SIM_ARM_MAVERIC_COP0R7_REGNUM
:
543 case SIM_ARM_MAVERIC_COP0R8_REGNUM
:
544 case SIM_ARM_MAVERIC_COP0R9_REGNUM
:
545 case SIM_ARM_MAVERIC_COP0R10_REGNUM
:
546 case SIM_ARM_MAVERIC_COP0R11_REGNUM
:
547 case SIM_ARM_MAVERIC_COP0R12_REGNUM
:
548 case SIM_ARM_MAVERIC_COP0R13_REGNUM
:
549 case SIM_ARM_MAVERIC_COP0R14_REGNUM
:
550 case SIM_ARM_MAVERIC_COP0R15_REGNUM
:
551 memcpy (& DSPregs
[rn
- SIM_ARM_MAVERIC_COP0R0_REGNUM
],
552 memory
, sizeof (struct maverick_regs
));
553 return sizeof (struct maverick_regs
);
555 case SIM_ARM_MAVERIC_DSPSC_REGNUM
:
556 memcpy (&DSPsc
, memory
, sizeof DSPsc
);
559 case SIM_ARM_IWMMXT_COP0R0_REGNUM
:
560 case SIM_ARM_IWMMXT_COP0R1_REGNUM
:
561 case SIM_ARM_IWMMXT_COP0R2_REGNUM
:
562 case SIM_ARM_IWMMXT_COP0R3_REGNUM
:
563 case SIM_ARM_IWMMXT_COP0R4_REGNUM
:
564 case SIM_ARM_IWMMXT_COP0R5_REGNUM
:
565 case SIM_ARM_IWMMXT_COP0R6_REGNUM
:
566 case SIM_ARM_IWMMXT_COP0R7_REGNUM
:
567 case SIM_ARM_IWMMXT_COP0R8_REGNUM
:
568 case SIM_ARM_IWMMXT_COP0R9_REGNUM
:
569 case SIM_ARM_IWMMXT_COP0R10_REGNUM
:
570 case SIM_ARM_IWMMXT_COP0R11_REGNUM
:
571 case SIM_ARM_IWMMXT_COP0R12_REGNUM
:
572 case SIM_ARM_IWMMXT_COP0R13_REGNUM
:
573 case SIM_ARM_IWMMXT_COP0R14_REGNUM
:
574 case SIM_ARM_IWMMXT_COP0R15_REGNUM
:
575 case SIM_ARM_IWMMXT_COP1R0_REGNUM
:
576 case SIM_ARM_IWMMXT_COP1R1_REGNUM
:
577 case SIM_ARM_IWMMXT_COP1R2_REGNUM
:
578 case SIM_ARM_IWMMXT_COP1R3_REGNUM
:
579 case SIM_ARM_IWMMXT_COP1R4_REGNUM
:
580 case SIM_ARM_IWMMXT_COP1R5_REGNUM
:
581 case SIM_ARM_IWMMXT_COP1R6_REGNUM
:
582 case SIM_ARM_IWMMXT_COP1R7_REGNUM
:
583 case SIM_ARM_IWMMXT_COP1R8_REGNUM
:
584 case SIM_ARM_IWMMXT_COP1R9_REGNUM
:
585 case SIM_ARM_IWMMXT_COP1R10_REGNUM
:
586 case SIM_ARM_IWMMXT_COP1R11_REGNUM
:
587 case SIM_ARM_IWMMXT_COP1R12_REGNUM
:
588 case SIM_ARM_IWMMXT_COP1R13_REGNUM
:
589 case SIM_ARM_IWMMXT_COP1R14_REGNUM
:
590 case SIM_ARM_IWMMXT_COP1R15_REGNUM
:
591 return Store_Iwmmxt_Register (rn
- SIM_ARM_IWMMXT_COP0R0_REGNUM
, memory
);
601 sim_fetch_register (SIM_DESC sd ATTRIBUTE_UNUSED
,
603 unsigned char *memory
,
611 switch ((enum sim_arm_regs
) rn
)
613 case SIM_ARM_R0_REGNUM
:
614 case SIM_ARM_R1_REGNUM
:
615 case SIM_ARM_R2_REGNUM
:
616 case SIM_ARM_R3_REGNUM
:
617 case SIM_ARM_R4_REGNUM
:
618 case SIM_ARM_R5_REGNUM
:
619 case SIM_ARM_R6_REGNUM
:
620 case SIM_ARM_R7_REGNUM
:
621 case SIM_ARM_R8_REGNUM
:
622 case SIM_ARM_R9_REGNUM
:
623 case SIM_ARM_R10_REGNUM
:
624 case SIM_ARM_R11_REGNUM
:
625 case SIM_ARM_R12_REGNUM
:
626 case SIM_ARM_R13_REGNUM
:
627 case SIM_ARM_R14_REGNUM
:
628 case SIM_ARM_R15_REGNUM
: /* PC */
629 regval
= ARMul_GetReg (state
, state
->Mode
, rn
);
632 case SIM_ARM_FP0_REGNUM
:
633 case SIM_ARM_FP1_REGNUM
:
634 case SIM_ARM_FP2_REGNUM
:
635 case SIM_ARM_FP3_REGNUM
:
636 case SIM_ARM_FP4_REGNUM
:
637 case SIM_ARM_FP5_REGNUM
:
638 case SIM_ARM_FP6_REGNUM
:
639 case SIM_ARM_FP7_REGNUM
:
640 case SIM_ARM_FPS_REGNUM
:
641 memset (memory
, 0, length
);
644 case SIM_ARM_PS_REGNUM
:
645 regval
= ARMul_GetCPSR (state
);
648 case SIM_ARM_MAVERIC_COP0R0_REGNUM
:
649 case SIM_ARM_MAVERIC_COP0R1_REGNUM
:
650 case SIM_ARM_MAVERIC_COP0R2_REGNUM
:
651 case SIM_ARM_MAVERIC_COP0R3_REGNUM
:
652 case SIM_ARM_MAVERIC_COP0R4_REGNUM
:
653 case SIM_ARM_MAVERIC_COP0R5_REGNUM
:
654 case SIM_ARM_MAVERIC_COP0R6_REGNUM
:
655 case SIM_ARM_MAVERIC_COP0R7_REGNUM
:
656 case SIM_ARM_MAVERIC_COP0R8_REGNUM
:
657 case SIM_ARM_MAVERIC_COP0R9_REGNUM
:
658 case SIM_ARM_MAVERIC_COP0R10_REGNUM
:
659 case SIM_ARM_MAVERIC_COP0R11_REGNUM
:
660 case SIM_ARM_MAVERIC_COP0R12_REGNUM
:
661 case SIM_ARM_MAVERIC_COP0R13_REGNUM
:
662 case SIM_ARM_MAVERIC_COP0R14_REGNUM
:
663 case SIM_ARM_MAVERIC_COP0R15_REGNUM
:
664 memcpy (memory
, & DSPregs
[rn
- SIM_ARM_MAVERIC_COP0R0_REGNUM
],
665 sizeof (struct maverick_regs
));
666 return sizeof (struct maverick_regs
);
668 case SIM_ARM_MAVERIC_DSPSC_REGNUM
:
669 memcpy (memory
, & DSPsc
, sizeof DSPsc
);
672 case SIM_ARM_IWMMXT_COP0R0_REGNUM
:
673 case SIM_ARM_IWMMXT_COP0R1_REGNUM
:
674 case SIM_ARM_IWMMXT_COP0R2_REGNUM
:
675 case SIM_ARM_IWMMXT_COP0R3_REGNUM
:
676 case SIM_ARM_IWMMXT_COP0R4_REGNUM
:
677 case SIM_ARM_IWMMXT_COP0R5_REGNUM
:
678 case SIM_ARM_IWMMXT_COP0R6_REGNUM
:
679 case SIM_ARM_IWMMXT_COP0R7_REGNUM
:
680 case SIM_ARM_IWMMXT_COP0R8_REGNUM
:
681 case SIM_ARM_IWMMXT_COP0R9_REGNUM
:
682 case SIM_ARM_IWMMXT_COP0R10_REGNUM
:
683 case SIM_ARM_IWMMXT_COP0R11_REGNUM
:
684 case SIM_ARM_IWMMXT_COP0R12_REGNUM
:
685 case SIM_ARM_IWMMXT_COP0R13_REGNUM
:
686 case SIM_ARM_IWMMXT_COP0R14_REGNUM
:
687 case SIM_ARM_IWMMXT_COP0R15_REGNUM
:
688 case SIM_ARM_IWMMXT_COP1R0_REGNUM
:
689 case SIM_ARM_IWMMXT_COP1R1_REGNUM
:
690 case SIM_ARM_IWMMXT_COP1R2_REGNUM
:
691 case SIM_ARM_IWMMXT_COP1R3_REGNUM
:
692 case SIM_ARM_IWMMXT_COP1R4_REGNUM
:
693 case SIM_ARM_IWMMXT_COP1R5_REGNUM
:
694 case SIM_ARM_IWMMXT_COP1R6_REGNUM
:
695 case SIM_ARM_IWMMXT_COP1R7_REGNUM
:
696 case SIM_ARM_IWMMXT_COP1R8_REGNUM
:
697 case SIM_ARM_IWMMXT_COP1R9_REGNUM
:
698 case SIM_ARM_IWMMXT_COP1R10_REGNUM
:
699 case SIM_ARM_IWMMXT_COP1R11_REGNUM
:
700 case SIM_ARM_IWMMXT_COP1R12_REGNUM
:
701 case SIM_ARM_IWMMXT_COP1R13_REGNUM
:
702 case SIM_ARM_IWMMXT_COP1R14_REGNUM
:
703 case SIM_ARM_IWMMXT_COP1R15_REGNUM
:
704 return Fetch_Iwmmxt_Register (rn
- SIM_ARM_IWMMXT_COP0R0_REGNUM
, memory
);
712 tomem (state
, memory
, regval
);
725 unsigned int swi_mask
;
728 #define SWI_SWITCH "--swi-support"
730 static swi_options options
[] =
733 { "demon", SWI_MASK_DEMON
},
734 { "angel", SWI_MASK_ANGEL
},
735 { "redboot", SWI_MASK_REDBOOT
},
738 { "DEMON", SWI_MASK_DEMON
},
739 { "ANGEL", SWI_MASK_ANGEL
},
740 { "REDBOOT", SWI_MASK_REDBOOT
},
746 sim_target_parse_command_line (int argc
, char ** argv
)
750 for (i
= 1; i
< argc
; i
++)
752 char * ptr
= argv
[i
];
755 if ((ptr
== NULL
) || (* ptr
!= '-'))
758 if (strcmp (ptr
, "-t") == 0)
764 if (strcmp (ptr
, "-z") == 0)
766 /* Remove this option from the argv array. */
767 for (arg
= i
; arg
< argc
; arg
++)
768 argv
[arg
] = argv
[arg
+ 1];
775 if (strcmp (ptr
, "-d") == 0)
777 /* Remove this option from the argv array. */
778 for (arg
= i
; arg
< argc
; arg
++)
779 argv
[arg
] = argv
[arg
+ 1];
786 if (strncmp (ptr
, SWI_SWITCH
, sizeof SWI_SWITCH
- 1) != 0)
789 if (ptr
[sizeof SWI_SWITCH
- 1] == 0)
791 /* Remove this option from the argv array. */
792 for (arg
= i
; arg
< argc
; arg
++)
793 argv
[arg
] = argv
[arg
+ 1];
799 ptr
+= sizeof SWI_SWITCH
;
807 for (i
= sizeof options
/ sizeof options
[0]; i
--;)
808 if (strncmp (ptr
, options
[i
].swi_option
,
809 strlen (options
[i
].swi_option
)) == 0)
811 swi_mask
|= options
[i
].swi_mask
;
812 ptr
+= strlen (options
[i
].swi_option
);
825 fprintf (stderr
, "Ignoring swi options: %s\n", ptr
);
827 /* Remove this option from the argv array. */
828 for (arg
= i
; arg
< argc
; arg
++)
829 argv
[arg
] = argv
[arg
+ 1];
837 sim_target_parse_arg_array (char ** argv
)
841 for (i
= 0; argv
[i
]; i
++)
844 sim_target_parse_command_line (i
, argv
);
848 sim_target_display_usage (int help
)
850 FILE *stream
= help
? stdout
: stderr
;
852 fprintf (stream
, "%s=<list> Comma seperated list of SWI protocols to supoport.\n\
853 This list can contain: NONE, DEMON, ANGEL, REDBOOT and/or ALL.\n",
855 fprintf (stream
, "-d\t\tEnable disassembly of instructions during tracing.\n");
856 fprintf (stream
, "-z\t\tTrace entering and leaving functions.\n\n");
860 sim_open (SIM_OPEN_KIND kind
,
869 myname
= (char *) xstrdup (argv
[0]);
873 #ifdef SIM_TARGET_SWITCHES
874 sim_target_parse_arg_array (argv
);
877 /* Decide upon the endian-ness of the processor.
878 If we can, get the information from the bfd itself.
879 Otherwise look to see if we have been given a command
880 line switch that tells us. Otherwise default to little endian. */
882 big_endian
= bfd_big_endian (abfd
);
883 else if (argv
[1] != NULL
)
887 /* Scan for endian-ness and memory-size switches. */
888 for (i
= 0; (argv
[i
] != NULL
) && (argv
[i
][0] != 0); i
++)
889 if (argv
[i
][0] == '-' && argv
[i
][1] == 'E')
893 if ((c
= argv
[i
][2]) == 0)
902 sim_callback
->printf_filtered
903 (sim_callback
, "No argument to -E option provided\n");
917 sim_callback
->printf_filtered
918 (sim_callback
, "Unrecognised argument to -E option\n");
922 else if (argv
[i
][0] == '-' && argv
[i
][1] == 'm')
924 if (argv
[i
][2] != '\0')
925 sim_size (atoi (&argv
[i
][2]));
926 else if (argv
[i
+ 1] != NULL
)
928 sim_size (atoi (argv
[i
+ 1]));
933 sim_callback
->printf_filtered (sim_callback
,
934 "Missing argument to -m option\n");
945 sim_close (SIM_DESC sd ATTRIBUTE_UNUSED
,
946 int quitting ATTRIBUTE_UNUSED
)
954 sim_load (SIM_DESC sd
,
957 int from_tty ATTRIBUTE_UNUSED
)
961 prog_bfd
= sim_load_file (sd
, myname
, sim_callback
, prog
, abfd
,
962 sim_kind
== SIM_OPEN_DEBUG
, 0, sim_write
);
963 if (prog_bfd
== NULL
)
965 ARMul_SetPC (state
, bfd_get_start_address (prog_bfd
));
967 bfd_close (prog_bfd
);
972 sim_stop_reason (SIM_DESC sd ATTRIBUTE_UNUSED
,
973 enum sim_stop
*reason
,
978 *reason
= sim_stopped
;
979 *sigrc
= GDB_SIGNAL_INT
;
981 else if (state
->EndCondition
== 0)
983 *reason
= sim_exited
;
984 *sigrc
= state
->Reg
[0] & 255;
988 *reason
= sim_stopped
;
989 if (state
->EndCondition
== RDIError_BreakpointReached
)
990 *sigrc
= GDB_SIGNAL_TRAP
;
991 else if ( state
->EndCondition
== RDIError_DataAbort
992 || state
->EndCondition
== RDIError_AddressException
)
993 *sigrc
= GDB_SIGNAL_BUS
;
1000 sim_do_command (SIM_DESC sd ATTRIBUTE_UNUSED
,
1001 const char *cmd ATTRIBUTE_UNUSED
)
1003 (*sim_callback
->printf_filtered
)
1005 "This simulator does not accept any commands.\n");
1009 sim_set_callbacks (host_callback
*ptr
)
1015 sim_complete_command (SIM_DESC sd
, const char *text
, const char *word
)