sim: bfin: new port
[deliverable/binutils-gdb.git] / sim / bfin / dv-bfin_ebiu_ddrc.c
1 /* Blackfin External Bus Interface Unit (EBIU) DDR Controller (DDRC) Model.
2
3 Copyright (C) 2010-2011 Free Software Foundation, Inc.
4 Contributed by Analog Devices, Inc.
5
6 This file is part of simulators.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20
21 #include "config.h"
22
23 #include "sim-main.h"
24 #include "devices.h"
25 #include "dv-bfin_ebiu_ddrc.h"
26
27 struct bfin_ebiu_ddrc
28 {
29 bu32 base, reg_size, bank_size;
30
31 /* Order after here is important -- matches hardware MMR layout. */
32 union {
33 struct { bu32 ddrctl0, ddrctl1, ddrctl2, ddrctl3; };
34 bu32 ddrctl[4];
35 };
36 bu32 ddrque, erradd;
37 bu16 BFIN_MMR_16(errmst);
38 bu16 BFIN_MMR_16(rstctl);
39 bu32 ddrbrc[8], ddrbwc[8];
40 bu32 ddracct, ddrtact, ddrarct;
41 bu32 ddrgc[4];
42 bu32 ddrmcen, ddrmccl;
43 };
44 #define mmr_base() offsetof(struct bfin_ebiu_ddrc, ddrctl0)
45 #define mmr_offset(mmr) (offsetof(struct bfin_ebiu_ddrc, mmr) - mmr_base())
46
47 static const char * const mmr_names[] = {
48 "EBIU_DDRCTL0", "EBIU_DDRCTL1", "EBIU_DDRCTL2", "EBIU_DDRCTL3", "EBIU_DDRQUE",
49 "EBIU_ERRADD", "EBIU_ERRMST", "EBIU_RSTCTL", "EBIU_DDRBRC0", "EBIU_DDRBRC1",
50 "EBIU_DDRBRC2", "EBIU_DDRBRC3", "EBIU_DDRBRC4", "EBIU_DDRBRC5",
51 "EBIU_DDRBRC6", "EBIU_DDRBRC7", "EBIU_DDRBWC0", "EBIU_DDRBWC1"
52 "EBIU_DDRBWC2", "EBIU_DDRBWC3", "EBIU_DDRBWC4", "EBIU_DDRBWC5",
53 "EBIU_DDRBWC6", "EBIU_DDRBWC7", "EBIU_DDRACCT", "EBIU_DDRTACT",
54 "EBIU_ARCT", "EBIU_DDRGC0", "EBIU_DDRGC1", "EBIU_DDRGC2", "EBIU_DDRGC3",
55 "EBIU_DDRMCEN", "EBIU_DDRMCCL",
56 };
57 #define mmr_name(off) mmr_names[(off) / 4]
58
59 static unsigned
60 bfin_ebiu_ddrc_io_write_buffer (struct hw *me, const void *source,
61 int space, address_word addr, unsigned nr_bytes)
62 {
63 struct bfin_ebiu_ddrc *ddrc = hw_data (me);
64 bu32 mmr_off;
65 bu32 value;
66 bu16 *value16p;
67 bu32 *value32p;
68 void *valuep;
69
70 if (nr_bytes == 4)
71 value = dv_load_4 (source);
72 else
73 value = dv_load_2 (source);
74
75 mmr_off = addr - ddrc->base;
76 valuep = (void *)((unsigned long)ddrc + mmr_base() + mmr_off);
77 value16p = valuep;
78 value32p = valuep;
79
80 HW_TRACE_WRITE ();
81
82 switch (mmr_off)
83 {
84 case mmr_offset(errmst):
85 case mmr_offset(rstctl):
86 dv_bfin_mmr_require_16 (me, addr, nr_bytes, true);
87 *value16p = value;
88 break;
89 default:
90 dv_bfin_mmr_require_32 (me, addr, nr_bytes, true);
91 *value32p = value;
92 break;
93 }
94
95 return nr_bytes;
96 }
97
98 static unsigned
99 bfin_ebiu_ddrc_io_read_buffer (struct hw *me, void *dest,
100 int space, address_word addr, unsigned nr_bytes)
101 {
102 struct bfin_ebiu_ddrc *ddrc = hw_data (me);
103 bu32 mmr_off;
104 bu32 *value32p;
105 bu16 *value16p;
106 void *valuep;
107
108 mmr_off = addr - ddrc->base;
109 valuep = (void *)((unsigned long)ddrc + mmr_base() + mmr_off);
110 value16p = valuep;
111 value32p = valuep;
112
113 HW_TRACE_READ ();
114
115 switch (mmr_off)
116 {
117 case mmr_offset(errmst):
118 case mmr_offset(rstctl):
119 dv_bfin_mmr_require_16 (me, addr, nr_bytes, false);
120 dv_store_2 (dest, *value16p);
121 break;
122 default:
123 dv_bfin_mmr_require_32 (me, addr, nr_bytes, false);
124 dv_store_4 (dest, *value32p);
125 break;
126 }
127
128 return nr_bytes;
129 }
130
131 static void
132 attach_bfin_ebiu_ddrc_regs (struct hw *me, struct bfin_ebiu_ddrc *ddrc)
133 {
134 address_word attach_address;
135 int attach_space;
136 unsigned attach_size;
137 reg_property_spec reg;
138
139 if (hw_find_property (me, "reg") == NULL)
140 hw_abort (me, "Missing \"reg\" property");
141
142 if (!hw_find_reg_array_property (me, "reg", 0, &reg))
143 hw_abort (me, "\"reg\" property must contain three addr/size entries");
144
145 hw_unit_address_to_attach_address (hw_parent (me),
146 &reg.address,
147 &attach_space, &attach_address, me);
148 hw_unit_size_to_attach_size (hw_parent (me), &reg.size, &attach_size, me);
149
150 if (attach_size != BFIN_MMR_EBIU_DDRC_SIZE)
151 hw_abort (me, "\"reg\" size must be %#x", BFIN_MMR_EBIU_DDRC_SIZE);
152
153 hw_attach_address (hw_parent (me),
154 0, attach_space, attach_address, attach_size, me);
155
156 ddrc->base = attach_address;
157 }
158
159 static void
160 bfin_ebiu_ddrc_finish (struct hw *me)
161 {
162 struct bfin_ebiu_ddrc *ddrc;
163
164 ddrc = HW_ZALLOC (me, struct bfin_ebiu_ddrc);
165
166 set_hw_data (me, ddrc);
167 set_hw_io_read_buffer (me, bfin_ebiu_ddrc_io_read_buffer);
168 set_hw_io_write_buffer (me, bfin_ebiu_ddrc_io_write_buffer);
169
170 attach_bfin_ebiu_ddrc_regs (me, ddrc);
171
172 /* Initialize the DDRC. */
173 ddrc->ddrctl0 = 0x098E8411;
174 ddrc->ddrctl1 = 0x10026223;
175 ddrc->ddrctl2 = 0x00000021;
176 ddrc->ddrctl3 = 0x00000003; /* XXX: MDDR is 0x20 ... */
177 ddrc->ddrque = 0x00001115;
178 ddrc->rstctl = 0x0002;
179 }
180
181 const struct hw_descriptor dv_bfin_ebiu_ddrc_descriptor[] = {
182 {"bfin_ebiu_ddrc", bfin_ebiu_ddrc_finish,},
183 {NULL, NULL},
184 };
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