1 /* Blackfin General Purpose Ports (GPIO) model
3 Copyright (C) 2010-2013 Free Software Foundation, Inc.
4 Contributed by Analog Devices, Inc.
6 This file is part of simulators.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
25 #include "dv-bfin_gpio.h"
33 /* Order after here is important -- matches hardware MMR layout. */
34 bu16
BFIN_MMR_16(data
);
35 bu16
BFIN_MMR_16(clear
);
36 bu16
BFIN_MMR_16(set
);
37 bu16
BFIN_MMR_16(toggle
);
38 bu16
BFIN_MMR_16(maska
);
39 bu16
BFIN_MMR_16(maska_clear
);
40 bu16
BFIN_MMR_16(maska_set
);
41 bu16
BFIN_MMR_16(maska_toggle
);
42 bu16
BFIN_MMR_16(maskb
);
43 bu16
BFIN_MMR_16(maskb_clear
);
44 bu16
BFIN_MMR_16(maskb_set
);
45 bu16
BFIN_MMR_16(maskb_toggle
);
46 bu16
BFIN_MMR_16(dir
);
47 bu16
BFIN_MMR_16(polar
);
48 bu16
BFIN_MMR_16(edge
);
49 bu16
BFIN_MMR_16(both
);
50 bu16
BFIN_MMR_16(inen
);
52 #define mmr_base() offsetof(struct bfin_gpio, data)
53 #define mmr_offset(mmr) (offsetof(struct bfin_gpio, mmr) - mmr_base())
55 static const char * const mmr_names
[] =
57 "PORTIO", "PORTIO_CLEAR", "PORTIO_SET", "PORTIO_TOGGLE", "PORTIO_MASKA",
58 "PORTIO_MASKA_CLEAR", "PORTIO_MASKA_SET", "PORTIO_MASKA_TOGGLE",
59 "PORTIO_MASKB", "PORTIO_MASKB_CLEAR", "PORTIO_MASKB_SET",
60 "PORTIO_MASKB_TOGGLE", "PORTIO_DIR", "PORTIO_POLAR", "PORTIO_EDGE",
61 "PORTIO_BOTH", "PORTIO_INEN",
63 #define mmr_name(off) mmr_names[(off) / 4]
66 bfin_gpio_forward_int (struct hw
*me
, struct bfin_gpio
*port
, bu32 mask
,
69 HW_TRACE ((me
, "resending levels on port %c", 'a' + dst_port
));
70 hw_port_event (me
, dst_port
, !!(port
->int_state
& mask
));
73 bfin_gpio_forward_ints (struct hw
*me
, struct bfin_gpio
*port
)
75 bfin_gpio_forward_int (me
, port
, port
->maska
, 0);
76 bfin_gpio_forward_int (me
, port
, port
->maskb
, 1);
80 bfin_gpio_forward_ouput (struct hw
*me
, struct bfin_gpio
*port
, bu32 odata
)
82 int pin
, value
, ovalue
, bit
;
84 for (pin
= 0; pin
< 16; ++pin
)
88 /* Make sure this is an output pin. */
89 if (!(port
->dir
& bit
))
92 /* Only signal port if the pin changes value. */
93 value
= !!(port
->data
& bit
);
94 ovalue
= !!(odata
& bit
);
98 HW_TRACE ((me
, "outputting gpio %i changed to %i", pin
, value
));
99 hw_port_event (me
, pin
, value
);
104 bfin_gpio_io_write_buffer (struct hw
*me
, const void *source
, int space
,
105 address_word addr
, unsigned nr_bytes
)
107 struct bfin_gpio
*port
= hw_data (me
);
111 bu32 data
= port
->data
;
113 value
= dv_load_2 (source
);
114 mmr_off
= addr
- port
->base
;
115 valuep
= (void *)((unsigned long)port
+ mmr_base() + mmr_off
);
119 dv_bfin_mmr_require_16 (me
, addr
, nr_bytes
, true);
123 case mmr_offset(data
):
124 case mmr_offset(maska
):
125 case mmr_offset(maskb
):
126 case mmr_offset(dir
):
127 case mmr_offset(polar
):
128 case mmr_offset(edge
):
129 case mmr_offset(both
):
130 case mmr_offset(inen
):
133 case mmr_offset(clear
):
134 case mmr_offset(maska_clear
):
135 case mmr_offset(maskb_clear
):
136 /* We want to clear the related data MMR. */
138 dv_w1c_2 (valuep
, value
, -1);
140 case mmr_offset(set
):
141 case mmr_offset(maska_set
):
142 case mmr_offset(maskb_set
):
143 /* We want to set the related data MMR. */
147 case mmr_offset(toggle
):
148 case mmr_offset(maska_toggle
):
149 case mmr_offset(maskb_toggle
):
150 /* We want to toggle the related data MMR. */
155 dv_bfin_mmr_invalid (me
, addr
, nr_bytes
, true);
159 /* If updating masks, make sure we send updated port info. */
162 case mmr_offset(dir
):
163 case mmr_offset(data
) ... mmr_offset(toggle
):
164 bfin_gpio_forward_ouput (me
, port
, data
);
166 case mmr_offset(maska
) ... mmr_offset(maska_toggle
):
167 bfin_gpio_forward_int (me
, port
, port
->maska
, 0);
169 case mmr_offset(maskb
) ... mmr_offset(maskb_toggle
):
170 bfin_gpio_forward_int (me
, port
, port
->maskb
, 1);
178 bfin_gpio_io_read_buffer (struct hw
*me
, void *dest
, int space
,
179 address_word addr
, unsigned nr_bytes
)
181 struct bfin_gpio
*port
= hw_data (me
);
185 mmr_off
= addr
- port
->base
;
186 valuep
= (void *)((unsigned long)port
+ mmr_base() + mmr_off
);
190 dv_bfin_mmr_require_16 (me
, addr
, nr_bytes
, false);
194 case mmr_offset(data
):
195 case mmr_offset(clear
):
196 case mmr_offset(set
):
197 case mmr_offset(toggle
):
198 dv_store_2 (dest
, port
->data
);
200 case mmr_offset(maska
):
201 case mmr_offset(maska_clear
):
202 case mmr_offset(maska_set
):
203 case mmr_offset(maska_toggle
):
204 dv_store_2 (dest
, port
->maska
);
206 case mmr_offset(maskb
):
207 case mmr_offset(maskb_clear
):
208 case mmr_offset(maskb_set
):
209 case mmr_offset(maskb_toggle
):
210 dv_store_2 (dest
, port
->maskb
);
212 case mmr_offset(dir
):
213 case mmr_offset(polar
):
214 case mmr_offset(edge
):
215 case mmr_offset(both
):
216 case mmr_offset(inen
):
217 dv_store_2 (dest
, *valuep
);
220 dv_bfin_mmr_invalid (me
, addr
, nr_bytes
, false);
227 static const struct hw_port_descriptor bfin_gpio_ports
[] =
229 { "mask_a", 0, 0, output_port
, },
230 { "mask_b", 1, 0, output_port
, },
231 { "p0", 0, 0, bidirect_port
, },
232 { "p1", 1, 0, bidirect_port
, },
233 { "p2", 2, 0, bidirect_port
, },
234 { "p3", 3, 0, bidirect_port
, },
235 { "p4", 4, 0, bidirect_port
, },
236 { "p5", 5, 0, bidirect_port
, },
237 { "p6", 6, 0, bidirect_port
, },
238 { "p7", 7, 0, bidirect_port
, },
239 { "p8", 8, 0, bidirect_port
, },
240 { "p9", 9, 0, bidirect_port
, },
241 { "p10", 10, 0, bidirect_port
, },
242 { "p11", 11, 0, bidirect_port
, },
243 { "p12", 12, 0, bidirect_port
, },
244 { "p13", 13, 0, bidirect_port
, },
245 { "p14", 14, 0, bidirect_port
, },
246 { "p15", 15, 0, bidirect_port
, },
251 bfin_gpio_port_event (struct hw
*me
, int my_port
, struct hw
*source
,
252 int source_port
, int level
)
254 struct bfin_gpio
*port
= hw_data (me
);
256 bu32 bit
= (1 << my_port
);
258 /* Normalize the level value. A simulated device can send any value
259 it likes to us, but in reality we only care about 0 and 1. This
260 lets us assume only those two values below. */
263 HW_TRACE ((me
, "pin %i set to %i", my_port
, level
));
265 /* Only screw with state if this pin is set as an input, and the
266 input is actually enabled. */
267 if ((port
->dir
& bit
) || !(port
->inen
& bit
))
269 HW_TRACE ((me
, "ignoring level/int due to DIR=%i INEN=%i",
270 !!(port
->dir
& bit
), !!(port
->inen
& bit
)));
274 /* Get the old pin state for calculating an interrupt. */
275 olvl
= !!(port
->data
& bit
);
277 /* Update the new pin state. */
278 port
->data
= (port
->data
& ~bit
) | (level
<< my_port
);
280 /* See if this state transition will generate an interrupt. */
281 nlvl
= !!(port
->data
& bit
);
283 if (port
->edge
& bit
)
285 /* Pin is edge triggered. */
286 if (port
->both
& bit
)
291 HW_TRACE ((me
, "ignoring int due to EDGE=%i BOTH=%i lvl=%i->%i",
292 !!(port
->edge
& bit
), !!(port
->both
& bit
),
300 if (!(((port
->polar
& bit
) && olvl
> nlvl
)
301 || (!(port
->polar
& bit
) && olvl
< nlvl
)))
303 HW_TRACE ((me
, "ignoring int due to EDGE=%i POLAR=%i lvl=%i->%i",
304 !!(port
->edge
& bit
), !!(port
->polar
& bit
),
310 /* Send the signal up, and then fall through to clear it. */
311 port
->int_state
|= bit
;
312 bfin_gpio_forward_ints (me
, port
);
313 port
->int_state
&= ~bit
;
317 /* Pin is level triggered. */
318 if (nlvl
== !!(port
->polar
& bit
))
320 HW_TRACE ((me
, "ignoring int due to EDGE=%i POLAR=%i lvl=%i",
321 !!(port
->edge
& bit
), !!(port
->polar
& bit
), nlvl
));
322 /* We still need to signal SIC to clear the int, so don't return. */
323 port
->int_state
&= ~bit
;
326 port
->int_state
|= bit
;
329 bfin_gpio_forward_ints (me
, port
);
333 attach_bfin_gpio_regs (struct hw
*me
, struct bfin_gpio
*port
)
335 address_word attach_address
;
337 unsigned attach_size
;
338 reg_property_spec reg
;
340 if (hw_find_property (me
, "reg") == NULL
)
341 hw_abort (me
, "Missing \"reg\" property");
343 if (!hw_find_reg_array_property (me
, "reg", 0, ®
))
344 hw_abort (me
, "\"reg\" property must contain three addr/size entries");
346 hw_unit_address_to_attach_address (hw_parent (me
),
348 &attach_space
, &attach_address
, me
);
349 hw_unit_size_to_attach_size (hw_parent (me
), ®
.size
, &attach_size
, me
);
351 if (attach_size
!= BFIN_MMR_GPIO_SIZE
)
352 hw_abort (me
, "\"reg\" size must be %#x", BFIN_MMR_GPIO_SIZE
);
354 hw_attach_address (hw_parent (me
),
355 0, attach_space
, attach_address
, attach_size
, me
);
357 port
->base
= attach_address
;
361 bfin_gpio_finish (struct hw
*me
)
363 struct bfin_gpio
*port
;
365 port
= HW_ZALLOC (me
, struct bfin_gpio
);
367 set_hw_data (me
, port
);
368 set_hw_io_read_buffer (me
, bfin_gpio_io_read_buffer
);
369 set_hw_io_write_buffer (me
, bfin_gpio_io_write_buffer
);
370 set_hw_ports (me
, bfin_gpio_ports
);
371 set_hw_port_event (me
, bfin_gpio_port_event
);
373 attach_bfin_gpio_regs (me
, port
);
376 const struct hw_descriptor dv_bfin_gpio_descriptor
[] =
378 {"bfin_gpio", bfin_gpio_finish
,},