sim/bfin/dv-bfin_gpio.c

   1 /* Blackfin General Purpose Ports (GPIO) model
   2
   3    Copyright (C) 2010-2011 Free Software Foundation, Inc.
   4    Contributed by Analog Devices, Inc.
   5
   6    This file is part of simulators.
   7
   8    This program is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 3 of the License, or
  11    (at your option) any later version.
  12
  13    This program is distributed in the hope that it will be useful,
  14    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16    GNU General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  20
  21 #include "config.h"
  22
  23 #include "sim-main.h"
  24 #include "devices.h"
  25 #include "dv-bfin_gpio.h"
  26
  27 struct bfin_gpio
  28 {
  29   bu32 base;
  30
  31   bu16 int_state;
  32
  33   /* Order after here is important -- matches hardware MMR layout.  */
  34   bu16 BFIN_MMR_16(data);
  35   bu16 BFIN_MMR_16(clear);
  36   bu16 BFIN_MMR_16(set);
  37   bu16 BFIN_MMR_16(toggle);
  38   bu16 BFIN_MMR_16(maska);
  39   bu16 BFIN_MMR_16(maska_clear);
  40   bu16 BFIN_MMR_16(maska_set);
  41   bu16 BFIN_MMR_16(maska_toggle);
  42   bu16 BFIN_MMR_16(maskb);
  43   bu16 BFIN_MMR_16(maskb_clear);
  44   bu16 BFIN_MMR_16(maskb_set);
  45   bu16 BFIN_MMR_16(maskb_toggle);
  46   bu16 BFIN_MMR_16(dir);
  47   bu16 BFIN_MMR_16(polar);
  48   bu16 BFIN_MMR_16(edge);
  49   bu16 BFIN_MMR_16(both);
  50   bu16 BFIN_MMR_16(inen);
  51 };
  52 #define mmr_base()      offsetof(struct bfin_gpio, data)
  53 #define mmr_offset(mmr) (offsetof(struct bfin_gpio, mmr) - mmr_base())
  54
  55 static const char * const mmr_names[] =
  56 {
  57   "PORTIO", "PORTIO_CLEAR", "PORTIO_SET", "PORTIO_TOGGLE", "PORTIO_MASKA",
  58   "PORTIO_MASKA_CLEAR", "PORTIO_MASKA_SET", "PORTIO_MASKA_TOGGLE",
  59   "PORTIO_MASKB", "PORTIO_MASKB_CLEAR", "PORTIO_MASKB_SET",
  60   "PORTIO_MASKB_TOGGLE", "PORTIO_DIR", "PORTIO_POLAR", "PORTIO_EDGE",
  61   "PORTIO_BOTH", "PORTIO_INEN",
  62 };
  63 #define mmr_name(off) mmr_names[(off) / 4]
  64
  65 static void
  66 bfin_gpio_forward_int (struct hw *me, struct bfin_gpio *port, bu32 mask,
  67                        int dst_port)
  68 {
  69   HW_TRACE ((me, "resending levels on port %c", 'a' + dst_port));
  70   hw_port_event (me, dst_port, !!(port->int_state & mask));
  71 }
  72 static void
  73 bfin_gpio_forward_ints (struct hw *me, struct bfin_gpio *port)
  74 {
  75   bfin_gpio_forward_int (me, port, port->maska, 0);
  76   bfin_gpio_forward_int (me, port, port->maskb, 1);
  77 }
  78
  79 static unsigned
  80 bfin_gpio_io_write_buffer (struct hw *me, const void *source, int space,
  81                            address_word addr, unsigned nr_bytes)
  82 {
  83   struct bfin_gpio *port = hw_data (me);
  84   bu32 mmr_off;
  85   bu16 value;
  86   bu16 *valuep;
  87
  88   value = dv_load_2 (source);
  89   mmr_off = addr - port->base;
  90   valuep = (void *)((unsigned long)port + mmr_base() + mmr_off);
  91
  92   HW_TRACE_WRITE ();
  93
  94   dv_bfin_mmr_require_16 (me, addr, nr_bytes, true);
  95
  96   switch (mmr_off)
  97     {
  98     case mmr_offset(data):
  99     case mmr_offset(maska):
 100     case mmr_offset(maskb):
 101     case mmr_offset(dir):
 102     case mmr_offset(polar):
 103     case mmr_offset(edge):
 104     case mmr_offset(both):
 105     case mmr_offset(inen):
 106       *valuep = value;
 107       break;
 108     case mmr_offset(clear):
 109     case mmr_offset(maska_clear):
 110     case mmr_offset(maskb_clear):
 111       /* We want to clear the related data MMR.  */
 112       valuep -= 2;
 113       dv_w1c_2 (valuep, value, -1);
 114       break;
 115     case mmr_offset(set):
 116     case mmr_offset(maska_set):
 117     case mmr_offset(maskb_set):
 118       /* We want to set the related data MMR.  */
 119       valuep -= 4;
 120       *valuep |= value;
 121       break;
 122     case mmr_offset(toggle):
 123     case mmr_offset(maska_toggle):
 124     case mmr_offset(maskb_toggle):
 125       /* We want to toggle the related data MMR.  */
 126       valuep -= 6;
 127       *valuep ^= value;
 128       break;
 129     default:
 130       dv_bfin_mmr_invalid (me, addr, nr_bytes, true);
 131       break;
 132     }
 133
 134   /* If updating masks, make sure we send updated port info.  */
 135   switch (mmr_off)
 136     {
 137     case mmr_offset(maska) ... mmr_offset(maska_toggle):
 138       bfin_gpio_forward_int (me, port, port->maska, 0);
 139       break;
 140     case mmr_offset(maskb) ... mmr_offset(maskb_toggle):
 141       bfin_gpio_forward_int (me, port, port->maskb, 1);
 142       break;
 143     }
 144
 145   return nr_bytes;
 146 }
 147
 148 static unsigned
 149 bfin_gpio_io_read_buffer (struct hw *me, void *dest, int space,
 150                           address_word addr, unsigned nr_bytes)
 151 {
 152   struct bfin_gpio *port = hw_data (me);
 153   bu32 mmr_off;
 154   bu16 *valuep;
 155
 156   mmr_off = addr - port->base;
 157   valuep = (void *)((unsigned long)port + mmr_base() + mmr_off);
 158
 159   HW_TRACE_READ ();
 160
 161   dv_bfin_mmr_require_16 (me, addr, nr_bytes, false);
 162
 163   switch (mmr_off)
 164     {
 165     case mmr_offset(data):
 166     case mmr_offset(clear):
 167     case mmr_offset(set):
 168     case mmr_offset(toggle):
 169       dv_store_2 (dest, port->data);
 170       break;
 171     case mmr_offset(maska):
 172     case mmr_offset(maska_clear):
 173     case mmr_offset(maska_set):
 174     case mmr_offset(maska_toggle):
 175       dv_store_2 (dest, port->maska);
 176       break;
 177     case mmr_offset(maskb):
 178     case mmr_offset(maskb_clear):
 179     case mmr_offset(maskb_set):
 180     case mmr_offset(maskb_toggle):
 181       dv_store_2 (dest, port->maskb);
 182       break;
 183     case mmr_offset(dir):
 184     case mmr_offset(polar):
 185     case mmr_offset(edge):
 186     case mmr_offset(both):
 187     case mmr_offset(inen):
 188       dv_store_2 (dest, *valuep);
 189       break;
 190     default:
 191       dv_bfin_mmr_invalid (me, addr, nr_bytes, false);
 192       break;
 193     }
 194
 195   return nr_bytes;
 196 }
 197
 198 static const struct hw_port_descriptor bfin_gpio_ports[] =
 199 {
 200   { "mask_a", 0, 0, output_port, },
 201   { "mask_b", 1, 0, output_port, },
 202   { "p0",     0, 0, input_port, },
 203   { "p1",     1, 0, input_port, },
 204   { "p2",     2, 0, input_port, },
 205   { "p3",     3, 0, input_port, },
 206   { "p4",     4, 0, input_port, },
 207   { "p5",     5, 0, input_port, },
 208   { "p6",     6, 0, input_port, },
 209   { "p7",     7, 0, input_port, },
 210   { "p8",     8, 0, input_port, },
 211   { "p9",     9, 0, input_port, },
 212   { "p10",   10, 0, input_port, },
 213   { "p11",   11, 0, input_port, },
 214   { "p12",   12, 0, input_port, },
 215   { "p13",   13, 0, input_port, },
 216   { "p14",   14, 0, input_port, },
 217   { "p15",   15, 0, input_port, },
 218   { NULL, 0, 0, 0, },
 219 };
 220
 221 static void
 222 bfin_gpio_port_event (struct hw *me, int my_port, struct hw *source,
 223                       int source_port, int level)
 224 {
 225   struct bfin_gpio *port = hw_data (me);
 226   bool olvl, nlvl;
 227   bu32 bit = (1 << my_port);
 228
 229   /* Normalize the level value.  A simulated device can send any value
 230      it likes to us, but in reality we only care about 0 and 1.  This
 231      lets us assume only those two values below.  */
 232   level = !!level;
 233
 234   HW_TRACE ((me, "pin %i set to %i", my_port, level));
 235
 236   /* Only screw with state if this pin is set as an input, and the
 237      input is actually enabled.  */
 238   if ((port->dir & bit) || !(port->inen & bit))
 239     {
 240       HW_TRACE ((me, "ignoring level/int due to DIR=%i INEN=%i",
 241                  !!(port->dir & bit), !!(port->inen & bit)));
 242       return;
 243     }
 244
 245   /* Get the old pin state for calculating an interrupt.  */
 246   olvl = !!(port->data & bit);
 247
 248   /* Update the new pin state.  */
 249   port->data = (port->data & ~bit) | (level << my_port);
 250
 251   /* See if this state transition will generate an interrupt.  */
 252   nlvl = !!(port->data & bit);
 253
 254   if (port->edge & bit)
 255     {
 256       /* Pin is edge triggered.  */
 257       if (port->both & bit)
 258         {
 259           /* Both edges.  */
 260           if (olvl == nlvl)
 261             {
 262               HW_TRACE ((me, "ignoring int due to EDGE=%i BOTH=%i lvl=%i->%i",
 263                          !!(port->edge & bit), !!(port->both & bit),
 264                          olvl, nlvl));
 265               return;
 266             }
 267         }
 268       else
 269         {
 270           /* Just one edge.  */
 271           if (!(((port->polar & bit) && olvl > nlvl)
 272                 || (!(port->polar & bit) && olvl < nlvl)))
 273             {
 274               HW_TRACE ((me, "ignoring int due to EDGE=%i POLAR=%i lvl=%i->%i",
 275                          !!(port->edge & bit), !!(port->polar & bit),
 276                          olvl, nlvl));
 277               return;
 278             }
 279         }
 280
 281       /* Send the signal up, and then fall through to clear it.  */
 282       port->int_state |= bit;
 283       bfin_gpio_forward_ints (me, port);
 284       port->int_state &= ~bit;
 285     }
 286   else
 287     {
 288       /* Pin is level triggered.  */
 289       if (nlvl == !!(port->polar & bit))
 290         {
 291           HW_TRACE ((me, "ignoring int due to EDGE=%i POLAR=%i lvl=%i",
 292                      !!(port->edge & bit), !!(port->polar & bit), nlvl));
 293           /* We still need to signal SIC to clear the int, so don't return.  */
 294           port->int_state &= ~bit;
 295         }
 296       else
 297         port->int_state |= bit;
 298     }
 299
 300   bfin_gpio_forward_ints (me, port);
 301 }
 302
 303 static void
 304 attach_bfin_gpio_regs (struct hw *me, struct bfin_gpio *port)
 305 {
 306   address_word attach_address;
 307   int attach_space;
 308   unsigned attach_size;
 309   reg_property_spec reg;
 310
 311   if (hw_find_property (me, "reg") == NULL)
 312     hw_abort (me, "Missing \"reg\" property");
 313
 314   if (!hw_find_reg_array_property (me, "reg", 0, &reg))
 315     hw_abort (me, "\"reg\" property must contain three addr/size entries");
 316
 317   hw_unit_address_to_attach_address (hw_parent (me),
 318                                      &reg.address,
 319                                      &attach_space, &attach_address, me);
 320   hw_unit_size_to_attach_size (hw_parent (me), &reg.size, &attach_size, me);
 321
 322   if (attach_size != BFIN_MMR_GPIO_SIZE)
 323     hw_abort (me, "\"reg\" size must be %#x", BFIN_MMR_GPIO_SIZE);
 324
 325   hw_attach_address (hw_parent (me),
 326                      0, attach_space, attach_address, attach_size, me);
 327
 328   port->base = attach_address;
 329 }
 330
 331 static void
 332 bfin_gpio_finish (struct hw *me)
 333 {
 334   struct bfin_gpio *port;
 335
 336   port = HW_ZALLOC (me, struct bfin_gpio);
 337
 338   set_hw_data (me, port);
 339   set_hw_io_read_buffer (me, bfin_gpio_io_read_buffer);
 340   set_hw_io_write_buffer (me, bfin_gpio_io_write_buffer);
 341   set_hw_ports (me, bfin_gpio_ports);
 342   set_hw_port_event (me, bfin_gpio_port_event);
 343
 344   attach_bfin_gpio_regs (me, port);
 345 }
 346
 347 const struct hw_descriptor dv_bfin_gpio_descriptor[] =
 348 {
 349   {"bfin_gpio", bfin_gpio_finish,},
 350   {NULL, NULL},
 351 };