sim/common/cgen-trace.c

   1 /* Tracing support for CGEN-based simulators.
   2    Copyright (C) 1996-2021 Free Software Foundation, Inc.
   3    Contributed by Cygnus Support.
   4
   5 This file is part of GDB, the GNU debugger.
   6
   7 This program is free software; you can redistribute it and/or modify
   8 it under the terms of the GNU General Public License as published by
   9 the Free Software Foundation; either version 3 of the License, or
  10 (at your option) any later version.
  11
  12 This program is distributed in the hope that it will be useful,
  13 but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 GNU General Public License for more details.
  16
  17 You should have received a copy of the GNU General Public License
  18 along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  19
  20 /* This must come before any other includes.  */
  21 #include "defs.h"
  22
  23 #include <errno.h>
  24 #include <stdlib.h>
  25 #include "diagnostics.h"
  26 #include "dis-asm.h"
  27 #include "bfd.h"
  28 #include "sim-main.h"
  29 #include "sim-fpu.h"
  30 #include "sim/callback.h"
  31
  32 #ifndef SIZE_INSTRUCTION
  33 #define SIZE_INSTRUCTION 16
  34 #endif
  35
  36 #ifndef SIZE_LOCATION
  37 #define SIZE_LOCATION 20
  38 #endif
  39
  40 #ifndef SIZE_PC
  41 #define SIZE_PC 6
  42 #endif
  43
  44 #ifndef SIZE_LINE_NUMBER
  45 #define SIZE_LINE_NUMBER 4
  46 #endif
  47
  48 #ifndef SIZE_CYCLE_COUNT
  49 #define SIZE_CYCLE_COUNT 2
  50 #endif
  51
  52 #ifndef SIZE_TOTAL_CYCLE_COUNT
  53 #define SIZE_TOTAL_CYCLE_COUNT 9
  54 #endif
  55
  56 #ifndef SIZE_TRACE_BUF
  57 #define SIZE_TRACE_BUF 1024
  58 #endif
  59
  60 /* Text is queued in TRACE_BUF because we want to output the insn's cycle
  61    count first but that isn't known until after the insn has executed.
  62    This also handles the queueing of trace results, TRACE_RESULT may be
  63    called multiple times for one insn.  */
  64 static char trace_buf[SIZE_TRACE_BUF];
  65 /* If NULL, output to stdout directly.  */
  66 static char *bufptr;
  67
  68 /* Non-zero if this is the first insn in a set of parallel insns.  */
  69 static int first_insn_p;
  70
  71 /* For communication between cgen_trace_insn and cgen_trace_result.  */
  72 static int printed_result_p;
  73
  74 /* Insn and its extracted fields.
  75    Set by cgen_trace_insn, used by cgen_trace_insn_fini.
  76    ??? Move to SIM_CPU to support heterogeneous multi-cpu case.  */
  77 static const struct cgen_insn *current_insn;
  78 static const struct argbuf *current_abuf;
  79
  80 void
  81 cgen_trace_insn_init (SIM_CPU *cpu, int first_p)
  82 {
  83   bufptr = trace_buf;
  84   *bufptr = 0;
  85   first_insn_p = first_p;
  86
  87   /* Set to NULL so cgen_trace_insn_fini can know if cgen_trace_insn was
  88      called.  */
  89   current_insn = NULL;
  90   current_abuf = NULL;
  91 }
  92
  93 void
  94 cgen_trace_insn_fini (SIM_CPU *cpu, const struct argbuf *abuf, int last_p)
  95 {
  96   SIM_DESC sd = CPU_STATE (cpu);
  97
  98   /* Was insn traced?  It might not be if trace ranges are in effect.  */
  99   if (current_insn == NULL)
 100     return;
 101
 102   /* The first thing printed is current and total cycle counts.  */
 103
 104   if (PROFILE_MODEL_P (cpu)
 105       && ARGBUF_PROFILE_P (current_abuf))
 106     {
 107       unsigned long total = PROFILE_MODEL_TOTAL_CYCLES (CPU_PROFILE_DATA (cpu));
 108       unsigned long this_insn = PROFILE_MODEL_CUR_INSN_CYCLES (CPU_PROFILE_DATA (cpu));
 109
 110       if (last_p)
 111         {
 112           trace_printf (sd, cpu, "%-*ld %-*ld ",
 113                         SIZE_CYCLE_COUNT, this_insn,
 114                         SIZE_TOTAL_CYCLE_COUNT, total);
 115         }
 116       else
 117         {
 118           trace_printf (sd, cpu, "%-*ld %-*s ",
 119                         SIZE_CYCLE_COUNT, this_insn,
 120                         SIZE_TOTAL_CYCLE_COUNT, "---");
 121         }
 122     }
 123
 124   /* Print the disassembled insn.  */
 125
 126   trace_printf (sd, cpu, "%s", TRACE_PREFIX (CPU_TRACE_DATA (cpu)));
 127
 128 #if 0
 129   /* Print insn results.  */
 130   {
 131     const CGEN_OPINST *opinst = CGEN_INSN_OPERANDS (current_insn);
 132
 133     if (opinst)
 134       {
 135         int i;
 136         int indices[MAX_OPERAND_INSTANCES];
 137
 138         /* Fetch the operands used by the insn.  */
 139         /* FIXME: Add fn ptr to CGEN_CPU_DESC.  */
 140         CGEN_SYM (get_insn_operands) (CPU_CPU_DESC (cpu), current_insn,
 141                                       0, CGEN_FIELDS_BITSIZE (&insn_fields),
 142                                       indices);
 143
 144         for (i = 0;
 145              CGEN_OPINST_TYPE (opinst) != CGEN_OPINST_END;
 146              ++i, ++opinst)
 147           {
 148             if (CGEN_OPINST_TYPE (opinst) == CGEN_OPINST_OUTPUT)
 149               cgen_trace_result (cpu, current_insn, opinst, indices[i]);
 150           }
 151       }
 152   }
 153 #endif
 154
 155   /* Print anything else requested.  */
 156
 157   if (*trace_buf)
 158     trace_printf (sd, cpu, " %s\n", trace_buf);
 159   else
 160     trace_printf (sd, cpu, "\n");
 161 }
 162
 163 void
 164 cgen_trace_insn (SIM_CPU *cpu, const struct cgen_insn *opcode,
 165                  const struct argbuf *abuf, IADDR pc)
 166 {
 167   char disasm_buf[50];
 168
 169   printed_result_p = 0;
 170   current_insn = opcode;
 171   current_abuf = abuf;
 172
 173   if (CGEN_INSN_VIRTUAL_P (opcode))
 174     {
 175       trace_prefix (CPU_STATE (cpu), cpu, NULL_CIA, pc, 0,
 176                     NULL, 0, "%s", CGEN_INSN_NAME (opcode));
 177       return;
 178     }
 179
 180   CPU_DISASSEMBLER (cpu) (cpu, opcode, abuf, pc, disasm_buf);
 181   trace_prefix (CPU_STATE (cpu), cpu, NULL_CIA, pc, TRACE_LINENUM_P (cpu),
 182                 NULL, 0,
 183                 "%s%-*s",
 184                 first_insn_p ? " " : "|",
 185                 SIZE_INSTRUCTION, disasm_buf);
 186 }
 187
 188 void
 189 cgen_trace_extract (SIM_CPU *cpu, IADDR pc, const char *name, ...)
 190 {
 191   va_list args;
 192   int printed_one_p = 0;
 193   const char *fmt;
 194
 195   va_start (args, name);
 196
 197   trace_printf (CPU_STATE (cpu), cpu, "Extract: 0x%.*lx: %s ",
 198                 SIZE_PC, (unsigned long) pc, name);
 199
 200   do {
 201     int type,ival;
 202
 203     fmt = va_arg (args, const char *);
 204
 205     if (fmt)
 206       {
 207         if (printed_one_p)
 208           trace_printf (CPU_STATE (cpu), cpu, ", ");
 209         printed_one_p = 1;
 210         type = va_arg (args, int);
 211         switch (type)
 212           {
 213           case 'x' :
 214             ival = va_arg (args, int);
 215             DIAGNOSTIC_PUSH
 216             DIAGNOSTIC_IGNORE_FORMAT_NONLITERAL
 217             trace_printf (CPU_STATE (cpu), cpu, fmt, ival);
 218             DIAGNOSTIC_POP
 219             break;
 220           default :
 221             abort ();
 222           }
 223       }
 224   } while (fmt);
 225
 226   va_end (args);
 227   trace_printf (CPU_STATE (cpu), cpu, "\n");
 228 }
 229
 230 void
 231 cgen_trace_result (SIM_CPU *cpu, const char *name, int type, ...)
 232 {
 233   va_list args;
 234
 235   va_start (args, type);
 236   if (printed_result_p)
 237     cgen_trace_printf (cpu, ", ");
 238
 239   switch (type)
 240     {
 241     case 'x' :
 242     default :
 243       cgen_trace_printf (cpu, "%s <- 0x%x", name, va_arg (args, int));
 244       break;
 245     case 'f':
 246       {
 247         DI di;
 248         sim_fpu f;
 249
 250         /* this is separated from previous line for sunos cc */
 251         di = va_arg (args, DI);
 252         sim_fpu_64to (&f, di);
 253
 254         cgen_trace_printf (cpu, "%s <- ", name);
 255         sim_fpu_printn_fpu (&f, (sim_fpu_print_func *) cgen_trace_printf, 4, cpu);
 256         break;
 257       }
 258     case 'D' :
 259       {
 260         DI di;
 261         /* this is separated from previous line for sunos cc */
 262         di = va_arg (args, DI);
 263         cgen_trace_printf (cpu, "%s <- 0x%x%08x", name,
 264                            GETHIDI(di), GETLODI (di));
 265         break;
 266       }
 267     }
 268
 269   printed_result_p = 1;
 270   va_end (args);
 271 }
 272
 273 /* Print trace output to BUFPTR if active, otherwise print normally.
 274    This is only for tracing semantic code.  */
 275
 276 void
 277 cgen_trace_printf (SIM_CPU *cpu, const char *fmt, ...)
 278 {
 279   va_list args;
 280
 281   va_start (args, fmt);
 282
 283   if (bufptr == NULL)
 284     {
 285       if (TRACE_FILE (CPU_TRACE_DATA (cpu)) == NULL)
 286         (* STATE_CALLBACK (CPU_STATE (cpu))->evprintf_filtered)
 287           (STATE_CALLBACK (CPU_STATE (cpu)), fmt, args);
 288       else
 289         vfprintf (TRACE_FILE (CPU_TRACE_DATA (cpu)), fmt, args);
 290     }
 291   else
 292     {
 293       vsprintf (bufptr, fmt, args);
 294       bufptr += strlen (bufptr);
 295       /* ??? Need version of SIM_ASSERT that is always enabled.  */
 296       if (bufptr - trace_buf > SIZE_TRACE_BUF)
 297         abort ();
 298     }
 299
 300   va_end (args);
 301 }
 302 \f
 303 /* Disassembly support.  */
 304
 305 /* sprintf to a "stream" */
 306
 307 int
 308 sim_disasm_sprintf (SFILE *f, const char *format, ...)
 309 {
 310   int n;
 311   va_list args;
 312
 313   va_start (args, format);
 314   vsprintf (f->current, format, args);
 315   f->current += n = strlen (f->current);
 316   va_end (args);
 317   return n;
 318 }
 319
 320 /* Memory read support for an opcodes disassembler.  */
 321
 322 int
 323 sim_disasm_read_memory (bfd_vma memaddr, bfd_byte *myaddr, unsigned int length,
 324                         struct disassemble_info *info)
 325 {
 326   SIM_CPU *cpu = (SIM_CPU *) info->application_data;
 327   SIM_DESC sd = CPU_STATE (cpu);
 328   unsigned length_read;
 329
 330   length_read = sim_core_read_buffer (sd, cpu, read_map, myaddr, memaddr,
 331                                       length);
 332   if (length_read != length)
 333     return EIO;
 334   return 0;
 335 }
 336
 337 /* Memory error support for an opcodes disassembler.  */
 338
 339 void
 340 sim_disasm_perror_memory (int status, bfd_vma memaddr,
 341                           struct disassemble_info *info)
 342 {
 343   if (status != EIO)
 344     /* Can't happen.  */
 345     info->fprintf_func (info->stream, "Unknown error %d.", status);
 346   else
 347     /* Actually, address between memaddr and memaddr + len was
 348        out of bounds.  */
 349     info->fprintf_func (info->stream,
 350                         "Address 0x%" BFD_VMA_FMT "x is out of bounds.",
 351                         memaddr);
 352 }
 353
 354 /* Disassemble using the CGEN opcode table.
 355    ??? While executing an instruction, the insn has been decoded and all its
 356    fields have been extracted.  It is certainly possible to do the disassembly
 357    with that data.  This seems simpler, but maybe in the future the already
 358    extracted fields will be used.  */
 359
 360 void
 361 sim_cgen_disassemble_insn (SIM_CPU *cpu, const CGEN_INSN *insn,
 362                            const ARGBUF *abuf, IADDR pc, char *buf)
 363 {
 364   unsigned int length;
 365   unsigned int base_length;
 366   unsigned long insn_value;
 367   struct disassemble_info disasm_info;
 368   SFILE sfile;
 369   union {
 370     unsigned8 bytes[CGEN_MAX_INSN_SIZE];
 371     unsigned16 shorts[8];
 372     unsigned32 words[4];
 373   } insn_buf;
 374   SIM_DESC sd = CPU_STATE (cpu);
 375   CGEN_CPU_DESC cd = CPU_CPU_DESC (cpu);
 376   CGEN_EXTRACT_INFO ex_info;
 377   CGEN_FIELDS *fields = alloca (CGEN_CPU_SIZEOF_FIELDS (cd));
 378   int insn_bit_length = CGEN_INSN_BITSIZE (insn);
 379   int insn_length = insn_bit_length / 8;
 380
 381   sfile.buffer = sfile.current = buf;
 382   INIT_DISASSEMBLE_INFO (disasm_info, (FILE *) &sfile,
 383                          (fprintf_ftype) sim_disasm_sprintf);
 384   disasm_info.endian =
 385     (bfd_big_endian (STATE_PROG_BFD (sd)) ? BFD_ENDIAN_BIG
 386      : bfd_little_endian (STATE_PROG_BFD (sd)) ? BFD_ENDIAN_LITTLE
 387      : BFD_ENDIAN_UNKNOWN);
 388
 389   length = sim_core_read_buffer (sd, cpu, read_map, &insn_buf, pc,
 390                                  insn_length);
 391
 392   if (length != insn_length)
 393   {
 394     sim_io_error (sd, "unable to read address %" PRIxTA, pc);
 395   }
 396
 397   /* If the entire insn will fit into an integer, then do it. Otherwise, just
 398      use the bits of the base_insn.  */
 399   if (insn_bit_length <= 32)
 400     base_length = insn_bit_length;
 401   else
 402     base_length = min (cd->base_insn_bitsize, insn_bit_length);
 403   switch (base_length)
 404     {
 405     case 0 : return; /* fake insn, typically "compile" (aka "invalid") */
 406     case 8 : insn_value = insn_buf.bytes[0]; break;
 407     case 16 : insn_value = T2H_2 (insn_buf.shorts[0]); break;
 408     case 32 : insn_value = T2H_4 (insn_buf.words[0]); break;
 409     default: abort ();
 410     }
 411
 412   disasm_info.buffer_vma = pc;
 413   disasm_info.buffer = insn_buf.bytes;
 414   disasm_info.buffer_length = length;
 415
 416   ex_info.dis_info = (PTR) &disasm_info;
 417   ex_info.valid = (1 << length) - 1;
 418   ex_info.insn_bytes = insn_buf.bytes;
 419
 420   length = (*CGEN_EXTRACT_FN (cd, insn)) (cd, insn, &ex_info, insn_value, fields, pc);
 421   /* Result of extract fn is in bits.  */
 422   /* ??? This assumes that each instruction has a fixed length (and thus
 423      for insns with multiple versions of variable lengths they would each
 424      have their own table entry).  */
 425   if (length == insn_bit_length)
 426     {
 427       (*CGEN_PRINT_FN (cd, insn)) (cd, &disasm_info, insn, fields, pc, length);
 428     }
 429   else
 430     {
 431       /* This shouldn't happen, but aborting is too drastic.  */
 432       strcpy (buf, "***unknown***");
 433     }
 434 }