sim/common/cgen-trace.c

   1 /* Tracing support for CGEN-based simulators.
   2    Copyright (C) 1996-2021 Free Software Foundation, Inc.
   3    Contributed by Cygnus Support.
   4
   5 This file is part of GDB, the GNU debugger.
   6
   7 This program is free software; you can redistribute it and/or modify
   8 it under the terms of the GNU General Public License as published by
   9 the Free Software Foundation; either version 3 of the License, or
  10 (at your option) any later version.
  11
  12 This program is distributed in the hope that it will be useful,
  13 but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 GNU General Public License for more details.
  16
  17 You should have received a copy of the GNU General Public License
  18 along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  19
  20 #include "config.h"
  21 #include <errno.h>
  22 #include <stdlib.h>
  23 #include "dis-asm.h"
  24 #include "bfd.h"
  25 #include "sim-main.h"
  26 #include "sim-fpu.h"
  27
  28 #ifndef SIZE_INSTRUCTION
  29 #define SIZE_INSTRUCTION 16
  30 #endif
  31
  32 #ifndef SIZE_LOCATION
  33 #define SIZE_LOCATION 20
  34 #endif
  35
  36 #ifndef SIZE_PC
  37 #define SIZE_PC 6
  38 #endif
  39
  40 #ifndef SIZE_LINE_NUMBER
  41 #define SIZE_LINE_NUMBER 4
  42 #endif
  43
  44 #ifndef SIZE_CYCLE_COUNT
  45 #define SIZE_CYCLE_COUNT 2
  46 #endif
  47
  48 #ifndef SIZE_TOTAL_CYCLE_COUNT
  49 #define SIZE_TOTAL_CYCLE_COUNT 9
  50 #endif
  51
  52 #ifndef SIZE_TRACE_BUF
  53 #define SIZE_TRACE_BUF 1024
  54 #endif
  55
  56 /* Text is queued in TRACE_BUF because we want to output the insn's cycle
  57    count first but that isn't known until after the insn has executed.
  58    This also handles the queueing of trace results, TRACE_RESULT may be
  59    called multiple times for one insn.  */
  60 static char trace_buf[SIZE_TRACE_BUF];
  61 /* If NULL, output to stdout directly.  */
  62 static char *bufptr;
  63
  64 /* Non-zero if this is the first insn in a set of parallel insns.  */
  65 static int first_insn_p;
  66
  67 /* For communication between cgen_trace_insn and cgen_trace_result.  */
  68 static int printed_result_p;
  69
  70 /* Insn and its extracted fields.
  71    Set by cgen_trace_insn, used by cgen_trace_insn_fini.
  72    ??? Move to SIM_CPU to support heterogeneous multi-cpu case.  */
  73 static const struct cgen_insn *current_insn;
  74 static const struct argbuf *current_abuf;
  75
  76 void
  77 cgen_trace_insn_init (SIM_CPU *cpu, int first_p)
  78 {
  79   bufptr = trace_buf;
  80   *bufptr = 0;
  81   first_insn_p = first_p;
  82
  83   /* Set to NULL so cgen_trace_insn_fini can know if cgen_trace_insn was
  84      called.  */
  85   current_insn = NULL;
  86   current_abuf = NULL;
  87 }
  88
  89 void
  90 cgen_trace_insn_fini (SIM_CPU *cpu, const struct argbuf *abuf, int last_p)
  91 {
  92   SIM_DESC sd = CPU_STATE (cpu);
  93
  94   /* Was insn traced?  It might not be if trace ranges are in effect.  */
  95   if (current_insn == NULL)
  96     return;
  97
  98   /* The first thing printed is current and total cycle counts.  */
  99
 100   if (PROFILE_MODEL_P (cpu)
 101       && ARGBUF_PROFILE_P (current_abuf))
 102     {
 103       unsigned long total = PROFILE_MODEL_TOTAL_CYCLES (CPU_PROFILE_DATA (cpu));
 104       unsigned long this_insn = PROFILE_MODEL_CUR_INSN_CYCLES (CPU_PROFILE_DATA (cpu));
 105
 106       if (last_p)
 107         {
 108           trace_printf (sd, cpu, "%-*ld %-*ld ",
 109                         SIZE_CYCLE_COUNT, this_insn,
 110                         SIZE_TOTAL_CYCLE_COUNT, total);
 111         }
 112       else
 113         {
 114           trace_printf (sd, cpu, "%-*ld %-*s ",
 115                         SIZE_CYCLE_COUNT, this_insn,
 116                         SIZE_TOTAL_CYCLE_COUNT, "---");
 117         }
 118     }
 119
 120   /* Print the disassembled insn.  */
 121
 122   trace_printf (sd, cpu, "%s", TRACE_PREFIX (CPU_TRACE_DATA (cpu)));
 123
 124 #if 0
 125   /* Print insn results.  */
 126   {
 127     const CGEN_OPINST *opinst = CGEN_INSN_OPERANDS (current_insn);
 128
 129     if (opinst)
 130       {
 131         int i;
 132         int indices[MAX_OPERAND_INSTANCES];
 133
 134         /* Fetch the operands used by the insn.  */
 135         /* FIXME: Add fn ptr to CGEN_CPU_DESC.  */
 136         CGEN_SYM (get_insn_operands) (CPU_CPU_DESC (cpu), current_insn,
 137                                       0, CGEN_FIELDS_BITSIZE (&insn_fields),
 138                                       indices);
 139
 140         for (i = 0;
 141              CGEN_OPINST_TYPE (opinst) != CGEN_OPINST_END;
 142              ++i, ++opinst)
 143           {
 144             if (CGEN_OPINST_TYPE (opinst) == CGEN_OPINST_OUTPUT)
 145               cgen_trace_result (cpu, current_insn, opinst, indices[i]);
 146           }
 147       }
 148   }
 149 #endif
 150
 151   /* Print anything else requested.  */
 152
 153   if (*trace_buf)
 154     trace_printf (sd, cpu, " %s\n", trace_buf);
 155   else
 156     trace_printf (sd, cpu, "\n");
 157 }
 158
 159 void
 160 cgen_trace_insn (SIM_CPU *cpu, const struct cgen_insn *opcode,
 161                  const struct argbuf *abuf, IADDR pc)
 162 {
 163   char disasm_buf[50];
 164
 165   printed_result_p = 0;
 166   current_insn = opcode;
 167   current_abuf = abuf;
 168
 169   if (CGEN_INSN_VIRTUAL_P (opcode))
 170     {
 171       trace_prefix (CPU_STATE (cpu), cpu, NULL_CIA, pc, 0,
 172                     NULL, 0, CGEN_INSN_NAME (opcode));
 173       return;
 174     }
 175
 176   CPU_DISASSEMBLER (cpu) (cpu, opcode, abuf, pc, disasm_buf);
 177   trace_prefix (CPU_STATE (cpu), cpu, NULL_CIA, pc, TRACE_LINENUM_P (cpu),
 178                 NULL, 0,
 179                 "%s%-*s",
 180                 first_insn_p ? " " : "|",
 181                 SIZE_INSTRUCTION, disasm_buf);
 182 }
 183
 184 void
 185 cgen_trace_extract (SIM_CPU *cpu, IADDR pc, char *name, ...)
 186 {
 187   va_list args;
 188   int printed_one_p = 0;
 189   char *fmt;
 190
 191   va_start (args, name);
 192
 193   trace_printf (CPU_STATE (cpu), cpu, "Extract: 0x%.*lx: %s ",
 194                 SIZE_PC, (unsigned long) pc, name);
 195
 196   do {
 197     int type,ival;
 198
 199     fmt = va_arg (args, char *);
 200
 201     if (fmt)
 202       {
 203         if (printed_one_p)
 204           trace_printf (CPU_STATE (cpu), cpu, ", ");
 205         printed_one_p = 1;
 206         type = va_arg (args, int);
 207         switch (type)
 208           {
 209           case 'x' :
 210             ival = va_arg (args, int);
 211             trace_printf (CPU_STATE (cpu), cpu, fmt, ival);
 212             break;
 213           default :
 214             abort ();
 215           }
 216       }
 217   } while (fmt);
 218
 219   va_end (args);
 220   trace_printf (CPU_STATE (cpu), cpu, "\n");
 221 }
 222
 223 void
 224 cgen_trace_result (SIM_CPU *cpu, char *name, int type, ...)
 225 {
 226   va_list args;
 227
 228   va_start (args, type);
 229   if (printed_result_p)
 230     cgen_trace_printf (cpu, ", ");
 231
 232   switch (type)
 233     {
 234     case 'x' :
 235     default :
 236       cgen_trace_printf (cpu, "%s <- 0x%x", name, va_arg (args, int));
 237       break;
 238     case 'f':
 239       {
 240         DI di;
 241         sim_fpu f;
 242
 243         /* this is separated from previous line for sunos cc */
 244         di = va_arg (args, DI);
 245         sim_fpu_64to (&f, di);
 246
 247         cgen_trace_printf (cpu, "%s <- ", name);
 248         sim_fpu_printn_fpu (&f, (sim_fpu_print_func *) cgen_trace_printf, 4, cpu);
 249         break;
 250       }
 251     case 'D' :
 252       {
 253         DI di;
 254         /* this is separated from previous line for sunos cc */
 255         di = va_arg (args, DI);
 256         cgen_trace_printf (cpu, "%s <- 0x%x%08x", name,
 257                            GETHIDI(di), GETLODI (di));
 258         break;
 259       }
 260     }
 261
 262   printed_result_p = 1;
 263   va_end (args);
 264 }
 265
 266 /* Print trace output to BUFPTR if active, otherwise print normally.
 267    This is only for tracing semantic code.  */
 268
 269 void
 270 cgen_trace_printf (SIM_CPU *cpu, char *fmt, ...)
 271 {
 272   va_list args;
 273
 274   va_start (args, fmt);
 275
 276   if (bufptr == NULL)
 277     {
 278       if (TRACE_FILE (CPU_TRACE_DATA (cpu)) == NULL)
 279         (* STATE_CALLBACK (CPU_STATE (cpu))->evprintf_filtered)
 280           (STATE_CALLBACK (CPU_STATE (cpu)), fmt, args);
 281       else
 282         vfprintf (TRACE_FILE (CPU_TRACE_DATA (cpu)), fmt, args);
 283     }
 284   else
 285     {
 286       vsprintf (bufptr, fmt, args);
 287       bufptr += strlen (bufptr);
 288       /* ??? Need version of SIM_ASSERT that is always enabled.  */
 289       if (bufptr - trace_buf > SIZE_TRACE_BUF)
 290         abort ();
 291     }
 292
 293   va_end (args);
 294 }
 295 \f
 296 /* Disassembly support.  */
 297
 298 /* sprintf to a "stream" */
 299
 300 int
 301 sim_disasm_sprintf (SFILE *f, const char *format, ...)
 302 {
 303   int n;
 304   va_list args;
 305
 306   va_start (args, format);
 307   vsprintf (f->current, format, args);
 308   f->current += n = strlen (f->current);
 309   va_end (args);
 310   return n;
 311 }
 312
 313 /* Memory read support for an opcodes disassembler.  */
 314
 315 int
 316 sim_disasm_read_memory (bfd_vma memaddr, bfd_byte *myaddr, unsigned int length,
 317                         struct disassemble_info *info)
 318 {
 319   SIM_CPU *cpu = (SIM_CPU *) info->application_data;
 320   SIM_DESC sd = CPU_STATE (cpu);
 321   unsigned length_read;
 322
 323   length_read = sim_core_read_buffer (sd, cpu, read_map, myaddr, memaddr,
 324                                       length);
 325   if (length_read != length)
 326     return EIO;
 327   return 0;
 328 }
 329
 330 /* Memory error support for an opcodes disassembler.  */
 331
 332 void
 333 sim_disasm_perror_memory (int status, bfd_vma memaddr,
 334                           struct disassemble_info *info)
 335 {
 336   if (status != EIO)
 337     /* Can't happen.  */
 338     info->fprintf_func (info->stream, "Unknown error %d.", status);
 339   else
 340     /* Actually, address between memaddr and memaddr + len was
 341        out of bounds.  */
 342     info->fprintf_func (info->stream,
 343                         "Address 0x%x is out of bounds.",
 344                         (int) memaddr);
 345 }
 346
 347 /* Disassemble using the CGEN opcode table.
 348    ??? While executing an instruction, the insn has been decoded and all its
 349    fields have been extracted.  It is certainly possible to do the disassembly
 350    with that data.  This seems simpler, but maybe in the future the already
 351    extracted fields will be used.  */
 352
 353 void
 354 sim_cgen_disassemble_insn (SIM_CPU *cpu, const CGEN_INSN *insn,
 355                            const ARGBUF *abuf, IADDR pc, char *buf)
 356 {
 357   unsigned int length;
 358   unsigned int base_length;
 359   unsigned long insn_value;
 360   struct disassemble_info disasm_info;
 361   SFILE sfile;
 362   union {
 363     unsigned8 bytes[CGEN_MAX_INSN_SIZE];
 364     unsigned16 shorts[8];
 365     unsigned32 words[4];
 366   } insn_buf;
 367   SIM_DESC sd = CPU_STATE (cpu);
 368   CGEN_CPU_DESC cd = CPU_CPU_DESC (cpu);
 369   CGEN_EXTRACT_INFO ex_info;
 370   CGEN_FIELDS *fields = alloca (CGEN_CPU_SIZEOF_FIELDS (cd));
 371   int insn_bit_length = CGEN_INSN_BITSIZE (insn);
 372   int insn_length = insn_bit_length / 8;
 373
 374   sfile.buffer = sfile.current = buf;
 375   INIT_DISASSEMBLE_INFO (disasm_info, (FILE *) &sfile,
 376                          (fprintf_ftype) sim_disasm_sprintf);
 377   disasm_info.endian =
 378     (bfd_big_endian (STATE_PROG_BFD (sd)) ? BFD_ENDIAN_BIG
 379      : bfd_little_endian (STATE_PROG_BFD (sd)) ? BFD_ENDIAN_LITTLE
 380      : BFD_ENDIAN_UNKNOWN);
 381
 382   length = sim_core_read_buffer (sd, cpu, read_map, &insn_buf, pc,
 383                                  insn_length);
 384
 385   if (length != insn_length)
 386   {
 387     sim_io_error (sd, "unable to read address %x", pc);
 388   }
 389
 390   /* If the entire insn will fit into an integer, then do it. Otherwise, just
 391      use the bits of the base_insn.  */
 392   if (insn_bit_length <= 32)
 393     base_length = insn_bit_length;
 394   else
 395     base_length = min (cd->base_insn_bitsize, insn_bit_length);
 396   switch (base_length)
 397     {
 398     case 0 : return; /* fake insn, typically "compile" (aka "invalid") */
 399     case 8 : insn_value = insn_buf.bytes[0]; break;
 400     case 16 : insn_value = T2H_2 (insn_buf.shorts[0]); break;
 401     case 32 : insn_value = T2H_4 (insn_buf.words[0]); break;
 402     default: abort ();
 403     }
 404
 405   disasm_info.buffer_vma = pc;
 406   disasm_info.buffer = insn_buf.bytes;
 407   disasm_info.buffer_length = length;
 408
 409   ex_info.dis_info = (PTR) &disasm_info;
 410   ex_info.valid = (1 << length) - 1;
 411   ex_info.insn_bytes = insn_buf.bytes;
 412
 413   length = (*CGEN_EXTRACT_FN (cd, insn)) (cd, insn, &ex_info, insn_value, fields, pc);
 414   /* Result of extract fn is in bits.  */
 415   /* ??? This assumes that each instruction has a fixed length (and thus
 416      for insns with multiple versions of variable lengths they would each
 417      have their own table entry).  */
 418   if (length == insn_bit_length)
 419     {
 420       (*CGEN_PRINT_FN (cd, insn)) (cd, &disasm_info, insn, fields, pc, length);
 421     }
 422   else
 423     {
 424       /* This shouldn't happen, but aborting is too drastic.  */
 425       strcpy (buf, "***unknown***");
 426     }
 427 }