1 /* Simulator pseudo baseclass.
2 Copyright (C) 1997 Free Software Foundation, Inc.
3 Contributed by Cygnus Support.
5 This file is part of GDB, the GNU debugger.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License along
18 with this program; if not, write to the Free Software Foundation, Inc.,
19 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
22 /* Simulator state pseudo baseclass.
24 Each simulator is required to have the file ``sim-main.h''. That
25 file includes ``sim-basics.h'', defines the base type ``sim_cia''
26 (the data type that contains complete current instruction address
27 information), include ``sim-base.h'':
29 #include "sim-basics.h"
30 typedef address_word sim_cia;
33 finally, two data types ``struct _sim_cpu' and ``struct sim_state'
37 ... simulator specific members ...
42 sim_cpu cpu[MAX_NR_PROCESSORS];
44 #define STATE_CPU(sd,n) (&(sd)->cpu[n])
46 #define STATE_CPU(sd,n) (&(sd)->cpu[0])
48 ... simulator specific members ...
52 Note that `base' appears last. This makes `base.magic' appear last
53 in the entire struct and helps catch miscompilation errors. */
59 /* Pre-declare certain types. */
61 /* typedef <target-dependant> sim_cia; */
63 #define NULL_CIA ((sim_cia) 0)
65 #ifndef INVALID_INSTRUCTION_ADDRESS
66 #define INVALID_INSTRUCTION_ADDRESS ((address_word)0 - 1)
68 typedef struct _sim_cpu sim_cpu
;
70 #include "sim-module.h"
72 #include "sim-trace.h"
74 #include "sim-events.h"
75 #include "sim-profile.h"
77 #include "sim-model.h"
80 #include "sim-engine.h"
81 #include "sim-watch.h"
82 #include "sim-memopt.h"
85 /* Global pointer to current state while sim_resume is running.
86 On a machine with lots of registers, it might be possible to reserve
87 one of them for current_state. However on a machine with few registers
88 current_state can't permanently live in one and indirecting through it
89 will be slower [in which case one can have sim_resume set globals from
90 current_state for faster access].
91 If CURRENT_STATE_REG is defined, it means current_state is living in
95 #ifdef CURRENT_STATE_REG
98 extern struct sim_state
*current_state
;
102 /* The simulator may provide different (and faster) definition. */
103 #ifndef CURRENT_STATE
104 #define CURRENT_STATE current_state
110 /* Simulator's argv[0]. */
112 #define STATE_MY_NAME(sd) ((sd)->base.my_name)
114 /* Who opened the simulator. */
115 SIM_OPEN_KIND open_kind
;
116 #define STATE_OPEN_KIND(sd) ((sd)->base.open_kind)
118 /* The host callbacks. */
119 struct host_callback_struct
*callback
;
120 #define STATE_CALLBACK(sd) ((sd)->base.callback)
122 #if 0 /* FIXME: Not ready yet. */
123 /* Stuff defined in sim-config.h. */
124 struct sim_config config
;
125 #define STATE_CONFIG(sd) ((sd)->base.config)
128 /* List of installed module `init' handlers. */
129 MODULE_INIT_LIST
*init_list
;
130 #define STATE_INIT_LIST(sd) ((sd)->base.init_list)
131 /* List of installed module `uninstall' handlers. */
132 MODULE_UNINSTALL_LIST
*uninstall_list
;
133 #define STATE_UNINSTALL_LIST(sd) ((sd)->base.uninstall_list)
134 /* List of installed module `resume' handlers. */
135 MODULE_RESUME_LIST
*resume_list
;
136 #define STATE_RESUME_LIST(sd) ((sd)->base.resume_list)
137 /* List of installed module `suspend' handlers. */
138 MODULE_SUSPEND_LIST
*suspend_list
;
139 #define STATE_SUSPEND_LIST(sd) ((sd)->base.suspend_list)
141 #ifdef SIM_HAVE_MODEL
142 /* ??? This might be more appropriate in sim_cpu. */
143 /* Machine tables for this cpu. See sim-model.h. */
145 #define STATE_MODEL(sd) ((sd)->base.model)
148 /* Supported options. */
149 struct option_list
*options
;
150 #define STATE_OPTIONS(sd) ((sd)->base.options)
152 /* Non-zero if -v specified. */
154 #define STATE_VERBOSE_P(sd) ((sd)->base.verbose_p)
156 /* If non NULL, the BFD architecture specified on the command line */
157 const struct bfd_arch_info
*architecture
;
158 #define STATE_ARCHITECTURE(sd) ((sd)->base.architecture)
160 /* If non NULL, the bfd target specified on the command line */
162 #define STATE_TARGET(sd) ((sd)->base.target)
164 /* In standalone simulator, this is the program's arguments passed
165 on the command line. */
167 #define STATE_PROG_ARGV(sd) ((sd)->base.prog_argv)
169 /* The program's bfd. */
170 struct _bfd
*prog_bfd
;
171 #define STATE_PROG_BFD(sd) ((sd)->base.prog_bfd)
173 /* The program's text section. */
174 struct sec
*text_section
;
175 /* Starting and ending text section addresses from the bfd. */
176 SIM_ADDR text_start
, text_end
;
177 #define STATE_TEXT_SECTION(sd) ((sd)->base.text_section)
178 #define STATE_TEXT_START(sd) ((sd)->base.text_start)
179 #define STATE_TEXT_END(sd) ((sd)->base.text_end)
181 /* Start address, set when the program is loaded from the bfd. */
183 #define STATE_START_ADDR(sd) ((sd)->base.start_addr)
186 /* Size of the simulator's cache, if any.
187 This is not the target's cache. It is the cache the simulator uses
188 to process instructions. */
189 unsigned int scache_size
;
190 #define STATE_SCACHE_SIZE(sd) ((sd)->base.scache_size)
193 /* FIXME: Move to top level sim_state struct (as some struct)? */
194 #ifdef SIM_HAVE_FLATMEM
195 unsigned int mem_size
;
196 #define STATE_MEM_SIZE(sd) ((sd)->base.mem_size)
197 unsigned int mem_base
;
198 #define STATE_MEM_BASE(sd) ((sd)->base.mem_base)
199 unsigned char *memory
;
200 #define STATE_MEMORY(sd) ((sd)->base.memory)
203 /* core memory bus */
204 #define STATE_CORE(sd) (&(sd)->base.core)
207 /* memory-options for managing the core */
208 #define STATE_MEMOPT(sd) ((sd)->base.memopt)
212 #define STATE_EVENTS(sd) (&(sd)->base.events)
215 /* generic halt/resume engine */
217 #define STATE_ENGINE(sd) (&(sd)->base.engine)
219 /* generic watchpoint support */
220 sim_watchpoints watchpoints
;
221 #define STATE_WATCHPOINTS(sd) (&(sd)->base.watchpoints)
223 /* Marker for those wanting to do sanity checks.
224 This should remain the last member of this struct to help catch
225 miscompilation errors. */
227 #define SIM_MAGIC_NUMBER 0x4242
228 #define STATE_MAGIC(sd) ((sd)->base.magic)
233 /* Pseudo baseclass for each cpu. */
237 /* Backlink to main state struct. */
239 #define CPU_STATE(cpu) ((cpu)->base.state)
241 /* Processor specific core data */
243 #define CPU_CORE(cpu) (& (cpu)->base.core)
245 /* Trace data. See sim-trace.h. */
246 TRACE_DATA trace_data
;
247 #define CPU_TRACE_DATA(cpu) (& (cpu)->base.trace_data)
249 /* Maximum number of debuggable entities.
250 This debugging is not intended for normal use.
251 It is only enabled when the simulator is configured with --with-debug
252 which shouldn't normally be specified. */
253 #ifndef MAX_DEBUG_VALUES
254 #define MAX_DEBUG_VALUES 4
257 /* Boolean array of specified debugging flags. */
258 char debug_flags
[MAX_DEBUG_VALUES
];
259 #define CPU_DEBUG_FLAGS(cpu) ((cpu)->base.debug_flags)
260 /* Standard values. */
261 #define DEBUG_INSN_IDX 0
262 #define DEBUG_NEXT_IDX 2 /* simulator specific debug bits begin here */
264 /* Debugging output goes to this or stderr if NULL.
265 We can't store `stderr' here as stderr goes through a callback. */
267 #define CPU_DEBUG_FILE(cpu) ((cpu)->base.debug_file)
269 /* Profile data. See sim-profile.h. */
270 PROFILE_DATA profile_data
;
271 #define CPU_PROFILE_DATA(cpu) (& (cpu)->base.profile_data)
276 /* Functions for allocating/freeing a sim_state. */
277 SIM_DESC sim_state_alloc
PARAMS ((SIM_OPEN_KIND kind
, host_callback
*callback
));
278 void sim_state_free
PARAMS ((SIM_DESC
));
281 #endif /* SIM_BASE_H */