1 /* Simulator pseudo baseclass.
3 Copyright 1997-2015 Free Software Foundation, Inc.
5 Contributed by Cygnus Support.
7 This file is part of GDB, the GNU debugger.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
23 /* Simulator state pseudo baseclass.
25 Each simulator is required to have the file ``sim-main.h''. That
26 file includes ``sim-basics.h'', defines the base type ``sim_cia''
27 (the data type that contains complete current instruction address
28 information), include ``sim-base.h'':
30 #include "sim-basics.h"
31 /-* If `sim_cia' is not an integral value (e.g. a struct), define
32 CIA_ADDR to return the integral value. *-/
33 /-* typedef struct {...} sim_cia; *-/
34 /-* #define CIA_ADDR(cia) (...) *-/
37 finally, two data types `struct _sim_cpu' and `struct sim_state'
41 ... simulator specific members ...
46 sim_cpu *cpu[MAX_NR_PROCESSORS];
47 ... simulator specific members ...
51 Note that `base' appears last. This makes `base.magic' appear last
52 in the entire struct and helps catch miscompilation errors. */
58 /* Pre-declare certain types. */
60 /* typedef <target-dependant> sim_cia; */
62 #define NULL_CIA ((sim_cia) 0)
64 /* Return the current instruction address as a number.
65 Some targets treat the current instruction address as a struct
66 (e.g. for delay slot handling). */
68 #define CIA_ADDR(cia) (cia)
69 typedef address_word sim_cia
;
71 #ifndef INVALID_INSTRUCTION_ADDRESS
72 #define INVALID_INSTRUCTION_ADDRESS ((address_word)0 - 1)
75 typedef struct _sim_cpu sim_cpu
;
77 #include "sim-module.h"
79 #include "sim-trace.h"
81 #include "sim-events.h"
82 #include "sim-profile.h"
84 #include "sim-model.h"
87 #include "sim-engine.h"
88 #include "sim-watch.h"
89 #include "sim-memopt.h"
92 /* Global pointer to current state while sim_resume is running.
93 On a machine with lots of registers, it might be possible to reserve
94 one of them for current_state. However on a machine with few registers
95 current_state can't permanently live in one and indirecting through it
96 will be slower [in which case one can have sim_resume set globals from
97 current_state for faster access].
98 If CURRENT_STATE_REG is defined, it means current_state is living in
102 #ifdef CURRENT_STATE_REG
105 extern struct sim_state
*current_state
;
109 /* The simulator may provide different (and faster) definition. */
110 #ifndef CURRENT_STATE
111 #define CURRENT_STATE current_state
115 /* We require all sims to dynamically allocate cpus. See comment up top about
118 # define STATE_CPU(sd, n) ((sd)->cpu[n])
120 # define STATE_CPU(sd, n) ((sd)->cpu[0])
126 /* Simulator's argv[0]. */
128 #define STATE_MY_NAME(sd) ((sd)->base.my_name)
130 /* Who opened the simulator. */
131 SIM_OPEN_KIND open_kind
;
132 #define STATE_OPEN_KIND(sd) ((sd)->base.open_kind)
134 /* The host callbacks. */
135 struct host_callback_struct
*callback
;
136 #define STATE_CALLBACK(sd) ((sd)->base.callback)
138 /* The type of simulation environment (user/operating). */
139 enum sim_environment environment
;
140 #define STATE_ENVIRONMENT(sd) ((sd)->base.environment)
142 #if 0 /* FIXME: Not ready yet. */
143 /* Stuff defined in sim-config.h. */
144 struct sim_config config
;
145 #define STATE_CONFIG(sd) ((sd)->base.config)
148 /* List of installed module `init' handlers. */
149 struct module_list
*modules
;
150 #define STATE_MODULES(sd) ((sd)->base.modules)
152 /* Supported options. */
153 struct option_list
*options
;
154 #define STATE_OPTIONS(sd) ((sd)->base.options)
156 /* Non-zero if -v specified. */
158 #define STATE_VERBOSE_P(sd) ((sd)->base.verbose_p)
160 /* Non cpu-specific trace data. See sim-trace.h. */
161 TRACE_DATA trace_data
;
162 #define STATE_TRACE_DATA(sd) (& (sd)->base.trace_data)
164 /* If non NULL, the BFD architecture specified on the command line */
165 const struct bfd_arch_info
*architecture
;
166 #define STATE_ARCHITECTURE(sd) ((sd)->base.architecture)
168 /* If non NULL, the bfd target specified on the command line */
170 #define STATE_TARGET(sd) ((sd)->base.target)
172 /* In standalone simulator, this is the program's arguments passed
173 on the command line. */
175 #define STATE_PROG_ARGV(sd) ((sd)->base.prog_argv)
177 /* The program's bfd. */
178 struct bfd
*prog_bfd
;
179 #define STATE_PROG_BFD(sd) ((sd)->base.prog_bfd)
181 /* Symbol table for prog_bfd */
182 struct bfd_symbol
**prog_syms
;
183 #define STATE_PROG_SYMS(sd) ((sd)->base.prog_syms)
185 /* The program's text section. */
186 struct bfd_section
*text_section
;
187 /* Starting and ending text section addresses from the bfd. */
188 bfd_vma text_start
, text_end
;
189 #define STATE_TEXT_SECTION(sd) ((sd)->base.text_section)
190 #define STATE_TEXT_START(sd) ((sd)->base.text_start)
191 #define STATE_TEXT_END(sd) ((sd)->base.text_end)
193 /* Start address, set when the program is loaded from the bfd. */
195 #define STATE_START_ADDR(sd) ((sd)->base.start_addr)
197 /* Size of the simulator's cache, if any.
198 This is not the target's cache. It is the cache the simulator uses
199 to process instructions. */
200 unsigned int scache_size
;
201 #define STATE_SCACHE_SIZE(sd) ((sd)->base.scache_size)
203 /* FIXME: Move to top level sim_state struct (as some struct)? */
204 #ifdef SIM_HAVE_FLATMEM
205 unsigned int mem_size
;
206 #define STATE_MEM_SIZE(sd) ((sd)->base.mem_size)
207 unsigned int mem_base
;
208 #define STATE_MEM_BASE(sd) ((sd)->base.mem_base)
209 unsigned char *memory
;
210 #define STATE_MEMORY(sd) ((sd)->base.memory)
213 /* core memory bus */
214 #define STATE_CORE(sd) (&(sd)->base.core)
217 /* Record of memory sections added via the memory-options interface. */
218 #define STATE_MEMOPT(sd) ((sd)->base.memopt)
222 #define STATE_EVENTS(sd) (&(sd)->base.events)
225 /* generic halt/resume engine */
227 #define STATE_ENGINE(sd) (&(sd)->base.engine)
229 /* generic watchpoint support */
230 sim_watchpoints watchpoints
;
231 #define STATE_WATCHPOINTS(sd) (&(sd)->base.watchpoints)
235 #define STATE_HW(sd) ((sd)->base.hw)
238 /* Should image loads be performed using the LMA or VMA? Older
239 simulators use the VMA while newer simulators prefer the LMA. */
241 #define STATE_LOAD_AT_LMA_P(SD) ((SD)->base.load_at_lma_p)
243 /* Marker for those wanting to do sanity checks.
244 This should remain the last member of this struct to help catch
245 miscompilation errors. */
247 #define SIM_MAGIC_NUMBER 0x4242
248 #define STATE_MAGIC(sd) ((sd)->base.magic)
251 /* Functions for allocating/freeing a sim_state. */
252 SIM_DESC
sim_state_alloc (SIM_OPEN_KIND kind
, host_callback
*callback
);
253 void sim_state_free (SIM_DESC
);
255 #endif /* SIM_BASE_H */