sim/common/sim-config.h

   1 /* The common simulator framework for GDB, the GNU Debugger.
   2
   3    Copyright 2002-2021 Free Software Foundation, Inc.
   4
   5    Contributed by Andrew Cagney and Red Hat.
   6
   7    This file is part of GDB.
   8
   9    This program is free software; you can redistribute it and/or modify
  10    it under the terms of the GNU General Public License as published by
  11    the Free Software Foundation; either version 3 of the License, or
  12    (at your option) any later version.
  13
  14    This program is distributed in the hope that it will be useful,
  15    but WITHOUT ANY WARRANTY; without even the implied warranty of
  16    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17    GNU General Public License for more details.
  18
  19    You should have received a copy of the GNU General Public License
  20    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  21
  22
  23 #ifndef SIM_CONFIG_H
  24 #define SIM_CONFIG_H
  25
  26
  27 /* Host dependant:
  28
  29    The CPP below defines information about the compilation host.  In
  30    particular it defines the macro's:
  31
  32    HOST_BYTE_ORDER      The byte order of the host. Could be BFD_ENDIAN_LITTLE
  33                         or BFD_ENDIAN_BIG.
  34
  35  */
  36
  37 #ifdef WORDS_BIGENDIAN
  38 # define HOST_BYTE_ORDER BFD_ENDIAN_BIG
  39 #else
  40 # define HOST_BYTE_ORDER BFD_ENDIAN_LITTLE
  41 #endif
  42
  43
  44 /* Until devices and tree properties are sorted out, tell sim-config.c
  45    not to call the tree_find_foo fns.  */
  46 #define WITH_TREE_PROPERTIES 0
  47
  48
  49 /* Endianness of the target.
  50
  51    Possible values are BFD_ENDIAN_UNKNOWN, BFD_ENDIAN_LITTLE, or BFD_ENDIAN_BIG.  */
  52
  53 extern enum bfd_endian current_target_byte_order;
  54 #define CURRENT_TARGET_BYTE_ORDER \
  55   (WITH_TARGET_BYTE_ORDER != BFD_ENDIAN_UNKNOWN \
  56    ? WITH_TARGET_BYTE_ORDER : current_target_byte_order)
  57
  58
  59
  60 /* XOR endian.
  61
  62    In addition to the above, the simulator can support the horrible
  63    XOR endian mode (as found in the PowerPC and MIPS ISA).  See
  64    sim-core for more information.
  65
  66    If WITH_XOR_ENDIAN is non-zero, it specifies the number of bytes
  67    potentially involved in the XOR munge. A typical value is 8. */
  68
  69 #ifndef WITH_XOR_ENDIAN
  70 #define WITH_XOR_ENDIAN         0
  71 #endif
  72
  73
  74
  75 /* SMP support:
  76
  77    Sets a limit on the number of processors that can be simulated.  If
  78    WITH_SMP is set to zero (0), the simulator is restricted to
  79    suporting only one processor (and as a consequence leaves the SMP
  80    code out of the build process).
  81
  82    The actual number of processors is taken from the device
  83    /options/smp@<nr-cpu> */
  84
  85 #if defined (WITH_SMP) && (WITH_SMP > 0)
  86 #define MAX_NR_PROCESSORS               WITH_SMP
  87 #endif
  88
  89 #ifndef MAX_NR_PROCESSORS
  90 #define MAX_NR_PROCESSORS               1
  91 #endif
  92
  93
  94 /* Size of target word, address and OpenFirmware Cell:
  95
  96    The target word size is determined by the natural size of its
  97    reginsters.
  98
  99    On most hosts, the address and cell are the same size as a target
 100    word.  */
 101
 102 #ifndef WITH_TARGET_WORD_BITSIZE
 103 #define WITH_TARGET_WORD_BITSIZE        32
 104 #endif
 105
 106 #ifndef WITH_TARGET_ADDRESS_BITSIZE
 107 #define WITH_TARGET_ADDRESS_BITSIZE     WITH_TARGET_WORD_BITSIZE
 108 #endif
 109
 110 #ifndef WITH_TARGET_CELL_BITSIZE
 111 #define WITH_TARGET_CELL_BITSIZE        WITH_TARGET_WORD_BITSIZE
 112 #endif
 113
 114 #ifndef WITH_TARGET_FLOATING_POINT_BITSIZE
 115 #define WITH_TARGET_FLOATING_POINT_BITSIZE 64
 116 #endif
 117
 118
 119
 120 /* Most significant bit of target:
 121
 122    Set this according to your target's bit numbering convention.  For
 123    the PowerPC it is zero, for many other targets it is 31 or 63.
 124
 125    For targets that can both have either 32 or 64 bit words and number
 126    MSB as 31, 63.  Define this to be (WITH_TARGET_WORD_BITSIZE - 1) */
 127
 128 #ifndef WITH_TARGET_WORD_MSB
 129 #define WITH_TARGET_WORD_MSB            0
 130 #endif
 131
 132
 133
 134 /* Program environment:
 135
 136    Three environments are available - UEA (user), VEA (virtual) and
 137    OEA (perating).  The former two are environment that users would
 138    expect to see (VEA includes things like coherency and the time
 139    base) while OEA is what an operating system expects to see.  By
 140    setting these to specific values, the build process is able to
 141    eliminate non relevent environment code.
 142
 143    STATE_ENVIRONMENT(sd) specifies which of vea or oea is required for
 144    the current runtime.
 145
 146    ALL_ENVIRONMENT is used during configuration as a value for
 147    WITH_ENVIRONMENT to indicate the choice is runtime selectable.
 148    The default is then USER_ENVIRONMENT [since allowing the user to choose
 149    the default at configure time seems like featuritis and since people using
 150    OPERATING_ENVIRONMENT have more to worry about than selecting the
 151    default].
 152    ALL_ENVIRONMENT is also used to set STATE_ENVIRONMENT to the
 153    "uninitialized" state.  */
 154
 155 enum sim_environment {
 156   ALL_ENVIRONMENT,
 157   USER_ENVIRONMENT,
 158   VIRTUAL_ENVIRONMENT,
 159   OPERATING_ENVIRONMENT
 160 };
 161
 162 /* To be prepended to simulator calls with absolute file paths and
 163    chdir:ed at startup.  */
 164 extern char *simulator_sysroot;
 165
 166 /* Callback & Modulo Memory.
 167
 168    Core includes a builtin memory type (raw_memory) that is
 169    implemented using an array.  raw_memory does not require any
 170    additional functions etc.
 171
 172    Callback memory is where the core calls a core device for the data
 173    it requires.  Callback memory can be layered using priorities.
 174
 175    Modulo memory is a variation on raw_memory where ADDRESS & (MODULO
 176    - 1) is used as the index into the memory array.
 177
 178    The OEA model uses callback memory for devices.
 179
 180    The VEA model uses callback memory to capture `page faults'.
 181
 182    BTW, while raw_memory could have been implemented as a callback,
 183    profiling has shown that there is a biger win (at least for the
 184    x86) in eliminating a function call for the most common
 185    (raw_memory) case. */
 186
 187
 188 /* Alignment:
 189
 190    A processor architecture may or may not handle misaligned
 191    transfers.
 192
 193    As alternatives: both little and big endian modes take an exception
 194    (STRICT_ALIGNMENT); big and little endian models handle misaligned
 195    transfers (NONSTRICT_ALIGNMENT); or the address is forced into
 196    alignment using a mask (FORCED_ALIGNMENT).
 197
 198    Mixed alignment should be specified when the simulator needs to be
 199    able to change the alignment requirements on the fly (eg for
 200    bi-endian support). */
 201
 202 enum sim_alignments {
 203   MIXED_ALIGNMENT,
 204   NONSTRICT_ALIGNMENT,
 205   STRICT_ALIGNMENT,
 206   FORCED_ALIGNMENT,
 207 };
 208
 209 extern enum sim_alignments current_alignment;
 210
 211 #if !defined (WITH_ALIGNMENT)
 212 #define WITH_ALIGNMENT 0
 213 #endif
 214
 215 #define CURRENT_ALIGNMENT (WITH_ALIGNMENT \
 216                            ? WITH_ALIGNMENT \
 217                            : current_alignment)
 218
 219
 220
 221 /* Floating point suport:
 222
 223    Should the processor trap for all floating point instructions (as
 224    if the hardware wasn't implemented) or implement the floating point
 225    instructions directly. */
 226
 227 #if defined (WITH_FLOATING_POINT)
 228
 229 #define SOFT_FLOATING_POINT             1
 230 #define HARD_FLOATING_POINT             2
 231
 232 extern int current_floating_point;
 233 #define CURRENT_FLOATING_POINT (WITH_FLOATING_POINT \
 234                                 ? WITH_FLOATING_POINT \
 235                                 : current_floating_point)
 236
 237 #endif
 238
 239
 240 /* Whether to check instructions for reserved bits being set */
 241
 242 /* #define WITH_RESERVED_BITS           1 */
 243
 244
 245
 246 /* include monitoring code */
 247
 248 #define MONITOR_INSTRUCTION_ISSUE       1
 249 #define MONITOR_LOAD_STORE_UNIT         2
 250 /* do not define WITH_MON by default */
 251 #define DEFAULT_WITH_MON                (MONITOR_LOAD_STORE_UNIT \
 252                                          | MONITOR_INSTRUCTION_ISSUE)
 253
 254
 255 /* Current CPU model (models are in the generated models.h include file)  */
 256 #ifndef WITH_MODEL
 257 #define WITH_MODEL                      0
 258 #endif
 259
 260 #define CURRENT_MODEL (WITH_MODEL       \
 261                        ? WITH_MODEL     \
 262                        : current_model)
 263
 264 #define MODEL_ISSUE_IGNORE              (-1)
 265 #define MODEL_ISSUE_PROCESS             1
 266
 267 #ifndef WITH_MODEL_ISSUE
 268 #define WITH_MODEL_ISSUE                0
 269 #endif
 270
 271 extern int current_model_issue;
 272 #define CURRENT_MODEL_ISSUE (WITH_MODEL_ISSUE   \
 273                              ? WITH_MODEL_ISSUE \
 274                              : current_model_issue)
 275
 276
 277
 278 /* Whether or not input/output just uses stdio, or uses printf_filtered for
 279    output, and polling input for input.  */
 280
 281 #define DONT_USE_STDIO                  2
 282 #define DO_USE_STDIO                    1
 283
 284 extern int current_stdio;
 285 #define CURRENT_STDIO (WITH_STDIO       \
 286                        ? WITH_STDIO     \
 287                        : current_stdio)
 288
 289
 290
 291 /* Set the default state configuration, before parsing argv.  */
 292
 293 extern void sim_config_default (SIM_DESC sd);
 294
 295 /* Complete and verify the simulator configuration.  */
 296
 297 extern SIM_RC sim_config (SIM_DESC sd);
 298
 299 /* Print the simulator configuration.  */
 300
 301 extern void sim_config_print (SIM_DESC sd);
 302
 303
 304 #endif