1 /* This file is part of the program psim.
3 Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
17 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
26 #include "sim-assert.h"
28 /* "core" module install handler.
30 This is called via sim_module_install to install the "core" subsystem
31 into the simulator. */
33 static MODULE_INIT_FN sim_core_init
;
34 static MODULE_UNINSTALL_FN sim_core_uninstall
;
37 /* TODO: create sim/common/device.h */
38 void device_error (device
*me
, char* message
, ...);
39 int device_io_read_buffer(device
*me
, void *dest
, int space
, address_word addr
, unsigned nr_bytes
, sim_cpu
*processor
, sim_cia cia
);
40 int device_io_write_buffer(device
*me
, const void *source
, int space
, address_word addr
, unsigned nr_bytes
, sim_cpu
*processor
, sim_cia cia
);
45 sim_core_install (SIM_DESC sd
)
47 SIM_ASSERT (STATE_MAGIC (sd
) == SIM_MAGIC_NUMBER
);
49 /* establish the other handlers */
50 sim_module_add_uninstall_fn (sd
, sim_core_uninstall
);
51 sim_module_add_init_fn (sd
, sim_core_init
);
53 /* establish any initial data structures - none */
58 /* Uninstall the "core" subsystem from the simulator. */
62 sim_core_uninstall (SIM_DESC sd
)
64 sim_core
*core
= STATE_CORE(sd
);
66 /* blow away any mappings */
67 for (map
= 0; map
< nr_sim_core_maps
; map
++) {
68 sim_core_mapping
*curr
= core
->common
.map
[map
].first
;
69 while (curr
!= NULL
) {
70 sim_core_mapping
*tbd
= curr
;
72 if (tbd
->free_buffer
!= NULL
) {
73 SIM_ASSERT(tbd
->buffer
!= NULL
);
74 zfree(tbd
->free_buffer
);
78 core
->common
.map
[map
].first
= NULL
;
85 sim_core_init (SIM_DESC sd
)
93 #ifndef SIM_CORE_SIGNAL
94 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
95 sim_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), (TRANSFER), (ERROR))
99 sim_core_signal (SIM_DESC sd
,
105 transfer_type transfer
,
106 sim_core_signals sig
)
108 const char *copy
= (transfer
== read_transfer
? "read" : "write");
109 address_word ip
= CIA_ADDR (cia
);
112 case sim_core_unmapped_signal
:
113 sim_io_eprintf (sd
, "core: %d byte %s to unmapped address 0x%lx at 0x%lx\n",
114 nr_bytes
, copy
, (unsigned long) addr
, (unsigned long) ip
);
115 sim_engine_halt (sd
, cpu
, NULL
, cia
, sim_stopped
, SIM_SIGSEGV
);
117 case sim_core_unaligned_signal
:
118 sim_io_eprintf (sd
, "core: %d byte misaligned %s to address 0x%lx at 0x%lx\n",
119 nr_bytes
, copy
, (unsigned long) addr
, (unsigned long) ip
);
120 sim_engine_halt (sd
, cpu
, NULL
, cia
, sim_stopped
, SIM_SIGBUS
);
123 sim_engine_abort (sd
, cpu
, cia
,
124 "sim_core_signal - internal error - bad switch");
132 sim_core_map_to_str (sim_core_maps map
)
136 case sim_core_read_map
: return "read";
137 case sim_core_write_map
: return "write";
138 case sim_core_execute_map
: return "exec";
139 default: return "(invalid-map)";
146 new_sim_core_mapping (SIM_DESC sd
,
150 address_word nr_bytes
,
156 sim_core_mapping
*new_mapping
= ZALLOC(sim_core_mapping
);
158 new_mapping
->level
= level
;
159 new_mapping
->space
= space
;
160 new_mapping
->base
= addr
;
161 new_mapping
->nr_bytes
= nr_bytes
;
162 new_mapping
->bound
= addr
+ (nr_bytes
- 1);
164 new_mapping
->mask
= (unsigned) 0 - 1;
166 new_mapping
->mask
= modulo
- 1;
167 new_mapping
->buffer
= buffer
;
168 new_mapping
->free_buffer
= free_buffer
;
169 new_mapping
->device
= device
;
176 sim_core_map_attach (SIM_DESC sd
,
177 sim_core_map
*access_map
,
181 address_word nr_bytes
,
183 device
*client
, /*callback/default*/
184 void *buffer
, /*raw_memory*/
185 void *free_buffer
) /*raw_memory*/
187 /* find the insertion point for this additional mapping and then
189 sim_core_mapping
*next_mapping
;
190 sim_core_mapping
**last_mapping
;
192 SIM_ASSERT ((client
== NULL
) != (buffer
== NULL
));
193 SIM_ASSERT ((client
== NULL
) >= (free_buffer
!= NULL
));
195 /* actually do occasionally get a zero size map */
199 device_error(client
, "called on sim_core_map_attach with size zero");
201 sim_io_error (sd
, "called on sim_core_map_attach with size zero");
205 /* find the insertion point (between last/next) */
206 next_mapping
= access_map
->first
;
207 last_mapping
= &access_map
->first
;
208 while(next_mapping
!= NULL
209 && (next_mapping
->level
< level
210 || (next_mapping
->level
== level
211 && next_mapping
->bound
< addr
)))
213 /* provided levels are the same */
214 /* assert: next_mapping->base > all bases before next_mapping */
215 /* assert: next_mapping->bound >= all bounds before next_mapping */
216 last_mapping
= &next_mapping
->next
;
217 next_mapping
= next_mapping
->next
;
220 /* check insertion point correct */
221 SIM_ASSERT (next_mapping
== NULL
|| next_mapping
->level
>= level
);
222 if (next_mapping
!= NULL
&& next_mapping
->level
== level
223 && next_mapping
->base
< (addr
+ (nr_bytes
- 1)))
226 device_error (client
, "memory map %d:0x%lx..0x%lx (%ld bytes) overlaps %d:0x%lx..0x%lx (%ld bytes)",
230 (long) (addr
+ (nr_bytes
- 1)),
232 (long) next_mapping
->base
,
233 (long) next_mapping
->bound
,
234 (long) next_mapping
->nr_bytes
);
236 sim_io_error (sd
, "memory map %d:0x%lx..0x%lx (%ld bytes) overlaps %d:0x%lx..0x%lx (%ld bytes)",
240 (long) (addr
+ (nr_bytes
- 1)),
242 (long) next_mapping
->base
,
243 (long) next_mapping
->bound
,
244 (long) next_mapping
->nr_bytes
);
248 /* create/insert the new mapping */
249 *last_mapping
= new_sim_core_mapping(sd
,
251 space
, addr
, nr_bytes
, modulo
,
252 client
, buffer
, free_buffer
);
253 (*last_mapping
)->next
= next_mapping
;
256 /* Attach memory or a memory mapped device to the simulator.
257 See sim-core.h for a full description. */
261 sim_core_attach (SIM_DESC sd
,
267 address_word nr_bytes
,
270 void *optional_buffer
)
272 sim_core
*memory
= STATE_CORE(sd
);
277 /* check for for attempt to use unimplemented per-processor core map */
279 sim_io_error (sd
, "sim_core_map_attach - processor specific memory map not yet supported");
281 if ((access
& access_read_write_exec
) == 0
282 || (access
& ~access_read_write_exec
) != 0)
285 device_error(client
, "invalid access for core attach");
287 sim_io_error (sd
, "invalid access for core attach");
291 /* verify modulo memory */
292 if (!WITH_MODULO_MEMORY
&& modulo
!= 0)
295 device_error (client
, "sim_core_attach - internal error - modulo memory disabled");
297 sim_io_error (sd
, "sim_core_attach - internal error - modulo memory disabled");
300 if (client
!= NULL
&& modulo
!= 0)
303 device_error (client
, "sim_core_attach - internal error - modulo and callback memory conflict");
305 sim_io_error (sd
, "sim_core_attach - internal error - modulo and callback memory conflict");
310 unsigned mask
= modulo
- 1;
312 while (mask
>= sizeof (unsigned64
)) /* minimum modulo */
319 if (mask
!= sizeof (unsigned64
) - 1)
322 device_error (client
, "sim_core_attach - internal error - modulo %lx not power of two", (long) modulo
);
324 sim_io_error (sd
, "sim_core_attach - internal error - modulo %lx not power of two", (long) modulo
);
329 /* verify consistency between device and buffer */
330 if (client
!= NULL
&& optional_buffer
!= NULL
)
333 device_error (client
, "sim_core_attach - internal error - conflicting buffer and attach arguments");
335 sim_io_error (sd
, "sim_core_attach - internal error - conflicting buffer and attach arguments");
340 if (optional_buffer
== NULL
)
342 int padding
= (addr
% sizeof (unsigned64
));
343 unsigned long bytes
= (modulo
== 0 ? nr_bytes
: modulo
) + padding
;
344 free_buffer
= zalloc (bytes
);
345 buffer
= (char*) free_buffer
+ padding
;
349 buffer
= optional_buffer
;
360 /* attach the region to all applicable access maps */
362 map
< nr_sim_core_maps
;
367 case sim_core_read_map
:
368 if (access
& access_read
)
369 sim_core_map_attach (sd
, &memory
->common
.map
[map
],
370 level
, space
, addr
, nr_bytes
, modulo
,
371 client
, buffer
, free_buffer
);
374 case sim_core_write_map
:
375 if (access
& access_write
)
376 sim_core_map_attach (sd
, &memory
->common
.map
[map
],
377 level
, space
, addr
, nr_bytes
, modulo
,
378 client
, buffer
, free_buffer
);
381 case sim_core_execute_map
:
382 if (access
& access_exec
)
383 sim_core_map_attach (sd
, &memory
->common
.map
[map
],
384 level
, space
, addr
, nr_bytes
, modulo
,
385 client
, buffer
, free_buffer
);
389 sim_io_error (sd
, "sim_core_attach - internal error - bad switch");
394 /* Just copy this map to each of the processor specific data structures.
395 FIXME - later this will be replaced by true processor specific
399 for (i
= 0; i
< MAX_NR_PROCESSORS
; i
++)
401 CPU_CORE (STATE_CPU (sd
, i
))->common
= STATE_CORE (sd
)->common
;
407 /* Remove any memory reference related to this address */
408 STATIC_INLINE_SIM_CORE\
410 sim_core_map_detach (SIM_DESC sd
,
411 sim_core_map
*access_map
,
416 sim_core_mapping
**entry
;
417 for (entry
= &access_map
->first
;
419 entry
= &(*entry
)->next
)
421 if ((*entry
)->base
== addr
422 && (*entry
)->level
== level
423 && (*entry
)->space
== space
)
425 sim_core_mapping
*dead
= (*entry
);
426 (*entry
) = dead
->next
;
427 if (dead
->free_buffer
!= NULL
)
428 zfree (dead
->free_buffer
);
437 sim_core_detach (SIM_DESC sd
,
443 sim_core
*memory
= STATE_CORE (sd
);
445 for (map
= 0; map
< nr_sim_core_maps
; map
++)
447 sim_core_map_detach (sd
, &memory
->common
.map
[map
],
448 level
, address_space
, addr
);
450 /* Just copy this update to each of the processor specific data
451 structures. FIXME - later this will be replaced by true
452 processor specific maps. */
455 for (i
= 0; i
< MAX_NR_PROCESSORS
; i
++)
457 CPU_CORE (STATE_CPU (sd
, i
))->common
= STATE_CORE (sd
)->common
;
463 STATIC_INLINE_SIM_CORE\
465 sim_core_find_mapping(sim_core_common
*core
,
469 transfer_type transfer
,
470 int abort
, /*either 0 or 1 - hint to inline/-O */
471 sim_cpu
*cpu
, /* abort => cpu != NULL */
474 sim_core_mapping
*mapping
= core
->map
[map
].first
;
475 ASSERT ((addr
& (nr_bytes
- 1)) == 0); /* must be aligned */
476 ASSERT ((addr
+ (nr_bytes
- 1)) >= addr
); /* must not wrap */
477 ASSERT (!abort
|| cpu
!= NULL
); /* abort needs a non null CPU */
478 while (mapping
!= NULL
)
480 if (addr
>= mapping
->base
481 && (addr
+ (nr_bytes
- 1)) <= mapping
->bound
)
483 mapping
= mapping
->next
;
487 SIM_CORE_SIGNAL (CPU_STATE (cpu
), cpu
, cia
, map
, nr_bytes
, addr
, transfer
,
488 sim_core_unmapped_signal
);
494 STATIC_INLINE_SIM_CORE\
496 sim_core_translate (sim_core_mapping
*mapping
,
499 if (WITH_MODULO_MEMORY
)
500 return (void *)((unsigned8
*) mapping
->buffer
501 + ((addr
- mapping
->base
) & mapping
->mask
));
503 return (void *)((unsigned8
*) mapping
->buffer
504 + addr
- mapping
->base
);
510 sim_core_read_buffer (SIM_DESC sd
,
517 sim_core_common
*core
= (cpu
== NULL
? &STATE_CORE (sd
)->common
: &CPU_CORE (cpu
)->common
);
519 while (count
< len
) {
520 unsigned_word raddr
= addr
+ count
;
521 sim_core_mapping
*mapping
=
522 sim_core_find_mapping(core
, map
,
523 raddr
, /*nr-bytes*/1,
525 0 /*dont-abort*/, NULL
, NULL_CIA
);
529 if (mapping
->device
!= NULL
) {
530 int nr_bytes
= len
- count
;
531 if (raddr
+ nr_bytes
- 1> mapping
->bound
)
532 nr_bytes
= mapping
->bound
- raddr
+ 1;
533 if (device_io_read_buffer(mapping
->device
,
534 (unsigned_1
*)buffer
+ count
,
539 CIA_GET(cpu
)) != nr_bytes
)
546 ((unsigned_1
*)buffer
)[count
] =
547 *(unsigned_1
*)sim_core_translate(mapping
, raddr
);
557 sim_core_write_buffer (SIM_DESC sd
,
564 sim_core_common
*core
= (cpu
== NULL
? &STATE_CORE (sd
)->common
: &CPU_CORE (cpu
)->common
);
566 while (count
< len
) {
567 unsigned_word raddr
= addr
+ count
;
568 sim_core_mapping
*mapping
=
569 sim_core_find_mapping(core
, map
,
570 raddr
, /*nr-bytes*/1,
572 0 /*dont-abort*/, NULL
, NULL_CIA
);
576 if (WITH_CALLBACK_MEMORY
577 && mapping
->device
!= NULL
) {
578 int nr_bytes
= len
- count
;
579 if (raddr
+ nr_bytes
- 1 > mapping
->bound
)
580 nr_bytes
= mapping
->bound
- raddr
+ 1;
581 if (device_io_write_buffer(mapping
->device
,
582 (unsigned_1
*)buffer
+ count
,
587 CIA_GET(cpu
)) != nr_bytes
)
594 *(unsigned_1
*)sim_core_translate(mapping
, raddr
) =
595 ((unsigned_1
*)buffer
)[count
];
605 sim_core_set_xor (SIM_DESC sd
,
609 /* set up the XOR map if required. */
610 if (WITH_XOR_ENDIAN
) {
612 sim_core
*core
= STATE_CORE (sd
);
613 sim_cpu_core
*cpu_core
= (cpu
!= NULL
? CPU_CORE (cpu
) : NULL
);
614 if (cpu_core
!= NULL
)
619 mask
= WITH_XOR_ENDIAN
- 1;
622 while (i
- 1 < WITH_XOR_ENDIAN
)
624 cpu_core
->xor[i
-1] = mask
;
625 mask
= (mask
<< 1) & (WITH_XOR_ENDIAN
- 1);
632 core
->byte_xor
= WITH_XOR_ENDIAN
- 1;
640 sim_engine_abort (sd
, cpu
, NULL_CIA
,
641 "Attempted to enable xor-endian mode when permenantly disabled.");
645 STATIC_INLINE_SIM_CORE\
647 reverse_n (unsigned_1
*dest
,
648 const unsigned_1
*src
,
652 for (i
= 0; i
< nr_bytes
; i
++)
654 dest
[nr_bytes
- i
- 1] = src
[i
];
661 sim_core_xor_read_buffer (SIM_DESC sd
,
668 address_word byte_xor
= (cpu
== NULL
? STATE_CORE (sd
)->byte_xor
: CPU_CORE (cpu
)->xor[0]);
669 if (!WITH_XOR_ENDIAN
|| !byte_xor
)
670 return sim_core_read_buffer (sd
, cpu
, map
, buffer
, addr
, nr_bytes
);
672 /* only break up transfers when xor-endian is both selected and enabled */
674 unsigned_1 x
[WITH_XOR_ENDIAN
+ 1]; /* +1 to avoid zero-sized array */
675 unsigned nr_transfered
= 0;
676 address_word start
= addr
;
677 unsigned nr_this_transfer
= (WITH_XOR_ENDIAN
- (addr
& ~(WITH_XOR_ENDIAN
- 1)));
679 /* initial and intermediate transfers are broken when they cross
680 an XOR endian boundary */
681 while (nr_transfered
+ nr_this_transfer
< nr_bytes
)
682 /* initial/intermediate transfers */
684 /* since xor-endian is enabled stop^xor defines the start
685 address of the transfer */
686 stop
= start
+ nr_this_transfer
- 1;
687 SIM_ASSERT (start
<= stop
);
688 SIM_ASSERT ((stop
^ byte_xor
) <= (start
^ byte_xor
));
689 if (sim_core_read_buffer (sd
, cpu
, map
, x
, stop
^ byte_xor
, nr_this_transfer
)
691 return nr_transfered
;
692 reverse_n (&((unsigned_1
*)buffer
)[nr_transfered
], x
, nr_this_transfer
);
693 nr_transfered
+= nr_this_transfer
;
694 nr_this_transfer
= WITH_XOR_ENDIAN
;
698 nr_this_transfer
= nr_bytes
- nr_transfered
;
699 stop
= start
+ nr_this_transfer
- 1;
700 SIM_ASSERT (stop
== (addr
+ nr_bytes
- 1));
701 if (sim_core_read_buffer (sd
, cpu
, map
, x
, stop
^ byte_xor
, nr_this_transfer
)
703 return nr_transfered
;
704 reverse_n (&((unsigned_1
*)buffer
)[nr_transfered
], x
, nr_this_transfer
);
712 sim_core_xor_write_buffer (SIM_DESC sd
,
719 address_word byte_xor
= (cpu
== NULL
? STATE_CORE (sd
)->byte_xor
: CPU_CORE (cpu
)->xor[0]);
720 if (!WITH_XOR_ENDIAN
|| !byte_xor
)
721 return sim_core_write_buffer (sd
, cpu
, map
, buffer
, addr
, nr_bytes
);
723 /* only break up transfers when xor-endian is both selected and enabled */
725 unsigned_1 x
[WITH_XOR_ENDIAN
+ 1]; /* +1 to avoid zero sized array */
726 unsigned nr_transfered
= 0;
727 address_word start
= addr
;
728 unsigned nr_this_transfer
= (WITH_XOR_ENDIAN
- (addr
& ~(WITH_XOR_ENDIAN
- 1)));
730 /* initial and intermediate transfers are broken when they cross
731 an XOR endian boundary */
732 while (nr_transfered
+ nr_this_transfer
< nr_bytes
)
733 /* initial/intermediate transfers */
735 /* since xor-endian is enabled stop^xor defines the start
736 address of the transfer */
737 stop
= start
+ nr_this_transfer
- 1;
738 SIM_ASSERT (start
<= stop
);
739 SIM_ASSERT ((stop
^ byte_xor
) <= (start
^ byte_xor
));
740 reverse_n (x
, &((unsigned_1
*)buffer
)[nr_transfered
], nr_this_transfer
);
741 if (sim_core_read_buffer (sd
, cpu
, map
, x
, stop
^ byte_xor
, nr_this_transfer
)
743 return nr_transfered
;
744 nr_transfered
+= nr_this_transfer
;
745 nr_this_transfer
= WITH_XOR_ENDIAN
;
749 nr_this_transfer
= nr_bytes
- nr_transfered
;
750 stop
= start
+ nr_this_transfer
- 1;
751 SIM_ASSERT (stop
== (addr
+ nr_bytes
- 1));
752 reverse_n (x
, &((unsigned_1
*)buffer
)[nr_transfered
], nr_this_transfer
);
753 if (sim_core_read_buffer (sd
, cpu
, map
, x
, stop
^ byte_xor
, nr_this_transfer
)
755 return nr_transfered
;
762 /* define the read/write 1/2/4/8/16/word functions */
765 #include "sim-n-core.h"
768 #include "sim-n-core.h"
772 #include "sim-n-core.h"
776 #include "sim-n-core.h"
780 #include "sim-n-core.h"
783 #include "sim-n-core.h"
787 #include "sim-n-core.h"
790 #include "sim-n-core.h"
793 #include "sim-n-core.h"