1 /* The common simulator framework for GDB, the GNU Debugger.
3 Copyright 2002-2015 Free Software Foundation, Inc.
5 Contributed by Andrew Cagney and Red Hat.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
27 #include "sim-assert.h"
31 #define device_io_read_buffer(client, ...) device_io_read_buffer ((device *)(client), __VA_ARGS__)
32 #define device_io_write_buffer(client, ...) device_io_write_buffer ((device *)(client), __VA_ARGS__)
35 /* "core" module install handler.
37 This is called via sim_module_install to install the "core"
38 subsystem into the simulator. */
41 static MODULE_INIT_FN sim_core_init
;
42 static MODULE_UNINSTALL_FN sim_core_uninstall
;
47 sim_core_install (SIM_DESC sd
)
49 SIM_ASSERT (STATE_MAGIC (sd
) == SIM_MAGIC_NUMBER
);
51 /* establish the other handlers */
52 sim_module_add_uninstall_fn (sd
, sim_core_uninstall
);
53 sim_module_add_init_fn (sd
, sim_core_init
);
55 /* establish any initial data structures - none */
61 /* Uninstall the "core" subsystem from the simulator. */
65 sim_core_uninstall (SIM_DESC sd
)
67 sim_core
*core
= STATE_CORE (sd
);
69 /* blow away any mappings */
70 for (map
= 0; map
< nr_maps
; map
++) {
71 sim_core_mapping
*curr
= core
->common
.map
[map
].first
;
72 while (curr
!= NULL
) {
73 sim_core_mapping
*tbd
= curr
;
75 if (tbd
->free_buffer
!= NULL
) {
76 SIM_ASSERT (tbd
->buffer
!= NULL
);
77 free (tbd
->free_buffer
);
81 core
->common
.map
[map
].first
= NULL
;
89 sim_core_init (SIM_DESC sd
)
98 #ifndef SIM_CORE_SIGNAL
99 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
100 sim_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), (TRANSFER), (ERROR))
103 #if EXTERN_SIM_CORE_P
105 sim_core_signal (SIM_DESC sd
,
111 transfer_type transfer
,
112 sim_core_signals sig
)
114 const char *copy
= (transfer
== read_transfer
? "read" : "write");
115 address_word ip
= CIA_ADDR (cia
);
118 case sim_core_unmapped_signal
:
119 sim_io_eprintf (sd
, "core: %d byte %s to unmapped address 0x%lx at 0x%lx\n",
120 nr_bytes
, copy
, (unsigned long) addr
, (unsigned long) ip
);
121 sim_engine_halt (sd
, cpu
, NULL
, cia
, sim_stopped
, SIM_SIGSEGV
);
123 case sim_core_unaligned_signal
:
124 sim_io_eprintf (sd
, "core: %d byte misaligned %s to address 0x%lx at 0x%lx\n",
125 nr_bytes
, copy
, (unsigned long) addr
, (unsigned long) ip
);
126 sim_engine_halt (sd
, cpu
, NULL
, cia
, sim_stopped
, SIM_SIGBUS
);
129 sim_engine_abort (sd
, cpu
, cia
,
130 "sim_core_signal - internal error - bad switch");
136 #if EXTERN_SIM_CORE_P
137 static sim_core_mapping
*
138 new_sim_core_mapping (SIM_DESC sd
,
142 address_word nr_bytes
,
152 sim_core_mapping
*new_mapping
= ZALLOC (sim_core_mapping
);
154 new_mapping
->level
= level
;
155 new_mapping
->space
= space
;
156 new_mapping
->base
= addr
;
157 new_mapping
->nr_bytes
= nr_bytes
;
158 new_mapping
->bound
= addr
+ (nr_bytes
- 1);
159 new_mapping
->mask
= modulo
- 1;
160 new_mapping
->buffer
= buffer
;
161 new_mapping
->free_buffer
= free_buffer
;
162 new_mapping
->device
= device
;
168 #if EXTERN_SIM_CORE_P
170 sim_core_map_attach (SIM_DESC sd
,
171 sim_core_map
*access_map
,
175 address_word nr_bytes
,
178 struct hw
*client
, /*callback/default*/
180 device
*client
, /*callback/default*/
182 void *buffer
, /*raw_memory*/
183 void *free_buffer
) /*raw_memory*/
185 /* find the insertion point for this additional mapping and then
187 sim_core_mapping
*next_mapping
;
188 sim_core_mapping
**last_mapping
;
190 SIM_ASSERT ((client
== NULL
) != (buffer
== NULL
));
191 SIM_ASSERT ((client
== NULL
) >= (free_buffer
!= NULL
));
193 /* actually do occasionally get a zero size map */
197 sim_hw_abort (sd
, client
, "called on sim_core_map_attach with size zero");
199 sim_io_error (sd
, "called on sim_core_map_attach with size zero");
202 /* find the insertion point (between last/next) */
203 next_mapping
= access_map
->first
;
204 last_mapping
= &access_map
->first
;
205 while (next_mapping
!= NULL
206 && (next_mapping
->level
< level
207 || (next_mapping
->level
== level
208 && next_mapping
->bound
< addr
)))
210 /* provided levels are the same */
211 /* assert: next_mapping->base > all bases before next_mapping */
212 /* assert: next_mapping->bound >= all bounds before next_mapping */
213 last_mapping
= &next_mapping
->next
;
214 next_mapping
= next_mapping
->next
;
217 /* check insertion point correct */
218 SIM_ASSERT (next_mapping
== NULL
|| next_mapping
->level
>= level
);
219 if (next_mapping
!= NULL
&& next_mapping
->level
== level
220 && next_mapping
->base
< (addr
+ (nr_bytes
- 1)))
223 sim_hw_abort (sd
, client
, "memory map %d:0x%lx..0x%lx (%ld bytes) overlaps %d:0x%lx..0x%lx (%ld bytes)",
226 (long) (addr
+ (nr_bytes
- 1)),
229 (long) next_mapping
->base
,
230 (long) next_mapping
->bound
,
231 (long) next_mapping
->nr_bytes
);
233 sim_io_error (sd
, "memory map %d:0x%lx..0x%lx (%ld bytes) overlaps %d:0x%lx..0x%lx (%ld bytes)",
236 (long) (addr
+ (nr_bytes
- 1)),
239 (long) next_mapping
->base
,
240 (long) next_mapping
->bound
,
241 (long) next_mapping
->nr_bytes
);
244 /* create/insert the new mapping */
245 *last_mapping
= new_sim_core_mapping (sd
,
247 space
, addr
, nr_bytes
, modulo
,
248 client
, buffer
, free_buffer
);
249 (*last_mapping
)->next
= next_mapping
;
254 /* Attach memory or a memory mapped device to the simulator.
255 See sim-core.h for a full description. */
257 #if EXTERN_SIM_CORE_P
259 sim_core_attach (SIM_DESC sd
,
265 address_word nr_bytes
,
272 void *optional_buffer
)
274 sim_core
*memory
= STATE_CORE (sd
);
279 /* check for for attempt to use unimplemented per-processor core map */
281 sim_io_error (sd
, "sim_core_map_attach - processor specific memory map not yet supported");
283 if (client
!= NULL
&& modulo
!= 0)
286 sim_hw_abort (sd
, client
, "sim_core_attach - internal error - modulo and callback memory conflict");
288 sim_io_error (sd
, "sim_core_attach - internal error - modulo and callback memory conflict");
292 unsigned mask
= modulo
- 1;
294 while (mask
>= sizeof (unsigned64
)) /* minimum modulo */
301 if (mask
!= sizeof (unsigned64
) - 1)
304 sim_hw_abort (sd
, client
, "sim_core_attach - internal error - modulo %lx not power of two", (long) modulo
);
306 sim_io_error (sd
, "sim_core_attach - internal error - modulo %lx not power of two", (long) modulo
);
310 /* verify consistency between device and buffer */
311 if (client
!= NULL
&& optional_buffer
!= NULL
)
314 sim_hw_abort (sd
, client
, "sim_core_attach - internal error - conflicting buffer and attach arguments");
316 sim_io_error (sd
, "sim_core_attach - internal error - conflicting buffer and attach arguments");
320 if (optional_buffer
== NULL
)
322 int padding
= (addr
% sizeof (unsigned64
));
323 unsigned long bytes
= (modulo
== 0 ? nr_bytes
: modulo
) + padding
;
324 free_buffer
= zalloc (bytes
);
325 buffer
= (char*) free_buffer
+ padding
;
329 buffer
= optional_buffer
;
340 /* attach the region to all applicable access maps */
345 if (mapmask
& (1 << map
))
347 sim_core_map_attach (sd
, &memory
->common
.map
[map
],
348 level
, space
, addr
, nr_bytes
, modulo
,
349 client
, buffer
, free_buffer
);
354 /* Just copy this map to each of the processor specific data structures.
355 FIXME - later this will be replaced by true processor specific
359 for (i
= 0; i
< MAX_NR_PROCESSORS
; i
++)
361 CPU_CORE (STATE_CPU (sd
, i
))->common
= STATE_CORE (sd
)->common
;
368 /* Remove any memory reference related to this address */
369 #if EXTERN_SIM_CORE_P
371 sim_core_map_detach (SIM_DESC sd
,
372 sim_core_map
*access_map
,
377 sim_core_mapping
**entry
;
378 for (entry
= &access_map
->first
;
380 entry
= &(*entry
)->next
)
382 if ((*entry
)->base
== addr
383 && (*entry
)->level
== level
384 && (*entry
)->space
== space
)
386 sim_core_mapping
*dead
= (*entry
);
387 (*entry
) = dead
->next
;
388 if (dead
->free_buffer
!= NULL
)
389 free (dead
->free_buffer
);
397 #if EXTERN_SIM_CORE_P
399 sim_core_detach (SIM_DESC sd
,
405 sim_core
*memory
= STATE_CORE (sd
);
407 for (map
= 0; map
< nr_maps
; map
++)
409 sim_core_map_detach (sd
, &memory
->common
.map
[map
],
410 level
, address_space
, addr
);
412 /* Just copy this update to each of the processor specific data
413 structures. FIXME - later this will be replaced by true
414 processor specific maps. */
417 for (i
= 0; i
< MAX_NR_PROCESSORS
; i
++)
419 CPU_CORE (STATE_CPU (sd
, i
))->common
= STATE_CORE (sd
)->common
;
426 STATIC_INLINE_SIM_CORE\
428 sim_core_find_mapping (sim_core_common
*core
,
432 transfer_type transfer
,
433 int abort
, /*either 0 or 1 - hint to inline/-O */
434 sim_cpu
*cpu
, /* abort => cpu != NULL */
437 sim_core_mapping
*mapping
= core
->map
[map
].first
;
438 ASSERT ((addr
& (nr_bytes
- 1)) == 0); /* must be aligned */
439 ASSERT ((addr
+ (nr_bytes
- 1)) >= addr
); /* must not wrap */
440 ASSERT (!abort
|| cpu
!= NULL
); /* abort needs a non null CPU */
441 while (mapping
!= NULL
)
443 if (addr
>= mapping
->base
444 && (addr
+ (nr_bytes
- 1)) <= mapping
->bound
)
446 mapping
= mapping
->next
;
450 SIM_CORE_SIGNAL (CPU_STATE (cpu
), cpu
, cia
, map
, nr_bytes
, addr
, transfer
,
451 sim_core_unmapped_signal
);
457 STATIC_INLINE_SIM_CORE\
459 sim_core_translate (sim_core_mapping
*mapping
,
462 return (void *)((unsigned8
*) mapping
->buffer
463 + ((addr
- mapping
->base
) & mapping
->mask
));
467 #if EXTERN_SIM_CORE_P
469 sim_core_read_buffer (SIM_DESC sd
,
476 sim_core_common
*core
= (cpu
== NULL
? &STATE_CORE (sd
)->common
: &CPU_CORE (cpu
)->common
);
480 address_word raddr
= addr
+ count
;
481 sim_core_mapping
*mapping
=
482 sim_core_find_mapping (core
, map
,
483 raddr
, /*nr-bytes*/1,
485 0 /*dont-abort*/, NULL
, NULL_CIA
);
489 if (mapping
->device
!= NULL
)
491 int nr_bytes
= len
- count
;
492 sim_cia cia
= cpu
? CPU_PC_GET (cpu
) : NULL_CIA
;
493 if (raddr
+ nr_bytes
- 1> mapping
->bound
)
494 nr_bytes
= mapping
->bound
- raddr
+ 1;
495 if (device_io_read_buffer (mapping
->device
,
496 (unsigned_1
*)buffer
+ count
,
509 if (mapping
->device
!= NULL
)
511 int nr_bytes
= len
- count
;
512 if (raddr
+ nr_bytes
- 1> mapping
->bound
)
513 nr_bytes
= mapping
->bound
- raddr
+ 1;
514 if (sim_hw_io_read_buffer (sd
, mapping
->device
,
515 (unsigned_1
*)buffer
+ count
,
518 nr_bytes
) != nr_bytes
)
524 ((unsigned_1
*)buffer
)[count
] =
525 *(unsigned_1
*)sim_core_translate (mapping
, raddr
);
533 #if EXTERN_SIM_CORE_P
535 sim_core_write_buffer (SIM_DESC sd
,
542 sim_core_common
*core
= (cpu
== NULL
? &STATE_CORE (sd
)->common
: &CPU_CORE (cpu
)->common
);
546 address_word raddr
= addr
+ count
;
547 sim_core_mapping
*mapping
=
548 sim_core_find_mapping (core
, map
,
549 raddr
, /*nr-bytes*/1,
551 0 /*dont-abort*/, NULL
, NULL_CIA
);
555 if (mapping
->device
!= NULL
)
557 int nr_bytes
= len
- count
;
558 sim_cia cia
= cpu
? CPU_PC_GET (cpu
) : NULL_CIA
;
559 if (raddr
+ nr_bytes
- 1 > mapping
->bound
)
560 nr_bytes
= mapping
->bound
- raddr
+ 1;
561 if (device_io_write_buffer (mapping
->device
,
562 (unsigned_1
*)buffer
+ count
,
575 if (mapping
->device
!= NULL
)
577 int nr_bytes
= len
- count
;
578 if (raddr
+ nr_bytes
- 1 > mapping
->bound
)
579 nr_bytes
= mapping
->bound
- raddr
+ 1;
580 if (sim_hw_io_write_buffer (sd
, mapping
->device
,
581 (unsigned_1
*)buffer
+ count
,
584 nr_bytes
) != nr_bytes
)
590 *(unsigned_1
*)sim_core_translate (mapping
, raddr
) =
591 ((unsigned_1
*)buffer
)[count
];
599 #if EXTERN_SIM_CORE_P
601 sim_core_set_xor (SIM_DESC sd
,
605 /* set up the XOR map if required. */
606 if (WITH_XOR_ENDIAN
) {
608 sim_core
*core
= STATE_CORE (sd
);
609 sim_cpu_core
*cpu_core
= (cpu
!= NULL
? CPU_CORE (cpu
) : NULL
);
610 if (cpu_core
!= NULL
)
615 mask
= WITH_XOR_ENDIAN
- 1;
618 while (i
- 1 < WITH_XOR_ENDIAN
)
620 cpu_core
->xor[i
-1] = mask
;
621 mask
= (mask
<< 1) & (WITH_XOR_ENDIAN
- 1);
628 core
->byte_xor
= WITH_XOR_ENDIAN
- 1;
636 sim_engine_abort (sd
, NULL
, NULL_CIA
,
637 "Attempted to enable xor-endian mode when permenantly disabled.");
643 #if EXTERN_SIM_CORE_P
645 reverse_n (unsigned_1
*dest
,
646 const unsigned_1
*src
,
650 for (i
= 0; i
< nr_bytes
; i
++)
652 dest
[nr_bytes
- i
- 1] = src
[i
];
658 #if EXTERN_SIM_CORE_P
660 sim_core_xor_read_buffer (SIM_DESC sd
,
667 address_word byte_xor
= (cpu
== NULL
? STATE_CORE (sd
)->byte_xor
: CPU_CORE (cpu
)->xor[0]);
668 if (!WITH_XOR_ENDIAN
|| !byte_xor
)
669 return sim_core_read_buffer (sd
, cpu
, map
, buffer
, addr
, nr_bytes
);
671 /* only break up transfers when xor-endian is both selected and enabled */
673 unsigned_1 x
[WITH_XOR_ENDIAN
+ 1]; /* +1 to avoid zero-sized array */
674 unsigned nr_transfered
= 0;
675 address_word start
= addr
;
676 unsigned nr_this_transfer
= (WITH_XOR_ENDIAN
- (addr
& ~(WITH_XOR_ENDIAN
- 1)));
678 /* initial and intermediate transfers are broken when they cross
679 an XOR endian boundary */
680 while (nr_transfered
+ nr_this_transfer
< nr_bytes
)
681 /* initial/intermediate transfers */
683 /* since xor-endian is enabled stop^xor defines the start
684 address of the transfer */
685 stop
= start
+ nr_this_transfer
- 1;
686 SIM_ASSERT (start
<= stop
);
687 SIM_ASSERT ((stop
^ byte_xor
) <= (start
^ byte_xor
));
688 if (sim_core_read_buffer (sd
, cpu
, map
, x
, stop
^ byte_xor
, nr_this_transfer
)
690 return nr_transfered
;
691 reverse_n (&((unsigned_1
*)buffer
)[nr_transfered
], x
, nr_this_transfer
);
692 nr_transfered
+= nr_this_transfer
;
693 nr_this_transfer
= WITH_XOR_ENDIAN
;
697 nr_this_transfer
= nr_bytes
- nr_transfered
;
698 stop
= start
+ nr_this_transfer
- 1;
699 SIM_ASSERT (stop
== (addr
+ nr_bytes
- 1));
700 if (sim_core_read_buffer (sd
, cpu
, map
, x
, stop
^ byte_xor
, nr_this_transfer
)
702 return nr_transfered
;
703 reverse_n (&((unsigned_1
*)buffer
)[nr_transfered
], x
, nr_this_transfer
);
710 #if EXTERN_SIM_CORE_P
712 sim_core_xor_write_buffer (SIM_DESC sd
,
719 address_word byte_xor
= (cpu
== NULL
? STATE_CORE (sd
)->byte_xor
: CPU_CORE (cpu
)->xor[0]);
720 if (!WITH_XOR_ENDIAN
|| !byte_xor
)
721 return sim_core_write_buffer (sd
, cpu
, map
, buffer
, addr
, nr_bytes
);
723 /* only break up transfers when xor-endian is both selected and enabled */
725 unsigned_1 x
[WITH_XOR_ENDIAN
+ 1]; /* +1 to avoid zero sized array */
726 unsigned nr_transfered
= 0;
727 address_word start
= addr
;
728 unsigned nr_this_transfer
= (WITH_XOR_ENDIAN
- (addr
& ~(WITH_XOR_ENDIAN
- 1)));
730 /* initial and intermediate transfers are broken when they cross
731 an XOR endian boundary */
732 while (nr_transfered
+ nr_this_transfer
< nr_bytes
)
733 /* initial/intermediate transfers */
735 /* since xor-endian is enabled stop^xor defines the start
736 address of the transfer */
737 stop
= start
+ nr_this_transfer
- 1;
738 SIM_ASSERT (start
<= stop
);
739 SIM_ASSERT ((stop
^ byte_xor
) <= (start
^ byte_xor
));
740 reverse_n (x
, &((unsigned_1
*)buffer
)[nr_transfered
], nr_this_transfer
);
741 if (sim_core_read_buffer (sd
, cpu
, map
, x
, stop
^ byte_xor
, nr_this_transfer
)
743 return nr_transfered
;
744 nr_transfered
+= nr_this_transfer
;
745 nr_this_transfer
= WITH_XOR_ENDIAN
;
749 nr_this_transfer
= nr_bytes
- nr_transfered
;
750 stop
= start
+ nr_this_transfer
- 1;
751 SIM_ASSERT (stop
== (addr
+ nr_bytes
- 1));
752 reverse_n (x
, &((unsigned_1
*)buffer
)[nr_transfered
], nr_this_transfer
);
753 if (sim_core_read_buffer (sd
, cpu
, map
, x
, stop
^ byte_xor
, nr_this_transfer
)
755 return nr_transfered
;
761 #if EXTERN_SIM_CORE_P
763 sim_core_trans_addr (SIM_DESC sd
,
768 sim_core_common
*core
= (cpu
== NULL
? &STATE_CORE (sd
)->common
: &CPU_CORE (cpu
)->common
);
769 sim_core_mapping
*mapping
=
770 sim_core_find_mapping (core
, map
,
773 0 /*dont-abort*/, NULL
, NULL_CIA
);
776 return sim_core_translate (mapping
, addr
);
782 /* define the read/write 1/2/4/8/16/word functions */
785 #include "sim-n-core.h"
788 #include "sim-n-core.h"
792 #include "sim-n-core.h"
796 #include "sim-n-core.h"
800 #include "sim-n-core.h"
803 #include "sim-n-core.h"
807 #include "sim-n-core.h"
810 #include "sim-n-core.h"
813 #include "sim-n-core.h"