1 /* The common simulator framework for GDB, the GNU Debugger.
3 Copyright 2002, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
5 Contributed by Andrew Cagney and Red Hat.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
27 #include "sim-assert.h"
31 #define device_error(client, ...) device_error ((device *)(client), __VA_ARGS__)
32 #define device_io_read_buffer(client, ...) device_io_read_buffer ((device *)(client), __VA_ARGS__)
33 #define device_io_write_buffer(client, ...) device_io_write_buffer ((device *)(client), __VA_ARGS__)
36 /* "core" module install handler.
38 This is called via sim_module_install to install the "core"
39 subsystem into the simulator. */
42 static MODULE_INIT_FN sim_core_init
;
43 static MODULE_UNINSTALL_FN sim_core_uninstall
;
48 sim_core_install (SIM_DESC sd
)
50 SIM_ASSERT (STATE_MAGIC (sd
) == SIM_MAGIC_NUMBER
);
52 /* establish the other handlers */
53 sim_module_add_uninstall_fn (sd
, sim_core_uninstall
);
54 sim_module_add_init_fn (sd
, sim_core_init
);
56 /* establish any initial data structures - none */
62 /* Uninstall the "core" subsystem from the simulator. */
66 sim_core_uninstall (SIM_DESC sd
)
68 sim_core
*core
= STATE_CORE(sd
);
70 /* blow away any mappings */
71 for (map
= 0; map
< nr_maps
; map
++) {
72 sim_core_mapping
*curr
= core
->common
.map
[map
].first
;
73 while (curr
!= NULL
) {
74 sim_core_mapping
*tbd
= curr
;
76 if (tbd
->free_buffer
!= NULL
) {
77 SIM_ASSERT(tbd
->buffer
!= NULL
);
78 zfree(tbd
->free_buffer
);
82 core
->common
.map
[map
].first
= NULL
;
90 sim_core_init (SIM_DESC sd
)
99 #ifndef SIM_CORE_SIGNAL
100 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
101 sim_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), (TRANSFER), (ERROR))
104 #if EXTERN_SIM_CORE_P
106 sim_core_signal (SIM_DESC sd
,
112 transfer_type transfer
,
113 sim_core_signals sig
)
115 const char *copy
= (transfer
== read_transfer
? "read" : "write");
116 address_word ip
= CIA_ADDR (cia
);
119 case sim_core_unmapped_signal
:
120 sim_io_eprintf (sd
, "core: %d byte %s to unmapped address 0x%lx at 0x%lx\n",
121 nr_bytes
, copy
, (unsigned long) addr
, (unsigned long) ip
);
122 sim_engine_halt (sd
, cpu
, NULL
, cia
, sim_stopped
, SIM_SIGSEGV
);
124 case sim_core_unaligned_signal
:
125 sim_io_eprintf (sd
, "core: %d byte misaligned %s to address 0x%lx at 0x%lx\n",
126 nr_bytes
, copy
, (unsigned long) addr
, (unsigned long) ip
);
127 sim_engine_halt (sd
, cpu
, NULL
, cia
, sim_stopped
, SIM_SIGBUS
);
130 sim_engine_abort (sd
, cpu
, cia
,
131 "sim_core_signal - internal error - bad switch");
137 #if EXTERN_SIM_CORE_P
138 static sim_core_mapping
*
139 new_sim_core_mapping (SIM_DESC sd
,
143 address_word nr_bytes
,
153 sim_core_mapping
*new_mapping
= ZALLOC(sim_core_mapping
);
155 new_mapping
->level
= level
;
156 new_mapping
->space
= space
;
157 new_mapping
->base
= addr
;
158 new_mapping
->nr_bytes
= nr_bytes
;
159 new_mapping
->bound
= addr
+ (nr_bytes
- 1);
161 new_mapping
->mask
= (unsigned) 0 - 1;
163 new_mapping
->mask
= modulo
- 1;
164 new_mapping
->buffer
= buffer
;
165 new_mapping
->free_buffer
= free_buffer
;
166 new_mapping
->device
= device
;
172 #if EXTERN_SIM_CORE_P
174 sim_core_map_attach (SIM_DESC sd
,
175 sim_core_map
*access_map
,
179 address_word nr_bytes
,
182 struct hw
*client
, /*callback/default*/
184 device
*client
, /*callback/default*/
186 void *buffer
, /*raw_memory*/
187 void *free_buffer
) /*raw_memory*/
189 /* find the insertion point for this additional mapping and then
191 sim_core_mapping
*next_mapping
;
192 sim_core_mapping
**last_mapping
;
194 SIM_ASSERT ((client
== NULL
) != (buffer
== NULL
));
195 SIM_ASSERT ((client
== NULL
) >= (free_buffer
!= NULL
));
197 /* actually do occasionally get a zero size map */
201 device_error(client
, "called on sim_core_map_attach with size zero");
204 sim_hw_abort (sd
, client
, "called on sim_core_map_attach with size zero");
206 sim_io_error (sd
, "called on sim_core_map_attach with size zero");
209 /* find the insertion point (between last/next) */
210 next_mapping
= access_map
->first
;
211 last_mapping
= &access_map
->first
;
212 while(next_mapping
!= NULL
213 && (next_mapping
->level
< level
214 || (next_mapping
->level
== level
215 && next_mapping
->bound
< addr
)))
217 /* provided levels are the same */
218 /* assert: next_mapping->base > all bases before next_mapping */
219 /* assert: next_mapping->bound >= all bounds before next_mapping */
220 last_mapping
= &next_mapping
->next
;
221 next_mapping
= next_mapping
->next
;
224 /* check insertion point correct */
225 SIM_ASSERT (next_mapping
== NULL
|| next_mapping
->level
>= level
);
226 if (next_mapping
!= NULL
&& next_mapping
->level
== level
227 && next_mapping
->base
< (addr
+ (nr_bytes
- 1)))
230 device_error (client
, "memory map %d:0x%lx..0x%lx (%ld bytes) overlaps %d:0x%lx..0x%lx (%ld bytes)",
233 (long) (addr
+ nr_bytes
- 1),
236 (long) next_mapping
->base
,
237 (long) next_mapping
->bound
,
238 (long) next_mapping
->nr_bytes
);
241 sim_hw_abort (sd
, client
, "memory map %d:0x%lx..0x%lx (%ld bytes) overlaps %d:0x%lx..0x%lx (%ld bytes)",
244 (long) (addr
+ (nr_bytes
- 1)),
247 (long) next_mapping
->base
,
248 (long) next_mapping
->bound
,
249 (long) next_mapping
->nr_bytes
);
251 sim_io_error (sd
, "memory map %d:0x%lx..0x%lx (%ld bytes) overlaps %d:0x%lx..0x%lx (%ld bytes)",
254 (long) (addr
+ (nr_bytes
- 1)),
257 (long) next_mapping
->base
,
258 (long) next_mapping
->bound
,
259 (long) next_mapping
->nr_bytes
);
262 /* create/insert the new mapping */
263 *last_mapping
= new_sim_core_mapping(sd
,
265 space
, addr
, nr_bytes
, modulo
,
266 client
, buffer
, free_buffer
);
267 (*last_mapping
)->next
= next_mapping
;
272 /* Attach memory or a memory mapped device to the simulator.
273 See sim-core.h for a full description. */
275 #if EXTERN_SIM_CORE_P
277 sim_core_attach (SIM_DESC sd
,
283 address_word nr_bytes
,
290 void *optional_buffer
)
292 sim_core
*memory
= STATE_CORE(sd
);
297 /* check for for attempt to use unimplemented per-processor core map */
299 sim_io_error (sd
, "sim_core_map_attach - processor specific memory map not yet supported");
301 /* verify modulo memory */
302 if (!WITH_MODULO_MEMORY
&& modulo
!= 0)
305 device_error (client
, "sim_core_attach - internal error - modulo memory disabled");
308 sim_hw_abort (sd
, client
, "sim_core_attach - internal error - modulo memory disabled");
310 sim_io_error (sd
, "sim_core_attach - internal error - modulo memory disabled");
312 if (client
!= NULL
&& modulo
!= 0)
315 device_error (client
, "sim_core_attach - internal error - modulo and callback memory conflict");
318 sim_hw_abort (sd
, client
, "sim_core_attach - internal error - modulo and callback memory conflict");
320 sim_io_error (sd
, "sim_core_attach - internal error - modulo and callback memory conflict");
324 unsigned mask
= modulo
- 1;
326 while (mask
>= sizeof (unsigned64
)) /* minimum modulo */
333 if (mask
!= sizeof (unsigned64
) - 1)
336 device_error (client
, "sim_core_attach - internal error - modulo %lx not power of two", (long) modulo
);
339 sim_hw_abort (sd
, client
, "sim_core_attach - internal error - modulo %lx not power of two", (long) modulo
);
341 sim_io_error (sd
, "sim_core_attach - internal error - modulo %lx not power of two", (long) modulo
);
345 /* verify consistency between device and buffer */
346 if (client
!= NULL
&& optional_buffer
!= NULL
)
349 device_error (client
, "sim_core_attach - internal error - conflicting buffer and attach arguments");
352 sim_hw_abort (sd
, client
, "sim_core_attach - internal error - conflicting buffer and attach arguments");
354 sim_io_error (sd
, "sim_core_attach - internal error - conflicting buffer and attach arguments");
358 if (optional_buffer
== NULL
)
360 int padding
= (addr
% sizeof (unsigned64
));
361 unsigned long bytes
= (modulo
== 0 ? nr_bytes
: modulo
) + padding
;
362 free_buffer
= zalloc (bytes
);
363 buffer
= (char*) free_buffer
+ padding
;
367 buffer
= optional_buffer
;
378 /* attach the region to all applicable access maps */
383 if (mapmask
& (1 << map
))
385 sim_core_map_attach (sd
, &memory
->common
.map
[map
],
386 level
, space
, addr
, nr_bytes
, modulo
,
387 client
, buffer
, free_buffer
);
392 /* Just copy this map to each of the processor specific data structures.
393 FIXME - later this will be replaced by true processor specific
397 for (i
= 0; i
< MAX_NR_PROCESSORS
; i
++)
399 CPU_CORE (STATE_CPU (sd
, i
))->common
= STATE_CORE (sd
)->common
;
406 /* Remove any memory reference related to this address */
407 #if EXTERN_SIM_CORE_P
409 sim_core_map_detach (SIM_DESC sd
,
410 sim_core_map
*access_map
,
415 sim_core_mapping
**entry
;
416 for (entry
= &access_map
->first
;
418 entry
= &(*entry
)->next
)
420 if ((*entry
)->base
== addr
421 && (*entry
)->level
== level
422 && (*entry
)->space
== space
)
424 sim_core_mapping
*dead
= (*entry
);
425 (*entry
) = dead
->next
;
426 if (dead
->free_buffer
!= NULL
)
427 zfree (dead
->free_buffer
);
435 #if EXTERN_SIM_CORE_P
437 sim_core_detach (SIM_DESC sd
,
443 sim_core
*memory
= STATE_CORE (sd
);
445 for (map
= 0; map
< nr_maps
; map
++)
447 sim_core_map_detach (sd
, &memory
->common
.map
[map
],
448 level
, address_space
, addr
);
450 /* Just copy this update to each of the processor specific data
451 structures. FIXME - later this will be replaced by true
452 processor specific maps. */
455 for (i
= 0; i
< MAX_NR_PROCESSORS
; i
++)
457 CPU_CORE (STATE_CPU (sd
, i
))->common
= STATE_CORE (sd
)->common
;
464 STATIC_INLINE_SIM_CORE\
466 sim_core_find_mapping(sim_core_common
*core
,
470 transfer_type transfer
,
471 int abort
, /*either 0 or 1 - hint to inline/-O */
472 sim_cpu
*cpu
, /* abort => cpu != NULL */
475 sim_core_mapping
*mapping
= core
->map
[map
].first
;
476 ASSERT ((addr
& (nr_bytes
- 1)) == 0); /* must be aligned */
477 ASSERT ((addr
+ (nr_bytes
- 1)) >= addr
); /* must not wrap */
478 ASSERT (!abort
|| cpu
!= NULL
); /* abort needs a non null CPU */
479 while (mapping
!= NULL
)
481 if (addr
>= mapping
->base
482 && (addr
+ (nr_bytes
- 1)) <= mapping
->bound
)
484 mapping
= mapping
->next
;
488 SIM_CORE_SIGNAL (CPU_STATE (cpu
), cpu
, cia
, map
, nr_bytes
, addr
, transfer
,
489 sim_core_unmapped_signal
);
495 STATIC_INLINE_SIM_CORE\
497 sim_core_translate (sim_core_mapping
*mapping
,
500 if (WITH_MODULO_MEMORY
)
501 return (void *)((unsigned8
*) mapping
->buffer
502 + ((addr
- mapping
->base
) & mapping
->mask
));
504 return (void *)((unsigned8
*) mapping
->buffer
505 + addr
- mapping
->base
);
509 #if EXTERN_SIM_CORE_P
511 sim_core_read_buffer (SIM_DESC sd
,
518 sim_core_common
*core
= (cpu
== NULL
? &STATE_CORE (sd
)->common
: &CPU_CORE (cpu
)->common
);
522 address_word raddr
= addr
+ count
;
523 sim_core_mapping
*mapping
=
524 sim_core_find_mapping (core
, map
,
525 raddr
, /*nr-bytes*/1,
527 0 /*dont-abort*/, NULL
, NULL_CIA
);
531 if (mapping
->device
!= NULL
)
533 int nr_bytes
= len
- count
;
534 sim_cia cia
= cpu
? CIA_GET (cpu
) : NULL_CIA
;
535 if (raddr
+ nr_bytes
- 1> mapping
->bound
)
536 nr_bytes
= mapping
->bound
- raddr
+ 1;
537 if (device_io_read_buffer (mapping
->device
,
538 (unsigned_1
*)buffer
+ count
,
551 if (mapping
->device
!= NULL
)
553 int nr_bytes
= len
- count
;
554 if (raddr
+ nr_bytes
- 1> mapping
->bound
)
555 nr_bytes
= mapping
->bound
- raddr
+ 1;
556 if (sim_hw_io_read_buffer (sd
, mapping
->device
,
557 (unsigned_1
*)buffer
+ count
,
560 nr_bytes
) != nr_bytes
)
566 ((unsigned_1
*)buffer
)[count
] =
567 *(unsigned_1
*)sim_core_translate(mapping
, raddr
);
575 #if EXTERN_SIM_CORE_P
577 sim_core_write_buffer (SIM_DESC sd
,
584 sim_core_common
*core
= (cpu
== NULL
? &STATE_CORE (sd
)->common
: &CPU_CORE (cpu
)->common
);
588 address_word raddr
= addr
+ count
;
589 sim_core_mapping
*mapping
=
590 sim_core_find_mapping (core
, map
,
591 raddr
, /*nr-bytes*/1,
593 0 /*dont-abort*/, NULL
, NULL_CIA
);
597 if (WITH_CALLBACK_MEMORY
598 && mapping
->device
!= NULL
)
600 int nr_bytes
= len
- count
;
601 sim_cia cia
= cpu
? CIA_GET (cpu
) : NULL_CIA
;
602 if (raddr
+ nr_bytes
- 1 > mapping
->bound
)
603 nr_bytes
= mapping
->bound
- raddr
+ 1;
604 if (device_io_write_buffer (mapping
->device
,
605 (unsigned_1
*)buffer
+ count
,
618 if (WITH_CALLBACK_MEMORY
619 && mapping
->device
!= NULL
)
621 int nr_bytes
= len
- count
;
622 if (raddr
+ nr_bytes
- 1 > mapping
->bound
)
623 nr_bytes
= mapping
->bound
- raddr
+ 1;
624 if (sim_hw_io_write_buffer (sd
, mapping
->device
,
625 (unsigned_1
*)buffer
+ count
,
628 nr_bytes
) != nr_bytes
)
634 *(unsigned_1
*)sim_core_translate(mapping
, raddr
) =
635 ((unsigned_1
*)buffer
)[count
];
643 #if EXTERN_SIM_CORE_P
645 sim_core_set_xor (SIM_DESC sd
,
649 /* set up the XOR map if required. */
650 if (WITH_XOR_ENDIAN
) {
652 sim_core
*core
= STATE_CORE (sd
);
653 sim_cpu_core
*cpu_core
= (cpu
!= NULL
? CPU_CORE (cpu
) : NULL
);
654 if (cpu_core
!= NULL
)
659 mask
= WITH_XOR_ENDIAN
- 1;
662 while (i
- 1 < WITH_XOR_ENDIAN
)
664 cpu_core
->xor[i
-1] = mask
;
665 mask
= (mask
<< 1) & (WITH_XOR_ENDIAN
- 1);
672 core
->byte_xor
= WITH_XOR_ENDIAN
- 1;
680 sim_engine_abort (sd
, NULL
, NULL_CIA
,
681 "Attempted to enable xor-endian mode when permenantly disabled.");
687 #if EXTERN_SIM_CORE_P
689 reverse_n (unsigned_1
*dest
,
690 const unsigned_1
*src
,
694 for (i
= 0; i
< nr_bytes
; i
++)
696 dest
[nr_bytes
- i
- 1] = src
[i
];
702 #if EXTERN_SIM_CORE_P
704 sim_core_xor_read_buffer (SIM_DESC sd
,
711 address_word byte_xor
= (cpu
== NULL
? STATE_CORE (sd
)->byte_xor
: CPU_CORE (cpu
)->xor[0]);
712 if (!WITH_XOR_ENDIAN
|| !byte_xor
)
713 return sim_core_read_buffer (sd
, cpu
, map
, buffer
, addr
, nr_bytes
);
715 /* only break up transfers when xor-endian is both selected and enabled */
717 unsigned_1 x
[WITH_XOR_ENDIAN
+ 1]; /* +1 to avoid zero-sized array */
718 unsigned nr_transfered
= 0;
719 address_word start
= addr
;
720 unsigned nr_this_transfer
= (WITH_XOR_ENDIAN
- (addr
& ~(WITH_XOR_ENDIAN
- 1)));
722 /* initial and intermediate transfers are broken when they cross
723 an XOR endian boundary */
724 while (nr_transfered
+ nr_this_transfer
< nr_bytes
)
725 /* initial/intermediate transfers */
727 /* since xor-endian is enabled stop^xor defines the start
728 address of the transfer */
729 stop
= start
+ nr_this_transfer
- 1;
730 SIM_ASSERT (start
<= stop
);
731 SIM_ASSERT ((stop
^ byte_xor
) <= (start
^ byte_xor
));
732 if (sim_core_read_buffer (sd
, cpu
, map
, x
, stop
^ byte_xor
, nr_this_transfer
)
734 return nr_transfered
;
735 reverse_n (&((unsigned_1
*)buffer
)[nr_transfered
], x
, nr_this_transfer
);
736 nr_transfered
+= nr_this_transfer
;
737 nr_this_transfer
= WITH_XOR_ENDIAN
;
741 nr_this_transfer
= nr_bytes
- nr_transfered
;
742 stop
= start
+ nr_this_transfer
- 1;
743 SIM_ASSERT (stop
== (addr
+ nr_bytes
- 1));
744 if (sim_core_read_buffer (sd
, cpu
, map
, x
, stop
^ byte_xor
, nr_this_transfer
)
746 return nr_transfered
;
747 reverse_n (&((unsigned_1
*)buffer
)[nr_transfered
], x
, nr_this_transfer
);
754 #if EXTERN_SIM_CORE_P
756 sim_core_xor_write_buffer (SIM_DESC sd
,
763 address_word byte_xor
= (cpu
== NULL
? STATE_CORE (sd
)->byte_xor
: CPU_CORE (cpu
)->xor[0]);
764 if (!WITH_XOR_ENDIAN
|| !byte_xor
)
765 return sim_core_write_buffer (sd
, cpu
, map
, buffer
, addr
, nr_bytes
);
767 /* only break up transfers when xor-endian is both selected and enabled */
769 unsigned_1 x
[WITH_XOR_ENDIAN
+ 1]; /* +1 to avoid zero sized array */
770 unsigned nr_transfered
= 0;
771 address_word start
= addr
;
772 unsigned nr_this_transfer
= (WITH_XOR_ENDIAN
- (addr
& ~(WITH_XOR_ENDIAN
- 1)));
774 /* initial and intermediate transfers are broken when they cross
775 an XOR endian boundary */
776 while (nr_transfered
+ nr_this_transfer
< nr_bytes
)
777 /* initial/intermediate transfers */
779 /* since xor-endian is enabled stop^xor defines the start
780 address of the transfer */
781 stop
= start
+ nr_this_transfer
- 1;
782 SIM_ASSERT (start
<= stop
);
783 SIM_ASSERT ((stop
^ byte_xor
) <= (start
^ byte_xor
));
784 reverse_n (x
, &((unsigned_1
*)buffer
)[nr_transfered
], nr_this_transfer
);
785 if (sim_core_read_buffer (sd
, cpu
, map
, x
, stop
^ byte_xor
, nr_this_transfer
)
787 return nr_transfered
;
788 nr_transfered
+= nr_this_transfer
;
789 nr_this_transfer
= WITH_XOR_ENDIAN
;
793 nr_this_transfer
= nr_bytes
- nr_transfered
;
794 stop
= start
+ nr_this_transfer
- 1;
795 SIM_ASSERT (stop
== (addr
+ nr_bytes
- 1));
796 reverse_n (x
, &((unsigned_1
*)buffer
)[nr_transfered
], nr_this_transfer
);
797 if (sim_core_read_buffer (sd
, cpu
, map
, x
, stop
^ byte_xor
, nr_this_transfer
)
799 return nr_transfered
;
805 #if EXTERN_SIM_CORE_P
807 sim_core_trans_addr (SIM_DESC sd
,
812 sim_core_common
*core
= (cpu
== NULL
? &STATE_CORE (sd
)->common
: &CPU_CORE (cpu
)->common
);
813 sim_core_mapping
*mapping
=
814 sim_core_find_mapping (core
, map
,
817 0 /*dont-abort*/, NULL
, NULL_CIA
);
820 return sim_core_translate(mapping
, addr
);
826 /* define the read/write 1/2/4/8/16/word functions */
829 #include "sim-n-core.h"
832 #include "sim-n-core.h"
836 #include "sim-n-core.h"
840 #include "sim-n-core.h"
844 #include "sim-n-core.h"
847 #include "sim-n-core.h"
851 #include "sim-n-core.h"
854 #include "sim-n-core.h"
857 #include "sim-n-core.h"