1 /* The common simulator framework for GDB, the GNU Debugger.
3 Copyright 2002-2020 Free Software Foundation, Inc.
5 Contributed by Andrew Cagney and Red Hat.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
27 #include "sim-assert.h"
35 /* "core" module install handler.
37 This is called via sim_module_install to install the "core"
38 subsystem into the simulator. */
41 static MODULE_INIT_FN sim_core_init
;
42 static MODULE_UNINSTALL_FN sim_core_uninstall
;
47 sim_core_install (SIM_DESC sd
)
49 SIM_ASSERT (STATE_MAGIC (sd
) == SIM_MAGIC_NUMBER
);
51 /* establish the other handlers */
52 sim_module_add_uninstall_fn (sd
, sim_core_uninstall
);
53 sim_module_add_init_fn (sd
, sim_core_init
);
55 /* establish any initial data structures - none */
61 /* Uninstall the "core" subsystem from the simulator. */
65 sim_core_uninstall (SIM_DESC sd
)
67 sim_core
*core
= STATE_CORE (sd
);
69 /* blow away any mappings */
70 for (map
= 0; map
< nr_maps
; map
++) {
71 sim_core_mapping
*curr
= core
->common
.map
[map
].first
;
72 while (curr
!= NULL
) {
73 sim_core_mapping
*tbd
= curr
;
75 if (tbd
->free_buffer
!= NULL
) {
76 SIM_ASSERT (tbd
->buffer
!= NULL
);
77 free (tbd
->free_buffer
);
81 core
->common
.map
[map
].first
= NULL
;
89 sim_core_init (SIM_DESC sd
)
98 #ifndef SIM_CORE_SIGNAL
99 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
100 sim_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), (TRANSFER), (ERROR))
103 #if EXTERN_SIM_CORE_P
105 sim_core_signal (SIM_DESC sd
,
111 transfer_type transfer
,
112 sim_core_signals sig
)
114 const char *copy
= (transfer
== read_transfer
? "read" : "write");
115 address_word ip
= CIA_ADDR (cia
);
118 case sim_core_unmapped_signal
:
119 sim_io_eprintf (sd
, "core: %d byte %s to unmapped address 0x%lx at 0x%lx\n",
120 nr_bytes
, copy
, (unsigned long) addr
, (unsigned long) ip
);
121 sim_engine_halt (sd
, cpu
, NULL
, cia
, sim_stopped
, SIM_SIGSEGV
);
123 case sim_core_unaligned_signal
:
124 sim_io_eprintf (sd
, "core: %d byte misaligned %s to address 0x%lx at 0x%lx\n",
125 nr_bytes
, copy
, (unsigned long) addr
, (unsigned long) ip
);
126 sim_engine_halt (sd
, cpu
, NULL
, cia
, sim_stopped
, SIM_SIGBUS
);
129 sim_engine_abort (sd
, cpu
, cia
,
130 "sim_core_signal - internal error - bad switch");
136 #if EXTERN_SIM_CORE_P
137 static sim_core_mapping
*
138 new_sim_core_mapping (SIM_DESC sd
,
142 address_word nr_bytes
,
148 sim_core_mapping
*new_mapping
= ZALLOC (sim_core_mapping
);
150 new_mapping
->level
= level
;
151 new_mapping
->space
= space
;
152 new_mapping
->base
= addr
;
153 new_mapping
->nr_bytes
= nr_bytes
;
154 new_mapping
->bound
= addr
+ (nr_bytes
- 1);
155 new_mapping
->mask
= modulo
- 1;
156 new_mapping
->buffer
= buffer
;
157 new_mapping
->free_buffer
= free_buffer
;
158 new_mapping
->device
= device
;
164 #if EXTERN_SIM_CORE_P
166 sim_core_map_attach (SIM_DESC sd
,
167 sim_core_map
*access_map
,
171 address_word nr_bytes
,
173 struct hw
*client
, /*callback/default*/
174 void *buffer
, /*raw_memory*/
175 void *free_buffer
) /*raw_memory*/
177 /* find the insertion point for this additional mapping and then
179 sim_core_mapping
*next_mapping
;
180 sim_core_mapping
**last_mapping
;
182 SIM_ASSERT ((client
== NULL
) != (buffer
== NULL
));
183 SIM_ASSERT ((client
== NULL
) >= (free_buffer
!= NULL
));
185 /* actually do occasionally get a zero size map */
189 sim_hw_abort (sd
, client
, "called on sim_core_map_attach with size zero");
191 sim_io_error (sd
, "called on sim_core_map_attach with size zero");
194 /* find the insertion point (between last/next) */
195 next_mapping
= access_map
->first
;
196 last_mapping
= &access_map
->first
;
197 while (next_mapping
!= NULL
198 && (next_mapping
->level
< level
199 || (next_mapping
->level
== level
200 && next_mapping
->bound
< addr
)))
202 /* provided levels are the same */
203 /* assert: next_mapping->base > all bases before next_mapping */
204 /* assert: next_mapping->bound >= all bounds before next_mapping */
205 last_mapping
= &next_mapping
->next
;
206 next_mapping
= next_mapping
->next
;
209 /* check insertion point correct */
210 SIM_ASSERT (next_mapping
== NULL
|| next_mapping
->level
>= level
);
211 if (next_mapping
!= NULL
&& next_mapping
->level
== level
212 && next_mapping
->base
< (addr
+ (nr_bytes
- 1)))
215 sim_hw_abort (sd
, client
, "memory map %d:0x%lx..0x%lx (%ld bytes) overlaps %d:0x%lx..0x%lx (%ld bytes)",
218 (long) (addr
+ (nr_bytes
- 1)),
221 (long) next_mapping
->base
,
222 (long) next_mapping
->bound
,
223 (long) next_mapping
->nr_bytes
);
225 sim_io_error (sd
, "memory map %d:0x%lx..0x%lx (%ld bytes) overlaps %d:0x%lx..0x%lx (%ld bytes)",
228 (long) (addr
+ (nr_bytes
- 1)),
231 (long) next_mapping
->base
,
232 (long) next_mapping
->bound
,
233 (long) next_mapping
->nr_bytes
);
236 /* create/insert the new mapping */
237 *last_mapping
= new_sim_core_mapping (sd
,
239 space
, addr
, nr_bytes
, modulo
,
240 client
, buffer
, free_buffer
);
241 (*last_mapping
)->next
= next_mapping
;
246 /* Attach memory or a memory mapped device to the simulator.
247 See sim-core.h for a full description. */
249 #if EXTERN_SIM_CORE_P
251 sim_core_attach (SIM_DESC sd
,
257 address_word nr_bytes
,
260 void *optional_buffer
)
262 sim_core
*memory
= STATE_CORE (sd
);
267 /* check for for attempt to use unimplemented per-processor core map */
269 sim_io_error (sd
, "sim_core_map_attach - processor specific memory map not yet supported");
271 if (client
!= NULL
&& modulo
!= 0)
274 sim_hw_abort (sd
, client
, "sim_core_attach - internal error - modulo and callback memory conflict");
276 sim_io_error (sd
, "sim_core_attach - internal error - modulo and callback memory conflict");
280 unsigned mask
= modulo
- 1;
282 while (mask
>= sizeof (unsigned64
)) /* minimum modulo */
289 if (mask
!= sizeof (unsigned64
) - 1)
292 sim_hw_abort (sd
, client
, "sim_core_attach - internal error - modulo %lx not power of two", (long) modulo
);
294 sim_io_error (sd
, "sim_core_attach - internal error - modulo %lx not power of two", (long) modulo
);
298 /* verify consistency between device and buffer */
299 if (client
!= NULL
&& optional_buffer
!= NULL
)
302 sim_hw_abort (sd
, client
, "sim_core_attach - internal error - conflicting buffer and attach arguments");
304 sim_io_error (sd
, "sim_core_attach - internal error - conflicting buffer and attach arguments");
308 if (optional_buffer
== NULL
)
310 int padding
= (addr
% sizeof (unsigned64
));
311 unsigned long bytes
= (modulo
== 0 ? nr_bytes
: modulo
) + padding
;
312 free_buffer
= zalloc (bytes
);
313 buffer
= (char*) free_buffer
+ padding
;
317 buffer
= optional_buffer
;
328 /* attach the region to all applicable access maps */
333 if (mapmask
& (1 << map
))
335 sim_core_map_attach (sd
, &memory
->common
.map
[map
],
336 level
, space
, addr
, nr_bytes
, modulo
,
337 client
, buffer
, free_buffer
);
342 /* Just copy this map to each of the processor specific data structures.
343 FIXME - later this will be replaced by true processor specific
347 for (i
= 0; i
< MAX_NR_PROCESSORS
; i
++)
349 CPU_CORE (STATE_CPU (sd
, i
))->common
= STATE_CORE (sd
)->common
;
356 /* Remove any memory reference related to this address */
357 #if EXTERN_SIM_CORE_P
359 sim_core_map_detach (SIM_DESC sd
,
360 sim_core_map
*access_map
,
365 sim_core_mapping
**entry
;
366 for (entry
= &access_map
->first
;
368 entry
= &(*entry
)->next
)
370 if ((*entry
)->base
== addr
371 && (*entry
)->level
== level
372 && (*entry
)->space
== space
)
374 sim_core_mapping
*dead
= (*entry
);
375 (*entry
) = dead
->next
;
376 if (dead
->free_buffer
!= NULL
)
377 free (dead
->free_buffer
);
385 #if EXTERN_SIM_CORE_P
387 sim_core_detach (SIM_DESC sd
,
393 sim_core
*memory
= STATE_CORE (sd
);
395 for (map
= 0; map
< nr_maps
; map
++)
397 sim_core_map_detach (sd
, &memory
->common
.map
[map
],
398 level
, address_space
, addr
);
400 /* Just copy this update to each of the processor specific data
401 structures. FIXME - later this will be replaced by true
402 processor specific maps. */
405 for (i
= 0; i
< MAX_NR_PROCESSORS
; i
++)
407 CPU_CORE (STATE_CPU (sd
, i
))->common
= STATE_CORE (sd
)->common
;
414 STATIC_INLINE_SIM_CORE\
416 sim_core_find_mapping (sim_core_common
*core
,
420 transfer_type transfer
,
421 int abort
, /*either 0 or 1 - hint to inline/-O */
422 sim_cpu
*cpu
, /* abort => cpu != NULL */
425 sim_core_mapping
*mapping
= core
->map
[map
].first
;
426 ASSERT ((addr
& (nr_bytes
- 1)) == 0); /* must be aligned */
427 ASSERT ((addr
+ (nr_bytes
- 1)) >= addr
); /* must not wrap */
428 ASSERT (!abort
|| cpu
!= NULL
); /* abort needs a non null CPU */
429 while (mapping
!= NULL
)
431 if (addr
>= mapping
->base
432 && (addr
+ (nr_bytes
- 1)) <= mapping
->bound
)
434 mapping
= mapping
->next
;
438 SIM_CORE_SIGNAL (CPU_STATE (cpu
), cpu
, cia
, map
, nr_bytes
, addr
, transfer
,
439 sim_core_unmapped_signal
);
445 STATIC_INLINE_SIM_CORE\
447 sim_core_translate (sim_core_mapping
*mapping
,
450 return (void *)((unsigned8
*) mapping
->buffer
451 + ((addr
- mapping
->base
) & mapping
->mask
));
455 #if EXTERN_SIM_CORE_P
457 sim_core_read_buffer (SIM_DESC sd
,
464 sim_core_common
*core
= (cpu
== NULL
? &STATE_CORE (sd
)->common
: &CPU_CORE (cpu
)->common
);
468 address_word raddr
= addr
+ count
;
469 sim_core_mapping
*mapping
=
470 sim_core_find_mapping (core
, map
,
471 raddr
, /*nr-bytes*/1,
473 0 /*dont-abort*/, NULL
, NULL_CIA
);
477 if (mapping
->device
!= NULL
)
479 int nr_bytes
= len
- count
;
480 if (raddr
+ nr_bytes
- 1> mapping
->bound
)
481 nr_bytes
= mapping
->bound
- raddr
+ 1;
482 /* If the access was initiated by a cpu, pass it down so errors can
483 be propagated properly. For other sources (e.g. GDB or DMA), we
484 can only signal errors via the return value. */
487 sim_cia cia
= cpu
? CPU_PC_GET (cpu
) : NULL_CIA
;
488 sim_cpu_hw_io_read_buffer (cpu
, cia
, mapping
->device
,
489 (unsigned_1
*)buffer
+ count
,
494 else if (sim_hw_io_read_buffer (sd
, mapping
->device
,
495 (unsigned_1
*)buffer
+ count
,
498 nr_bytes
) != nr_bytes
)
504 ((unsigned_1
*)buffer
)[count
] =
505 *(unsigned_1
*)sim_core_translate (mapping
, raddr
);
513 #if EXTERN_SIM_CORE_P
515 sim_core_write_buffer (SIM_DESC sd
,
522 sim_core_common
*core
= (cpu
== NULL
? &STATE_CORE (sd
)->common
: &CPU_CORE (cpu
)->common
);
526 address_word raddr
= addr
+ count
;
527 sim_core_mapping
*mapping
=
528 sim_core_find_mapping (core
, map
,
529 raddr
, /*nr-bytes*/1,
531 0 /*dont-abort*/, NULL
, NULL_CIA
);
535 if (mapping
->device
!= NULL
)
537 int nr_bytes
= len
- count
;
538 if (raddr
+ nr_bytes
- 1 > mapping
->bound
)
539 nr_bytes
= mapping
->bound
- raddr
+ 1;
540 /* If the access was initiated by a cpu, pass it down so errors can
541 be propagated properly. For other sources (e.g. GDB or DMA), we
542 can only signal errors via the return value. */
545 sim_cia cia
= cpu
? CPU_PC_GET (cpu
) : NULL_CIA
;
546 sim_cpu_hw_io_write_buffer (cpu
, cia
, mapping
->device
,
547 (unsigned_1
*)buffer
+ count
,
552 else if (sim_hw_io_write_buffer (sd
, mapping
->device
,
553 (unsigned_1
*)buffer
+ count
,
556 nr_bytes
) != nr_bytes
)
562 *(unsigned_1
*)sim_core_translate (mapping
, raddr
) =
563 ((unsigned_1
*)buffer
)[count
];
571 #if EXTERN_SIM_CORE_P
573 sim_core_set_xor (SIM_DESC sd
,
577 /* set up the XOR map if required. */
578 if (WITH_XOR_ENDIAN
) {
580 sim_core
*core
= STATE_CORE (sd
);
581 sim_cpu_core
*cpu_core
= (cpu
!= NULL
? CPU_CORE (cpu
) : NULL
);
582 if (cpu_core
!= NULL
)
587 mask
= WITH_XOR_ENDIAN
- 1;
590 while (i
- 1 < WITH_XOR_ENDIAN
)
592 cpu_core
->byte_xor
[i
-1] = mask
;
593 mask
= (mask
<< 1) & (WITH_XOR_ENDIAN
- 1);
600 core
->byte_xor
= WITH_XOR_ENDIAN
- 1;
608 sim_engine_abort (sd
, NULL
, NULL_CIA
,
609 "Attempted to enable xor-endian mode when permenantly disabled.");
615 #if EXTERN_SIM_CORE_P
617 reverse_n (unsigned_1
*dest
,
618 const unsigned_1
*src
,
622 for (i
= 0; i
< nr_bytes
; i
++)
624 dest
[nr_bytes
- i
- 1] = src
[i
];
630 #if EXTERN_SIM_CORE_P
632 sim_core_xor_read_buffer (SIM_DESC sd
,
639 address_word byte_xor
640 = (cpu
== NULL
? STATE_CORE (sd
)->byte_xor
: CPU_CORE (cpu
)->byte_xor
[0]);
641 if (!WITH_XOR_ENDIAN
|| !byte_xor
)
642 return sim_core_read_buffer (sd
, cpu
, map
, buffer
, addr
, nr_bytes
);
644 /* only break up transfers when xor-endian is both selected and enabled */
646 unsigned_1 x
[WITH_XOR_ENDIAN
+ 1]; /* +1 to avoid zero-sized array */
647 unsigned nr_transfered
= 0;
648 address_word start
= addr
;
649 unsigned nr_this_transfer
= (WITH_XOR_ENDIAN
- (addr
& ~(WITH_XOR_ENDIAN
- 1)));
651 /* initial and intermediate transfers are broken when they cross
652 an XOR endian boundary */
653 while (nr_transfered
+ nr_this_transfer
< nr_bytes
)
654 /* initial/intermediate transfers */
656 /* since xor-endian is enabled stop^xor defines the start
657 address of the transfer */
658 stop
= start
+ nr_this_transfer
- 1;
659 SIM_ASSERT (start
<= stop
);
660 SIM_ASSERT ((stop
^ byte_xor
) <= (start
^ byte_xor
));
661 if (sim_core_read_buffer (sd
, cpu
, map
, x
, stop
^ byte_xor
, nr_this_transfer
)
663 return nr_transfered
;
664 reverse_n (&((unsigned_1
*)buffer
)[nr_transfered
], x
, nr_this_transfer
);
665 nr_transfered
+= nr_this_transfer
;
666 nr_this_transfer
= WITH_XOR_ENDIAN
;
670 nr_this_transfer
= nr_bytes
- nr_transfered
;
671 stop
= start
+ nr_this_transfer
- 1;
672 SIM_ASSERT (stop
== (addr
+ nr_bytes
- 1));
673 if (sim_core_read_buffer (sd
, cpu
, map
, x
, stop
^ byte_xor
, nr_this_transfer
)
675 return nr_transfered
;
676 reverse_n (&((unsigned_1
*)buffer
)[nr_transfered
], x
, nr_this_transfer
);
683 #if EXTERN_SIM_CORE_P
685 sim_core_xor_write_buffer (SIM_DESC sd
,
692 address_word byte_xor
693 = (cpu
== NULL
? STATE_CORE (sd
)->byte_xor
: CPU_CORE (cpu
)->byte_xor
[0]);
694 if (!WITH_XOR_ENDIAN
|| !byte_xor
)
695 return sim_core_write_buffer (sd
, cpu
, map
, buffer
, addr
, nr_bytes
);
697 /* only break up transfers when xor-endian is both selected and enabled */
699 unsigned_1 x
[WITH_XOR_ENDIAN
+ 1]; /* +1 to avoid zero sized array */
700 unsigned nr_transfered
= 0;
701 address_word start
= addr
;
702 unsigned nr_this_transfer
= (WITH_XOR_ENDIAN
- (addr
& ~(WITH_XOR_ENDIAN
- 1)));
704 /* initial and intermediate transfers are broken when they cross
705 an XOR endian boundary */
706 while (nr_transfered
+ nr_this_transfer
< nr_bytes
)
707 /* initial/intermediate transfers */
709 /* since xor-endian is enabled stop^xor defines the start
710 address of the transfer */
711 stop
= start
+ nr_this_transfer
- 1;
712 SIM_ASSERT (start
<= stop
);
713 SIM_ASSERT ((stop
^ byte_xor
) <= (start
^ byte_xor
));
714 reverse_n (x
, &((unsigned_1
*)buffer
)[nr_transfered
], nr_this_transfer
);
715 if (sim_core_read_buffer (sd
, cpu
, map
, x
, stop
^ byte_xor
, nr_this_transfer
)
717 return nr_transfered
;
718 nr_transfered
+= nr_this_transfer
;
719 nr_this_transfer
= WITH_XOR_ENDIAN
;
723 nr_this_transfer
= nr_bytes
- nr_transfered
;
724 stop
= start
+ nr_this_transfer
- 1;
725 SIM_ASSERT (stop
== (addr
+ nr_bytes
- 1));
726 reverse_n (x
, &((unsigned_1
*)buffer
)[nr_transfered
], nr_this_transfer
);
727 if (sim_core_read_buffer (sd
, cpu
, map
, x
, stop
^ byte_xor
, nr_this_transfer
)
729 return nr_transfered
;
735 #if EXTERN_SIM_CORE_P
737 sim_core_trans_addr (SIM_DESC sd
,
742 sim_core_common
*core
= (cpu
== NULL
? &STATE_CORE (sd
)->common
: &CPU_CORE (cpu
)->common
);
743 sim_core_mapping
*mapping
=
744 sim_core_find_mapping (core
, map
,
747 0 /*dont-abort*/, NULL
, NULL_CIA
);
750 return sim_core_translate (mapping
, addr
);
756 /* define the read/write 1/2/4/8/16/word functions */
759 #include "sim-n-core.h"
762 #include "sim-n-core.h"
766 #include "sim-n-core.h"
770 #include "sim-n-core.h"
774 #include "sim-n-core.h"
777 #include "sim-n-core.h"
781 #include "sim-n-core.h"
784 #include "sim-n-core.h"
787 #include "sim-n-core.h"