sim/common/sim-core.h

   1 /*  This file is part of the program psim.
   2
   3     Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
   4
   5     This program is free software; you can redistribute it and/or modify
   6     it under the terms of the GNU General Public License as published by
   7     the Free Software Foundation; either version 2 of the License, or
   8     (at your option) any later version.
   9
  10     This program is distributed in the hope that it will be useful,
  11     but WITHOUT ANY WARRANTY; without even the implied warranty of
  12     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13     GNU General Public License for more details.
  14
  15     You should have received a copy of the GNU General Public License
  16     along with this program; if not, write to the Free Software
  17     Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  18
  19     */
  20
  21
  22 #ifndef _SIM_CORE_H_
  23 #define _SIM_CORE_H_
  24
  25
  26 /* basic types */
  27
  28 typedef struct _sim_core_mapping sim_core_mapping;
  29 struct _sim_core_mapping {
  30   /* common */
  31   int level;
  32   int space;
  33   unsigned_word base;
  34   unsigned_word bound;
  35   unsigned nr_bytes;
  36   /* memory map */
  37   int free_buffer;
  38   void *buffer;
  39   /* callback map */
  40   device *device;
  41   /* tracing */
  42   int trace;
  43   /* growth */
  44   sim_core_mapping *next;
  45 };
  46
  47 typedef struct _sim_core_map sim_core_map;
  48 struct _sim_core_map {
  49   sim_core_mapping *first;
  50 };
  51
  52 typedef enum {
  53   sim_core_read_map,
  54   sim_core_write_map,
  55   sim_core_execute_map,
  56   nr_sim_core_maps,
  57 } sim_core_maps;
  58
  59
  60 /* Main core structure */
  61
  62 typedef struct _sim_core sim_core;
  63 struct _sim_core {
  64   int trace;
  65   sim_core_map map[nr_sim_core_maps];
  66 };
  67
  68
  69 /* Per CPU distributed component of the core */
  70
  71 typedef sim_core sim_cpu_core;
  72
  73
  74 /* Install the "core" module.  */
  75
  76 EXTERN_SIM_CORE\
  77 (SIM_RC) sim_core_install (SIM_DESC sd);
  78
  79
  80 /* Uninstall the "core" subsystem.  */
  81
  82 EXTERN_SIM_CORE\
  83 (void)
  84 sim_core_uninstall (SIM_DESC sd);
  85
  86
  87
  88 /* initialize */
  89
  90 EXTERN_SIM_CORE\
  91 (SIM_RC) sim_core_init
  92 (SIM_DESC sd);
  93
  94
  95
  96 /* tracing */
  97
  98 INLINE_SIM_CORE\
  99 (void) sim_core_set_trace\
 100 (SIM_DESC sd,
 101  int level);
 102
 103
 104
 105 /* Create a memory space within the core.
 106
 107    The CPU option (when non NULL) specifes the single processor that
 108    the memory space is to be attached to. (unimplemented) */
 109
 110 INLINE_SIM_CORE\
 111 (void) sim_core_attach
 112 (SIM_DESC sd,
 113  sim_cpu *cpu,
 114  attach_type attach,
 115  access_type access,
 116  int address_space,
 117  unsigned_word addr,
 118  unsigned nr_bytes, /* host limited */
 119  device *client,
 120  void *optional_buffer);
 121
 122
 123
 124 /* Variable sized read/write
 125
 126    Transfer a variable sized block of raw data between the host and
 127    target.  Should any problems occure, the number of bytes
 128    successfully transfered is returned. */
 129
 130 INLINE_SIM_CORE\
 131 (unsigned) sim_core_read_buffer
 132 (SIM_DESC sd,
 133  sim_core_maps map,
 134  void *buffer,
 135  unsigned_word addr,
 136  unsigned nr_bytes);
 137
 138 INLINE_SIM_CORE\
 139 (unsigned) sim_core_write_buffer
 140 (SIM_DESC sd,
 141  sim_core_maps map,
 142  const void *buffer,
 143  unsigned_word addr,
 144  unsigned nr_bytes);
 145
 146
 147 /* Fixed sized, processor oriented, read/write.
 148
 149    Transfer a fixed amout of memory between the host and target.  The
 150    data transfered is translated from/to host to/from target byte
 151    order.  Should the transfer fail, the operation shall abort (no
 152    return).  The aligned alternative makes the assumption that that
 153    the address is N byte aligned (no alignment checks are made).  The
 154    unaligned alternative checks the address for correct byte
 155    alignment.  Action, as defined by WITH_ALIGNMENT, being taken
 156    should the check fail. */
 157
 158 #define DECLARE_SIM_CORE_WRITE_N(ALIGNMENT,N) \
 159 INLINE_SIM_CORE\
 160 (void) sim_core_write_##ALIGNMENT##_##N \
 161 (sim_cpu *cpu, \
 162  sim_cia cia, \
 163  sim_core_maps map, \
 164  unsigned_word addr, \
 165  unsigned_##N val);
 166
 167 DECLARE_SIM_CORE_WRITE_N(aligned,1)
 168 DECLARE_SIM_CORE_WRITE_N(aligned,2)
 169 DECLARE_SIM_CORE_WRITE_N(aligned,4)
 170 DECLARE_SIM_CORE_WRITE_N(aligned,8)
 171 DECLARE_SIM_CORE_WRITE_N(aligned,word)
 172
 173 DECLARE_SIM_CORE_WRITE_N(unaligned,1)
 174 DECLARE_SIM_CORE_WRITE_N(unaligned,2)
 175 DECLARE_SIM_CORE_WRITE_N(unaligned,4)
 176 DECLARE_SIM_CORE_WRITE_N(unaligned,8)
 177 DECLARE_SIM_CORE_WRITE_N(unaligned,word)
 178
 179 #define sim_core_write_1 sim_core_write_aligned_1
 180 #define sim_core_write_2 sim_core_write_aligned_2
 181 #define sim_core_write_4 sim_core_write_aligned_4
 182 #define sim_core_write_8 sim_core_write_aligned_8
 183
 184 #undef DECLARE_SIM_CORE_WRITE_N
 185
 186
 187 #define DECLARE_SIM_CORE_READ_N(ALIGNMENT,N) \
 188 INLINE_SIM_CORE\
 189 (unsigned_##N) sim_core_read_##ALIGNMENT##_##N \
 190 (sim_cpu *cpu, \
 191  sim_cia cia, \
 192  sim_core_maps map, \
 193  unsigned_word addr);
 194
 195 DECLARE_SIM_CORE_READ_N(aligned,1)
 196 DECLARE_SIM_CORE_READ_N(aligned,2)
 197 DECLARE_SIM_CORE_READ_N(aligned,4)
 198 DECLARE_SIM_CORE_READ_N(aligned,8)
 199 DECLARE_SIM_CORE_READ_N(aligned,word)
 200
 201 DECLARE_SIM_CORE_READ_N(unaligned,1)
 202 DECLARE_SIM_CORE_READ_N(unaligned,2)
 203 DECLARE_SIM_CORE_READ_N(unaligned,4)
 204 DECLARE_SIM_CORE_READ_N(unaligned,8)
 205 DECLARE_SIM_CORE_READ_N(unaligned,word)
 206
 207 #define sim_core_read_1 sim_core_read_aligned_1
 208 #define sim_core_read_2 sim_core_read_aligned_2
 209 #define sim_core_read_4 sim_core_read_aligned_4
 210 #define sim_core_read_8 sim_core_read_aligned_8
 211
 212 #undef DECLARE_SIM_CORE_READ_N
 213
 214 #endif