sim/common/sim-n-core.h

   1 /*  This file is part of the program psim.
   2
   3     Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
   4
   5     This program is free software; you can redistribute it and/or modify
   6     it under the terms of the GNU General Public License as published by
   7     the Free Software Foundation; either version 2 of the License, or
   8     (at your option) any later version.
   9
  10     This program is distributed in the hope that it will be useful,
  11     but WITHOUT ANY WARRANTY; without even the implied warranty of
  12     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13     GNU General Public License for more details.
  14
  15     You should have received a copy of the GNU General Public License
  16     along with this program; if not, write to the Free Software
  17     Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  18
  19     */
  20
  21
  22 #ifndef N
  23 #error "N must be #defined"
  24 #endif
  25
  26 #include "sim-xcat.h"
  27
  28 /* NOTE: see end of file for #undef of these macros */
  29 #define unsigned_N XCONCAT2(unsigned_,N)
  30 #define T2H_N XCONCAT2(T2H_,N)
  31 #define H2T_N XCONCAT2(H2T_,N)
  32
  33 #define sim_core_read_aligned_N XCONCAT2(sim_core_read_aligned_,N)
  34 #define sim_core_write_aligned_N XCONCAT2(sim_core_write_aligned_,N)
  35 #define sim_core_read_unaligned_N XCONCAT2(sim_core_read_unaligned_,N)
  36 #define sim_core_write_unaligned_N XCONCAT2(sim_core_write_unaligned_,N)
  37 #define sim_core_trace_N XCONCAT2(sim_core_trace_,N)
  38
  39
  40 /* TAGS: sim_core_trace_1 sim_core_trace_2 */
  41 /* TAGS: sim_core_trace_4 sim_core_trace_8 */
  42 /* TAGS: sim_core_trace_16 sim_core_trace_word */
  43
  44 STATIC_SIM_CORE(void)
  45 sim_core_trace_N (sim_cpu *cpu,
  46                   sim_cia cia,
  47                   int line_nr,
  48                   char *transfer,
  49                   sim_core_maps map,
  50                   address_word addr,
  51                   unsigned_N val)
  52 {
  53 #if (N == 16)
  54   trace_printf (CPU_STATE (cpu), cpu,
  55                 "sim-n-core.h:%d: %s-%d %s:0x%08lx -> 0x%08lx%08lx%08lx%08lx\n",
  56                 line_nr,
  57                 transfer, sizeof (unsigned_N),
  58                 sim_core_map_to_str (map),
  59                 (unsigned long) addr,
  60                 (unsigned long) V4_16 (val, 0),
  61                 (unsigned long) V4_16 (val, 1),
  62                 (unsigned long) V4_16 (val, 2),
  63                 (unsigned long) V4_16 (val, 3));
  64 #endif
  65 #if (N == 8)
  66   trace_printf (CPU_STATE (cpu), cpu,
  67                 "sim-n-core.h:%d: %s-%d %s:0x%08lx -> 0x%08lx%08lx\n",
  68                 line_nr,
  69                 transfer, sizeof (unsigned_N),
  70                 sim_core_map_to_str (map),
  71                 (unsigned long) addr,
  72                 (unsigned long) V4_8 (val, 0),
  73                 (unsigned long) V4_8 (val, 1));
  74 #endif
  75 #if (N == 4)
  76   trace_printf (CPU_STATE (cpu), cpu,
  77                 "sim-n-core.h:%d: %s-%d %s:0x%08lx -> 0x%0*lx\n",
  78                 line_nr,
  79                 transfer, sizeof (unsigned_N),
  80                 sim_core_map_to_str (map),
  81                 (unsigned long) addr,
  82                 sizeof (unsigned_N) * 2,
  83                 (unsigned long) val);
  84 #endif
  85 }
  86
  87
  88 /* TAGS: sim_core_read_aligned_1 sim_core_read_aligned_2 */
  89 /* TAGS: sim_core_read_aligned_4 sim_core_read_aligned_8 */
  90 /* TAGS: sim_core_read_aligned_16 sim_core_read_aligned_word */
  91
  92 INLINE_SIM_CORE(unsigned_N)
  93 sim_core_read_aligned_N(sim_cpu *cpu,
  94                         sim_cia cia,
  95                         sim_core_maps map,
  96                         address_word xaddr)
  97 {
  98   sim_cpu_core *cpu_core = CPU_CORE (cpu);
  99   sim_core_common *core = &cpu_core->common;
 100   unsigned_N val;
 101   sim_core_mapping *mapping;
 102   address_word addr;
 103 #if WITH_XOR_ENDIAN != 0
 104   if (WITH_XOR_ENDIAN)
 105     addr = xaddr ^ cpu_core->xor[(sizeof(unsigned_N) - 1) % WITH_XOR_ENDIAN];
 106   else
 107 #endif
 108     addr = xaddr;
 109   mapping = sim_core_find_mapping (core, map,
 110                                    addr,
 111                                    sizeof (unsigned_N),
 112                                    read_transfer,
 113                                    1 /*abort*/, cpu, cia);
 114 #if (WITH_DEVICES)
 115   if (WITH_CALLBACK_MEMORY && mapping->device != NULL) {
 116     unsigned_N data;
 117     if (device_io_read_buffer (mapping->device,
 118                                &data,
 119                                mapping->space,
 120                                addr,
 121                                sizeof (unsigned_N)) != sizeof (unsigned_N))
 122       device_error (mapping->device, "internal error - %s - io_read_buffer should not fail",
 123                     XSTRING (sim_core_read_aligned_N));
 124     val = T2H_N (data);
 125   }
 126   else
 127 #endif
 128     val = T2H_N (*(unsigned_N*) sim_core_translate (mapping, addr));
 129   PROFILE_COUNT_CORE (cpu, addr, sizeof (unsigned_N), map);
 130   if (TRACE_P (cpu, TRACE_CORE_IDX))
 131     sim_core_trace_N (cpu, cia, __LINE__, "read", map, addr, val);
 132   return val;
 133 }
 134
 135 /* TAGS: sim_core_read_unaligned_1 sim_core_read_unaligned_2 */
 136 /* TAGS: sim_core_read_unaligned_4 sim_core_read_unaligned_8 */
 137 /* TAGS: sim_core_read_unaligned_16 sim_core_read_unaligned_word */
 138
 139 INLINE_SIM_CORE(unsigned_N)
 140 sim_core_read_unaligned_N(sim_cpu *cpu,
 141                           sim_cia cia,
 142                           sim_core_maps map,
 143                           address_word addr)
 144 {
 145   int alignment = sizeof (unsigned_N) - 1;
 146   /* if hardwired to forced alignment just do it */
 147   if (WITH_ALIGNMENT == FORCED_ALIGNMENT)
 148     return sim_core_read_aligned_N (cpu, cia, map, addr & ~alignment);
 149   else if ((addr & alignment) == 0)
 150     return sim_core_read_aligned_N (cpu, cia, map, addr);
 151   else
 152     switch (CURRENT_ALIGNMENT)
 153       {
 154       case STRICT_ALIGNMENT:
 155         SIM_CORE_SIGNAL (CPU_STATE (cpu), cpu, cia, map,
 156                          sizeof (unsigned_N), addr,
 157                          read_transfer, sim_core_unaligned_signal);
 158       case NONSTRICT_ALIGNMENT:
 159         {
 160           unsigned_N val;
 161           if (sim_core_xor_read_buffer (CPU_STATE (cpu), cpu, map, &val, addr,
 162                                         sizeof(unsigned_N))
 163               != sizeof(unsigned_N))
 164             SIM_CORE_SIGNAL (CPU_STATE (cpu), cpu, cia, map,
 165                              sizeof (unsigned_N), addr,
 166                              read_transfer, sim_core_unaligned_signal);
 167           val = T2H_N(val);
 168           PROFILE_COUNT_CORE (cpu, addr, sizeof (unsigned_N), map);
 169           return val;
 170         }
 171       case FORCED_ALIGNMENT:
 172         return sim_core_read_aligned_N (cpu, cia, map, addr & ~alignment);
 173       case MIXED_ALIGNMENT:
 174         sim_engine_abort (CPU_STATE (cpu), cpu, cia,
 175                           "internal error - %s - mixed alignment",
 176                           XSTRING (sim_core_read_unaligned_N));
 177       default:
 178         sim_engine_abort (CPU_STATE (cpu), cpu, cia,
 179                           "internal error - %s - bad switch",
 180                           XSTRING (sim_core_read_unaligned_N));
 181       }
 182 }
 183
 184 /* TAGS: sim_core_write_aligned_1 sim_core_write_aligned_2 */
 185 /* TAGS: sim_core_write_aligned_4 sim_core_write_aligned_8 */
 186 /* TAGS: sim_core_write_aligned_16 sim_core_write_aligned_word */
 187
 188 INLINE_SIM_CORE(void)
 189 sim_core_write_aligned_N(sim_cpu *cpu,
 190                          sim_cia cia,
 191                          sim_core_maps map,
 192                          address_word xaddr,
 193                          unsigned_N val)
 194 {
 195   sim_cpu_core *cpu_core = CPU_CORE (cpu);
 196   sim_core_common *core = &cpu_core->common;
 197   sim_core_mapping *mapping;
 198   address_word addr;
 199 #if WITH_XOR_ENDIAN != 0
 200   if (WITH_XOR_ENDIAN)
 201     addr = xaddr ^ cpu_core->xor[(sizeof(unsigned_N) - 1) % WITH_XOR_ENDIAN];
 202   else
 203 #endif
 204     addr = xaddr;
 205   mapping = sim_core_find_mapping(core, map,
 206                                   addr,
 207                                   sizeof (unsigned_N),
 208                                   write_transfer,
 209                                   1 /*abort*/, cpu, cia);
 210 #if (WITH_DEVICES)
 211   if (WITH_CALLBACK_MEMORY && mapping->device != NULL) {
 212     unsigned_N data = H2T_N (val);
 213     if (device_io_write_buffer (mapping->device,
 214                                 &data,
 215                                 mapping->space,
 216                                 addr,
 217                                 sizeof (unsigned_N), /* nr_bytes */
 218                                 cpu,
 219                                 cia) != sizeof (unsigned_N))
 220       device_error (mapping->device, "internal error - %s - io_write_buffer should not fail",
 221                     XSTRING (sim_core_write_aligned_N));
 222   }
 223   else
 224 #endif
 225     *(unsigned_N*) sim_core_translate (mapping, addr) = H2T_N (val);
 226   PROFILE_COUNT_CORE (cpu, addr, sizeof (unsigned_N), map);
 227   if (TRACE_P (cpu, TRACE_CORE_IDX))
 228     sim_core_trace_N (cpu, cia, __LINE__, "write", map, addr, val);
 229 }
 230
 231 /* TAGS: sim_core_write_unaligned_1 sim_core_write_unaligned_2 */
 232 /* TAGS: sim_core_write_unaligned_4 sim_core_write_unaligned_8 */
 233 /* TAGS: sim_core_write_unaligned_16 sim_core_write_unaligned_word */
 234
 235 INLINE_SIM_CORE(void)
 236 sim_core_write_unaligned_N(sim_cpu *cpu,
 237                            sim_cia cia,
 238                            sim_core_maps map,
 239                            address_word addr,
 240                            unsigned_N val)
 241 {
 242   int alignment = sizeof (unsigned_N) - 1;
 243   /* if hardwired to forced alignment just do it */
 244   if (WITH_ALIGNMENT == FORCED_ALIGNMENT)
 245     sim_core_write_aligned_N (cpu, cia, map, addr & ~alignment, val);
 246   else if ((addr & alignment) == 0)
 247     sim_core_write_aligned_N (cpu, cia, map, addr, val);
 248   else
 249     switch (CURRENT_ALIGNMENT)
 250       {
 251       case STRICT_ALIGNMENT:
 252         SIM_CORE_SIGNAL (CPU_STATE (cpu), cpu, cia, map,
 253                          sizeof (unsigned_N), addr,
 254                          write_transfer, sim_core_unaligned_signal);
 255         break;
 256       case NONSTRICT_ALIGNMENT:
 257         {
 258           unsigned_N val = H2T_N (val);
 259           if (sim_core_xor_write_buffer (CPU_STATE (cpu), cpu, map, &val, addr,
 260                                          sizeof(unsigned_N))
 261               != sizeof(unsigned_N))
 262             SIM_CORE_SIGNAL (CPU_STATE (cpu), cpu, cia, map,
 263                              sizeof (unsigned_N), addr,
 264                              write_transfer, sim_core_unaligned_signal);
 265           PROFILE_COUNT_CORE (cpu, addr, sizeof (unsigned_N), map);
 266           break;
 267         }
 268       case FORCED_ALIGNMENT:
 269         sim_core_write_aligned_N (cpu, cia, map, addr & ~alignment, val);
 270         break;
 271       case MIXED_ALIGNMENT:
 272         sim_engine_abort (CPU_STATE (cpu), cpu, cia,
 273                           "internal error - %s - mixed alignment",
 274                           XSTRING (sim_core_write_unaligned_N));
 275         break;
 276       default:
 277         sim_engine_abort (CPU_STATE (cpu), cpu, cia,
 278                           "internal error - %s - bad switch",
 279                           XSTRING (sim_core_write_unaligned_N));
 280         break;
 281       }
 282 }
 283
 284
 285 /* NOTE: see start of file for #define of these macros */
 286 #undef unsigned_N
 287 #undef T2H_N
 288 #undef H2T_N
 289 #undef sim_core_read_aligned_N
 290 #undef sim_core_write_aligned_N
 291 #undef sim_core_read_unaligned_N
 292 #undef sim_core_write_unaligned_N
 293 #undef sim_core_trace_N