sim/common/sim-n-core.h

   1 /*  This file is part of the program psim.
   2
   3     Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
   4
   5     This program is free software; you can redistribute it and/or modify
   6     it under the terms of the GNU General Public License as published by
   7     the Free Software Foundation; either version 2 of the License, or
   8     (at your option) any later version.
   9
  10     This program is distributed in the hope that it will be useful,
  11     but WITHOUT ANY WARRANTY; without even the implied warranty of
  12     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13     GNU General Public License for more details.
  14
  15     You should have received a copy of the GNU General Public License
  16     along with this program; if not, write to the Free Software
  17     Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  18
  19     */
  20
  21
  22 #ifndef N
  23 #error "N must be #defined"
  24 #endif
  25
  26 #include "sim-xcat.h"
  27
  28 /* NOTE: see end of file for #undef of these macros */
  29 #define unsigned_N XCONCAT2(unsigned_,N)
  30 #define T2H_N XCONCAT2(T2H_,N)
  31 #define H2T_N XCONCAT2(H2T_,N)
  32
  33 #define sim_core_read_aligned_N XCONCAT2(sim_core_read_aligned_,N)
  34 #define sim_core_write_aligned_N XCONCAT2(sim_core_write_aligned_,N)
  35 #define sim_core_read_unaligned_N XCONCAT2(sim_core_read_unaligned_,N)
  36 #define sim_core_write_unaligned_N XCONCAT2(sim_core_write_unaligned_,N)
  37
  38
  39 INLINE_SIM_CORE(unsigned_N)
  40 sim_core_read_aligned_N(sim_cpu *cpu,
  41                         sim_cia cia,
  42                         sim_core_maps map,
  43                         unsigned_word xaddr)
  44 {
  45   sim_cpu_core *cpu_core = CPU_CORE (cpu);
  46   sim_core_common *core = &cpu_core->common;
  47   unsigned_N val;
  48   sim_core_mapping *mapping;
  49   address_word addr;
  50   if (WITH_XOR_ENDIAN)
  51     addr = xaddr ^ cpu_core->xor[(sizeof(unsigned_N) - 1) % WITH_XOR_ENDIAN];
  52   else
  53     addr = xaddr;
  54   mapping = sim_core_find_mapping (core, map,
  55                                    addr,
  56                                    sizeof (unsigned_N),
  57                                    read_transfer,
  58                                    1 /*abort*/, cpu, cia);
  59 #if (WITH_DEVICES)
  60   if (WITH_CALLBACK_MEMORY && mapping->device != NULL) {
  61     unsigned_N data;
  62     if (device_io_read_buffer (mapping->device,
  63                                &data,
  64                                mapping->space,
  65                                addr,
  66                                sizeof (unsigned_N)) != sizeof (unsigned_N))
  67       device_error (mapping->device, "internal error - %s - io_read_buffer should not fail",
  68                     XSTRING (sim_core_read_aligned_N));
  69     val = T2H_N (data);
  70   }
  71   else
  72 #endif
  73     val = T2H_N (*(unsigned_N*) sim_core_translate (mapping, addr));
  74   if (TRACE_P (cpu, TRACE_CORE_IDX))
  75     trace_printf (CPU_STATE (cpu), cpu,
  76                   "sim-n-core.c:%d: read-%d %s:0x%08lx -> 0x%lx\n",
  77                   __LINE__,
  78                   sizeof (unsigned_N),
  79                   sim_core_map_to_str (map),
  80                   (unsigned long) addr,
  81                   (unsigned long) val);
  82   return val;
  83 }
  84
  85
  86 INLINE_SIM_CORE(unsigned_N)
  87 sim_core_read_unaligned_N(sim_cpu *cpu,
  88                           sim_cia cia,
  89                           sim_core_maps map,
  90                           address_word addr)
  91 {
  92   int alignment = sizeof (unsigned_N) - 1;
  93   /* if hardwired to forced alignment just do it */
  94   if (WITH_ALIGNMENT == FORCED_ALIGNMENT)
  95     return sim_core_read_aligned_N (cpu, cia, map, addr & ~alignment);
  96   else if ((addr & alignment) == 0)
  97     return sim_core_read_aligned_N (cpu, cia, map, addr);
  98   else
  99     switch (CURRENT_ALIGNMENT)
 100       {
 101       case STRICT_ALIGNMENT:
 102         SIM_CORE_SIGNAL (CPU_STATE (cpu), cpu, cia, map,
 103                          sizeof (unsigned_N), addr,
 104                          read_transfer, sim_core_unaligned_signal);
 105         return -1;
 106       case NONSTRICT_ALIGNMENT:
 107         {
 108           unsigned_N val;
 109           if (sim_core_xor_read_buffer (CPU_STATE (cpu), cpu, map, &val, addr,
 110                                         sizeof(unsigned_N))
 111               != sizeof(unsigned_N))
 112             SIM_CORE_SIGNAL (CPU_STATE (cpu), cpu, cia, map,
 113                              sizeof (unsigned_N), addr,
 114                              read_transfer, sim_core_unaligned_signal);
 115           val = T2H_N(val);
 116           return val;
 117         }
 118       case FORCED_ALIGNMENT:
 119         return sim_core_read_aligned_N (cpu, cia, map, addr & ~alignment);
 120       case MIXED_ALIGNMENT:
 121         sim_engine_abort (CPU_STATE (cpu), cpu, cia,
 122                           "internal error - %s - mixed alignment",
 123                           XSTRING (sim_core_read_unaligned_N));
 124         return 0;
 125       default:
 126         sim_engine_abort (CPU_STATE (cpu), cpu, cia,
 127                           "internal error - %s - bad switch",
 128                           XSTRING (sim_core_read_unaligned_N));
 129         return 0;
 130       }
 131 }
 132
 133
 134 INLINE_SIM_CORE(void)
 135 sim_core_write_aligned_N(sim_cpu *cpu,
 136                          sim_cia cia,
 137                          sim_core_maps map,
 138                          unsigned_word xaddr,
 139                          unsigned_N val)
 140 {
 141   sim_cpu_core *cpu_core = CPU_CORE (cpu);
 142   sim_core_common *core = &cpu_core->common;
 143   sim_core_mapping *mapping;
 144   address_word addr;
 145   if (WITH_XOR_ENDIAN)
 146     addr = xaddr ^ cpu_core->xor[(sizeof(unsigned_N) - 1) % WITH_XOR_ENDIAN];
 147   else
 148     addr = xaddr;
 149   mapping = sim_core_find_mapping(core, map,
 150                                   addr,
 151                                   sizeof (unsigned_N),
 152                                   write_transfer,
 153                                   1 /*abort*/, cpu, cia);
 154 #if (WITH_DEVICES)
 155   if (WITH_CALLBACK_MEMORY && mapping->device != NULL) {
 156     unsigned_N data = H2T_N (val);
 157     if (device_io_write_buffer (mapping->device,
 158                                 &data,
 159                                 mapping->space,
 160                                 addr,
 161                                 sizeof (unsigned_N), /* nr_bytes */
 162                                 cpu,
 163                                 cia) != sizeof (unsigned_N))
 164       device_error (mapping->device, "internal error - %s - io_write_buffer should not fail",
 165                     XSTRING (sim_core_write_aligned_N));
 166   }
 167   else
 168 #endif
 169     *(unsigned_N*) sim_core_translate (mapping, addr) = H2T_N (val);
 170   if (TRACE_P (cpu, TRACE_CORE_IDX))
 171     trace_printf (CPU_STATE (cpu), cpu,
 172                   "sim-n-core.c:%d: write-%d %s:0x%08lx <- 0x%lx\n",
 173                   __LINE__,
 174                   sizeof (unsigned_N),
 175                   sim_core_map_to_str (map),
 176                   (unsigned long) addr,
 177                   (unsigned long) val);
 178 }
 179
 180
 181 INLINE_SIM_CORE(void)
 182 sim_core_write_unaligned_N(sim_cpu *cpu,
 183                            sim_cia cia,
 184                            sim_core_maps map,
 185                            address_word addr,
 186                            unsigned_N val)
 187 {
 188   int alignment = sizeof (unsigned_N) - 1;
 189   /* if hardwired to forced alignment just do it */
 190   if (WITH_ALIGNMENT == FORCED_ALIGNMENT)
 191     sim_core_write_aligned_N (cpu, cia, map, addr & ~alignment, val);
 192   else if ((addr & alignment) == 0)
 193     sim_core_write_aligned_N (cpu, cia, map, addr, val);
 194   else
 195     switch (CURRENT_ALIGNMENT)
 196       {
 197       case STRICT_ALIGNMENT:
 198         SIM_CORE_SIGNAL (CPU_STATE (cpu), cpu, cia, map,
 199                          sizeof (unsigned_N), addr,
 200                          write_transfer, sim_core_unaligned_signal);
 201         break;
 202       case NONSTRICT_ALIGNMENT:
 203         {
 204           unsigned_N val = H2T_N (val);
 205           if (sim_core_xor_write_buffer (CPU_STATE (cpu), cpu, map, &val, addr,
 206                                          sizeof(unsigned_N))
 207               != sizeof(unsigned_N))
 208             SIM_CORE_SIGNAL (CPU_STATE (cpu), cpu, cia, map,
 209                              sizeof (unsigned_N), addr,
 210                              write_transfer, sim_core_unaligned_signal);
 211           break;
 212         }
 213       case FORCED_ALIGNMENT:
 214         sim_core_write_aligned_N (cpu, cia, map, addr & ~alignment, val);
 215       case MIXED_ALIGNMENT:
 216         sim_engine_abort (CPU_STATE (cpu), cpu, cia,
 217                           "internal error - %s - mixed alignment",
 218                           XSTRING (sim_core_write_unaligned_N));
 219         break;
 220       default:
 221         sim_engine_abort (CPU_STATE (cpu), cpu, cia,
 222                           "internal error - %s - bad switch",
 223                           XSTRING (sim_core_write_unaligned_N));
 224         break;
 225       }
 226 }
 227
 228
 229 /* NOTE: see start of file for #define of these macros */
 230 #undef unsigned_N
 231 #undef T2H_N
 232 #undef H2T_N
 233 #undef sim_core_read_aligned_N
 234 #undef sim_core_write_aligned_N
 235 #undef sim_core_read_unaligned_N
 236 #undef sim_core_write_unaligned_N