1 /* This file is part of the program psim.
3 Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
17 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
23 #error "N must be #defined"
28 /* NOTE: see end of file for #undef of these macros */
29 #define unsigned_N XCONCAT2(unsigned_,N)
30 #define T2H_N XCONCAT2(T2H_,N)
31 #define H2T_N XCONCAT2(H2T_,N)
33 #define sim_core_read_aligned_N XCONCAT2(sim_core_read_aligned_,N)
34 #define sim_core_write_aligned_N XCONCAT2(sim_core_write_aligned_,N)
35 #define sim_core_read_unaligned_N XCONCAT2(sim_core_read_unaligned_,N)
36 #define sim_core_write_unaligned_N XCONCAT2(sim_core_write_unaligned_,N)
38 /* TAGS: sim_core_read_aligned_1 sim_core_read_aligned_2 */
39 /* TAGS: sim_core_read_aligned_4 sim_core_read_aligned_8 */
40 /* TAGS: sim_core_read_aligned_word */
42 INLINE_SIM_CORE(unsigned_N
)
43 sim_core_read_aligned_N(sim_cpu
*cpu
,
48 sim_cpu_core
*cpu_core
= CPU_CORE (cpu
);
49 sim_core_common
*core
= &cpu_core
->common
;
51 sim_core_mapping
*mapping
;
54 addr
= xaddr
^ cpu_core
->xor[(sizeof(unsigned_N
) - 1) % WITH_XOR_ENDIAN
];
57 mapping
= sim_core_find_mapping (core
, map
,
61 1 /*abort*/, cpu
, cia
);
63 if (WITH_CALLBACK_MEMORY
&& mapping
->device
!= NULL
) {
65 if (device_io_read_buffer (mapping
->device
,
69 sizeof (unsigned_N
)) != sizeof (unsigned_N
))
70 device_error (mapping
->device
, "internal error - %s - io_read_buffer should not fail",
71 XSTRING (sim_core_read_aligned_N
));
76 val
= T2H_N (*(unsigned_N
*) sim_core_translate (mapping
, addr
));
77 if (TRACE_P (cpu
, TRACE_CORE_IDX
))
78 if (sizeof (unsigned_N
) > 4)
79 trace_printf (CPU_STATE (cpu
), cpu
,
80 "sim-n-core.c:%d: read-%d %s:0x%08lx -> 0x%08lx%08lx\n",
83 sim_core_map_to_str (map
),
85 (unsigned long) (((unsigned64
)(val
)) >> 32),
88 trace_printf (CPU_STATE (cpu
), cpu
,
89 "sim-n-core.c:%d: read-%d %s:0x%08lx -> 0x%0*lx\n",
92 sim_core_map_to_str (map
),
94 sizeof (unsigned_N
) * 2,
99 /* TAGS: sim_core_read_unaligned_1 sim_core_read_unaligned_2 */
100 /* TAGS: sim_core_read_unaligned_4 sim_core_read_unaligned_8 */
101 /* TAGS: sim_core_read_unaligned_word */
103 INLINE_SIM_CORE(unsigned_N
)
104 sim_core_read_unaligned_N(sim_cpu
*cpu
,
109 int alignment
= sizeof (unsigned_N
) - 1;
110 /* if hardwired to forced alignment just do it */
111 if (WITH_ALIGNMENT
== FORCED_ALIGNMENT
)
112 return sim_core_read_aligned_N (cpu
, cia
, map
, addr
& ~alignment
);
113 else if ((addr
& alignment
) == 0)
114 return sim_core_read_aligned_N (cpu
, cia
, map
, addr
);
116 switch (CURRENT_ALIGNMENT
)
118 case STRICT_ALIGNMENT
:
119 SIM_CORE_SIGNAL (CPU_STATE (cpu
), cpu
, cia
, map
,
120 sizeof (unsigned_N
), addr
,
121 read_transfer
, sim_core_unaligned_signal
);
123 case NONSTRICT_ALIGNMENT
:
126 if (sim_core_xor_read_buffer (CPU_STATE (cpu
), cpu
, map
, &val
, addr
,
128 != sizeof(unsigned_N
))
129 SIM_CORE_SIGNAL (CPU_STATE (cpu
), cpu
, cia
, map
,
130 sizeof (unsigned_N
), addr
,
131 read_transfer
, sim_core_unaligned_signal
);
135 case FORCED_ALIGNMENT
:
136 return sim_core_read_aligned_N (cpu
, cia
, map
, addr
& ~alignment
);
137 case MIXED_ALIGNMENT
:
138 sim_engine_abort (CPU_STATE (cpu
), cpu
, cia
,
139 "internal error - %s - mixed alignment",
140 XSTRING (sim_core_read_unaligned_N
));
143 sim_engine_abort (CPU_STATE (cpu
), cpu
, cia
,
144 "internal error - %s - bad switch",
145 XSTRING (sim_core_read_unaligned_N
));
150 /* TAGS: sim_core_write_aligned_1 sim_core_write_aligned_2 */
151 /* TAGS: sim_core_write_aligned_4 sim_core_write_aligned_8 */
152 /* TAGS: sim_core_write_aligned_word */
154 INLINE_SIM_CORE(void)
155 sim_core_write_aligned_N(sim_cpu
*cpu
,
161 sim_cpu_core
*cpu_core
= CPU_CORE (cpu
);
162 sim_core_common
*core
= &cpu_core
->common
;
163 sim_core_mapping
*mapping
;
166 addr
= xaddr
^ cpu_core
->xor[(sizeof(unsigned_N
) - 1) % WITH_XOR_ENDIAN
];
169 mapping
= sim_core_find_mapping(core
, map
,
173 1 /*abort*/, cpu
, cia
);
175 if (WITH_CALLBACK_MEMORY
&& mapping
->device
!= NULL
) {
176 unsigned_N data
= H2T_N (val
);
177 if (device_io_write_buffer (mapping
->device
,
181 sizeof (unsigned_N
), /* nr_bytes */
183 cia
) != sizeof (unsigned_N
))
184 device_error (mapping
->device
, "internal error - %s - io_write_buffer should not fail",
185 XSTRING (sim_core_write_aligned_N
));
189 *(unsigned_N
*) sim_core_translate (mapping
, addr
) = H2T_N (val
);
190 if (TRACE_P (cpu
, TRACE_CORE_IDX
))
191 if (sizeof (unsigned_N
) > 4)
192 trace_printf (CPU_STATE (cpu
), cpu
,
193 "sim-n-core.c:%d: write-%d %s:0x%08lx <- 0x%08lx%08lx\n",
196 sim_core_map_to_str (map
),
197 (unsigned long) addr
,
198 (unsigned long) (((unsigned64
)(val
)) >> 32),
199 (unsigned long) val
);
201 trace_printf (CPU_STATE (cpu
), cpu
,
202 "sim-n-core.c:%d: write-%d %s:0x%08lx <- 0x%0*lx\n",
205 sim_core_map_to_str (map
),
206 (unsigned long) addr
,
207 sizeof (unsigned_N
) * 2,
208 (unsigned long) val
);
211 /* TAGS: sim_core_write_unaligned_1 sim_core_write_unaligned_2 */
212 /* TAGS: sim_core_write_unaligned_4 sim_core_write_unaligned_8 */
213 /* TAGS: sim_core_write_unaligned_word */
215 INLINE_SIM_CORE(void)
216 sim_core_write_unaligned_N(sim_cpu
*cpu
,
222 int alignment
= sizeof (unsigned_N
) - 1;
223 /* if hardwired to forced alignment just do it */
224 if (WITH_ALIGNMENT
== FORCED_ALIGNMENT
)
225 sim_core_write_aligned_N (cpu
, cia
, map
, addr
& ~alignment
, val
);
226 else if ((addr
& alignment
) == 0)
227 sim_core_write_aligned_N (cpu
, cia
, map
, addr
, val
);
229 switch (CURRENT_ALIGNMENT
)
231 case STRICT_ALIGNMENT
:
232 SIM_CORE_SIGNAL (CPU_STATE (cpu
), cpu
, cia
, map
,
233 sizeof (unsigned_N
), addr
,
234 write_transfer
, sim_core_unaligned_signal
);
236 case NONSTRICT_ALIGNMENT
:
238 unsigned_N val
= H2T_N (val
);
239 if (sim_core_xor_write_buffer (CPU_STATE (cpu
), cpu
, map
, &val
, addr
,
241 != sizeof(unsigned_N
))
242 SIM_CORE_SIGNAL (CPU_STATE (cpu
), cpu
, cia
, map
,
243 sizeof (unsigned_N
), addr
,
244 write_transfer
, sim_core_unaligned_signal
);
247 case FORCED_ALIGNMENT
:
248 sim_core_write_aligned_N (cpu
, cia
, map
, addr
& ~alignment
, val
);
250 case MIXED_ALIGNMENT
:
251 sim_engine_abort (CPU_STATE (cpu
), cpu
, cia
,
252 "internal error - %s - mixed alignment",
253 XSTRING (sim_core_write_unaligned_N
));
256 sim_engine_abort (CPU_STATE (cpu
), cpu
, cia
,
257 "internal error - %s - bad switch",
258 XSTRING (sim_core_write_unaligned_N
));
264 /* NOTE: see start of file for #define of these macros */
268 #undef sim_core_read_aligned_N
269 #undef sim_core_write_aligned_N
270 #undef sim_core_read_unaligned_N
271 #undef sim_core_write_unaligned_N