1 # Makefile template for Configure for the CRIS simulator, based on a mix
2 # of the ones for m32r and i960.
4 # Copyright (C) 2004, 2005, 2007, 2008, 2009 Free Software Foundation, Inc.
5 # Contributed by Axis Communications.
7 # This program is free software; you can redistribute it and/or modify
8 # it under the terms of the GNU General Public License as published by
9 # the Free Software Foundation; either version 3 of the License, or
10 # (at your option) any later version.
12 # This program is distributed in the hope that it will be useful,
13 # but WITHOUT ANY WARRANTY; without even the implied warranty of
14 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 # GNU General Public License for more details.
17 # You should have received a copy of the GNU General Public License
18 # along with this program. If not, see <http://www.gnu.org/licenses/>.
20 ## COMMON_PRE_CONFIG_FRAG
22 CRISV10F_OBJS
= crisv10f.o cpuv10.o decodev10.o modelv10.o mloopv10f.o
23 CRISV32F_OBJS
= crisv32f.o cpuv32.o decodev32.o modelv32.o mloopv32f.o
28 $(SIM_NEW_COMMON_OBJS
) \
33 cgen-utils.o cgen-trace.o cgen-scache.o \
34 cgen-run.o sim-reason.o sim-engine.o sim-stop.o \
42 # Extra headers included by sim-main.h.
43 # FIXME: $(srccom)/cgen-ops.h should be in CGEN_INCLUDE_DEPS.
45 $(CGEN_INCLUDE_DEPS
) $(srccom
)/cgen-ops.h \
46 arch.h cpuall.h cris-sim.h cris-desc.h
49 SIM_EXTRA_CLEAN
= cris-clean
51 # This selects the cris newlib/libgloss syscall definitions.
52 NL_TARGET
= -DNL_TARGET_cris
54 ## COMMON_POST_CONFIG_FRAG
56 CGEN_CPU_DIR
= $(CGENDIR
)/..
/cpu
60 sim-if.o
: sim-if.c
$(SIM_MAIN_DEPS
) $(sim-core_h
) $(sim-options_h
)
62 # Needs CPU-specific knowledge.
63 dv-cris.o
: dv-cris.c
$(SIM_MAIN_DEPS
) $(sim-core_h
)
65 # This is the same rule as dv-core.o etc.
66 dv-rv.o
: dv-rv.c
$(hw_main_headers
) $(sim_main_headers
)
68 arch.o
: arch.c
$(SIM_MAIN_DEPS
)
70 traps.o
: traps.c targ-vals.h
$(SIM_MAIN_DEPS
) $(sim-options_h
)
71 devices.o
: devices.c
$(SIM_MAIN_DEPS
)
73 # rvdummy is just used for testing. It does nothing if
74 # --enable-sim-hardware isn't active.
78 check: rvdummy
$(EXEEXT
)
80 rvdummy
$(EXEEXT
): rvdummy.o
$(EXTRA_LIBDEPS
)
81 $(CC
) $(ALL_CFLAGS
) -o rvdummy
$(EXEEXT
) rvdummy.o
$(EXTRA_LIBS
)
83 rvdummy.o
: rvdummy.c config.h tconfig.h
$(remote_sim_h
) $(callback_h
)
87 CRISV10F_INCLUDE_DEPS
= \
88 $(CGEN_MAIN_CPU_DEPS
) \
89 cpuv10.h decodev10.h engv10.h
91 crisv10f.o
: crisv10f.c cris-tmpl.c
$(CRISV10F_INCLUDE_DEPS
)
93 # FIXME: What is mono and what does "Use of `mono' is wip" mean (other
94 # than the apparent; some "mono" feature is work in progress)?
95 mloopv10f.c engv10.h
: stamp-v10fmloop
96 stamp-v10fmloop
: $(srcdir)/..
/common
/genmloop.sh mloop.in Makefile
97 $(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
98 -mono
-no-fast
-pbb
-switch semcrisv10f-switch.c \
99 -cpu crisv10f
-infile
$(srcdir)/mloop.in
100 $(SHELL
) $(srcroot
)/move-if-change eng.hin engv10.h
101 $(SHELL
) $(srcroot
)/move-if-change mloop.cin mloopv10f.c
102 touch stamp-v10fmloop
103 mloopv10f.o
: mloopv10f.c semcrisv10f-switch.c
$(CRISV10F_INCLUDE_DEPS
)
105 cpuv10.o
: cpuv10.c
$(CRISV10F_INCLUDE_DEPS
)
106 decodev10.o
: decodev10.c
$(CRISV10F_INCLUDE_DEPS
)
107 modelv10.o
: modelv10.c
$(CRISV10F_INCLUDE_DEPS
)
111 CRISV32F_INCLUDE_DEPS
= \
112 $(CGEN_MAIN_CPU_DEPS
) \
113 cpuv32.h decodev32.h engv32.h
115 crisv32f.o
: crisv32f.c cris-tmpl.c
$(CRISV32F_INCLUDE_DEPS
)
117 # FIXME: What is mono and what does "Use of `mono' is wip" mean (other
118 # than the apparent; some "mono" feature is work in progress)?
119 mloopv32f.c engv32.h
: stamp-v32fmloop
120 # We depend on stamp-v10fmloop to get serialization to avoid
121 # racing with it for the same temporary file-names when "make -j".
122 stamp-v32fmloop
: stamp-v10fmloop
$(srcdir)/..
/common
/genmloop.sh mloop.in Makefile
123 $(SHELL
) $(srccom
)/genmloop.sh
-shell $(SHELL
) \
124 -mono
-no-fast
-pbb
-switch semcrisv32f-switch.c \
125 -cpu crisv32f
-infile
$(srcdir)/mloop.in
126 $(SHELL
) $(srcroot
)/move-if-change eng.hin engv32.h
127 $(SHELL
) $(srcroot
)/move-if-change mloop.cin mloopv32f.c
128 touch stamp-v32fmloop
129 mloopv32f.o
: mloopv32f.c semcrisv32f-switch.c
$(CRISV32F_INCLUDE_DEPS
)
131 cpuv32.o
: cpuv32.c
$(CRISV32F_INCLUDE_DEPS
)
132 decodev32.o
: decodev32.c
$(CRISV32F_INCLUDE_DEPS
)
133 modelv32.o
: modelv32.c
$(CRISV32F_INCLUDE_DEPS
)
137 rm -f mloopv
$${v}f.c engv
$${v}.h stamp-v
$${v}fmloop
; \
138 rm -f stamp-v
$${v}fcpu
; \
140 -rm -f stamp-arch stamp-desc
143 # cgen support, enable with --enable-cgen-maint
145 # The following line is commented in or out depending upon --enable-cgen-maint.
146 @CGEN_MAINT@CGEN_MAINT
=
148 # Useful when making CGEN-generated files manually, without --enable-cgen-maint.
149 stamps
: stamp-v10fmloop stamp-v32fmloop stamp-arch stamp-v10fcpu stamp-v32fcpu stamp-desc
151 stamp-arch
: $(CGEN_READ_SCM
) $(CGEN_ARCH_SCM
) $(CGEN_CPU_DIR
)/cris.cpu Makefile
152 $(MAKE
) cgen-arch
$(CGEN_FLAGS_TO_PASS
) mach
=crisv10
,crisv32 \
153 archfile
=$(CGEN_CPU_DIR
)/cris.cpu \
154 FLAGS
="with-scache with-profile=fn"
156 arch.h arch.c cpuall.h
: $(CGEN_MAINT
) stamp-arch
158 # The sed-hack is supposed to be temporary, until we get CGEN to emit it.
159 stamp-v10fcpu
: $(CGEN_READ_SCM
) $(CGEN_CPU_SCM
) $(CGEN_DECODE_SCM
) $(CGEN_CPU_DIR
)/cris.cpu Makefile
160 $(MAKE
) cgen-cpu-decode
$(CGEN_FLAGS_TO_PASS
) \
161 archfile
=$(CGEN_CPU_DIR
)/cris.cpu \
162 cpu
=crisv10f mach
=crisv10 SUFFIX
=v10 FLAGS
="with-scache with-profile=fn" EXTRAFILES
="$(CGEN_CPU_SEMSW)"
163 $(SHELL
) $(srcroot
)/move-if-change
$(srcdir)/semv10-switch.c
$(srcdir)/semcrisv10f-switch.c
164 sed
-ne
'p; s/^\(#include "sim-assert.h"\)$$/#include "cgen-ops.h"/p' < $(srcdir)/decodev10.c
> decodev10.c.tmp
165 mv decodev10.c.tmp
$(srcdir)/decodev10.c
167 cpuv10.h cpuv10.c semcrisv10f-switch.c modelv10.c decodev10.c decodev10.h
: $(CGEN_MAINT
) stamp-v10fcpu
169 stamp-v32fcpu
: $(CGEN_READ_SCM
) $(CGEN_CPU_SCM
) $(CGEN_DECODE_SCM
) $(CGEN_CPU_DIR
)/cris.cpu Makefile
170 $(MAKE
) cgen-cpu-decode
$(CGEN_FLAGS_TO_PASS
) \
171 archfile
=$(CGEN_CPU_DIR
)/cris.cpu \
172 cpu
=crisv32f mach
=crisv32 SUFFIX
=v32 FLAGS
="with-scache with-profile=fn" EXTRAFILES
="$(CGEN_CPU_SEMSW)"
173 $(SHELL
) $(srcroot
)/move-if-change
$(srcdir)/semv32-switch.c
$(srcdir)/semcrisv32f-switch.c
174 sed
-ne
'p; s/^\(#include "sim-assert.h"\)$$/#include "cgen-ops.h"/p' < $(srcdir)/decodev32.c
> decodev32.c.tmp
175 mv decodev32.c.tmp
$(srcdir)/decodev32.c
177 cpuv32.h cpuv32.c semcrisv32f-switch.c modelv32.c decodev32.c decodev32.h
: $(CGEN_MAINT
) stamp-v32fcpu
179 stamp-desc
: $(CGEN_READ_SCM
) $(CGEN_DESC_SCM
) $(CGEN_CPU_DIR
)/cris.cpu Makefile
180 $(MAKE
) cgen-desc
$(CGEN_FLAGS_TO_PASS
) \
181 archfile
=$(CGEN_CPU_DIR
)/cris.cpu \
184 cris-desc.c cris-desc.h cris-opc.h
: $(CGEN_MAINT
) stamp-desc