sim/cris/sim-main.h

   1 /* Main header for the CRIS simulator, based on the m32r header.
   2    Copyright (C) 2004-2015 Free Software Foundation, Inc.
   3    Contributed by Axis Communications.
   4
   5 This file is part of the GNU simulators.
   6
   7 This program is free software; you can redistribute it and/or modify
   8 it under the terms of the GNU General Public License as published by
   9 the Free Software Foundation; either version 3 of the License, or
  10 (at your option) any later version.
  11
  12 This program is distributed in the hope that it will be useful,
  13 but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 GNU General Public License for more details.
  16
  17 You should have received a copy of the GNU General Public License
  18 along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  19
  20 /* All FIXME:s present in m32r apply here too; I just refuse to blindly
  21    carry them over, as I don't know if they're really things that need
  22    fixing.  */
  23
  24 #ifndef SIM_MAIN_H
  25 #define SIM_MAIN_H
  26
  27 #define USING_SIM_BASE_H
  28
  29 struct _sim_cpu;
  30 typedef struct _sim_cpu SIM_CPU;
  31
  32 #include "symcat.h"
  33 #include "sim-basics.h"
  34 #include "cgen-types.h"
  35 #include "cris-desc.h"
  36 #include "cris-opc.h"
  37 #include "arch.h"
  38
  39 #define SIM_ENGINE_HALT_HOOK(sd, cpu, cia) \
  40 do { \
  41   if (cpu) /* Null if ctrl-c.  */ \
  42     sim_pc_set ((cpu), (cia)); \
  43 } while (0)
  44 #define SIM_ENGINE_RESTART_HOOK(sd, cpu, cia) \
  45 do { \
  46   sim_pc_set ((cpu), (cia)); \
  47 } while (0)
  48
  49 #include "sim-base.h"
  50 #include "cgen-sim.h"
  51 #include "cris-sim.h"
  52 \f
  53 struct cris_sim_mmapped_page {
  54   USI addr;
  55   struct cris_sim_mmapped_page *prev;
  56 };
  57
  58 struct cris_thread_info {
  59   /* Identifier for this thread.  */
  60   unsigned int threadid;
  61
  62   /* Identifier for parent thread.  */
  63   unsigned int parent_threadid;
  64
  65   /* Signal to send to parent at exit.  */
  66   int exitsig;
  67
  68   /* Exit status.  */
  69   int exitval;
  70
  71   /* Only as storage to return the "set" value to the "get" method.
  72      I'm not sure whether this is useful per-thread.  */
  73   USI priority;
  74
  75   struct
  76   {
  77     USI altstack;
  78     USI options;
  79
  80     char action;
  81     char pending;
  82     char blocked;
  83     char blocked_suspendsave;
  84     /* The handler stub unblocks the signal, so we don't need a separate
  85        "temporary save" for that.  */
  86   } sigdata[64];
  87
  88   /* Register context, swapped with _sim_cpu.cpu_data.  */
  89   void *cpu_context;
  90
  91   /* Similar, temporary copy for the state at a signal call.   */
  92   void *cpu_context_atsignal;
  93
  94   /* The number of the reading and writing ends of a pipe if waiting for
  95      the reader, else 0.  */
  96   int pipe_read_fd;
  97   int pipe_write_fd;
  98
  99   /* System time at last context switch when this thread ran.  */
 100   USI last_execution;
 101
 102   /* Nonzero if we just executed a syscall.  */
 103   char at_syscall;
 104
 105   /* Nonzero if any of sigaction[0..64].pending is true.  */
 106   char sigpending;
 107
 108   /* Nonzero if in (rt_)sigsuspend call.  Cleared at every sighandler
 109      call.  */
 110   char sigsuspended;
 111 };
 112
 113 typedef int (*cris_interrupt_delivery_fn) (SIM_CPU *,
 114                                            enum cris_interrupt_type,
 115                                            unsigned int);
 116
 117 struct _sim_cpu {
 118   /* sim/common cpu base.  */
 119   sim_cpu_base base;
 120
 121   /* Static parts of cgen.  */
 122   CGEN_CPU cgen_cpu;
 123
 124   CRIS_MISC_PROFILE cris_misc_profile;
 125 #define CPU_CRIS_MISC_PROFILE(cpu) (& (cpu)->cris_misc_profile)
 126
 127   /* Copy of previous data; only valid when emitting trace-data after
 128      each insn.  */
 129   CRIS_MISC_PROFILE cris_prev_misc_profile;
 130 #define CPU_CRIS_PREV_MISC_PROFILE(cpu) (& (cpu)->cris_prev_misc_profile)
 131
 132 #if WITH_HW
 133   cris_interrupt_delivery_fn deliver_interrupt;
 134 #define CPU_CRIS_DELIVER_INTERRUPT(cpu) (cpu->deliver_interrupt)
 135 #endif
 136
 137   /* Simulator environment data.  */
 138   USI endmem;
 139   USI endbrk;
 140   USI stack_low;
 141   struct cris_sim_mmapped_page *highest_mmapped_page;
 142
 143   /* Number of syscalls performed or in progress, counting once extra
 144      for every time a blocked thread (internally, when threading) polls
 145      the (pipe) blockage.  By default, this is also a time counter: to
 146      minimize performance noise from minor compiler changes,
 147      instructions take no time and syscalls always take 1ms.  */
 148   USI syscalls;
 149
 150   /* Number of execution contexts minus one.  */
 151   int m1threads;
 152
 153   /* Current thread number; index into thread_data when m1threads != 0.  */
 154   int threadno;
 155
 156   /* When a new thread is created, it gets a unique number, which we
 157      count here.  */
 158   int max_threadid;
 159
 160   /* Thread-specific info, for simulator thread support, created at
 161      "clone" call.  Vector of [threads+1] when m1threads > 0.  */
 162   struct cris_thread_info *thread_data;
 163
 164   /* "If CLONE_SIGHAND is set, the calling process and the child pro-
 165      cesses share the same table of signal handlers." ... "However, the
 166      calling process and child processes still have distinct signal
 167      masks and sets of pending signals."  See struct cris_thread_info
 168      for sigmasks and sigpendings. */
 169   USI sighandler[64];
 170
 171   /* This is a hack to implement just the parts of fcntl F_GETFL that
 172      are used in open+fdopen calls for the standard scenario: for such
 173      a call we check that the last syscall was open, we check that the
 174      passed fd is the same returned then, and so we return the same
 175      flags passed to open.  This way, we avoid complicating the
 176      generic sim callback machinery by introducing fcntl
 177      mechanisms.  */
 178   USI last_syscall;
 179   USI last_open_fd;
 180   USI last_open_flags;
 181
 182   /* Function for initializing CPU thread context, which varies in size
 183      with each CPU model.  They should be in some constant parts or
 184      initialized in *_init_cpu, but we can't modify that for now.  */
 185   void* (*make_thread_cpu_data) (SIM_CPU *, void *);
 186   size_t thread_cpu_data_size;
 187
 188   /* The register differs, so we dispatch to a CPU-specific function.  */
 189   void (*set_target_thread_data) (SIM_CPU *, USI);
 190
 191   /* CPU-model specific parts go here.
 192      Note that in files that don't need to access these pieces WANT_CPU_FOO
 193      won't be defined and thus these parts won't appear.  This is ok in the
 194      sense that things work.  It is a source of bugs though.
 195      One has to of course be careful to not take the size of this
 196      struct and no structure members accessed in non-cpu specific files can
 197      go after here.  */
 198 #if defined (WANT_CPU_CRISV0F)
 199   CRISV0F_CPU_DATA cpu_data;
 200 #elif defined (WANT_CPU_CRISV3F)
 201   CRISV3F_CPU_DATA cpu_data;
 202 #elif defined (WANT_CPU_CRISV8F)
 203   CRISV8F_CPU_DATA cpu_data;
 204 #elif defined (WANT_CPU_CRISV10F)
 205   CRISV10F_CPU_DATA cpu_data;
 206 #elif defined (WANT_CPU_CRISV32F)
 207   CRISV32F_CPU_DATA cpu_data;
 208 #else
 209   /* Let's assume all cpu_data have the same alignment requirements, so
 210      they all are laid out at the same address.  Since we can't get the
 211      exact definition, we also assume that it has no higher alignment
 212      requirements than a vector of, say, 16 pointers.  (A single member
 213      is often special-cased, and possibly two as well so we don't want
 214      that).  */
 215   union { void *dummy[16]; } cpu_data_placeholder;
 216 #endif
 217 };
 218 \f
 219 /* The sim_state struct.  */
 220
 221 struct sim_state {
 222   sim_cpu *cpu[MAX_NR_PROCESSORS];
 223
 224   CGEN_STATE cgen_state;
 225
 226   sim_state_base base;
 227 };
 228 \f
 229 /* Misc.  */
 230
 231 /* Catch address exceptions.  */
 232 extern SIM_CORE_SIGNAL_FN cris_core_signal;
 233 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
 234 cris_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \
 235                   (TRANSFER), (ERROR))
 236
 237 /* Default memory size.  */
 238 #define CRIS_DEFAULT_MEM_SIZE 0x800000 /* 8M */
 239
 240 extern device cris_devices;
 241
 242 #endif /* SIM_MAIN_H */