1 /* Main header for the CRIS simulator, based on the m32r header.
2 Copyright (C) 2004, 2005 Free Software Foundation, Inc.
3 Contributed by Axis Communications.
5 This file is part of the GNU simulators.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License along
18 with this program; if not, write to the Free Software Foundation, Inc.,
19 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
21 /* All FIXME:s present in m32r apply here too; I just refuse to blindly
22 carry them over, as I don't know if they're really things that need
28 #define USING_SIM_BASE_H
31 typedef struct _sim_cpu SIM_CPU
;
34 #include "sim-basics.h"
35 #include "cgen-types.h"
36 #include "cris-desc.h"
40 /* These must be defined before sim-base.h. */
43 #define CIA_GET(cpu) CPU_PC_GET (cpu)
44 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
46 #define SIM_ENGINE_HALT_HOOK(sd, cpu, cia) \
48 if (cpu) /* Null if ctrl-c. */ \
49 sim_pc_set ((cpu), (cia)); \
51 #define SIM_ENGINE_RESTART_HOOK(sd, cpu, cia) \
53 sim_pc_set ((cpu), (cia)); \
60 struct cris_sim_mmapped_page
{
62 struct cris_sim_mmapped_page
*prev
;
65 struct cris_thread_info
{
66 /* Identifier for this thread. */
67 unsigned int threadid
;
69 /* Identifier for parent thread. */
70 unsigned int parent_threadid
;
72 /* Signal to send to parent at exit. */
78 /* Only as storage to return the "set" value to the "get" method.
79 I'm not sure whether this is useful per-thread. */
90 char blocked_suspendsave
;
91 /* The handler stub unblocks the signal, so we don't need a separate
92 "temporary save" for that. */
95 /* Register context, swapped with _sim_cpu.cpu_data. */
98 /* Similar, temporary copy for the state at a signal call. */
99 void *cpu_context_atsignal
;
101 /* The number of the reading and writing ends of a pipe if waiting for
102 the reader, else 0. */
106 /* System time at last context switch when this thread ran. */
109 /* Nonzero if we just executed a syscall. */
112 /* Nonzero if any of sigaction[0..64].pending is true. */
115 /* Nonzero if in (rt_)sigsuspend call. Cleared at every sighandler
121 /* sim/common cpu base. */
124 /* Static parts of cgen. */
127 CRIS_MISC_PROFILE cris_misc_profile
;
128 #define CPU_CRIS_MISC_PROFILE(cpu) (& (cpu)->cris_misc_profile)
130 /* Copy of previous data; only valid when emitting trace-data after
132 CRIS_MISC_PROFILE cris_prev_misc_profile
;
133 #define CPU_CRIS_PREV_MISC_PROFILE(cpu) (& (cpu)->cris_prev_misc_profile)
135 /* Simulator environment data. */
139 struct cris_sim_mmapped_page
*highest_mmapped_page
;
141 /* Number of syscalls performed or in progress, counting once extra
142 for every time a blocked thread (internally, when threading) polls
143 the (pipe) blockage. By default, this is also a time counter: to
144 minimize performance noise from minor compiler changes,
145 instructions take no time and syscalls always take 1ms. */
148 /* Number of execution contexts minus one. */
151 /* Current thread number; index into thread_data when m1threads != 0. */
154 /* When a new thread is created, it gets a unique number, which we
158 /* Thread-specific info, for simulator thread support, created at
159 "clone" call. Vector of [threads+1] when m1threads > 0. */
160 struct cris_thread_info
*thread_data
;
162 /* "If CLONE_SIGHAND is set, the calling process and the child pro-
163 cesses share the same table of signal handlers." ... "However, the
164 calling process and child processes still have distinct signal
165 masks and sets of pending signals." See struct cris_thread_info
166 for sigmasks and sigpendings. */
169 /* Function for initializing CPU thread context, which varies in size
170 with each CPU model. They should be in some constant parts or
171 initialized in *_init_cpu, but we can't modify that for now. */
172 void* (*make_thread_cpu_data
) (SIM_CPU
*, void *);
173 size_t thread_cpu_data_size
;
175 /* CPU-model specific parts go here.
176 Note that in files that don't need to access these pieces WANT_CPU_FOO
177 won't be defined and thus these parts won't appear. This is ok in the
178 sense that things work. It is a source of bugs though.
179 One has to of course be careful to not take the size of this
180 struct and no structure members accessed in non-cpu specific files can
182 #if defined (WANT_CPU_CRISV0F)
183 CRISV0F_CPU_DATA cpu_data
;
184 #elif defined (WANT_CPU_CRISV3F)
185 CRISV3F_CPU_DATA cpu_data
;
186 #elif defined (WANT_CPU_CRISV8F)
187 CRISV8F_CPU_DATA cpu_data
;
188 #elif defined (WANT_CPU_CRISV10F)
189 CRISV10F_CPU_DATA cpu_data
;
190 #elif defined (WANT_CPU_CRISV32F)
191 CRISV32F_CPU_DATA cpu_data
;
193 /* Let's assume all cpu_data have the same alignment requirements, so
194 they all are laid out at the same address. Since we can't get the
195 exact definition, we also assume that it has no higher alignment
196 requirements than a vector of, say, 16 pointers. (A single member
197 is often special-cased, and possibly two as well so we don't want
199 union { void *dummy
[16]; } cpu_data_placeholder
;
203 /* The sim_state struct. */
207 #define STATE_CPU(sd, n) (/*&*/ (sd)->cpu)
209 CGEN_STATE cgen_state
;
216 /* Catch address exceptions. */
217 extern SIM_CORE_SIGNAL_FN cris_core_signal
;
218 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
219 cris_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \
222 /* Default memory size. */
223 #define CRIS_DEFAULT_MEM_SIZE 0x800000 /* 8M */
225 extern device cris_devices
;
227 #endif /* SIM_MAIN_H */