d1a7c1e7b25fbbbbab83b3902ea403a94db54a1f
[deliverable/binutils-gdb.git] / sim / cris / sim-main.h
1 /* Main header for the CRIS simulator, based on the m32r header.
2 Copyright (C) 2004-2015 Free Software Foundation, Inc.
3 Contributed by Axis Communications.
4
5 This file is part of the GNU simulators.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19
20 /* All FIXME:s present in m32r apply here too; I just refuse to blindly
21 carry them over, as I don't know if they're really things that need
22 fixing. */
23
24 #ifndef SIM_MAIN_H
25 #define SIM_MAIN_H
26
27 #include "symcat.h"
28 #include "sim-basics.h"
29 #include "cgen-types.h"
30 #include "cris-desc.h"
31 #include "cris-opc.h"
32 #include "arch.h"
33
34 #define SIM_ENGINE_HALT_HOOK(sd, cpu, cia) \
35 do { \
36 if (cpu) /* Null if ctrl-c. */ \
37 sim_pc_set ((cpu), (cia)); \
38 } while (0)
39 #define SIM_ENGINE_RESTART_HOOK(sd, cpu, cia) \
40 do { \
41 sim_pc_set ((cpu), (cia)); \
42 } while (0)
43
44 #include "sim-base.h"
45 #include "cgen-sim.h"
46 #include "cris-sim.h"
47 \f
48 struct cris_sim_mmapped_page {
49 USI addr;
50 struct cris_sim_mmapped_page *prev;
51 };
52
53 struct cris_thread_info {
54 /* Identifier for this thread. */
55 unsigned int threadid;
56
57 /* Identifier for parent thread. */
58 unsigned int parent_threadid;
59
60 /* Signal to send to parent at exit. */
61 int exitsig;
62
63 /* Exit status. */
64 int exitval;
65
66 /* Only as storage to return the "set" value to the "get" method.
67 I'm not sure whether this is useful per-thread. */
68 USI priority;
69
70 struct
71 {
72 USI altstack;
73 USI options;
74
75 char action;
76 char pending;
77 char blocked;
78 char blocked_suspendsave;
79 /* The handler stub unblocks the signal, so we don't need a separate
80 "temporary save" for that. */
81 } sigdata[64];
82
83 /* Register context, swapped with _sim_cpu.cpu_data. */
84 void *cpu_context;
85
86 /* Similar, temporary copy for the state at a signal call. */
87 void *cpu_context_atsignal;
88
89 /* The number of the reading and writing ends of a pipe if waiting for
90 the reader, else 0. */
91 int pipe_read_fd;
92 int pipe_write_fd;
93
94 /* System time at last context switch when this thread ran. */
95 USI last_execution;
96
97 /* Nonzero if we just executed a syscall. */
98 char at_syscall;
99
100 /* Nonzero if any of sigaction[0..64].pending is true. */
101 char sigpending;
102
103 /* Nonzero if in (rt_)sigsuspend call. Cleared at every sighandler
104 call. */
105 char sigsuspended;
106 };
107
108 typedef int (*cris_interrupt_delivery_fn) (SIM_CPU *,
109 enum cris_interrupt_type,
110 unsigned int);
111
112 struct _sim_cpu {
113 /* sim/common cpu base. */
114 sim_cpu_base base;
115
116 /* Static parts of cgen. */
117 CGEN_CPU cgen_cpu;
118
119 CRIS_MISC_PROFILE cris_misc_profile;
120 #define CPU_CRIS_MISC_PROFILE(cpu) (& (cpu)->cris_misc_profile)
121
122 /* Copy of previous data; only valid when emitting trace-data after
123 each insn. */
124 CRIS_MISC_PROFILE cris_prev_misc_profile;
125 #define CPU_CRIS_PREV_MISC_PROFILE(cpu) (& (cpu)->cris_prev_misc_profile)
126
127 #if WITH_HW
128 cris_interrupt_delivery_fn deliver_interrupt;
129 #define CPU_CRIS_DELIVER_INTERRUPT(cpu) (cpu->deliver_interrupt)
130 #endif
131
132 /* Simulator environment data. */
133 USI endmem;
134 USI endbrk;
135 USI stack_low;
136 struct cris_sim_mmapped_page *highest_mmapped_page;
137
138 /* Number of syscalls performed or in progress, counting once extra
139 for every time a blocked thread (internally, when threading) polls
140 the (pipe) blockage. By default, this is also a time counter: to
141 minimize performance noise from minor compiler changes,
142 instructions take no time and syscalls always take 1ms. */
143 USI syscalls;
144
145 /* Number of execution contexts minus one. */
146 int m1threads;
147
148 /* Current thread number; index into thread_data when m1threads != 0. */
149 int threadno;
150
151 /* When a new thread is created, it gets a unique number, which we
152 count here. */
153 int max_threadid;
154
155 /* Thread-specific info, for simulator thread support, created at
156 "clone" call. Vector of [threads+1] when m1threads > 0. */
157 struct cris_thread_info *thread_data;
158
159 /* "If CLONE_SIGHAND is set, the calling process and the child pro-
160 cesses share the same table of signal handlers." ... "However, the
161 calling process and child processes still have distinct signal
162 masks and sets of pending signals." See struct cris_thread_info
163 for sigmasks and sigpendings. */
164 USI sighandler[64];
165
166 /* This is a hack to implement just the parts of fcntl F_GETFL that
167 are used in open+fdopen calls for the standard scenario: for such
168 a call we check that the last syscall was open, we check that the
169 passed fd is the same returned then, and so we return the same
170 flags passed to open. This way, we avoid complicating the
171 generic sim callback machinery by introducing fcntl
172 mechanisms. */
173 USI last_syscall;
174 USI last_open_fd;
175 USI last_open_flags;
176
177 /* Function for initializing CPU thread context, which varies in size
178 with each CPU model. They should be in some constant parts or
179 initialized in *_init_cpu, but we can't modify that for now. */
180 void* (*make_thread_cpu_data) (SIM_CPU *, void *);
181 size_t thread_cpu_data_size;
182
183 /* The register differs, so we dispatch to a CPU-specific function. */
184 void (*set_target_thread_data) (SIM_CPU *, USI);
185
186 /* CPU-model specific parts go here.
187 Note that in files that don't need to access these pieces WANT_CPU_FOO
188 won't be defined and thus these parts won't appear. This is ok in the
189 sense that things work. It is a source of bugs though.
190 One has to of course be careful to not take the size of this
191 struct and no structure members accessed in non-cpu specific files can
192 go after here. */
193 #if defined (WANT_CPU_CRISV0F)
194 CRISV0F_CPU_DATA cpu_data;
195 #elif defined (WANT_CPU_CRISV3F)
196 CRISV3F_CPU_DATA cpu_data;
197 #elif defined (WANT_CPU_CRISV8F)
198 CRISV8F_CPU_DATA cpu_data;
199 #elif defined (WANT_CPU_CRISV10F)
200 CRISV10F_CPU_DATA cpu_data;
201 #elif defined (WANT_CPU_CRISV32F)
202 CRISV32F_CPU_DATA cpu_data;
203 #else
204 /* Let's assume all cpu_data have the same alignment requirements, so
205 they all are laid out at the same address. Since we can't get the
206 exact definition, we also assume that it has no higher alignment
207 requirements than a vector of, say, 16 pointers. (A single member
208 is often special-cased, and possibly two as well so we don't want
209 that). */
210 union { void *dummy[16]; } cpu_data_placeholder;
211 #endif
212 };
213 \f
214 /* The sim_state struct. */
215
216 struct sim_state {
217 sim_cpu *cpu[MAX_NR_PROCESSORS];
218
219 CGEN_STATE cgen_state;
220
221 sim_state_base base;
222 };
223 \f
224 /* Misc. */
225
226 /* Catch address exceptions. */
227 extern SIM_CORE_SIGNAL_FN cris_core_signal;
228 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
229 cris_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \
230 (TRANSFER), (ERROR))
231
232 /* Default memory size. */
233 #define CRIS_DEFAULT_MEM_SIZE 0x800000 /* 8M */
234
235 extern device cris_devices;
236
237 #endif /* SIM_MAIN_H */
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