4 #include "remote-sim.h"
8 #define IMEM_SIZE 18 /* D10V instruction memory size is 18 bits */
9 #define DMEM_SIZE 16 /* Data memory */
11 enum _leftright
{ LEFT_FIRST
, RIGHT_FIRST
};
14 host_callback
*d10v_callback
;
15 long ins_type_counters
[ (int)INS_MAX
];
16 long left_nops
, right_nops
;
20 static struct hash_entry
*lookup_hash
PARAMS ((uint32 ins
, int size
));
25 struct hash_entry
*next
;
31 struct hash_entry hash_table
[MAX_HASH
+1];
38 if (format
& LONG_OPCODE
)
39 return ((insn
& 0x3F000000) >> 24);
41 return((insn
& 0x7E00) >> 9);
44 static struct hash_entry
*
45 lookup_hash (ins
, size
)
52 h
= &hash_table
[(ins
& 0x3F000000) >> 24];
54 h
= &hash_table
[(ins
& 0x7E00) >> 9];
56 while ( (ins
& h
->mask
) != h
->opcode
)
60 (*d10v_callback
->printf_filtered
) (d10v_callback
, "ERROR looking up hash for %x at PC %x\n",ins
, PC
);
69 get_operands (struct simops
*s
, uint32 ins
)
71 int i
, shift
, bits
, flags
;
73 for (i
=0; i
< s
->numops
; i
++)
75 shift
= s
->operands
[3*i
];
76 bits
= s
->operands
[3*i
+1];
77 flags
= s
->operands
[3*i
+2];
78 mask
= 0x7FFFFFFF >> (31 - bits
);
79 OP
[i
] = (ins
>> shift
) & mask
;
89 if ((d10v_debug
& DEBUG_INSTRUCTION
) != 0)
90 (*d10v_callback
->printf_filtered
) (d10v_callback
, "do_long 0x%x\n", ins
);
92 h
= lookup_hash (ins
, 1);
93 get_operands (h
->ops
, ins
);
94 State
.ins_type
= INS_LONG
;
95 ins_type_counters
[ (int)State
.ins_type
]++;
100 do_2_short (ins1
, ins2
, leftright
)
102 enum _leftright leftright
;
104 struct hash_entry
*h
;
108 if ((d10v_debug
& DEBUG_INSTRUCTION
) != 0)
109 (*d10v_callback
->printf_filtered
) (d10v_callback
, "do_2_short 0x%x (%s) -> 0x%x\n",
110 ins1
, (leftright
) ? "left" : "right", ins2
);
112 /* printf ("do_2_short %x -> %x\n",ins1,ins2); */
113 h
= lookup_hash (ins1
, 0);
114 get_operands (h
->ops
, ins1
);
115 State
.ins_type
= (leftright
== LEFT_FIRST
) ? INS_LEFT
: INS_RIGHT
;
116 ins_type_counters
[ (int)State
.ins_type
]++;
119 /* If the PC has changed (ie, a jump), don't do the second instruction */
120 if (orig_pc
== PC
&& !State
.exception
)
122 h
= lookup_hash (ins2
, 0);
123 get_operands (h
->ops
, ins2
);
124 State
.ins_type
= (leftright
== LEFT_FIRST
) ? INS_RIGHT
: INS_LEFT
;
125 ins_type_counters
[ (int)State
.ins_type
]++;
131 do_parallel (ins1
, ins2
)
134 struct hash_entry
*h1
, *h2
;
136 if ((d10v_debug
& DEBUG_INSTRUCTION
) != 0)
137 (*d10v_callback
->printf_filtered
) (d10v_callback
, "do_parallel 0x%x || 0x%x\n", ins1
, ins2
);
139 h1
= lookup_hash (ins1
, 0);
140 h2
= lookup_hash (ins2
, 0);
142 if (h1
->ops
->exec_type
== PARONLY
)
144 get_operands (h1
->ops
, ins1
);
145 State
.ins_type
= INS_LEFT
;
146 ins_type_counters
[ (int)State
.ins_type
]++;
150 get_operands (h2
->ops
, ins2
);
151 State
.ins_type
= INS_RIGHT
;
155 else if (h2
->ops
->exec_type
== PARONLY
)
157 get_operands (h2
->ops
, ins2
);
158 State
.ins_type
= INS_RIGHT
;
159 ins_type_counters
[ (int)State
.ins_type
]++;
163 get_operands (h1
->ops
, ins1
);
164 State
.ins_type
= INS_LEFT
;
170 get_operands (h1
->ops
, ins1
);
171 State
.ins_type
= INS_LEFT_PARALLEL
;
172 ins_type_counters
[ (int)State
.ins_type
]++;
174 if (!State
.exception
)
176 get_operands (h2
->ops
, ins2
);
177 State
.ins_type
= INS_RIGHT_PARALLEL
;
178 ins_type_counters
[ (int)State
.ins_type
]++;
196 State
.imem
= (uint8
*)calloc(1,1<<IMEM_SIZE
);
197 State
.dmem
= (uint8
*)calloc(1,1<<DMEM_SIZE
);
198 if (!State
.imem
|| !State
.dmem
)
200 (*d10v_callback
->printf_filtered
) (d10v_callback
, "Memory allocation failed.\n");
204 State
.mem_min
= 1<<IMEM_SIZE
;
208 if ((d10v_debug
& DEBUG_MEMSIZE
) != 0)
210 (*d10v_callback
->printf_filtered
) (d10v_callback
, "Allocated %d bytes instruction memory and\n",1<<IMEM_SIZE
);
211 (*d10v_callback
->printf_filtered
) (d10v_callback
, " %d bytes data memory.\n", 1<<DMEM_SIZE
);
224 sim_write (addr
, buffer
, size
)
226 unsigned char *buffer
;
232 if ((d10v_debug
& DEBUG_INSTRUCTION
) != 0)
233 (*d10v_callback
->printf_filtered
) (d10v_callback
, "sim_write %d bytes to 0x%x, min = 0x%x, max = 0x%x\n",
234 size
, addr
, State
.mem_min
, State
.mem_max
);
237 if (State
.mem_min
> addr
)
238 State
.mem_min
= addr
;
240 if (State
.mem_max
< addr
+size
-1)
241 State
.mem_max
= addr
+size
-1;
243 memcpy (State
.imem
+addr
, buffer
, size
);
252 struct hash_entry
*h
, *prev
;
253 static int init_p
= 0;
258 if (strcmp (args
, "-t") == 0)
262 (*d10v_callback
->printf_filtered
) (d10v_callback
, "ERROR: unsupported option(s): %s\n",args
);
265 /* put all the opcodes in the hash table */
268 for (s
= Simops
; s
->func
; s
++)
270 h
= &hash_table
[hash(s
->opcode
,s
->format
)];
272 /* go to the last entry in the chain */
278 h
->next
= calloc(1,sizeof(struct hash_entry
));
283 h
->opcode
= s
->opcode
;
300 (*d10v_callback
->printf_filtered
) (d10v_callback
, "sim_set_profile %d\n",n
);
304 sim_set_profile_size (n
)
307 (*d10v_callback
->printf_filtered
) (d10v_callback
, "sim_set_profile_size %d\n",n
);
311 sim_resume (step
, siggnal
)
318 /* (*d10v_callback->printf_filtered) (d10v_callback, "sim_resume (%d,%d) PC=0x%x\n",step,siggnal,PC); */
321 State
.exception
= SIGTRAP
;
327 uint32 byte_pc
= ((uint32
)PC
) << 2;
328 if ((byte_pc
< State
.mem_min
) || (byte_pc
> State
.mem_max
))
330 (*d10v_callback
->printf_filtered
) (d10v_callback
,
331 "PC (0x%lx) out of range, oldpc = 0x%lx, min = 0x%lx, max = 0x%lx\n",
332 (long)byte_pc
, (long)oldpc
, (long)State
.mem_min
, (long)State
.mem_max
);
333 State
.exception
= SIGILL
;
337 inst
= RLW (byte_pc
);
339 switch (inst
& 0xC0000000)
342 /* long instruction */
343 do_long (inst
& 0x3FFFFFFF);
347 do_2_short ( inst
& 0x7FFF, (inst
& 0x3FFF8000) >> 15, 0);
351 do_2_short ((inst
& 0x3FFF8000) >> 15, inst
& 0x7FFF, 1);
354 do_parallel ((inst
& 0x3FFF8000) >> 15, inst
& 0x7FFF);
358 if (State
.RP
&& PC
== RPT_E
)
372 while (!State
.exception
);
391 long total
= (ins_type_counters
[ (int)INS_LONG
]
392 + ins_type_counters
[ (int)INS_LEFT
]
393 + ins_type_counters
[ (int)INS_LEFT_PARALLEL
]
394 + ins_type_counters
[ (int)INS_RIGHT
]
395 + ins_type_counters
[ (int)INS_RIGHT_PARALLEL
]);
397 sprintf (buf
, "%ld", total
);
400 (*d10v_callback
->printf_filtered
) (d10v_callback
,
401 "executed %*ld instructions in the left container, %*ld parallel, %*ld nops\n",
402 size
, ins_type_counters
[ (int)INS_LEFT
] + ins_type_counters
[ (int)INS_LEFT_PARALLEL
],
403 size
, ins_type_counters
[ (int)INS_LEFT_PARALLEL
],
406 (*d10v_callback
->printf_filtered
) (d10v_callback
,
407 "executed %*ld instructions in the right container, %*ld parallel, %*ld nops\n",
408 size
, ins_type_counters
[ (int)INS_RIGHT
] + ins_type_counters
[ (int)INS_RIGHT_PARALLEL
],
409 size
, ins_type_counters
[ (int)INS_RIGHT_PARALLEL
],
412 (*d10v_callback
->printf_filtered
) (d10v_callback
,
413 "executed %*ld long instructions\n",
414 size
, ins_type_counters
[ (int)INS_LONG
]);
416 (*d10v_callback
->printf_filtered
) (d10v_callback
,
417 "executed %*ld total instructions\n",
422 sim_create_inferior (start_address
, argv
, env
)
423 SIM_ADDR start_address
;
428 uint32 mem_min
, mem_max
;
431 (*d10v_callback
->printf_filtered
) (d10v_callback
, "sim_create_inferior: PC=0x%x\n", start_address
);
433 /* save memory pointers */
436 mem_min
= State
.mem_min
;
437 mem_max
= State
.mem_max
;
438 /* reset all state information */
439 memset (&State
, 0, sizeof(State
));
440 /* restore memory pointers */
443 State
.mem_min
= mem_min
;
444 State
.mem_max
= mem_max
;
446 PC
= start_address
>> 2;
460 /* printf ("sim_set_callbacks\n"); */
465 sim_stop_reason (reason
, sigrc
)
466 enum sim_stop
*reason
;
469 /* (*d10v_callback->printf_filtered) (d10v_callback, "sim_stop_reason: PC=0x%x\n",PC<<2); */
471 switch (State
.exception
)
473 case SIG_D10V_STOP
: /* stop instruction */
474 *reason
= sim_exited
;
478 case SIG_D10V_EXIT
: /* exit trap */
479 *reason
= sim_exited
;
480 *sigrc
= State
.regs
[2];
483 default: /* some signal */
484 *reason
= sim_stopped
;
485 *sigrc
= State
.exception
;
491 sim_fetch_register (rn
, memory
)
493 unsigned char *memory
;
497 WRITE_64 (memory
, State
.a
[rn
-32]);
498 /* (*d10v_callback->printf_filtered) (d10v_callback, "sim_fetch_register %d 0x%llx\n",rn,State.a[rn-32]); */
502 WRITE_16 (memory
, State
.regs
[rn
]);
503 /* (*d10v_callback->printf_filtered) (d10v_callback, "sim_fetch_register %d 0x%x\n",rn,State.regs[rn]); */
508 sim_store_register (rn
, memory
)
510 unsigned char *memory
;
514 State
.a
[rn
-32] = READ_64 (memory
) & MASK40
;
515 /* (*d10v_callback->printf_filtered) (d10v_callback, "store: a%d=0x%llx\n",rn-32,State.a[rn-32]); */
519 State
.regs
[rn
]= READ_16 (memory
);
520 /* (*d10v_callback->printf_filtered) (d10v_callback, "store: r%d=0x%x\n",rn,State.regs[rn]); */
524 sim_read (addr
, buffer
, size
)
526 unsigned char *buffer
;
530 for (i
= 0; i
< size
; i
++)
532 buffer
[i
] = State
.imem
[addr
+ i
];
541 (*d10v_callback
->printf_filtered
) (d10v_callback
, "sim_do_command: %s\n",cmd
);
545 sim_load (prog
, from_tty
)
549 /* Return nonzero so GDB will handle it. */
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