3 #include "remote-sim.h"
7 #define IMEM_SIZE 18 /* D10V instruction memory size is 18 bits */
8 #define DMEM_SIZE 16 /* Data memory is 64K (but only 32K internal RAM) */
9 #define UMEM_SIZE 17 /* each unified memory region is 17 bits */
11 enum _leftright
{ LEFT_FIRST
, RIGHT_FIRST
};
14 host_callback
*d10v_callback
;
15 unsigned long ins_type_counters
[ (int)INS_MAX
];
19 static int init_text_p
= 0;
24 static long hash
PARAMS ((long insn
, int format
));
25 static struct hash_entry
*lookup_hash
PARAMS ((uint32 ins
, int size
));
26 static void get_operands
PARAMS ((struct simops
*s
, uint32 ins
));
27 static void do_long
PARAMS ((uint32 ins
));
28 static void do_2_short
PARAMS ((uint16 ins1
, uint16 ins2
, enum _leftright leftright
));
29 static void do_parallel
PARAMS ((uint16 ins1
, uint16 ins2
));
30 static char *add_commas
PARAMS ((char *buf
, int sizeof_buf
, unsigned long value
));
31 extern void sim_size
PARAMS ((int power
));
32 static void init_system
PARAMS ((void));
33 extern int sim_write
PARAMS ((SIM_ADDR addr
, unsigned char *buffer
, int size
));
34 extern void sim_open
PARAMS ((char *args
));
35 extern void sim_close
PARAMS ((int quitting
));
36 extern void sim_set_profile
PARAMS ((int n
));
37 extern void sim_set_profile_size
PARAMS ((int n
));
38 extern void sim_resume
PARAMS ((int step
, int siggnal
));
39 extern void sim_info
PARAMS ((int verbose
));
40 extern void sim_create_inferior
PARAMS ((SIM_ADDR start_address
, char **argv
, char **env
));
41 extern void sim_kill
PARAMS ((void));
42 extern void sim_set_callbacks
PARAMS ((host_callback
*p
));
43 extern void sim_stop_reason
PARAMS ((enum sim_stop
*reason
, int *sigrc
));
44 extern void sim_fetch_register
PARAMS ((int rn
, unsigned char *memory
));
45 extern void sim_store_register
PARAMS ((int rn
, unsigned char *memory
));
46 extern int sim_read
PARAMS ((SIM_ADDR addr
, unsigned char *buffer
, int size
));
47 extern void sim_do_command
PARAMS ((char *cmd
));
50 #if defined(__GNUC__) && defined(__OPTIMIZE__)
51 #define INLINE __inline__
60 struct hash_entry
*next
;
66 struct hash_entry hash_table
[MAX_HASH
+1];
73 if (format
& LONG_OPCODE
)
74 return ((insn
& 0x3F000000) >> 24);
76 return((insn
& 0x7E00) >> 9);
79 INLINE
static struct hash_entry
*
80 lookup_hash (ins
, size
)
87 h
= &hash_table
[(ins
& 0x3F000000) >> 24];
89 h
= &hash_table
[(ins
& 0x7E00) >> 9];
91 while ((ins
& h
->mask
) != h
->opcode
)
95 (*d10v_callback
->printf_filtered
) (d10v_callback
, "ERROR looking up hash for %x at PC %x\n",ins
, PC
);
104 get_operands (struct simops
*s
, uint32 ins
)
106 int i
, shift
, bits
, flags
;
108 for (i
=0; i
< s
->numops
; i
++)
110 shift
= s
->operands
[3*i
];
111 bits
= s
->operands
[3*i
+1];
112 flags
= s
->operands
[3*i
+2];
113 mask
= 0x7FFFFFFF >> (31 - bits
);
114 OP
[i
] = (ins
>> shift
) & mask
;
125 for (s
= exec_bfd
->sections
; s
; s
= s
->next
)
126 if (strcmp (bfd_get_section_name (exec_bfd
, s
), ".text") == 0)
129 text_start
= bfd_get_section_vma (exec_bfd
, s
);
130 text_end
= text_start
+ bfd_section_size (exec_bfd
, s
);
135 return (PC
<< 2) + text_start
;
142 struct hash_entry
*h
;
144 if ((d10v_debug
& DEBUG_INSTRUCTION
) != 0)
145 (*d10v_callback
->printf_filtered
) (d10v_callback
, "do_long 0x%x\n", ins
);
147 h
= lookup_hash (ins
, 1);
148 get_operands (h
->ops
, ins
);
149 State
.ins_type
= INS_LONG
;
150 ins_type_counters
[ (int)State
.ins_type
]++;
155 do_2_short (ins1
, ins2
, leftright
)
157 enum _leftright leftright
;
159 struct hash_entry
*h
;
161 enum _ins_type first
, second
;
164 if ((d10v_debug
& DEBUG_INSTRUCTION
) != 0)
165 (*d10v_callback
->printf_filtered
) (d10v_callback
, "do_2_short 0x%x (%s) -> 0x%x\n",
166 ins1
, (leftright
) ? "left" : "right", ins2
);
169 if (leftright
== LEFT_FIRST
)
173 ins_type_counters
[ (int)INS_LEFTRIGHT
]++;
179 ins_type_counters
[ (int)INS_RIGHTLEFT
]++;
182 h
= lookup_hash (ins1
, 0);
183 get_operands (h
->ops
, ins1
);
184 State
.ins_type
= first
;
185 ins_type_counters
[ (int)State
.ins_type
]++;
188 /* If the PC has changed (ie, a jump), don't do the second instruction */
189 if (orig_pc
== PC
&& !State
.exception
)
191 h
= lookup_hash (ins2
, 0);
192 get_operands (h
->ops
, ins2
);
193 State
.ins_type
= second
;
194 ins_type_counters
[ (int)State
.ins_type
]++;
195 ins_type_counters
[ (int)INS_CYCLES
]++;
198 else if (orig_pc
!= PC
&& !State
.exception
)
199 ins_type_counters
[ (int)INS_COND_JUMP
]++;
203 do_parallel (ins1
, ins2
)
206 struct hash_entry
*h1
, *h2
;
208 if ((d10v_debug
& DEBUG_INSTRUCTION
) != 0)
209 (*d10v_callback
->printf_filtered
) (d10v_callback
, "do_parallel 0x%x || 0x%x\n", ins1
, ins2
);
211 ins_type_counters
[ (int)INS_PARALLEL
]++;
212 h1
= lookup_hash (ins1
, 0);
213 h2
= lookup_hash (ins2
, 0);
215 if (h1
->ops
->exec_type
== PARONLY
)
217 get_operands (h1
->ops
, ins1
);
218 State
.ins_type
= INS_LEFT_COND_TEST
;
219 ins_type_counters
[ (int)State
.ins_type
]++;
223 ins_type_counters
[ (int)INS_COND_TRUE
]++;
224 get_operands (h2
->ops
, ins2
);
225 State
.ins_type
= INS_RIGHT_COND_EXE
;
226 ins_type_counters
[ (int)State
.ins_type
]++;
230 ins_type_counters
[ (int)INS_COND_FALSE
]++;
232 else if (h2
->ops
->exec_type
== PARONLY
)
234 get_operands (h2
->ops
, ins2
);
235 State
.ins_type
= INS_RIGHT_COND_TEST
;
236 ins_type_counters
[ (int)State
.ins_type
]++;
240 ins_type_counters
[ (int)INS_COND_TRUE
]++;
241 get_operands (h1
->ops
, ins1
);
242 State
.ins_type
= INS_LEFT_COND_EXE
;
243 ins_type_counters
[ (int)State
.ins_type
]++;
247 ins_type_counters
[ (int)INS_COND_FALSE
]++;
251 get_operands (h1
->ops
, ins1
);
252 State
.ins_type
= INS_LEFT_PARALLEL
;
253 ins_type_counters
[ (int)State
.ins_type
]++;
255 if (!State
.exception
)
257 get_operands (h2
->ops
, ins2
);
258 State
.ins_type
= INS_RIGHT_PARALLEL
;
259 ins_type_counters
[ (int)State
.ins_type
]++;
266 add_commas(buf
, sizeof_buf
, value
)
272 char *endbuf
= buf
+ sizeof_buf
- 1;
282 *--endbuf
= (value
% 10) + '0';
283 } while ((value
/= 10) != 0);
301 free (State
.umem
[i
]);
302 State
.umem
[i
] = NULL
;
309 State
.imem
= (uint8
*)calloc(1,1<<IMEM_SIZE
);
310 State
.dmem
= (uint8
*)calloc(1,1<<DMEM_SIZE
);
312 State
.umem
[i
] = NULL
;
313 State
.umem
[0] = (uint8
*)calloc(1,1<<UMEM_SIZE
);
314 State
.umem
[1] = (uint8
*)calloc(1,1<<UMEM_SIZE
);
315 State
.umem
[2] = (uint8
*)calloc(1,1<<UMEM_SIZE
);
316 State
.umem
[127] = (uint8
*)calloc(1,1<<UMEM_SIZE
);
317 if (!State
.imem
|| !State
.dmem
|| !State
.umem
[0] || !State
.umem
[1] || !State
.umem
[2] || !State
.umem
[127] )
319 (*d10v_callback
->printf_filtered
) (d10v_callback
, "Memory allocation failed.\n");
328 if ((d10v_debug
& DEBUG_MEMSIZE
) != 0)
331 (*d10v_callback
->printf_filtered
) (d10v_callback
,
332 "Allocated %s bytes instruction memory and\n",
333 add_commas (buffer
, sizeof (buffer
), (1UL<<IMEM_SIZE
)));
335 (*d10v_callback
->printf_filtered
) (d10v_callback
, " %s bytes data memory.\n",
336 add_commas (buffer
, sizeof (buffer
), (1UL<<IMEM_SIZE
)));
349 xfer_mem (addr
, buffer
, size
, write
)
351 unsigned char *buffer
;
359 if ((d10v_debug
& DEBUG_INSTRUCTION
) != 0)
362 (*d10v_callback
->printf_filtered
) (d10v_callback
, "sim_write %d bytes to 0x%x\n", size
, addr
);
364 (*d10v_callback
->printf_filtered
) (d10v_callback
, "sim_read %d bytes from 0x%x\n", size
, addr
);
368 /* to access data, we use the following mapping */
369 /* 0x01000000 - 0x0103ffff : instruction memory */
370 /* 0x02000000 - 0x0200ffff : data memory */
371 /* 0x03000000 - 0x03ffffff : unified memory */
373 if ( (addr
& 0x03000000) == 0x03000000)
378 segment
= addr
>> UMEM_SIZE
;
380 if (!State
.umem
[segment
])
381 State
.umem
[segment
] = (uint8
*)calloc(1,1<<UMEM_SIZE
);
382 if (!State
.umem
[segment
])
384 (*d10v_callback
->printf_filtered
) (d10v_callback
, "Memory allocation failed.\n");
388 (*d10v_callback
->printf_filtered
) (d10v_callback
,"Allocated %s bytes unified memory to region %d\n",
389 add_commas (buffer
, sizeof (buffer
), (1UL<<IMEM_SIZE
)), segment
);
391 /* FIXME: need to check size and read/write multiple segments if necessary */
393 memcpy (State
.umem
[segment
]+addr
, buffer
, size
);
395 memcpy (buffer
, State
.umem
[segment
]+addr
, size
);
397 else if ( (addr
& 0x03000000) == 0x02000000)
401 if (size
> (1<<(DMEM_SIZE
-1)))
403 (*d10v_callback
->printf_filtered
) (d10v_callback
, "ERROR: data section is only %d bytes.\n",1<<(DMEM_SIZE
-1));
407 memcpy (State
.dmem
+addr
, buffer
, size
);
409 memcpy (buffer
, State
.dmem
+addr
, size
);
411 else if ( (addr
& 0x03000000) == 0x01000000)
413 /* INSTRUCTION MEMORY */
415 if (size
> (1<<IMEM_SIZE
))
417 (*d10v_callback
->printf_filtered
) (d10v_callback
, "ERROR: inst section is only %d bytes.\n",1<<IMEM_SIZE
);
421 memcpy (State
.imem
+addr
, buffer
, size
);
423 memcpy (buffer
, State
.imem
+addr
, size
);
427 (*d10v_callback
->printf_filtered
) (d10v_callback
, "ERROR: address 0x%x is not in valid range\n",addr
);
428 (*d10v_callback
->printf_filtered
) (d10v_callback
, "Instruction addresses start at 0x01000000\n");
429 (*d10v_callback
->printf_filtered
) (d10v_callback
, "Data addresses start at 0x02000000\n");
430 (*d10v_callback
->printf_filtered
) (d10v_callback
, "Unified addresses start at 0x03000000\n");
441 sim_write (addr
, buffer
, size
)
443 unsigned char *buffer
;
446 return xfer_mem( addr
, buffer
, size
, 1);
450 sim_read (addr
, buffer
, size
)
452 unsigned char *buffer
;
455 return xfer_mem( addr
, buffer
, size
, 0);
464 struct hash_entry
*h
;
465 static int init_p
= 0;
470 if (strcmp (args
, "-t") == 0)
474 (*d10v_callback
->printf_filtered
) (d10v_callback
, "ERROR: unsupported option(s): %s\n",args
);
477 /* put all the opcodes in the hash table */
480 for (s
= Simops
; s
->func
; s
++)
482 h
= &hash_table
[hash(s
->opcode
,s
->format
)];
484 /* go to the last entry in the chain */
490 h
->next
= calloc(1,sizeof(struct hash_entry
));
495 h
->opcode
= s
->opcode
;
512 (*d10v_callback
->printf_filtered
) (d10v_callback
, "sim_set_profile %d\n",n
);
516 sim_set_profile_size (n
)
519 (*d10v_callback
->printf_filtered
) (d10v_callback
, "sim_set_profile_size %d\n",n
);
533 if ( (addr
& 0xfff0) != 0xff00)
534 (*d10v_callback
->printf_filtered
) (d10v_callback
, "Data address 0x%lx is in I/O space, pc = 0x%lx.\n",
535 (long)addr
, (long)decode_pc ());
536 return State
.dmem
+ addr
;
543 /* instruction memory */
544 return (DMAP
& 0xf) * 0x4000 + State
.imem
;
547 /* this is ugly because we allocate unified memory in 128K segments and */
548 /* dmap addresses 16k segments */
549 seg
= (DMAP
& 0x3ff) >> 2;
550 if (State
.umem
[seg
] == NULL
)
552 (*d10v_callback
->printf_filtered
) (d10v_callback
, "ERROR: unified memory region %d unmapped, pc = 0x%lx\n",
553 seg
, (long)decode_pc ());
556 return State
.umem
[seg
] + (DMAP
& 3) * 0x4000;
559 return State
.dmem
+ addr
;
566 uint32 pc
= ((uint32
)PC
) << 2;
575 return State
.imem
+ pc
;
577 if (State
.umem
[imap
& 0xff] == NULL
)
579 (*d10v_callback
->printf_filtered
) (d10v_callback
, "ERROR: unified memory region %d unmapped, pc = 0x%lx\n",
580 imap
& 0xff, (long)PC
);
581 State
.exception
= SIGILL
;
585 return State
.umem
[imap
& 0xff] + pc
;
590 sim_resume (step
, siggnal
)
596 /* (*d10v_callback->printf_filtered) (d10v_callback, "sim_resume (%d,%d) PC=0x%x\n",step,siggnal,PC); */
601 inst
= get_longword( pc_addr() );
603 ins_type_counters
[ (int)INS_CYCLES
]++;
604 switch (inst
& 0xC0000000)
607 /* long instruction */
608 do_long (inst
& 0x3FFFFFFF);
612 do_2_short ( inst
& 0x7FFF, (inst
& 0x3FFF8000) >> 15, 0);
616 do_2_short ((inst
& 0x3FFF8000) >> 15, inst
& 0x7FFF, 1);
619 do_parallel ((inst
& 0x3FFF8000) >> 15, inst
& 0x7FFF);
623 if (State
.RP
&& PC
== RPT_E
)
637 while ( !State
.exception
&& !step
);
639 if (step
&& !State
.exception
)
640 State
.exception
= SIGTRAP
;
662 unsigned long left
= ins_type_counters
[ (int)INS_LEFT
] + ins_type_counters
[ (int)INS_LEFT_COND_EXE
];
663 unsigned long left_nops
= ins_type_counters
[ (int)INS_LEFT_NOPS
];
664 unsigned long left_parallel
= ins_type_counters
[ (int)INS_LEFT_PARALLEL
];
665 unsigned long left_cond
= ins_type_counters
[ (int)INS_LEFT_COND_TEST
];
666 unsigned long left_total
= left
+ left_parallel
+ left_cond
+ left_nops
;
668 unsigned long right
= ins_type_counters
[ (int)INS_RIGHT
] + ins_type_counters
[ (int)INS_RIGHT_COND_EXE
];
669 unsigned long right_nops
= ins_type_counters
[ (int)INS_RIGHT_NOPS
];
670 unsigned long right_parallel
= ins_type_counters
[ (int)INS_RIGHT_PARALLEL
];
671 unsigned long right_cond
= ins_type_counters
[ (int)INS_RIGHT_COND_TEST
];
672 unsigned long right_total
= right
+ right_parallel
+ right_cond
+ right_nops
;
674 unsigned long unknown
= ins_type_counters
[ (int)INS_UNKNOWN
];
675 unsigned long ins_long
= ins_type_counters
[ (int)INS_LONG
];
676 unsigned long parallel
= ins_type_counters
[ (int)INS_PARALLEL
];
677 unsigned long leftright
= ins_type_counters
[ (int)INS_LEFTRIGHT
];
678 unsigned long rightleft
= ins_type_counters
[ (int)INS_RIGHTLEFT
];
679 unsigned long cond_true
= ins_type_counters
[ (int)INS_COND_TRUE
];
680 unsigned long cond_false
= ins_type_counters
[ (int)INS_COND_FALSE
];
681 unsigned long cond_jump
= ins_type_counters
[ (int)INS_COND_JUMP
];
682 unsigned long cycles
= ins_type_counters
[ (int)INS_CYCLES
];
683 unsigned long total
= (unknown
+ left_total
+ right_total
+ ins_long
);
685 int size
= strlen (add_commas (buf1
, sizeof (buf1
), total
));
686 int parallel_size
= strlen (add_commas (buf1
, sizeof (buf1
),
687 (left_parallel
> right_parallel
) ? left_parallel
: right_parallel
));
688 int cond_size
= strlen (add_commas (buf1
, sizeof (buf1
), (left_cond
> right_cond
) ? left_cond
: right_cond
));
689 int nop_size
= strlen (add_commas (buf1
, sizeof (buf1
), (left_nops
> right_nops
) ? left_nops
: right_nops
));
690 int normal_size
= strlen (add_commas (buf1
, sizeof (buf1
), (left
> right
) ? left
: right
));
692 (*d10v_callback
->printf_filtered
) (d10v_callback
,
693 "executed %*s left instruction(s), %*s normal, %*s parallel, %*s EXExxx, %*s nops\n",
694 size
, add_commas (buf1
, sizeof (buf1
), left_total
),
695 normal_size
, add_commas (buf2
, sizeof (buf2
), left
),
696 parallel_size
, add_commas (buf3
, sizeof (buf3
), left_parallel
),
697 cond_size
, add_commas (buf4
, sizeof (buf4
), left_cond
),
698 nop_size
, add_commas (buf5
, sizeof (buf5
), left_nops
));
700 (*d10v_callback
->printf_filtered
) (d10v_callback
,
701 "executed %*s right instruction(s), %*s normal, %*s parallel, %*s EXExxx, %*s nops\n",
702 size
, add_commas (buf1
, sizeof (buf1
), right_total
),
703 normal_size
, add_commas (buf2
, sizeof (buf2
), right
),
704 parallel_size
, add_commas (buf3
, sizeof (buf3
), right_parallel
),
705 cond_size
, add_commas (buf4
, sizeof (buf4
), right_cond
),
706 nop_size
, add_commas (buf5
, sizeof (buf5
), right_nops
));
709 (*d10v_callback
->printf_filtered
) (d10v_callback
,
710 "executed %*s long instruction(s)\n",
711 size
, add_commas (buf1
, sizeof (buf1
), ins_long
));
714 (*d10v_callback
->printf_filtered
) (d10v_callback
,
715 "executed %*s parallel instruction(s)\n",
716 size
, add_commas (buf1
, sizeof (buf1
), parallel
));
719 (*d10v_callback
->printf_filtered
) (d10v_callback
,
720 "executed %*s instruction(s) encoded L->R\n",
721 size
, add_commas (buf1
, sizeof (buf1
), leftright
));
724 (*d10v_callback
->printf_filtered
) (d10v_callback
,
725 "executed %*s instruction(s) encoded R->L\n",
726 size
, add_commas (buf1
, sizeof (buf1
), rightleft
));
729 (*d10v_callback
->printf_filtered
) (d10v_callback
,
730 "executed %*s unknown instruction(s)\n",
731 size
, add_commas (buf1
, sizeof (buf1
), unknown
));
734 (*d10v_callback
->printf_filtered
) (d10v_callback
,
735 "executed %*s instruction(s) due to EXExxx condition being true\n",
736 size
, add_commas (buf1
, sizeof (buf1
), cond_true
));
739 (*d10v_callback
->printf_filtered
) (d10v_callback
,
740 "skipped %*s instruction(s) due to EXExxx condition being false\n",
741 size
, add_commas (buf1
, sizeof (buf1
), cond_false
));
744 (*d10v_callback
->printf_filtered
) (d10v_callback
,
745 "skipped %*s instruction(s) due to conditional branch succeeding\n",
746 size
, add_commas (buf1
, sizeof (buf1
), cond_jump
));
748 (*d10v_callback
->printf_filtered
) (d10v_callback
,
749 "executed %*s cycle(s)\n",
750 size
, add_commas (buf1
, sizeof (buf1
), cycles
));
752 (*d10v_callback
->printf_filtered
) (d10v_callback
,
753 "executed %*s total instructions\n",
754 size
, add_commas (buf1
, sizeof (buf1
), total
));
758 sim_create_inferior (start_address
, argv
, env
)
759 SIM_ADDR start_address
;
765 (*d10v_callback
->printf_filtered
) (d10v_callback
, "sim_create_inferior: PC=0x%x\n", start_address
);
768 /* reset all state information */
769 memset (&State
.regs
, 0, (int)&State
.imem
- (int)&State
.regs
[0]);
772 PC
= start_address
>> 2;
774 /* cpu resets imap0 to 0 and imap1 to 0x7f, but D10V-EVA board */
775 /* resets imap0 and imap1 to 0x1000. */
793 /* printf ("sim_set_callbacks\n"); */
798 sim_stop_reason (reason
, sigrc
)
799 enum sim_stop
*reason
;
802 /* (*d10v_callback->printf_filtered) (d10v_callback, "sim_stop_reason: PC=0x%x\n",PC<<2); */
804 switch (State
.exception
)
806 case SIG_D10V_STOP
: /* stop instruction */
807 *reason
= sim_exited
;
811 case SIG_D10V_EXIT
: /* exit trap */
812 *reason
= sim_exited
;
813 *sigrc
= State
.regs
[2];
816 default: /* some signal */
817 *reason
= sim_stopped
;
818 *sigrc
= State
.exception
;
824 sim_fetch_register (rn
, memory
)
826 unsigned char *memory
;
832 WRITE_64 (memory
, State
.a
[rn
-35]);
834 WRITE_16 (memory
, IMAP0
);
836 WRITE_16 (memory
, IMAP1
);
838 WRITE_16 (memory
, DMAP
);
840 WRITE_16 (memory
, State
.regs
[rn
]);
844 sim_store_register (rn
, memory
)
846 unsigned char *memory
;
852 State
.a
[rn
-35] = READ_64 (memory
) & MASK40
;
854 SET_DMAP( READ_16(memory
) );
856 SET_IMAP1( READ_16(memory
) );
858 SET_IMAP0( READ_16(memory
) );
860 State
.regs
[rn
]= READ_16 (memory
);
868 (*d10v_callback
->printf_filtered
) (d10v_callback
, "sim_do_command: %s\n",cmd
);
872 sim_load (prog
, from_tty
)
876 /* Return nonzero so GDB will handle it. */
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