1 1999-03-16 Martin Hunt <hunt@cygnus.com>
2 From Frank Ch. Eigler <fche@cygnus.com>
4 * cpu.h (mvtsys_left_p): New flag for MVTSYS instruction history.
5 * d30v-insns (mvtsys): Set this flag instead of left_kills_right_p.
6 (do_sath): Detect MVTSYS by new flag.
7 * engine.c (unqueue_writes): Detect MVTSYS by new flag.
8 (do_2_short, do_parallel): Initialize new flag.
10 1999-02-26 Frank Ch. Eigler <fche@cygnus.com>
12 * tconfig.in (SIM_HANDLES_LMA): Make it so.
14 1999-01-12 Frank Ch. Eigler <fche@cygnus.com>
16 * engine.c (unqueue_writes): Make PSW conflict resolution code
17 conditional - disable it for MVTSYS || insn case.
19 1999-01-11 Frank Ch. Eigler <fche@cygnus.com>
21 * d30v-insns (do_sath): Drain PSW write queue before PSW_S_FLAG
23 * engine.c (unqueue_writes): Make non-static. Remove PSW_V/VA
25 (do_parallel): Don't drain PSW write queue for MVTSYS || insn.
27 1999-01-07 Frank Ch. Eigler <fche@cygnus.com>
29 * d30v-insns (do_ld2h): Sign-extend loaded half-words.
31 1999-01-05 Frank Ch. Eigler <fche@cygnus.com>
33 * d30v-insns (do_ld2h): Read memory in word units.
34 (do_ld4bh): Ditto. Correct sign extension.
36 (do_st2h): Write memory in word units.
38 (st4hb): Correct mnemonic in igen template.
40 1998-12-08 Frank Ch. Eigler <fche@cygnus.com>
42 * d30v-insns: (do_ld2h): Don't update R0 nor R1 for double-word insn.
48 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
50 * d30v-insns (do_repeat): Don't set RP for repeat count 1.
52 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
54 * d30v-insns (do_src): Treat shift count -32 naturally instead of
55 producing zero result.
57 1998-11-22 Frank Ch. Eigler <fche@cygnus.com>
59 * d30v-insns (do_src): Limit SRC shift count to -32 .. 31.
61 1998-11-16 Frank Ch. Eigler <fche@cygnus.com>
63 * d30v-insns (dbt): Defer PSW/DPSW update with new DID_TRAP code 2.
64 * engine.c (unqueue_writes): Perform DBT processing on PSW/DPSW here.
66 1998-11-12 Frank Ch. Eigler <fche@cygnus.com>
68 * cpu.h (_sim_cpu): Removed is_delayed_call field, and associated
70 * sim-calls.c (sim_create_inferior): Don't initialize is_delayed_call.
71 * d30v-insns (do_dbra): Don't clear RPT_IS_CALL. (do_dbrai): Ditto.
72 (do_djmp): Ditto. (do_djmpi): Ditto. (do_repeat): Ditto.
73 * d30v-insns (do_dbsr): Don't set RPT_IS_CALL, but set R62 instead.
74 (do_dbsri): Ditto. (do_djsr): Dito. (do_djsri): Ditto.
75 * engine.c (sim_engine_run): Remove conditional setting of R62 based
78 1998-11-08 Frank Ch. Eigler <fche@cygnus.com>
80 * sim-calls.c (sim_open): Add dummy memory range over control
81 register region (0x40000000..0x4000FFFF).
83 1998-11-06 Frank Ch. Eigler <fche@cygnus.com>
85 * d30v-insns (do_mvfacc): Use loop to limit shift count to 63 .. 0.
87 Tue Oct 13 11:01:16 1998 Frank Ch. Eigler <fche@cygnus.com>
89 * d30v-insns (do_sra,do_srah,do_srl,do_srlh): Make shift
90 count -32 to produce zero result.
91 (do_src): Ditto for shift count == -64.
93 Mon Oct 12 23:04:11 1998 Frank Ch. Eigler <fche@cygnus.com>
95 * d30v-insns (ROT): Use 0x1f bit mask for rotate count masking.
96 (do_sra,do_srl): Use loop to limit shift count to -32 .. 31.
97 (do_srah,do_srlh): Use loop to limit shift count to -32 .. 31.
98 (sra2h,srl2h): Use loop to limit shift count to -16 .. 15.
99 (do_src): Use loop to limit shift count to -64 .. 63.
101 Fri Oct 9 16:46:52 1998 Doug Evans <devans@canuck.cygnus.com>
103 * sim-calls.c (get_insn_name): New fn.
104 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
105 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
107 Mon Sep 28 10:43:28 1998 Frank Ch. Eigler <fche@cygnus.com>
109 * d30v-insns (do_sra,do_srah,do_srl,do_srlh,ROT,do_src): Use
110 correct MSB bit numbers for sign extension masks.
112 Fri Sep 25 17:32:27 1998 Frank Ch. Eigler <fche@cygnus.com>
114 * engine.c (do_parallel): Unqueue writes if MU instruction was
115 a MVTSYS, as identified by its left_kills_right_p side-effect.
117 Fri Sep 25 12:31:34 1998 Frank Ch. Eigler <fche@cygnus.com>
119 * d30v-insns (do_sra,do_srah,do_srl,do_srlh,ROT,do_src): Mask
120 shift/rotate counts to number of bits in width of operand; no
121 longer saturate at maxima.
123 Tue Jul 14 18:39:23 1998 Frank Ch. Eigler <fche@cygnus.com>
125 * cpu.h (left_kills_right_p): New flag for non-branch instructions
126 that, when executed in left slot of a -> sequential pair, kill the
128 * d30v-insns (mvtsys): Set flag for PSW/PSWh/PSWl/FLAG operands.
129 * engine.c (do_2_short): Respect flag.
131 Thu Jun 4 16:48:58 1998 David Taylor <taylor@texas.cygnus.com>
133 * d30v-insns (do_trap): don't save the bPSW and PSW based on
134 current values because an instruction done in parallel with
135 the trap might change them, instead set a flag do that
136 unqueue_writes will take care of it.
137 * engine.c (unqueue_writes): finish trap handling
138 * cpu.h (_sim_cpu): add new field did_trap and a macro DID_TRAP
139 to make use of it; set by do_trap, tested and cleared by
142 Tue May 19 16:07:04 1998 Frank Ch. Eigler <fche@cygnus.com>
144 * engine.c (unqueue_writes): Suppress the all enqueued writes to
145 the same flags in PSW except the last.
147 Fri May 15 11:38:59 1998 Frank Ch. Eigler <fche@cygnus.com>
149 * d30v-insns (RETI): Correct instruction spelling to "reit".
151 Thu May 14 09:34:20 1998 Frank Ch. Eigler <fche@cygnus.com>
153 * d30v-insns (dbt): Handle DBT at end of repeat block.
154 (do_trap, dbt): Clear PSW_RP if at end of repeat block.
156 Thu May 14 07:41:41 1998 Frank Ch. Eigler <fche@cygnus.com>
158 * engine.c (sim_engine_run): Trigger DDBT based on previous PC,
161 Wed May 13 11:03:40 1998 Frank Ch. Eigler <fche@cygnus.com>
163 * engine.c (sim_engine_run): Move DDBT handling after instruction
164 decode/execute stage.
166 Tue May 12 12:14:53 1998 Frank Ch. Eigler <fche@cygnus.com>
168 * d30v-insns (do_sat*): Correct "saturate to 0 bits" patch to
169 properly handle negative saturation inputs.
171 Tue May 12 11:11:26 1998 Frank Ch. Eigler <fche@cygnus.com>
173 * engine.c (sim_engine_run): Decrement RPT_C only under more
174 restricted conditions.
176 Mon May 11 17:33:46 1998 Frank Ch. Eigler <fche@cygnus.com>
178 * d30v-insns (do_sat*): Make "saturate to 0 bits" pass through data
181 Mon May 11 16:27:04 1998 Frank Ch. Eigler <fche@cygnus.com>
183 * engine.c (sim_engine_run): Implement DDBT (debugger debug trap)
186 Fri May 8 16:44:19 1998 Frank Ch. Eigler <fche@cygnus.com>
188 * d30v-insns (do_trap): Set bPC to RPT_S if trap is last
189 instruction in repeat block.
190 (bsr*/jsr*): Set R62 (LINK) to RPT_S if subroutine branch
191 is last instruction in repeat block.
193 Fri May 8 11:06:50 1998 Frank Ch. Eigler <fche@cygnus.com>
195 * d30v-insns (do_sath): Query/update F4/PSW_S using proper flag
197 * cpu.h (PSW_S_FLAG): New flag number for PSW_S status bit.
199 Wed May 6 19:40:56 1998 Doug Evans <devans@canuck.cygnus.com>
201 * sim-main.h (INSN_NAME): New arg `cpu'.
203 Fri May 1 14:24:30 1998 Andrew Cagney <cagney@b1.cygnus.com>
205 * d30v-insns: Fix parameter list to sim_engine_abort.
207 Thu Apr 30 14:28:00 1998 Fred Fish <fnf@cygnus.com>
209 * d30v-insns (do_sath): Add additional argument that determines
210 whether or not the F4 (PSW_S) bit in the PSW is updated.
211 (SAT2H): Do not update PSW_S bit.
212 (SATHp): Do update PSW_S bit.
214 Tue Apr 28 23:36:00 1998 Fred Fish <fnf@cygnus.com>
216 * d30v-insns (SRAHp, SRLHp): Immediate values are signed 6 bit
217 values, not 5 bit values.
219 Wed Apr 29 12:57:55 1998 Frank Ch. Eigler <fche@cygnus.com>
221 * d30v-insns (do_incr): Check modular arithmetic limits after
222 postincrement/postdecrement, rather than before, to match
223 erroneous hardware behavior.
225 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
227 * configure: Regenerated to track ../common/aclocal.m4 changes.
229 Mon Apr 27 19:42:00 1998 Fred Fish <fnf@cygnus.com>
231 * d30v-insns (do_trap): Clear all bits in PSW except SM and DB.
233 Mon Apr 27 14:55:00 1998 Fred Fish <fnf@cygnus.com>
235 * d30v-insns (do_mulx2h): Low order results go in ra+1, high
238 Mon Apr 27 14:42:00 1998 Fred Fish <fnf@cygnus.com>
240 * d30v-insns (do_mulx2h): Rewrite to do proper 32 bit signed
241 multiply of high and low fields from operands.
243 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
245 * configure: Regenerated to track ../common/aclocal.m4 changes.
248 Sun Apr 26 15:20:20 1998 Tom Tromey <tromey@cygnus.com>
250 * acconfig.h: New file.
251 * configure.in: Reverted change of Apr 24; use sinclude again.
253 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
255 * configure: Regenerated to track ../common/aclocal.m4 changes.
258 Fri Apr 24 11:20:00 1998 Tom Tromey <tromey@cygnus.com>
260 * configure.in: Don't call sinclude.
262 Wed Apr 22 21:23:00 1998 Fred Fish <fnf@cygnus.com>
264 * ic-d30v (RbU, RcU): Unsigned versions of Rb and Rc.
265 * d30v-insns (MVTACC): Use new RbU and RcU macros.
267 Wed Apr 22 20:52:00 1998 Fred Fish <fnf@cygnus.com>
269 * ic-d30v (RbHU,RbLU): Unsigned versions of RbH and RbL.
270 * d30v-insns (SRL2H): Use new RbHU and RbLU macros instead of
273 Mon Apr 13 16:59:00 1998 Fred Fish <fnf@cygnus.com>
275 * d30v-insns (do_srl): Avoid undefined behavior of host compiler
276 when shifting left by more than 31 bits.
278 Tue Apr 7 18:09:00 1998 Fred Fish <fnf@cygnus.com>
280 * engine.c (sim_engine_run): Remove at_loop_end variable. Add
281 rp_was_set and rpt_c_was_nonzero variables. Major restructuring of
282 code before and after instruction execution to properly handle state
283 of the RP bit in the PSW, the value in RPT_C, and other loop related
286 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
288 * configure: Regenerated to track ../common/aclocal.m4 changes.
290 Fri Apr 3 15:26:00 1998 Fred Fish <fnf@cygnus.com>
292 * d30v-insns (do_trap): Use offset from EIT_VB rather than hardcoded
293 BASE_ADDRESS constant.
294 * cpu.h (BASE_ADDRESS): Remove constant not used any longer.
296 Fri Apr 3 14:42:00 1998 Fred Fish <fnf@cygnus.com>
298 * cpu.h (EIT_VB): Define macro to access EIT_VB register.
299 (EIT_VB_DEFAULT): Define value of EIT_VB register after reset.
300 * sim-calls.c (sim_create_inferior): Set EIT_VB to EIT_VB_DEFAULT.
302 Tue Mar 31 19:00:00 1998 Fred Fish <fnf@cygnus.com>
304 * d30v-insns (do_dbrai): RPT_S is cia plus pcdisp rather than
307 Mon Mar 30 20:30:00 1998 Fred Fish <fnf@cygnus.com>
309 * engine.c (sim_engine_run): Add at_loop_end. Rework end of loop
310 code to use this to both reset PSW_RP when needed and to set PC
311 to RPT_S for another pass through the loop.
313 Mon Mar 30 16:12:00 1998 Fred Fish <fnf@cygnus.com>
315 * engine.c (sim_engine_run): Change code that handles RPT_* regs
316 and PSW_RP bit in PSW so that PSW_RP is always set while executing
317 the loop and loop terminates upon completion of the pass for which
318 RPT_C is zero. More closely follow logic in architecture manual.
320 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
322 * configure: Regenerated to track ../common/aclocal.m4 changes.
324 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
326 * configure: Regenerated to track ../common/aclocal.m4 changes.
328 Thu Mar 19 00:25:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
330 * sim-calls.c (sim_open): Move memory-region commands back to
331 before the call to sim_parse_args.
332 (d30v_option_handler): Implement extmem-size option using
333 memory-delete and memory-region commands.
335 * sim-calls.c (d30v_option_handler): Use ANSI-C argument list,
336 correct number and type of arguments.
338 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
340 * configure: Regenerated to track ../common/aclocal.m4 changes.
342 Wed Mar 11 13:56:32 1998 Andrew Cagney <cagney@b1.cygnus.com>
344 * alu.h (IMEM, MEM, STORE): Replace sim_core_*_map with exec_map,
345 read_map and write_map resp.
347 * cpu.c (d30v_read_mem, d30v_write_mem): Ditto.
349 Mon Mar 2 13:34:08 1998 Fred Fish <fnf@cygnus.com>
351 * d30v-insns (do_repeat): Abort repeat instructions that have
352 a repeat count of zero.
354 Fri Feb 27 18:44:12 1998 Doug Evans <devans@canuck.cygnus.com>
356 * sim-calls.c (sim_open): Update call to sim_add_option_table.
358 Thu Feb 26 18:34:31 1998 Andrew Cagney <cagney@b1.cygnus.com>
360 * sim-calls.c (sim_info): Delete.
362 Wed Feb 25 14:44:58 1998 Michael Meissner <meissner@cygnus.com>
364 * d30v-insns (mvtsys): If moving to EIT_VB register, and with
365 valid bits. Optimize code somewhat.
367 * cpu.h (eit_vector_base_cr): New CR we need to special case.
368 (EIT_VALID): Valid bits for EIT_VB register.
370 * d30v-insns (mv{f,t}sys): When moving to/from PSWH, the value is
371 in the low 16 bits of the register.
373 * d30v-insns (do_sra): Use a common WRITE32_QUEUE to write back
375 (do_sr{a,l}h): Do shift in 32 bits, only truncate when writing
376 result back to the registers.
378 Tue Feb 24 18:09:52 1998 Fred Fish <fnf@cygnus.com>
380 * Makefile.in (tmp-igen): Use -G gen-zero-r0 option to force
381 r0 to always be zero.
382 * cpu.h (GPR_SET): Define.
384 Tue Feb 24 14:12:57 1998 Michael Meissner <meissner@cygnus.com>
386 * d30v-insns (do_sath): Do saturation in 32 bits, before
388 (sat{,2h,z,hp}): Use imm_5, not imm to get proper zero extend.
389 (do_sath_p): Delete, no longer used.
390 (sathp): Call do_sath, not do_sath_p.
392 Mon Feb 23 15:55:14 1998 Michael Meissner <meissner@cygnus.com>
394 * d30v-insns (illegal,wrong_slot): Print \n after PC and before we
395 call sim_engine_halt.
396 (sr{a,l}hp): Implement missing instructions.
397 (do_trap): Print high order PSW bits in human readable fashion.
398 (do_{dbra{,i},dbsr{,i},djmp{,i},djsr{,i},repeat}): Set PSW bit RP.
400 * alu.h (PSW_SET_QUEUE): New macro to set PSW bits.
402 * engine.c (sim_engine_run): Check for RP bit being set, not RPT_C
403 being > 0. If RPT_C is decremented to 0, clear PSW RP bit.
405 Fri Feb 20 10:13:34 1998 Fred Fish <fnf@cygnus.com>
407 * cpu.h (BASE_ADDRESS): Change from 0xfffff000 to 0xfffff020.
409 Tue Feb 17 12:39:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
411 * sim-calls.c (sim_store_register, sim_fetch_register): Pass in
412 length parameter. Return -1.
414 Fri Feb 6 17:39:54 1998 Michael Meissner <meissner@cygnus.com>
416 * d30v-insns (do_dbrai): Correct typo, use shift, not comparison.
418 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
420 * configure: Regenerated to track ../common/aclocal.m4 changes.
422 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
424 * configure: Regenerated to track ../common/aclocal.m4 changes.
426 Fri Jan 30 08:29:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
428 * engine.c (sim_engine_run): Add parameter nr_cpus.
430 Fri Jan 30 17:09:37 1998 Michael Meissner <meissner@cygnus.com>
432 * d30v-insns (jsrtzr): Check for register == 0, not != 0.
434 Wed Jan 21 17:52:04 1998 Andrew Cagney <cagney@b1.cygnus.com>
436 * engine.c (do_stack_swap): Make type of new_sp unsigned.
438 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
440 * configure: Regenerated to track ../common/aclocal.m4 changes.
442 Mon Jan 5 16:04:17 1998 Andrew Cagney <cagney@sanguine.cygnus.com>
444 * sim-calls.c (sim_info): Call profile_print.
446 * sim-main.h: Enable instruction profiling.
448 Thu Dec 18 12:21:38 1997 Michael Meissner <meissner@cygnus.com>
450 * alu.h (ALU{16,32}_END): Change setting PSW to only set the carry
451 and overflow bits. Don't look at the current value of PSW.
452 (PSW_FLAG_SET_QUEUE): Only queue up setting the particular bit in
453 question. Don't look at the current value of PSW.
455 * d30v-insns: All instructions that set the PSW, will only queue
456 up the particular bits in question that were set by the
457 instruction. Don't look at the current value of PSW.
459 Wed Dec 17 11:41:44 1997 Michael Meissner <meissner@cygnus.com>
461 * cpu.h (PSW_VALID): Allow EA/DB to be set in the PSW.
462 (DPSW_VALID): Like PSW_VALID, but it allows the DS bit to be set.
464 * engine.c (trace_alu32): When changing BPSW/DPSW, print the
467 * d30v-insns (do_cmp_cc): Fix cmpps and cmpng.
468 (do_cmp{,u}_cc): Print which cc value was used if not in switch
470 (do_cmpu_cc): Remove illegal cases CMPU{EQ,NE,PS,NG}.
471 (mvtsys): When setting BPSW or DPSW, and with DPSW_VALID.
473 Tue Dec 16 18:17:26 1997 Michael Meissner <meissner@cygnus.com>
475 * d30v-insns (mulx2h): Add missing instruction. Complain if
476 register is not even.
477 (do_{add,sub}h_ppp): Get correct high/low values. Also correctly
478 handle short immediates.
479 (do_ld{2w,4bh}): Don't load r0 if ra == 0.
481 * engine.c (d30v_interrupt_event): Remove unused variable
482 (unqueue_writes): Ditto.
484 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
486 * configure: Regenerated to track ../common/aclocal.m4 changes.
489 Sat Dec 13 23:40:17 1997 Michael Meissner <meissner@cygnus.com>
491 * cpu.h (_write{32,64}): New structures for keeping track of
492 queued writes to registers.
493 (_sim_cpu): Add _write{32,64} structures. Make is_delayed_call
495 (WRITE{32,64}*): New macros for queueing up writes to registers.
497 * alu.h (ALU16_END): Take field that says whether we are setting
498 the high or low half word. Queue up changes to registers.
499 (ALU32_END): Queue up changes to registers.
500 (PSW_FLAG_SET_QUEUE): Like PSW_FLAG_SET, except queues it up.
502 * sim-main.h (do_stack_swap): Remove declaration.
504 * engine.c (do_stack_swap): Make static.
505 (unqueue_writes): New function to unqueue all changes to 32 and 64
506 bit registers in order. Implement --trace-alu. Reset high water
507 marks for # of queued registers. If PSW changed, possibly update
509 (do_{long,2_short,parallel}): Unqueue register writes at the
512 * d30v-insns: Modify all insns to queue changes to registers,
513 rather than do them immediately so that parallel instructions get
514 the right values for inputs. Rewrite 16 bit operations to be done
515 in terms of masked 32 bit registers. Don't call do_stack_swap any
518 Thu Dec 11 10:06:02 1997 Michael Meissner <meissner@cygnus.com>
520 * sim-calls.c (d30v_option_handler): Add support for --extmem-size
521 to size external memory.
522 (sim_open): Ditto. Default if no --extmem-size option is 8 meg.
524 Wed Dec 10 01:08:24 1997 Jim Blandy <jimb@zwingli.cygnus.com>
526 * d30v-insns (do_rot2h): Clip rotate amounts to four bits. The
527 upper bits, and the sign of the rotation amount, are red herrings.
528 (do_sra, do_srl): Handle shifts greater than 32 bits.
529 (do_srah, do_sral): Properly sign-extend value and shift amount.
530 Handle shifts larger than 16 bits.
532 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
534 * configure: Regenerated to track ../common/aclocal.m4 changes.
536 Mon Dec 1 15:10:44 1997 Michael Meissner <meissner@cygnus.com>
538 * d30v-insns (do_sub2h): For short instruction, correctly
539 dupplicate lower 16 bits of immediate in upper 16 bits.
540 (sat2z): Fix typo that ignored the upper half of the register.
541 (do_satz): If < 0, set *ra to 0, if not call do_sat.
542 (mvtsys): Before setting PSW, and with PSW_VALID.
544 * cpu.h (PSW_VALID): Mask for bits in PSW that is valid.
546 Mon Dec 1 15:05:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
548 * d30v-insns (do_trap): Pacify GCC - correct type of %ld arg in
549 printf, return dummy at end.
551 Mon Dec 1 15:05:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
553 * d30v-insns (do_add, do_addh_ppp, do_adds): Replace ALU_ADD with
555 (do_addc): Replace ALU_SET_CARRY / ALU_ADD_CA with ALU_ADDC_C.
556 (do_sub, do_subh_ppp): Replace ALU_SUB with ALU_SUBB.
557 (do_subb): Replace ALU_SET_CARRY / ALU_SUB_CA with ALU_SUBB_B.
559 * alu.h (ALU16_END): Use ALU16_HAD_CARRY_BORROW instead of
563 * sim-main.h (string.h, strings.h): Include.
565 * sim-calls.c: Delete inclusion of string.h and strings.h.
567 Sun Nov 30 17:29:25 1997 Michael Meissner <meissner@cygnus.com>
569 * configure.in (--enable-sim-trapdump): New switch to control
570 whether traps 0..30 dump out the registers or do the real trap.
571 * configure: Regenerate.
573 * Makefile.in (SIM_EXTRA_CLFAGS): Add -DTRAPDUMP={0,1} if
574 appropriate --{en,dis}able-sim-trapdump is done.
576 * sim-calls.c (OPTION_TRACE_CALL): Rename from OPTION_CALL_TRACE.
577 (OPTION_TRACE_TRAPDUMP): New option for --trace-trapdump.
578 (d30v_option_handler): Add support for --trace-trapdump.
579 (d30v_options): Ditto.
582 * d30v-insns (do_trap): Do register dump if --trace-trapdump and
583 not the system call trap. Remove support for calling old function
586 Sat Nov 29 18:54:55 1997 Michael Meissner <meissner@cygnus.com>
588 * cpu.h (_sim_cpu): Add trace_call_p, trace_action fields.
589 (TRACE_CALL_P): Non-zero if --trace-call.
590 (TRACE_ACTION): Non-zero if there is a tracing action at the end
591 of processing an instruction boundary.
592 (TRACE_ACTION_{CALL,RETURN}): Bits to say trace call & return.
593 (d30v_next_insn): Delete, now trace_action field in cpu state.
595 * cpu.c (d30v_next_insn): Delete, now trace_action field in cpu
597 (return_occurred): Minimum saved register to check is now 34.
599 * engine.c (sim_engine_run): Change call tracing to use
600 trace_action field in cpu state.
602 * sim-calls.c (d30v_option_handler): Handle d30v specific options.
603 (d30v_options): D30V specific options. Right now, --trace-call.
604 (sim_open): Register d30v specific options.
606 * d30v-insns (call, return insns): Move --trace-debug call/return
607 tracing action to d30v specific --trace-call option.
609 Fri Nov 28 20:12:48 1997 Michael Meissner <meissner@cygnus.com>
611 * cpu.h (CREG): Rename from CR.
613 * d30v-insns (do_{addc,subb}): Explicitly import the carry bit.
614 (do_trap): Use CREG, not CR. Switch to using cb_syscall.
616 Thu Nov 27 19:25:43 1997 Michael Meissner <meissner@cygnus.com>
618 * cpu.h (ACC): Define as short cut to accumulators.
620 * d30v-insns (do_rot): Delete explicit function, use ROT32 to do
622 (do_trap): Make trap 30 print out accumulators and first 16
623 control registers as well.
624 (do_avg): Sign extend to 64 bit type before doing add/shift.
625 (do_avg2h): Sign extend 16 bit chunks before doing add/shift.
627 Wed Nov 26 15:20:24 1997 Doug Evans <devans@canuck.cygnus.com>
629 * Makefile.in (NL_TARGET): Define.
631 Wed Nov 26 16:55:38 1997 Michael Meissner <meissner@cygnus.com>
633 * cpu.h (d30v_next_insn): New flag for things we are supposed to
634 trace between instruction words.
635 ({call,return}_occurred): Remove index argument.
636 (d30v_{read,write}_mem): Add declarations.
638 * cpu.c (d30v_next_insn): New flag for things we are supposed to
639 trace between instruction words.
640 ({call,return}_occurred): Remove index argument.
641 (d30v_{read,write}_mem): New functions for reading/writing
642 simulated memory in the new common system call support.
644 * d30v-insns: Set emacs C mode.
645 (call/return insns): Set bit to trace call at instruction
646 boundary, rather than doing it here.
647 (do_trap): Set up to use new common system call interface.
649 * engine.c (sim_engine_run): If d30v_next_insn is non zero, do
650 function call/return tracing.
652 Mon Nov 24 16:40:49 1997 Michael Meissner <meissner@cygnus.com>
654 * d30v-insns (bnot): Correctly reset bit in question.
655 (do_trap): Use common system call emulation support, rather than
656 our home grown support.
658 Sun Nov 23 22:47:20 1997 Michael Meissner <meissner@cygnus.com>
660 * d30v-insns (mvfacc): Immediate field is unsigned, allowing
661 shifts of up to 63 to be encoded. Also do shift signed, rather
664 * ic-d30v (IMM_6S): Add field for 6 bit unsigned constants.
666 * d30v-insns (cmpu): Short cmpu zero extends immediate, not sign
669 Sat Nov 22 19:04:34 1997 Andrew Cagney <cagney@b1.cygnus.com>
671 * d30v-insns (illegal, wrong_slot): Replace SIGILL with
674 * sim-calls.c (signal.h): Do not include, replaced by
677 * sim-main.h (signal.h): Do not include, include sim-signal.h
680 Fri Nov 21 09:33:54 1997 Andrew Cagney <cagney@b1.cygnus.com>
682 * cpu.c (call_occurred): Use ZALLOC instead of xmalloc.
683 (return_occurred): Use zfree instead of free.
685 Wed Nov 19 13:28:09 1997 Michael Meissner <meissner@cygnus.com>
687 * Makefile.in ({l,s}_{support,semantics}.o): Depend on the include
688 files in $(ENGINE_H).
690 * d30v-insns (do_{add,addc,sub,subb}): ALU_{ADD,SUB}_CA now takes
691 a VAL argument to add/subtract along with the carry.
693 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
695 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
697 Tue Nov 18 13:56:15 1997 Michael Meissner <meissner@cygnus.com>
699 * d30v-insns (do_trap): Change to new system call numbers. Add
702 Mon Nov 17 14:43:45 1997 Michael Meissner <meissner@cygnus.com>
704 * d30v-insns (mulx): Add mulx instruction.
706 Sun Nov 16 19:06:56 1997 Michael Meissner <meissner@cygnus.com>
708 * cpu.c ({call,return}_occurred): New trace functions to mark
709 function calls and returns and check whether all saved registers
712 * cpu.h ({call,return}_occurred): Add declaration.
714 * d30v-insns ({bsr, jsr} patterns): Call call_occurred if
715 --trace-debug to trace function calls.
716 (jmp register pattern): If this is a jump r62 and --trace-debug,
717 call return_occurred to trace function calls.
718 (bsr{tnz,tzr}): Move setting r62 inside conditional against reg.
719 (do_ld2w): Grab memory in 64-bit chunk, to check alignment.
722 Sat Nov 15 20:57:57 1997 Michael Meissner <meissner@cygnus.com>
724 * d30v-insns: Undo changes from Nov. 11, allowing for odd register
725 pairs, since the machine doesn't support such usage. Trap on odd
726 registers, rather than give a warning. Keep do_src and do_trap
729 Fri Nov 14 11:59:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
731 * d30v-insns (do_trap): Pacify compiler warnings for printf calls.
733 Tue Nov 11 18:26:03 1997 Michael Meissner <meissner@cygnus.com>
735 * d30v-insns (not_r63_reg): Rename from make_even_reg, only check
736 for register being r63. Change callers ld2{h,w}, ld4bh{,u}.
737 (get_reg_not_r63): Rename from get_even_reg, and only check for
738 register r63. Change callers st2{w,h}, st4b.
739 (do_src): Correct register pair for shift left.
740 (do_trap): Temporarily make trap 30 print out the registers.
742 Tue Nov 4 08:51:22 1997 Michael Meissner <meissner@cygnus.com>
744 * d30v-insns (do_trap): Make trap 31 be used for system calls.
745 Add primitive write and exit system calls.
747 * Makefile (FILTER): New make variable to filter out known igen
749 (tmp-igen): Add $(FILTER) on all 3 invocations of igen to filter
750 out warnings that should be ignored by default.
752 Fri Oct 31 19:36:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
754 * sim-calls.c (sim_open): Change EIT to memory region.
756 Fri Oct 17 16:51:31 1997 Andrew Cagney <cagney@b1.cygnus.com>
758 * alu.h (ALU16_END): Get result from ALU16_OVERFLOW_RESULT.
759 (ALU32_END): Get result from ALU32_OVERFLOW_RESULT.
761 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
763 * configure: Regenerated to track ../common/aclocal.m4 changes.
765 Mon Sep 29 15:23:35 1997 Stu Grossman <grossman@babylon-5.cygnus.com>
767 * d30v-insns (MVFSYS MVTSYS): Fix bit patterns so that these
768 instructions get recognised.
770 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
772 * configure: Regenerated to track ../common/aclocal.m4 changes.
774 Wed Sep 24 17:51:43 1997 Stu Grossman <grossman@babylon-5.cygnus.com>
776 * Makefile.in (SIM_OBJS): Add sim-break.o.
777 * (INCLUDE_DEPS): Add tconfig.h.
778 * alu.h (MEM STORE): Change to sim_core_read/write_unaligned to
779 allow for trapping unaligned accesses.
780 * cpu.h: Define SIM_BREAKPOINT as syscall 5 for intrinsic breakpoint
782 * d30v-insn (short syscall): Use syscall 5 for breakpoint insn.
783 * sim-calls.c (sim_fetch_register sim_store_register): Implement.
784 * tconfig.in: Define SIM_HAVE_BREAKPOINTS to enable intrinsic
785 breakpoint mechanism.
787 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
789 * configure: Regenerated to track ../common/aclocal.m4 changes.
791 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
793 * Makefile.in (SIM_WARNINGS, SIM_ALIGNMENT, SIM_ENDIAN,
794 SIM_HOSTENDIAN, SIM_RESERVED_BITS): Delete, moved to common.
795 (SIM_EXTRA_CFLAGS): Update.
797 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
799 * configure.in: Specify strict alignment.
800 * configure: Regenerated to track ../common/aclocal.m4 changes.
802 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
804 * configure: Regenerated to track ../common/aclocal.m4 changes.
806 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
808 * configure: Regenerated to track ../common/aclocal.m4 changes.
810 Fri Sep 12 16:13:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
812 * sim-calls.c (sim_open): Change memory to
813 internal inst. RAM h'00000000-h'0000ffff (64KB)
814 internal data RAM h'20000000-h'20007fff (32KB)
815 external RAM h'80000000-h'803fffff (4MB)
816 EIT h'fffff000-h'ffffffff
819 Thu Sep 11 08:59:34 1997 Andrew Cagney <cagney@b1.cygnus.com>
821 * Makefile.in (SIM_OBJS): Add sim-hrw.o module.
823 * sim-calls.c (sim_read): Delete. use sim-hrw.
824 (sim_write): Delete, use sim-hrw.
827 Tue Sep 9 01:36:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
829 * ic-d30v (imm_5): Update nr args passed to LSMASKED.
831 * d30v-insns (do_sat, do_sath, do_sath_p, do_satz, do_satzh): Fix,
832 computing the max sat value incorrectly.
834 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
836 * configure: Regenerated to track ../common/aclocal.m4 changes.
838 Fri Sep 5 09:15:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
840 * d30v-insns (do_mac, do_macs, do_msub, do_mulxs): Use explicit
841 type cast instead of SIGNED64 macro.
843 Thu Sep 4 10:28:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
845 * Makefile.in (SIM_OBJS): Include sim-memopt.o module.
847 * sim-calls.c (sim_open): Pass zero modulo arg to sim_core_attach
849 (sim_open): If no memory, use memory commands to establish d30v
851 (d30v_option_handler): Delete, replased by sim-memopt.c.
852 (sim_create_inferior): Call sim_module_init.
854 * sim-main.h (struct sim_state): Remove members eit_ram,
855 sizeof_eit_ram, external_ram, baseof_external_ram,
856 sizeof_external_ram. Using generic memory model instead.
858 Mon Sep 1 11:04:09 1997 Andrew Cagney <cagney@b1.cygnus.com>
860 * sim-calls.c (sim_open): Use sim_state_alloc.
862 Sat Aug 30 10:01:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
864 * sim-main.h (INVALID_INSTRUCTION_ADDRESS): Define.
866 * engine.c (do_2_short): Compare with INVALID_INSTRUCTION_ADDRESS
869 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
871 * configure: Regenerated to track ../common/aclocal.m4 changes.
874 Wed Aug 27 13:41:54 1997 Andrew Cagney <cagney@b1.cygnus.com>
876 * sim-calls.c (sim_open): Add call to sim_analyze_program, update
879 * sim-calls.c (sim_create_inferior): Add ABFD argument.
880 Initialize CPU registers including PC.
881 (sim_load): Delete, using sim-hload.
883 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
885 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
887 * configure: Regenerated to track ../common/aclocal.m4 changes.
890 Mon Aug 25 15:41:44 1997 Andrew Cagney <cagney@b1.cygnus.com>
892 * sim-calls.c (sim_open): Add ABFD argument.
893 (sim_open): Move sim_config call to after sim_parse_args.
894 (sim_open): Check sim_config return status.
896 Fri Aug 22 16:38:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
898 * d30v-insns (do_subh_ppp): Correct name, was do_sub_ppp.
899 (do_subh_ppp): Compute rc=rb-src instead of src-rb.
900 (do_addh_ppp): Ditto.
902 Fri Jun 27 14:43:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
904 * d30v-insns (mvfsys, mvtsys): Switch instruction encodings, was
905 wrong. Update handling of PSW[DS] bit.
906 (dbt): Fix debug trap address.
908 * cpu.h (NR_CONTROL_REGISTERS): Allow the full 64 registers.
910 Tue Jun 24 12:41:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
912 * d30v-insns (DBT, RTD): Swap the stack after updating the PSW.
913 (DBT): Use PSW_SET to update PSW.
915 * alu.h (ALU16_END): Check for 16 bit carry and not 32 bit.
917 Tue Jun 24 12:16:14 1997 Andrew Cagney <cagney@b2.cygnus.com>
919 * d30v-insns (ppp, ccc, pp, XX, p): Update format functions so
920 that they are of class %s instead of class function.
922 Tue Jun 10 12:26:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
924 * sim-main.h (engine_error, engine_restart, engine_halt,
925 engine_run_until_stop): Delete prototypes. Functions deleted
927 (do_interrupt_handler): Add prototype.
928 (sim_state): Add pending_event member to struct.
930 * sim-calls.c (sim_open): Configure interrupt handler.
931 * engine.c (d30v_interrupt_event): New function. Deliver external
932 interrupt to processor.
934 * d30v-insns (do_stack_swap): Move function from here.
935 * engine.c (do_stack_swap): To here.
936 * sim-main.h (do_stack_swap): Add prototype.
938 * cpu.h (registers): Change current_sp to an int.
939 * d30v-insn (do_stack_swap): Update.
941 Thu Jun 5 12:54:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
943 * d30v-insns (LD*, ST*): Disasemble XX == 0 as immed version of
945 (str_XXX): Fix case of XX == 3 - return "-".
947 Thu Jun 5 12:54:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
949 * engine.c (sim_engine_run): Issuing L->R and R->L instructions in
952 * d30v-insn (CMPUcc imm long): With of RB field should be 6 not
954 (MUL, MUL2H, MULHX): X field 01 instead of 10.
956 Thu Jun 5 12:54:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
958 * d30v-insns (mvtsys): Don't modify DS bit when writing to PSW.
959 (dbt, rtd): New instructions.
961 * cpu.h (NR_CONTROL_REGISTERS): Now 15.
962 (debug_program_status_word_cr, debug_program_counter_cr): Add
963 debug control registers. Renumber other control registers.
964 (PSW_DS): New PSW bit.
967 Wed May 28 13:45:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
969 * engine.c (sim_engine_run): Check the event queue on every cycle.
971 * sim-calls.c (sim_size): Delete.
972 (sim_do_command): Call sim_args_command.
973 (sim_open): Move eit_ram and sizeof_eit_ram to sim_state struct.
974 (simulation): Delete global now depend on sd argument.
975 (sim_open): Initialize sim-watch.
976 (d30v_option_handler): New function, parse mem-size argument.
978 Tue May 27 14:03:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
980 * sim-calls.c (sim_set_callbacks): Delete.
981 (sim_write): Pass NULL cpu arg to sim_core_write_buffer.
983 * engine.c (engine_init): Delete. Handled in sim_open.
984 (engine_create): Ditto.
986 Tue May 20 10:15:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
988 * sim-calls.c (sim_open): Add callback argument.
989 (sim_set_callbacks): Delete SIM_DESC argument.
991 Mon May 19 14:59:32 1997 Andrew Cagney <cagney@b1.cygnus.com>
993 * sim-calls.c (sim_open): Set the sim.base magic number.
995 Fri May 16 15:25:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
997 * d30v-insns: Replace engine_error with common sim_engine_abort.
998 * cpu.c (is_condition_ok, is_wrong_slot): Ditto.
1000 * engine.c (engine_run_until_stop): Rename this.
1001 (sim_engine_run): To this. Simplify - most moved to common.
1003 * sim-calls.c (sim_stop_reason, sim_resume, sim_stop):
1004 Delete. Replaced by common code.
1006 * engine.c (engine_error, engine_restart, engine_halt): Ditto.
1008 * sim-main.h (SIM_ENGINE_RESTART_HOOK, SIM_ENGINE_HALT_HOOK):
1011 Mon May 5 23:05:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
1013 * alu.h (IMEM, MEM, STORE): Update to reflect changes to core in
1015 * sim-calls.c (sim_open): Ditto.
1017 * alu.h, cpu.h, cpu.c, d30v-insn, dc-short: Clean up copyright
1020 Fri May 2 12:01:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
1022 * sim-calls.c (sim-options.h, sim-utils.h): Include.
1023 * Makefile.in (sim-calls.o): Add dependencies.
1025 * d30v-insns (address_word): Remove cia argument from support
1026 functions, igen now does this automatically.
1028 * Makefile.in (tmp-igen): Include line number information in
1031 * sim-main.h (SIM_DESC): Remove sim_events and sim_core, moved to
1032 simulator base type sim_state_base.
1033 (sim-core.h, sim-events.h, sim-io.h): Replace with #include
1036 * sim-main.h (sim_state): Track recomendations in common
1038 * cpu.h (sim_cpu): Ditto.
1039 * engine.c (do_2_short, do_parallel): Ditto.
1040 * cpu.h (GPR): Ditto.
1041 * alu.h (MEM, IMEM, STORE): Ditto.
1042 * cpu.c (is_wrong_slot): Ditto.
1043 * ic-d30v (Aa, Ab): Ditto.
1045 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
1047 * configure: Regenerated to track ../common/aclocal.m4 changes.
1048 * Makefile.in (SIM_OBJS): Add sim-module.o, sim-profile.o.
1049 * sim-calls.c (sim_open): Call sim_module_uninstall if argument
1050 parsing fails. Call sim_post_argv_init.
1051 (sim_close): Call sim_module_uninstall.
1053 Fri Apr 18 13:44:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1055 * sim-calls.c (sim_stop): New function.
1057 Thu Apr 17 02:57:55 1997 Doug Evans <dje@canuck.cygnus.com>
1059 * Makefile.in (SIM_OBJS): Add sim-load.o, sim-options.o, sim-trace.o.
1060 (SIM_EXTRA_{LIBS,LIBDEPS,ALL,INSTALL}): Delete.
1061 (SIM_RUN_OBJS): Change from run.o to nrun.o.
1062 * cpu.h (sim_cpu): New member base. Delete members trace, sd.
1063 (cpu_traces): Delete.
1064 * engine.c (engine_init): Set backlink from cpu to state.
1065 * sim-calls.c: #include bfd.h.
1066 (sim_open): Set STATE_OPEN_KIND. Call sim_pre_argv_init,
1068 (sim_load): Return SIM_RC. New arg abfd.
1069 Call sim_load_file to load file into simulator.
1070 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
1071 (sim_trace): Delete.
1072 * sim-main.h (struct sim_state): sim_state_base is typedef now.
1073 (STATE_CPU): Define.
1075 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1077 * configure: Regenerated to track ../common/aclocal.m4 changes.
1080 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
1082 * Makefile.in (SIM_EXTRA_DEPS): Define.
1083 (SIM_OBJS): Add sim-utils.o.
1084 (SIM_GEN): Delete tmp-common.
1085 (SIM_EXTRA_CLEAN): Delete clean-common.
1086 (BUILT_SRC_FROM_COMMON): Moved to ../common/Make-common.in.
1087 (tmp-common,clean-common): Delete.
1088 (ENGINE_H): sim-state.h renamed to sim-main.h.
1089 (clean-igen): Delete tmp-insns.
1091 * cpu.c: sim-state.h renamed to sim-main.h.
1092 * engine.c: Likewise.
1093 * sim-calls.c: Likewise.
1094 (zalloc,zfree): Moved to ../common/sim-utils.c.
1095 * sim-main.h: Renamed from sim-state.h.
1097 * sim-calls.c (sim_open): New arg `kind'.
1099 * configure: Regenerated to track ../common/aclocal.m4 changes.
1101 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1103 * configure: Regenerated to track ../common/aclocal.m4 changes.
1105 Wed Apr 2 11:13:15 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1107 * Makefile.in (SIM_OBJS): Link in the recently added sim-config.o
1109 * engine.c (current_target_byte_order, current_host_byte_order,
1110 current_environment, current_alignment, current_floating_point,
1111 current_model_issue, current_stdio): Delete, moved to
1112 ../common/sim-config.c
1114 Mon Mar 24 14:50:30 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1116 * d30v-insns (do_ldw): Load 4 bytes not 2.
1117 (do_incr, LD*, ST*): Increment register not its value.
1119 Mon Mar 24 09:59:53 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1121 * cpu.c (is_wrong_slot): Ditto.
1122 (is_condition_ok): Ditto.
1124 * sim-calls.c (sim_trace): Ditto.
1126 * engine.c (engine_init): Ditto.
1127 (do_2_short): Ditto.
1128 (engine_run_until_stop): Ditto.
1130 * d30v-insns (void): Update. For functions, remove `SIM_DESC sd'
1131 and `cpu *processor' arguments as igen now handles this.
1133 * cpu.h: Rename struct _cpu to struct _sim_cpu. Rename variable
1136 * sim-state.h: Update.
1138 Fri Mar 21 12:52:12 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1140 * d30v-insns (do_sat): Correct calculation of saturate lower
1143 (do_satzh, do_satz): Arguments should be signed.
1145 * sim-calls.c (zalloc): Use malloc() instead of xmalloc() for
1147 (filter_filename): Drop.
1149 * cpu.h (is_wrong_slot): Correct declaration name - was
1152 * engine.c (do_parallel): Plicate GCC.
1153 (engine_error): Ditto.
1154 (engine_run_until_stop): Ditto.
1155 * cpu.c (is_wrong_slot): Ditto.
1156 (is_condition_ok): Ditto.
1157 * sim-calls.c (sim_size): Ditto.
1161 * engine.h, engine.c (engine_create): Add missing prototype to
1162 header file. Clean up missing variables.
1164 * configure.in (unistd.h, string.h, strings.h): Configure in.
1165 * configure, config.in: Rebuild.
1167 Thu Mar 20 19:40:20 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1169 * d30v-insns (void): Provide a second emul instruction using a
1172 Tue Mar 18 20:51:42 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1174 * d30v-insn (do_sat*): Pass all necessary args.
1176 Tue Mar 18 18:49:10 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1178 * d30v-insns (SAT*): Issue warning when bit overflow.
1179 (EMUL): Exit with GPR[2] not 2.
1181 Tue Mar 18 14:24:09 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1183 * sim-state.h: New file rename engine.h.
1184 (sim_state): Rename engine strut to sim_state, rename events and
1188 * cpu.h, cpu.c: Ditto.
1190 * d30v-insns: Ditto.
1191 * sim-calls.c: Ditto.
1193 * Makefile.in (sim-*.c): Moved to ../common.
1195 Tue Mar 18 10:39:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1197 * d30v-insns (do_mac): Adding wrong register.
1202 * ic-d30v: Put back definitions of RaH, RaL, et.al.
1203 (do_sra2h, do_srah): Use.
1204 (do_srl2h, do_srlh): Use.
1206 * d30v-insns (SAT, SAT2H, SATp, SATZ): Implement saturate.
1208 Tue Mar 18 03:01:25 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1210 * d30v-insns: Specify wild insted of reserved bits.
1213 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1215 * configure: Re-generate.
1217 Mon Mar 17 14:35:37 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1219 * Makefile.in (SIM_EXTRA_CFLAGS), configure.in: Include SIM_*
1220 options. Allow RESERVED_BITS to be configured.
1221 * configure: Re-generate.
1223 * Makefile.in (sim-*.h): Drop, not needed.
1224 (sim-*.c): Make each explicit so that they automatically update.
1226 Sat Mar 15 02:34:30 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1228 * ic-d30v (imm long): Incorrect calculation.
1230 * d30v-insns (EMUL): Finish exit, write-string emul-call.
1232 * sim-calls.c (sim_trace): Have sim-trace enable basic instruction
1235 Sat Mar 15 02:10:31 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1237 * configure.in: Enable common options - endian, inline and
1239 * configure: Regenerate.
1241 Fri Mar 14 16:11:50 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1243 * Makefile.in (cpu.o): Update dependencies.
1244 * cpu.c (is_condition_ok): Update PSW bit manipulations.
1246 Fri Mar 14 12:49:20 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1248 * configure.in: Autoconfig m4
1249 * configure: Regenerate.
1251 * Makefile.in: Use m4 to preprocess d30v-insns.
1252 * d30v-insn: Adjust.
1254 Thu Mar 13 12:44:54 1997 Doug Evans <dje@canuck.cygnus.com>
1256 * sim-calls.c (sim_open): New SIM_DESC result. Argument is now
1258 (other sim_*): New SIM_DESC argument.
1260 Wed Mar 12 19:05:45 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1262 * sim-calls.c (sim_open): Create all the d30v RAM blocks.
1264 * engine.c (engine_run_until_stop): Handle delayed subroutine
1268 * ic-d30v: For Rb and Rc always return the value and not the
1272 * ic-d30v (val_Ra): Returns 0 or RA.
1275 * d30v-insn (make_even_reg, get_even_reg): New functions. Force
1276 the register index to be even, issusing a warning if it was not.
1279 Wed Mar 12 14:57:26 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1281 * d30v-insns (do_trap): Implement TRAP instruction.
1283 * alu.h (PSW_F, PSW_FLAG_VAL, PSW_FLAG_SET): New macro, map flag
1285 * ic-d30v: Drop F* expressions.
1286 * d30v-insn: Use more explicit PSW_FLAG_ ops.
1287 * cpu.h (PSW_*): Redo PSW bit values.
1288 * alu.h (ALU*_END): Update. Fix setting of overflow - logic was
1291 * d30v-insn (MVFSYS, MVTSYS): Implement.
1292 * cpu.h (PSWH, PSWL): New macros for high, low word of PSW.
1294 Wed Mar 12 14:12:11 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1296 * cpu.h (RPT_IS_CALL): New macro for processor field
1297 is_delayed_call. That in turn used as a flag to indicate if a
1298 delayed branch or delayed call is to occure.
1299 * d30v-insns (do_dbra): Set/clear RPT_IS_CALL;
1309 * d30v-insn (do_incr): Finish - handle modulo registers.
1311 * d30v-insns (CMPU): Include all possible compare
1312 operations. Issue a warning where op defined by the processor
1315 Wed Mar 12 13:55:55 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1317 * d30v-insns: Add a new instruction class _EMUL and a new
1318 instruction EMUL that emulates a few basic IO operations.
1320 * Makefile.in (tmp-igen): Filter in emul instructions.
1322 Fri Mar 7 20:32:13 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1324 * d30v-insns (void): Fill in the gaps.
1326 Wed Feb 26 09:31:10 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
1328 * Makefile.in (tmp-igen): Include ic-d30v in dependencies.
1330 * ic-d30v (cache): Update to use H_word, L_word added to
1333 Tue Feb 25 15:26:51 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
1335 * Makefile.in (tmp-igen): Correctly run $(MAKE).
1337 Thu Feb 20 20:30:31 1997 Andrew Cagney <cagney@critters.cygnus.com>
1339 * Makefile.in (FROM_IGEN, FROM_COMMON): Make the igen generated
1340 files dependant on tmp-igen. Define ENGINE_H.
1342 Sun Feb 16 16:42:48 1997 Andrew Cagney <cagney@critters.cygnus.com>
1344 * configure.in: New file - follow Doug Evans instructions.
1345 * Makefile.in: Ditto.