sim/d30v/ChangeLog

   1 1999-05-27  Michael Meissner  <meissner@cygnus.com>
   2
   3         * d30v-insns (do_repeat): Print a warning if a REPEAT or REPEATI
   4         instruction loop is too small.
   5
   6 1999-05-08  Felix Lee  <flee@cygnus.com>
   7
   8         * configure: Regenerated to track ../common/aclocal.m4 changes.
   9
  10 1999-03-16  Martin Hunt  <hunt@cygnus.com>
  11         From Frank Ch. Eigler  <fche@cygnus.com>
  12
  13         * cpu.h (mvtsys_left_p): New flag for MVTSYS instruction history.
  14         * d30v-insns (mvtsys): Set this flag instead of left_kills_right_p.
  15         (do_sath): Detect MVTSYS by new flag.
  16         * engine.c (unqueue_writes): Detect MVTSYS by new flag.
  17         (do_2_short, do_parallel): Initialize new flag.
  18
  19 1999-02-26  Frank Ch. Eigler  <fche@cygnus.com>
  20
  21         * tconfig.in (SIM_HANDLES_LMA): Make it so.
  22
  23 1999-01-12  Frank Ch. Eigler  <fche@cygnus.com>
  24
  25         * engine.c (unqueue_writes): Make PSW conflict resolution code
  26         conditional - disable it for MVTSYS || insn case.
  27
  28 1999-01-11  Frank Ch. Eigler  <fche@cygnus.com>
  29
  30         * d30v-insns (do_sath): Drain PSW write queue before PSW_S_FLAG
  31         update.
  32         * engine.c (unqueue_writes): Make non-static.  Remove PSW_V/VA
  33         special case.
  34         (do_parallel): Don't drain PSW write queue for MVTSYS || insn.
  35
  36 1999-01-07  Frank Ch. Eigler  <fche@cygnus.com>
  37
  38         * d30v-insns (do_ld2h): Sign-extend loaded half-words.
  39
  40 1999-01-05  Frank Ch. Eigler  <fche@cygnus.com>
  41
  42         * d30v-insns (do_ld2h): Read memory in word units.
  43         (do_ld4bh): Ditto.  Correct sign extension.
  44         (do_ld4bhu): Ditto.
  45         (do_st2h): Write memory in word units.
  46         (do_st4hb): Ditto.
  47         (st4hb): Correct mnemonic in igen template.
  48
  49 1998-12-08  Frank Ch. Eigler  <fche@cygnus.com>
  50
  51         * d30v-insns: (do_ld2h): Don't update R0 nor R1 for double-word insn.
  52         (do_ld2w): Ditto.
  53         (do_ld4bh): Ditto.
  54         (do_ld4bhu): Ditto.
  55         (do_mulx2h): Ditto.
  56
  57 1998-12-03  Frank Ch. Eigler  <fche@cygnus.com>
  58
  59         * d30v-insns (do_repeat): Don't set RP for repeat count 1.
  60
  61 1998-12-03  Frank Ch. Eigler  <fche@cygnus.com>
  62
  63         * d30v-insns (do_src): Treat shift count -32 naturally instead of
  64         producing zero result.
  65
  66 1998-11-22  Frank Ch. Eigler  <fche@cygnus.com>
  67
  68         * d30v-insns (do_src): Limit SRC shift count to -32 .. 31.
  69
  70 1998-11-16  Frank Ch. Eigler  <fche@cygnus.com>
  71
  72         * d30v-insns (dbt): Defer PSW/DPSW update with new DID_TRAP code 2.
  73         * engine.c (unqueue_writes): Perform DBT processing on PSW/DPSW here.
  74
  75 1998-11-12  Frank Ch. Eigler  <fche@cygnus.com>
  76
  77         * cpu.h (_sim_cpu): Removed is_delayed_call field, and associated
  78         RPT_IS_CALL macro.
  79         * sim-calls.c (sim_create_inferior): Don't initialize is_delayed_call.
  80         * d30v-insns (do_dbra): Don't clear RPT_IS_CALL. (do_dbrai): Ditto.
  81         (do_djmp): Ditto. (do_djmpi): Ditto. (do_repeat): Ditto.
  82         * d30v-insns (do_dbsr): Don't set RPT_IS_CALL, but set R62 instead.
  83         (do_dbsri): Ditto. (do_djsr): Dito. (do_djsri): Ditto.
  84         * engine.c (sim_engine_run): Remove conditional setting of R62 based
  85         upon RPT_IS_CALL.
  86
  87 1998-11-08  Frank Ch. Eigler  <fche@cygnus.com>
  88
  89         * sim-calls.c (sim_open): Add dummy memory range over control
  90         register region (0x40000000..0x4000FFFF).
  91
  92 1998-11-06  Frank Ch. Eigler  <fche@cygnus.com>
  93
  94         * d30v-insns (do_mvfacc): Use loop to limit shift count to 63 .. 0.
  95
  96 Tue Oct 13 11:01:16 1998  Frank Ch. Eigler  <fche@cygnus.com>
  97
  98         * d30v-insns (do_sra,do_srah,do_srl,do_srlh): Make shift
  99         count -32 to produce zero result.
 100         (do_src): Ditto for shift count == -64.
 101
 102 Mon Oct 12 23:04:11 1998  Frank Ch. Eigler  <fche@cygnus.com>
 103
 104         * d30v-insns (ROT): Use 0x1f bit mask for rotate count masking.
 105         (do_sra,do_srl): Use loop to limit shift count to -32 .. 31.
 106         (do_srah,do_srlh): Use loop to limit shift count to -32 .. 31.
 107         (sra2h,srl2h): Use loop to limit shift count to -16 .. 15.
 108         (do_src): Use loop to limit shift count to -64 .. 63.
 109
 110 Fri Oct  9 16:46:52 1998  Doug Evans  <devans@canuck.cygnus.com>
 111
 112         * sim-calls.c (get_insn_name): New fn.
 113         (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
 114         * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
 115
 116 Mon Sep 28 10:43:28 1998  Frank Ch. Eigler  <fche@cygnus.com>
 117
 118         * d30v-insns (do_sra,do_srah,do_srl,do_srlh,ROT,do_src): Use
 119         correct MSB bit numbers for sign extension masks.
 120
 121 Fri Sep 25 17:32:27 1998  Frank Ch. Eigler  <fche@cygnus.com>
 122
 123         * engine.c (do_parallel): Unqueue writes if MU instruction was
 124         a MVTSYS, as identified by its left_kills_right_p side-effect.
 125
 126 Fri Sep 25 12:31:34 1998  Frank Ch. Eigler  <fche@cygnus.com>
 127
 128         * d30v-insns (do_sra,do_srah,do_srl,do_srlh,ROT,do_src): Mask
 129         shift/rotate counts to number of bits in width of operand; no
 130         longer saturate at maxima.
 131
 132 Tue Jul 14 18:39:23 1998  Frank Ch. Eigler  <fche@cygnus.com>
 133
 134         * cpu.h (left_kills_right_p): New flag for non-branch instructions
 135         that, when executed in left slot of a -> sequential pair, kill the
 136         right slot.
 137         * d30v-insns (mvtsys): Set flag for PSW/PSWh/PSWl/FLAG operands.
 138         * engine.c (do_2_short): Respect flag.
 139
 140 Thu Jun  4 16:48:58 1998  David Taylor  <taylor@texas.cygnus.com>
 141
 142         * d30v-insns (do_trap): don't save the bPSW and PSW based on
 143         current values because an instruction done in parallel with
 144         the trap might change them, instead set a flag do that
 145         unqueue_writes will take care of it.
 146         * engine.c (unqueue_writes): finish trap handling
 147         * cpu.h (_sim_cpu): add new field did_trap and a macro DID_TRAP
 148         to make use of it; set by do_trap, tested and cleared by
 149         unqueue_writes.
 150
 151 Tue May 19 16:07:04 1998  Frank Ch. Eigler  <fche@cygnus.com>
 152
 153         * engine.c (unqueue_writes): Suppress the all enqueued writes to
 154         the same flags in PSW except the last.
 155
 156 Fri May 15 11:38:59 1998  Frank Ch. Eigler  <fche@cygnus.com>
 157
 158         * d30v-insns (RETI): Correct instruction spelling to "reit".
 159
 160 Thu May 14 09:34:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
 161
 162         * d30v-insns (dbt): Handle DBT at end of repeat block.
 163         (do_trap, dbt): Clear PSW_RP if at end of repeat block.
 164
 165 Thu May 14 07:41:41 1998  Frank Ch. Eigler  <fche@cygnus.com>
 166
 167         * engine.c (sim_engine_run): Trigger DDBT based on previous PC,
 168         instead of next PC.
 169
 170 Wed May 13 11:03:40 1998  Frank Ch. Eigler  <fche@cygnus.com>
 171
 172         * engine.c (sim_engine_run): Move DDBT handling after instruction
 173         decode/execute stage.
 174
 175 Tue May 12 12:14:53 1998  Frank Ch. Eigler  <fche@cygnus.com>
 176
 177         * d30v-insns (do_sat*): Correct "saturate to 0 bits" patch to
 178         properly handle negative saturation inputs.
 179
 180 Tue May 12 11:11:26 1998  Frank Ch. Eigler  <fche@cygnus.com>
 181
 182         * engine.c (sim_engine_run): Decrement RPT_C only under more
 183         restricted conditions.
 184
 185 Mon May 11 17:33:46 1998  Frank Ch. Eigler  <fche@cygnus.com>
 186
 187         * d30v-insns (do_sat*): Make "saturate to 0 bits" pass through data
 188         unchanged.
 189
 190 Mon May 11 16:27:04 1998  Frank Ch. Eigler  <fche@cygnus.com>
 191
 192         * engine.c (sim_engine_run): Implement DDBT (debugger debug trap)
 193         functionality.
 194
 195 Fri May  8 16:44:19 1998  Frank Ch. Eigler  <fche@cygnus.com>
 196
 197         * d30v-insns (do_trap): Set bPC to RPT_S if trap is last
 198         instruction in repeat block.
 199         (bsr*/jsr*): Set R62 (LINK) to RPT_S if subroutine branch
 200         is last instruction in repeat block.
 201
 202 Fri May  8 11:06:50 1998  Frank Ch. Eigler  <fche@cygnus.com>
 203
 204         * d30v-insns (do_sath): Query/update F4/PSW_S using proper flag
 205         macro.
 206         * cpu.h (PSW_S_FLAG): New flag number for PSW_S status bit.
 207
 208 Wed May  6 19:40:56 1998  Doug Evans  <devans@canuck.cygnus.com>
 209
 210         * sim-main.h (INSN_NAME): New arg `cpu'.
 211
 212 Fri May  1 14:24:30 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 213
 214         * d30v-insns: Fix parameter list to sim_engine_abort.
 215
 216 Thu Apr 30 14:28:00 1998  Fred Fish  <fnf@cygnus.com>
 217
 218         * d30v-insns (do_sath): Add additional argument that determines
 219         whether or not the F4 (PSW_S) bit in the PSW is updated.
 220         (SAT2H): Do not update PSW_S bit.
 221         (SATHp): Do update PSW_S bit.
 222
 223 Tue Apr 28 23:36:00 1998  Fred Fish  <fnf@cygnus.com>
 224
 225         * d30v-insns (SRAHp, SRLHp):  Immediate values are signed 6 bit
 226         values, not 5 bit values.
 227
 228 Wed Apr 29 12:57:55 1998  Frank Ch. Eigler  <fche@cygnus.com>
 229
 230         * d30v-insns (do_incr): Check modular arithmetic limits after
 231         postincrement/postdecrement, rather than before, to match
 232         erroneous hardware behavior.
 233
 234 Tue Apr 28 18:33:31 1998  Geoffrey Noer  <noer@cygnus.com>
 235
 236         * configure: Regenerated to track ../common/aclocal.m4 changes.
 237
 238 Mon Apr 27 19:42:00 1998  Fred Fish  <fnf@cygnus.com>
 239
 240         * d30v-insns (do_trap): Clear all bits in PSW except SM and DB.
 241
 242 Mon Apr 27 14:55:00 1998  Fred Fish  <fnf@cygnus.com>
 243
 244         * d30v-insns (do_mulx2h): Low order results go in ra+1, high
 245         order in ra.
 246
 247 Mon Apr 27 14:42:00 1998  Fred Fish  <fnf@cygnus.com>
 248
 249         * d30v-insns (do_mulx2h): Rewrite to do proper 32 bit signed
 250         multiply of high and low fields from operands.
 251
 252 Sun Apr 26 15:31:55 1998  Tom Tromey  <tromey@creche>
 253
 254         * configure: Regenerated to track ../common/aclocal.m4 changes.
 255         * config.in: Ditto.
 256
 257 Sun Apr 26 15:20:20 1998  Tom Tromey  <tromey@cygnus.com>
 258
 259         * acconfig.h: New file.
 260         * configure.in: Reverted change of Apr 24; use sinclude again.
 261
 262 Fri Apr 24 14:16:40 1998  Tom Tromey  <tromey@creche>
 263
 264         * configure: Regenerated to track ../common/aclocal.m4 changes.
 265         * config.in: Ditto.
 266
 267 Fri Apr 24 11:20:00 1998  Tom Tromey  <tromey@cygnus.com>
 268
 269         * configure.in: Don't call sinclude.
 270
 271 Wed Apr 22 21:23:00 1998  Fred Fish  <fnf@cygnus.com>
 272
 273         * ic-d30v (RbU, RcU): Unsigned versions of Rb and Rc.
 274         * d30v-insns (MVTACC): Use new RbU and RcU macros.
 275
 276 Wed Apr 22 20:52:00 1998  Fred Fish  <fnf@cygnus.com>
 277
 278         * ic-d30v (RbHU,RbLU): Unsigned versions of RbH and RbL.
 279         * d30v-insns (SRL2H): Use new RbHU and RbLU macros instead of
 280         RbH and RbL.
 281
 282 Mon Apr 13 16:59:00 1998  Fred Fish  <fnf@cygnus.com>
 283
 284         * d30v-insns (do_srl): Avoid undefined behavior of host compiler
 285         when shifting left by more than 31 bits.
 286
 287 Tue Apr  7 18:09:00 1998  Fred Fish  <fnf@cygnus.com>
 288
 289         * engine.c (sim_engine_run): Remove at_loop_end variable. Add
 290         rp_was_set and rpt_c_was_nonzero variables.  Major restructuring of
 291         code before and after instruction execution to properly handle state
 292         of the RP bit in the PSW, the value in RPT_C, and other loop related
 293         problems.
 294
 295 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 296
 297         * configure: Regenerated to track ../common/aclocal.m4 changes.
 298
 299 Fri Apr  3 15:26:00 1998  Fred Fish  <fnf@cygnus.com>
 300
 301         * d30v-insns (do_trap): Use offset from EIT_VB rather than hardcoded
 302         BASE_ADDRESS constant.
 303         * cpu.h (BASE_ADDRESS): Remove constant not used any longer.
 304
 305 Fri Apr  3 14:42:00 1998  Fred Fish  <fnf@cygnus.com>
 306
 307         * cpu.h (EIT_VB): Define macro to access EIT_VB register.
 308         (EIT_VB_DEFAULT): Define value of EIT_VB register after reset.
 309         * sim-calls.c (sim_create_inferior): Set EIT_VB to EIT_VB_DEFAULT.
 310
 311 Tue Mar 31 19:00:00 1998  Fred Fish <fnf@cygnus.com>
 312
 313         * d30v-insns (do_dbrai): RPT_S is cia plus pcdisp rather than
 314         just pcdisp.
 315
 316 Mon Mar 30 20:30:00 1998  Fred Fish  <fnf@cygnus.com>
 317
 318         * engine.c (sim_engine_run): Add at_loop_end.  Rework end of loop
 319         code to use this to both reset PSW_RP when needed and to set PC
 320         to RPT_S for another pass through the loop.
 321
 322 Mon Mar 30 16:12:00 1998  Fred Fish  <fnf@cygnus.com>
 323
 324         * engine.c (sim_engine_run): Change code that handles RPT_* regs
 325         and PSW_RP bit in PSW so that PSW_RP is always set while executing
 326         the loop and loop terminates upon completion of the pass for which
 327         RPT_C is zero.  More closely follow logic in architecture manual.
 328
 329 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 330
 331         * configure: Regenerated to track ../common/aclocal.m4 changes.
 332
 333 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 334
 335         * configure: Regenerated to track ../common/aclocal.m4 changes.
 336
 337 Thu Mar 19 00:25:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 338
 339         * sim-calls.c (sim_open): Move memory-region commands back to
 340         before the call to sim_parse_args.
 341         (d30v_option_handler): Implement extmem-size option using
 342         memory-delete and memory-region commands.
 343
 344         * sim-calls.c (d30v_option_handler): Use ANSI-C argument list,
 345         correct number and type of arguments.
 346
 347 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 348
 349         * configure: Regenerated to track ../common/aclocal.m4 changes.
 350
 351 Wed Mar 11 13:56:32 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 352
 353         * alu.h (IMEM, MEM, STORE): Replace sim_core_*_map with exec_map,
 354         read_map and write_map resp.
 355
 356         * cpu.c (d30v_read_mem, d30v_write_mem): Ditto.
 357
 358 Mon Mar  2 13:34:08 1998  Fred Fish  <fnf@cygnus.com>
 359
 360         * d30v-insns (do_repeat): Abort repeat instructions that have
 361         a repeat count of zero.
 362
 363 Fri Feb 27 18:44:12 1998  Doug Evans  <devans@canuck.cygnus.com>
 364
 365         * sim-calls.c (sim_open): Update call to sim_add_option_table.
 366
 367 Thu Feb 26 18:34:31 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 368
 369         * sim-calls.c (sim_info): Delete.
 370
 371 Wed Feb 25 14:44:58 1998  Michael Meissner  <meissner@cygnus.com>
 372
 373         * d30v-insns (mvtsys): If moving to EIT_VB register, and with
 374         valid bits.  Optimize code somewhat.
 375
 376         * cpu.h (eit_vector_base_cr): New CR we need to special case.
 377         (EIT_VALID): Valid bits for EIT_VB register.
 378
 379         * d30v-insns (mv{f,t}sys): When moving to/from PSWH, the value is
 380         in the low 16 bits of the register.
 381
 382         * d30v-insns (do_sra): Use a common WRITE32_QUEUE to write back
 383         results.
 384         (do_sr{a,l}h): Do shift in 32 bits, only truncate when writing
 385         result back to the registers.
 386
 387 Tue Feb 24 18:09:52 1998  Fred Fish  <fnf@cygnus.com>
 388
 389         * Makefile.in (tmp-igen): Use -G gen-zero-r0 option to force
 390         r0 to always be zero.
 391         * cpu.h (GPR_SET): Define.
 392
 393 Tue Feb 24 14:12:57 1998  Michael Meissner  <meissner@cygnus.com>
 394
 395         * d30v-insns (do_sath): Do saturation in 32 bits, before
 396         converting to 16.
 397         (sat{,2h,z,hp}): Use imm_5, not imm to get proper zero extend.
 398         (do_sath_p): Delete, no longer used.
 399         (sathp): Call do_sath, not do_sath_p.
 400
 401 Mon Feb 23 15:55:14 1998  Michael Meissner  <meissner@cygnus.com>
 402
 403         * d30v-insns (illegal,wrong_slot): Print \n after PC and before we
 404         call sim_engine_halt.
 405         (sr{a,l}hp): Implement missing instructions.
 406         (do_trap): Print high order PSW bits in human readable fashion.
 407         (do_{dbra{,i},dbsr{,i},djmp{,i},djsr{,i},repeat}): Set PSW bit RP.
 408
 409         * alu.h (PSW_SET_QUEUE): New macro to set PSW bits.
 410
 411         * engine.c (sim_engine_run): Check for RP bit being set, not RPT_C
 412         being > 0.  If RPT_C is decremented to 0, clear PSW RP bit.
 413
 414 Fri Feb 20 10:13:34 1998  Fred Fish  <fnf@cygnus.com>
 415
 416         * cpu.h (BASE_ADDRESS): Change from 0xfffff000 to 0xfffff020.
 417
 418 Tue Feb 17 12:39:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 419
 420         * sim-calls.c (sim_store_register, sim_fetch_register): Pass in
 421         length parameter.  Return -1.
 422
 423 Fri Feb  6 17:39:54 1998  Michael Meissner  <meissner@cygnus.com>
 424
 425         * d30v-insns (do_dbrai): Correct typo, use shift, not comparison.
 426
 427 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 428
 429         * configure: Regenerated to track ../common/aclocal.m4 changes.
 430
 431 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 432
 433         * configure: Regenerated to track ../common/aclocal.m4 changes.
 434
 435 Fri Jan 30 08:29:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 436
 437         * engine.c (sim_engine_run): Add parameter nr_cpus.
 438
 439 Fri Jan 30 17:09:37 1998  Michael Meissner  <meissner@cygnus.com>
 440
 441         * d30v-insns (jsrtzr): Check for register == 0, not != 0.
 442
 443 Wed Jan 21 17:52:04 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 444
 445         * engine.c (do_stack_swap): Make type of new_sp unsigned.
 446
 447 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
 448
 449         * configure: Regenerated to track ../common/aclocal.m4 changes.
 450
 451 Mon Jan  5 16:04:17 1998  Andrew Cagney  <cagney@sanguine.cygnus.com>
 452
 453         * sim-calls.c (sim_info): Call profile_print.
 454
 455         * sim-main.h: Enable instruction profiling.
 456
 457 Thu Dec 18 12:21:38 1997  Michael Meissner  <meissner@cygnus.com>
 458
 459         * alu.h (ALU{16,32}_END): Change setting PSW to only set the carry
 460         and overflow bits.  Don't look at the current value of PSW.
 461         (PSW_FLAG_SET_QUEUE): Only queue up setting the particular bit in
 462         question.  Don't look at the current value of PSW.
 463
 464         * d30v-insns: All instructions that set the PSW, will only queue
 465         up the particular bits in question that were set by the
 466         instruction.  Don't look at the current value of PSW.
 467
 468 Wed Dec 17 11:41:44 1997  Michael Meissner  <meissner@cygnus.com>
 469
 470         * cpu.h (PSW_VALID): Allow EA/DB to be set in the PSW.
 471         (DPSW_VALID): Like PSW_VALID, but it allows the DS bit to be set.
 472
 473         * engine.c (trace_alu32): When changing BPSW/DPSW, print the
 474         special PSW bits.
 475
 476         * d30v-insns (do_cmp_cc): Fix cmpps and cmpng.
 477         (do_cmp{,u}_cc): Print which cc value was used if not in switch
 478         statement.
 479         (do_cmpu_cc): Remove illegal cases CMPU{EQ,NE,PS,NG}.
 480         (mvtsys): When setting BPSW or DPSW, and with DPSW_VALID.
 481
 482 Tue Dec 16 18:17:26 1997  Michael Meissner  <meissner@cygnus.com>
 483
 484         * d30v-insns (mulx2h): Add missing instruction.  Complain if
 485         register is not even.
 486         (do_{add,sub}h_ppp): Get correct high/low values.  Also correctly
 487         handle short immediates.
 488         (do_ld{2w,4bh}): Don't load r0 if ra == 0.
 489
 490         * engine.c (d30v_interrupt_event): Remove unused variable
 491         (unqueue_writes): Ditto.
 492
 493 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 494
 495         * configure: Regenerated to track ../common/aclocal.m4 changes.
 496         * config.in: Ditto.
 497
 498 Sat Dec 13 23:40:17 1997  Michael Meissner  <meissner@cygnus.com>
 499
 500         * cpu.h (_write{32,64}): New structures for keeping track of
 501         queued writes to registers.
 502         (_sim_cpu): Add _write{32,64} structures.  Make is_delayed_call
 503         unsigned32 also.
 504         (WRITE{32,64}*): New macros for queueing up writes to registers.
 505
 506         * alu.h (ALU16_END): Take field that says whether we are setting
 507         the high or low half word.  Queue up changes to registers.
 508         (ALU32_END): Queue up changes to registers.
 509         (PSW_FLAG_SET_QUEUE): Like PSW_FLAG_SET, except queues it up.
 510
 511         * sim-main.h (do_stack_swap): Remove declaration.
 512
 513         * engine.c (do_stack_swap): Make static.
 514         (unqueue_writes): New function to unqueue all changes to 32 and 64
 515         bit registers in order.  Implement --trace-alu.  Reset high water
 516         marks for # of queued registers.  If PSW changed, possibly update
 517         stack pointer.
 518         (do_{long,2_short,parallel}): Unqueue register writes at the
 519         appropriate time.
 520
 521         * d30v-insns: Modify all insns to queue changes to registers,
 522         rather than do them immediately so that parallel instructions get
 523         the right values for inputs.  Rewrite 16 bit operations to be done
 524         in terms of masked 32 bit registers.  Don't call do_stack_swap any
 525         more here.
 526
 527 Thu Dec 11 10:06:02 1997  Michael Meissner  <meissner@cygnus.com>
 528
 529         * sim-calls.c (d30v_option_handler): Add support for --extmem-size
 530         to size external memory.
 531         (sim_open): Ditto.  Default if no --extmem-size option is 8 meg.
 532
 533 Wed Dec 10 01:08:24 1997  Jim Blandy  <jimb@zwingli.cygnus.com>
 534
 535         * d30v-insns (do_rot2h): Clip rotate amounts to four bits.  The
 536         upper bits, and the sign of the rotation amount, are red herrings.
 537         (do_sra, do_srl): Handle shifts greater than 32 bits.
 538         (do_srah, do_sral): Properly sign-extend value and shift amount.
 539         Handle shifts larger than 16 bits.
 540
 541 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
 542
 543         * configure: Regenerated to track ../common/aclocal.m4 changes.
 544
 545 Mon Dec  1 15:10:44 1997  Michael Meissner  <meissner@cygnus.com>
 546
 547         * d30v-insns (do_sub2h): For short instruction, correctly
 548         dupplicate lower 16 bits of immediate in upper 16 bits.
 549         (sat2z): Fix typo that ignored the upper half of the register.
 550         (do_satz): If < 0, set *ra to 0, if not call do_sat.
 551         (mvtsys): Before setting PSW, and with PSW_VALID.
 552
 553         * cpu.h (PSW_VALID): Mask for bits in PSW that is valid.
 554
 555 Mon Dec  1 15:05:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 556
 557         * d30v-insns (do_trap): Pacify GCC - correct type of %ld arg in
 558         printf, return dummy at end.
 559
 560 Mon Dec  1 15:05:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 561
 562         * d30v-insns (do_add, do_addh_ppp, do_adds): Replace ALU_ADD with
 563         ALU_ADDC.
 564         (do_addc): Replace ALU_SET_CARRY / ALU_ADD_CA with ALU_ADDC_C.
 565         (do_sub, do_subh_ppp): Replace ALU_SUB with ALU_SUBB.
 566         (do_subb): Replace ALU_SET_CARRY / ALU_SUB_CA with ALU_SUBB_B.
 567
 568         * alu.h (ALU16_END): Use ALU16_HAD_CARRY_BORROW instead of
 569         ALU16_HAD_CARRY.
 570         (ALU32_END): Ditto.
 571
 572         * sim-main.h (string.h, strings.h): Include.
 573
 574         * sim-calls.c: Delete inclusion of string.h and strings.h.
 575
 576 Sun Nov 30 17:29:25 1997  Michael Meissner  <meissner@cygnus.com>
 577
 578         * configure.in (--enable-sim-trapdump): New switch to control
 579         whether traps 0..30 dump out the registers or do the real trap.
 580         * configure: Regenerate.
 581
 582         * Makefile.in (SIM_EXTRA_CLFAGS): Add -DTRAPDUMP={0,1} if
 583         appropriate --{en,dis}able-sim-trapdump is done.
 584
 585         * sim-calls.c (OPTION_TRACE_CALL): Rename from OPTION_CALL_TRACE.
 586         (OPTION_TRACE_TRAPDUMP): New option for --trace-trapdump.
 587         (d30v_option_handler): Add support for --trace-trapdump.
 588         (d30v_options): Ditto.
 589         (sim_open): Ditto.
 590
 591         * d30v-insns (do_trap): Do register dump if --trace-trapdump and
 592         not the system call trap.  Remove support for calling old function
 593         sim_io_syscalls.
 594
 595 Sat Nov 29 18:54:55 1997  Michael Meissner  <meissner@cygnus.com>
 596
 597         * cpu.h (_sim_cpu): Add trace_call_p, trace_action fields.
 598         (TRACE_CALL_P): Non-zero if --trace-call.
 599         (TRACE_ACTION): Non-zero if there is a tracing action at the end
 600         of processing an instruction boundary.
 601         (TRACE_ACTION_{CALL,RETURN}): Bits to say trace call & return.
 602         (d30v_next_insn): Delete, now trace_action field in cpu state.
 603
 604         * cpu.c (d30v_next_insn): Delete, now trace_action field in cpu
 605         state.
 606         (return_occurred): Minimum saved register to check is now 34.
 607
 608         * engine.c (sim_engine_run): Change call tracing to use
 609         trace_action field in cpu state.
 610
 611         * sim-calls.c (d30v_option_handler): Handle d30v specific options.
 612         (d30v_options): D30V specific options.  Right now, --trace-call.
 613         (sim_open): Register d30v specific options.
 614
 615         * d30v-insns (call, return insns): Move --trace-debug call/return
 616         tracing action to d30v specific --trace-call option.
 617
 618 Fri Nov 28 20:12:48 1997  Michael Meissner  <meissner@cygnus.com>
 619
 620         * cpu.h (CREG): Rename from CR.
 621
 622         * d30v-insns (do_{addc,subb}): Explicitly import the carry bit.
 623         (do_trap): Use CREG, not CR.  Switch to using cb_syscall.
 624
 625 Thu Nov 27 19:25:43 1997  Michael Meissner  <meissner@cygnus.com>
 626
 627         * cpu.h (ACC): Define as short cut to accumulators.
 628
 629         * d30v-insns (do_rot): Delete explicit function, use ROT32 to do
 630         rotate instruction.
 631         (do_trap): Make trap 30 print out accumulators and first 16
 632         control registers as well.
 633         (do_avg): Sign extend to 64 bit type before doing add/shift.
 634         (do_avg2h): Sign extend 16 bit chunks before doing add/shift.
 635
 636 Wed Nov 26 15:20:24 1997  Doug Evans  <devans@canuck.cygnus.com>
 637
 638         * Makefile.in (NL_TARGET): Define.
 639
 640 Wed Nov 26 16:55:38 1997  Michael Meissner  <meissner@cygnus.com>
 641
 642         * cpu.h (d30v_next_insn): New flag for things we are supposed to
 643         trace between instruction words.
 644         ({call,return}_occurred): Remove index argument.
 645         (d30v_{read,write}_mem): Add declarations.
 646
 647         * cpu.c (d30v_next_insn): New flag for things we are supposed to
 648         trace between instruction words.
 649         ({call,return}_occurred): Remove index argument.
 650         (d30v_{read,write}_mem): New functions for reading/writing
 651         simulated memory in the new common system call support.
 652
 653         * d30v-insns: Set emacs C mode.
 654         (call/return insns): Set bit to trace call at instruction
 655         boundary, rather than doing it here.
 656         (do_trap): Set up to use new common system call interface.
 657
 658         * engine.c (sim_engine_run): If d30v_next_insn is non zero, do
 659         function call/return tracing.
 660
 661 Mon Nov 24 16:40:49 1997  Michael Meissner  <meissner@cygnus.com>
 662
 663         * d30v-insns (bnot): Correctly reset bit in question.
 664         (do_trap): Use common system call emulation support, rather than
 665         our home grown support.
 666
 667 Sun Nov 23 22:47:20 1997  Michael Meissner  <meissner@cygnus.com>
 668
 669         * d30v-insns (mvfacc): Immediate field is unsigned, allowing
 670         shifts of up to 63 to be encoded.  Also do shift signed, rather
 671         than unsigned.
 672
 673         * ic-d30v (IMM_6S): Add field for 6 bit unsigned constants.
 674
 675         * d30v-insns (cmpu): Short cmpu zero extends immediate, not sign
 676         extends.
 677
 678 Sat Nov 22 19:04:34 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 679
 680         * d30v-insns (illegal, wrong_slot): Replace SIGILL with
 681         SIM_SIGILL.
 682
 683         * sim-calls.c (signal.h): Do not include, replaced by
 684         sim-signal.h.
 685
 686         * sim-main.h (signal.h): Do not include, include sim-signal.h
 687         instead.
 688
 689 Fri Nov 21 09:33:54 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 690
 691         * cpu.c (call_occurred): Use ZALLOC instead of xmalloc.
 692         (return_occurred): Use zfree instead of free.
 693
 694 Wed Nov 19 13:28:09 1997  Michael Meissner  <meissner@cygnus.com>
 695
 696         * Makefile.in ({l,s}_{support,semantics}.o): Depend on the include
 697         files in $(ENGINE_H).
 698
 699         * d30v-insns (do_{add,addc,sub,subb}): ALU_{ADD,SUB}_CA now takes
 700         a VAL argument to add/subtract along with the carry.
 701
 702 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
 703
 704         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
 705
 706 Tue Nov 18 13:56:15 1997  Michael Meissner  <meissner@cygnus.com>
 707
 708         * d30v-insns (do_trap): Change to new system call numbers.  Add
 709         read emulation.
 710
 711 Mon Nov 17 14:43:45 1997  Michael Meissner  <meissner@cygnus.com>
 712
 713         * d30v-insns (mulx): Add mulx instruction.
 714
 715 Sun Nov 16 19:06:56 1997  Michael Meissner  <meissner@cygnus.com>
 716
 717         * cpu.c ({call,return}_occurred): New trace functions to mark
 718         function calls and returns and check whether all saved registers
 719         really were saved.
 720
 721         * cpu.h ({call,return}_occurred): Add declaration.
 722
 723         * d30v-insns ({bsr, jsr} patterns): Call call_occurred if
 724         --trace-debug to trace function calls.
 725         (jmp register pattern): If this is a jump r62 and --trace-debug,
 726         call return_occurred to trace function calls.
 727         (bsr{tnz,tzr}): Move setting r62 inside conditional against reg.
 728         (do_ld2w): Grab memory in 64-bit chunk, to check alignment.
 729         (do_st2w): Ditto.
 730
 731 Sat Nov 15 20:57:57 1997  Michael Meissner  <meissner@cygnus.com>
 732
 733         * d30v-insns: Undo changes from Nov. 11, allowing for odd register
 734         pairs, since the machine doesn't support such usage.  Trap on odd
 735         registers, rather than give a warning.  Keep do_src and do_trap
 736         changes.
 737
 738 Fri Nov 14 11:59:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 739
 740         * d30v-insns (do_trap): Pacify compiler warnings for printf calls.
 741
 742 Tue Nov 11 18:26:03 1997  Michael Meissner  <meissner@cygnus.com>
 743
 744         * d30v-insns (not_r63_reg): Rename from make_even_reg, only check
 745         for register being r63.  Change callers ld2{h,w}, ld4bh{,u}.
 746         (get_reg_not_r63): Rename from get_even_reg, and only check for
 747         register r63.  Change callers st2{w,h}, st4b.
 748         (do_src): Correct register pair for shift left.
 749         (do_trap): Temporarily make trap 30 print out the registers.
 750
 751 Tue Nov  4 08:51:22 1997  Michael Meissner  <meissner@cygnus.com>
 752
 753         * d30v-insns (do_trap): Make trap 31 be used for system calls.
 754         Add primitive write and exit system calls.
 755
 756         * Makefile (FILTER): New make variable to filter out known igen
 757         warnings.
 758         (tmp-igen): Add $(FILTER) on all 3 invocations of igen to filter
 759         out warnings that should be ignored by default.
 760
 761 Fri Oct 31 19:36:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 762
 763         * sim-calls.c (sim_open): Change EIT to memory region.
 764
 765 Fri Oct 17 16:51:31 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 766
 767         * alu.h (ALU16_END): Get result from ALU16_OVERFLOW_RESULT.
 768         (ALU32_END): Get result from ALU32_OVERFLOW_RESULT.
 769
 770 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 771
 772         * configure: Regenerated to track ../common/aclocal.m4 changes.
 773
 774 Mon Sep 29 15:23:35 1997  Stu Grossman  <grossman@babylon-5.cygnus.com>
 775
 776         * d30v-insns (MVFSYS MVTSYS):  Fix bit patterns so that these
 777         instructions get recognised.
 778
 779 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 780
 781         * configure: Regenerated to track ../common/aclocal.m4 changes.
 782
 783 Wed Sep 24 17:51:43 1997  Stu Grossman  <grossman@babylon-5.cygnus.com>
 784
 785         * Makefile.in (SIM_OBJS):  Add sim-break.o.
 786         * (INCLUDE_DEPS):  Add tconfig.h.
 787         * alu.h (MEM STORE):  Change to sim_core_read/write_unaligned to
 788         allow for trapping unaligned accesses.
 789         * cpu.h:  Define SIM_BREAKPOINT as syscall 5 for intrinsic breakpoint
 790         mechanism.
 791         * d30v-insn (short syscall):  Use syscall 5 for breakpoint insn.
 792         * sim-calls.c (sim_fetch_register sim_store_register):  Implement.
 793         * tconfig.in:  Define SIM_HAVE_BREAKPOINTS to enable intrinsic
 794         breakpoint mechanism.
 795
 796 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 797
 798         * configure: Regenerated to track ../common/aclocal.m4 changes.
 799
 800 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 801
 802         * Makefile.in (SIM_WARNINGS, SIM_ALIGNMENT, SIM_ENDIAN,
 803         SIM_HOSTENDIAN, SIM_RESERVED_BITS): Delete, moved to common.
 804         (SIM_EXTRA_CFLAGS): Update.
 805
 806 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 807
 808         * configure.in: Specify strict alignment.
 809         * configure: Regenerated to track ../common/aclocal.m4 changes.
 810
 811 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 812
 813         * configure: Regenerated to track ../common/aclocal.m4 changes.
 814
 815 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 816
 817         * configure: Regenerated to track ../common/aclocal.m4 changes.
 818
 819 Fri Sep 12 16:13:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 820
 821         * sim-calls.c (sim_open): Change memory to
 822         internal inst. RAM h'00000000-h'0000ffff (64KB)
 823         internal data RAM  h'20000000-h'20007fff (32KB)
 824         external RAM       h'80000000-h'803fffff (4MB)
 825         EIT                h'fffff000-h'ffffffff
 826
 827
 828 Thu Sep 11 08:59:34 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 829
 830         * Makefile.in (SIM_OBJS): Add sim-hrw.o module.
 831
 832         * sim-calls.c (sim_read): Delete. use sim-hrw.
 833         (sim_write): Delete, use sim-hrw.
 834
 835
 836 Tue Sep  9 01:36:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 837
 838         * ic-d30v (imm_5): Update nr args passed to LSMASKED.
 839
 840         * d30v-insns (do_sat, do_sath, do_sath_p, do_satz, do_satzh): Fix,
 841         computing the max sat value incorrectly.
 842
 843 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
 844
 845         * configure: Regenerated to track ../common/aclocal.m4 changes.
 846
 847 Fri Sep  5 09:15:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 848
 849         * d30v-insns (do_mac, do_macs, do_msub, do_mulxs): Use explicit
 850         type cast instead of SIGNED64 macro.
 851
 852 Thu Sep  4 10:28:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 853
 854         * Makefile.in (SIM_OBJS): Include sim-memopt.o module.
 855
 856         * sim-calls.c (sim_open): Pass zero modulo arg to sim_core_attach
 857         calls.
 858         (sim_open): If no memory, use memory commands to establish d30v
 859         ram.
 860         (d30v_option_handler): Delete, replased by sim-memopt.c.
 861         (sim_create_inferior): Call sim_module_init.
 862
 863         * sim-main.h (struct sim_state): Remove members eit_ram,
 864         sizeof_eit_ram, external_ram, baseof_external_ram,
 865         sizeof_external_ram. Using generic memory model instead.
 866
 867 Mon Sep  1 11:04:09 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 868
 869         * sim-calls.c (sim_open): Use sim_state_alloc.
 870
 871 Sat Aug 30 10:01:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 872
 873         * sim-main.h (INVALID_INSTRUCTION_ADDRESS): Define.
 874
 875         * engine.c (do_2_short): Compare with INVALID_INSTRUCTION_ADDRESS
 876         not -1.
 877
 878 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 879
 880         * configure: Regenerated to track ../common/aclocal.m4 changes.
 881         * config.in: Ditto.
 882
 883 Wed Aug 27 13:41:54 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 884
 885         * sim-calls.c (sim_open): Add call to sim_analyze_program, update
 886         call to sim_config.
 887
 888         * sim-calls.c (sim_create_inferior): Add ABFD argument.
 889         Initialize CPU registers including PC.
 890         (sim_load): Delete, using sim-hload.
 891
 892         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
 893
 894 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 895
 896         * configure: Regenerated to track ../common/aclocal.m4 changes.
 897         * config.in: Ditto.
 898
 899 Mon Aug 25 15:41:44 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 900
 901         * sim-calls.c (sim_open): Add ABFD argument.
 902         (sim_open): Move sim_config call to after sim_parse_args.
 903         (sim_open): Check sim_config return status.
 904
 905 Fri Aug 22 16:38:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 906
 907         * d30v-insns (do_subh_ppp): Correct name, was do_sub_ppp.
 908         (do_subh_ppp): Compute rc=rb-src instead of src-rb.
 909         (do_addh_ppp): Ditto.
 910
 911 Fri Jun 27 14:43:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 912
 913         * d30v-insns (mvfsys, mvtsys): Switch instruction encodings, was
 914         wrong.  Update handling of PSW[DS] bit.
 915         (dbt): Fix debug trap address.
 916
 917         * cpu.h (NR_CONTROL_REGISTERS): Allow the full 64 registers.
 918
 919 Tue Jun 24 12:41:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 920
 921         * d30v-insns (DBT, RTD): Swap the stack after updating the PSW.
 922         (DBT): Use PSW_SET to update PSW.
 923
 924         * alu.h (ALU16_END): Check for 16 bit carry and not 32 bit.
 925
 926 Tue Jun 24 12:16:14 1997  Andrew Cagney  <cagney@b2.cygnus.com>
 927
 928         * d30v-insns (ppp, ccc, pp, XX, p): Update format functions so
 929         that they are of class %s instead of class function.
 930
 931 Tue Jun 10 12:26:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 932
 933         * sim-main.h (engine_error, engine_restart, engine_halt,
 934         engine_run_until_stop): Delete prototypes.  Functions deleted
 935         earlier.
 936         (do_interrupt_handler): Add prototype.
 937         (sim_state): Add pending_event member to struct.
 938
 939         * sim-calls.c (sim_open): Configure interrupt handler.
 940         * engine.c (d30v_interrupt_event): New function.  Deliver external
 941         interrupt to processor.
 942
 943         * d30v-insns (do_stack_swap): Move function from here.
 944         * engine.c (do_stack_swap): To here.
 945         * sim-main.h (do_stack_swap): Add prototype.
 946
 947         * cpu.h (registers): Change current_sp to an int.
 948         * d30v-insn (do_stack_swap): Update.
 949
 950 Thu Jun  5 12:54:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 951
 952         * d30v-insns (LD*, ST*): Disasemble XX == 0 as immed version of
 953         instruction.
 954         (str_XXX): Fix case of XX == 3 - return "-".
 955
 956 Thu Jun  5 12:54:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 957
 958         * engine.c (sim_engine_run): Issuing L->R and R->L instructions in
 959         wrong order.
 960
 961         * d30v-insn (CMPUcc imm long): With of RB field should be 6 not
 962         three.
 963         (MUL, MUL2H, MULHX): X field 01 instead of 10.
 964
 965 Thu Jun  5 12:54:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 966
 967         * d30v-insns (mvtsys): Don't modify DS bit when writing to PSW.
 968         (dbt, rtd): New instructions.
 969
 970         * cpu.h (NR_CONTROL_REGISTERS): Now 15.
 971         (debug_program_status_word_cr, debug_program_counter_cr): Add
 972         debug control registers. Renumber other control registers.
 973         (PSW_DS): New PSW bit.
 974         (DPC, DPSW): Define.
 975
 976 Wed May 28 13:45:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 977
 978         * engine.c (sim_engine_run): Check the event queue on every cycle.
 979
 980         * sim-calls.c (sim_size): Delete.
 981         (sim_do_command): Call sim_args_command.
 982         (sim_open): Move eit_ram and sizeof_eit_ram to sim_state struct.
 983         (simulation): Delete global now depend on sd argument.
 984         (sim_open): Initialize sim-watch.
 985         (d30v_option_handler): New function, parse mem-size argument.
 986
 987 Tue May 27 14:03:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 988
 989         * sim-calls.c (sim_set_callbacks): Delete.
 990         (sim_write): Pass NULL cpu arg to sim_core_write_buffer.
 991
 992         * engine.c (engine_init): Delete.  Handled in sim_open.
 993         (engine_create): Ditto.
 994
 995 Tue May 20 10:15:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 996
 997         * sim-calls.c (sim_open): Add callback argument.
 998         (sim_set_callbacks): Delete SIM_DESC argument.
 999
1000 Mon May 19 14:59:32 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1001
1002         * sim-calls.c (sim_open): Set the sim.base magic number.
1003
1004 Fri May 16 15:25:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1005
1006         * d30v-insns: Replace engine_error with common sim_engine_abort.
1007         * cpu.c (is_condition_ok, is_wrong_slot): Ditto.
1008
1009         * engine.c (engine_run_until_stop): Rename this.
1010         (sim_engine_run): To this. Simplify - most moved to common.
1011
1012         * sim-calls.c (sim_stop_reason, sim_resume, sim_stop):
1013         Delete. Replaced by common code.
1014
1015         * engine.c (engine_error, engine_restart, engine_halt): Ditto.
1016
1017         * sim-main.h (SIM_ENGINE_RESTART_HOOK, SIM_ENGINE_HALT_HOOK):
1018         Define as NOPs.
1019
1020 Mon May  5 23:05:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1021
1022         * alu.h (IMEM, MEM, STORE): Update to reflect changes to core in
1023         ../common.
1024         * sim-calls.c (sim_open): Ditto.
1025
1026         * alu.h, cpu.h, cpu.c, d30v-insn, dc-short: Clean up copyright
1027         notice.
1028
1029 Fri May  2 12:01:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1030
1031         * sim-calls.c (sim-options.h, sim-utils.h): Include.
1032         * Makefile.in (sim-calls.o): Add dependencies.
1033
1034         * d30v-insns (address_word): Remove cia argument from support
1035         functions, igen now does this automatically.
1036
1037         * Makefile.in (tmp-igen): Include line number information in
1038         generated files.
1039
1040         * sim-main.h (SIM_DESC): Remove sim_events and sim_core, moved to
1041         simulator base type sim_state_base.
1042         (sim-core.h, sim-events.h, sim-io.h): Replace with #include
1043         "sim-base.h".
1044
1045         * sim-main.h (sim_state): Track recomendations in common
1046         directory.
1047         * cpu.h (sim_cpu): Ditto.
1048         * engine.c (do_2_short, do_parallel): Ditto.
1049         * cpu.h (GPR): Ditto.
1050         * alu.h (MEM, IMEM, STORE): Ditto.
1051         * cpu.c (is_wrong_slot): Ditto.
1052         * ic-d30v (Aa, Ab): Ditto.
1053
1054 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
1055
1056         * configure: Regenerated to track ../common/aclocal.m4 changes.
1057         * Makefile.in (SIM_OBJS): Add sim-module.o, sim-profile.o.
1058         * sim-calls.c (sim_open): Call sim_module_uninstall if argument
1059         parsing fails.  Call sim_post_argv_init.
1060         (sim_close): Call sim_module_uninstall.
1061
1062 Fri Apr 18 13:44:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1063
1064         * sim-calls.c (sim_stop): New function.
1065
1066 Thu Apr 17 02:57:55 1997  Doug Evans  <dje@canuck.cygnus.com>
1067
1068         * Makefile.in (SIM_OBJS): Add sim-load.o, sim-options.o, sim-trace.o.
1069         (SIM_EXTRA_{LIBS,LIBDEPS,ALL,INSTALL}): Delete.
1070         (SIM_RUN_OBJS): Change from run.o to nrun.o.
1071         * cpu.h (sim_cpu): New member base.  Delete members trace, sd.
1072         (cpu_traces): Delete.
1073         * engine.c (engine_init): Set backlink from cpu to state.
1074         * sim-calls.c: #include bfd.h.
1075         (sim_open): Set STATE_OPEN_KIND.  Call sim_pre_argv_init,
1076         sim_parse_args.
1077         (sim_load): Return SIM_RC.  New arg abfd.
1078         Call sim_load_file to load file into simulator.
1079         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
1080         (sim_trace): Delete.
1081         * sim-main.h (struct sim_state): sim_state_base is typedef now.
1082         (STATE_CPU): Define.
1083
1084 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1085
1086         * configure: Regenerated to track ../common/aclocal.m4 changes.
1087         * config.in: Ditto.
1088
1089 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
1090
1091         * Makefile.in (SIM_EXTRA_DEPS): Define.
1092         (SIM_OBJS): Add sim-utils.o.
1093         (SIM_GEN): Delete tmp-common.
1094         (SIM_EXTRA_CLEAN): Delete clean-common.
1095         (BUILT_SRC_FROM_COMMON): Moved to ../common/Make-common.in.
1096         (tmp-common,clean-common): Delete.
1097         (ENGINE_H): sim-state.h renamed to sim-main.h.
1098         (clean-igen): Delete tmp-insns.
1099
1100         * cpu.c: sim-state.h renamed to sim-main.h.
1101         * engine.c: Likewise.
1102         * sim-calls.c: Likewise.
1103         (zalloc,zfree): Moved to ../common/sim-utils.c.
1104         * sim-main.h: Renamed from sim-state.h.
1105
1106         * sim-calls.c (sim_open): New arg `kind'.
1107
1108         * configure: Regenerated to track ../common/aclocal.m4 changes.
1109
1110 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1111
1112         * configure: Regenerated to track ../common/aclocal.m4 changes.
1113
1114 Wed Apr  2 11:13:15 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1115
1116         * Makefile.in (SIM_OBJS): Link in the recently added sim-config.o
1117
1118         * engine.c (current_target_byte_order, current_host_byte_order,
1119         current_environment, current_alignment, current_floating_point,
1120         current_model_issue, current_stdio): Delete, moved to
1121         ../common/sim-config.c
1122
1123 Mon Mar 24 14:50:30 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1124
1125         * d30v-insns (do_ldw): Load 4 bytes not 2.
1126         (do_incr, LD*, ST*): Increment register not its value.
1127
1128 Mon Mar 24 09:59:53 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1129
1130         * cpu.c (is_wrong_slot): Ditto.
1131         (is_condition_ok): Ditto.
1132
1133         * sim-calls.c (sim_trace): Ditto.
1134
1135         * engine.c (engine_init): Ditto.
1136         (do_2_short): Ditto.
1137         (engine_run_until_stop): Ditto.
1138
1139         * d30v-insns (void): Update. For functions, remove `SIM_DESC sd'
1140         and `cpu *processor' arguments as igen now handles this.
1141
1142         * cpu.h: Rename struct _cpu to struct _sim_cpu. Rename variable
1143         processor to cpu.
1144
1145         * sim-state.h: Update.
1146
1147 Fri Mar 21 12:52:12 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1148
1149         * d30v-insns (do_sat): Correct calculation of saturate lower
1150         bound.
1151         (do_sath): Ditto.
1152         (do_satzh, do_satz): Arguments should be signed.
1153
1154         * sim-calls.c (zalloc): Use malloc() instead of xmalloc() for
1155         moment.
1156         (filter_filename): Drop.
1157
1158         * cpu.h (is_wrong_slot): Correct declaration name - was
1159         is_valid_slot.
1160
1161         * engine.c (do_parallel): Plicate GCC.
1162         (engine_error): Ditto.
1163         (engine_run_until_stop): Ditto.
1164         * cpu.c (is_wrong_slot): Ditto.
1165         (is_condition_ok): Ditto.
1166         * sim-calls.c (sim_size): Ditto.
1167         (sim_read): Ditto.
1168         (sim_trace): Ditto.
1169
1170         * engine.h, engine.c (engine_create): Add missing prototype to
1171         header file.  Clean up missing variables.
1172
1173         * configure.in (unistd.h, string.h, strings.h): Configure in.
1174         * configure, config.in: Rebuild.
1175
1176 Thu Mar 20 19:40:20 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1177
1178         * d30v-insns (void): Provide a second emul instruction using a
1179         branch prefix.
1180
1181 Tue Mar 18 20:51:42 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1182
1183         * d30v-insn (do_sat*): Pass all necessary args.
1184
1185 Tue Mar 18 18:49:10 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1186
1187         * d30v-insns (SAT*): Issue warning when bit overflow.
1188         (EMUL): Exit with GPR[2] not 2.
1189
1190 Tue Mar 18 14:24:09 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1191
1192         * sim-state.h: New file rename engine.h.
1193         (sim_state): Rename engine strut to sim_state, rename events and
1194         core members.
1195
1196         * engine.c: Update.
1197         * cpu.h, cpu.c: Ditto.
1198         * alu.h: Ditto.
1199         * d30v-insns: Ditto.
1200         * sim-calls.c: Ditto.
1201
1202         * Makefile.in (sim-*.c): Moved to ../common.
1203
1204 Tue Mar 18 10:39:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1205
1206         * d30v-insns (do_mac): Adding wrong register.
1207         (do_macs): Ditto.
1208         (do_msub): Ditto.
1209         (do_msubs): Ditto.
1210
1211         * ic-d30v: Put back definitions of RaH, RaL, et.al.
1212         (do_sra2h, do_srah): Use.
1213         (do_srl2h, do_srlh): Use.
1214
1215         * d30v-insns (SAT, SAT2H, SATp, SATZ): Implement saturate.
1216
1217 Tue Mar 18 03:01:25 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1218
1219         * d30v-insns: Specify wild insted of reserved bits.
1220         (void):
1221
1222 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1223
1224         * configure: Re-generate.
1225
1226 Mon Mar 17 14:35:37 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1227
1228         * Makefile.in (SIM_EXTRA_CFLAGS), configure.in: Include SIM_*
1229         options. Allow RESERVED_BITS to be configured.
1230         * configure: Re-generate.
1231
1232         * Makefile.in (sim-*.h): Drop, not needed.
1233         (sim-*.c): Make each explicit so that they automatically update.
1234
1235 Sat Mar 15 02:34:30 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1236
1237         * ic-d30v (imm long): Incorrect calculation.
1238
1239         * d30v-insns (EMUL): Finish exit, write-string emul-call.
1240
1241         * sim-calls.c (sim_trace): Have sim-trace enable basic instruction
1242         tracing.
1243
1244 Sat Mar 15 02:10:31 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1245
1246         * configure.in: Enable common options - endian, inline and
1247         warnings.
1248         * configure: Regenerate.
1249
1250 Fri Mar 14 16:11:50 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1251
1252         * Makefile.in (cpu.o): Update dependencies.
1253         * cpu.c (is_condition_ok): Update PSW bit manipulations.
1254
1255 Fri Mar 14 12:49:20 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1256
1257         * configure.in: Autoconfig m4
1258         * configure: Regenerate.
1259
1260         * Makefile.in: Use m4 to preprocess d30v-insns.
1261         * d30v-insn: Adjust.
1262
1263 Thu Mar 13 12:44:54 1997  Doug Evans  <dje@canuck.cygnus.com>
1264
1265         * sim-calls.c (sim_open): New SIM_DESC result.  Argument is now
1266         in argv form.
1267         (other sim_*): New SIM_DESC argument.
1268
1269 Wed Mar 12 19:05:45 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1270
1271         * sim-calls.c (sim_open): Create all the d30v RAM blocks.
1272
1273         * engine.c (engine_run_until_stop): Handle delayed subroutine
1274         call.
1275         * d30v-insn: Ditto.
1276
1277         * ic-d30v: For Rb and Rc always return the value and not the
1278         equation.
1279         * d30v-insn: Use.
1280
1281         * ic-d30v (val_Ra): Returns 0 or RA.
1282         * d30v-insn: Use.
1283
1284         * d30v-insn (make_even_reg, get_even_reg): New functions. Force
1285         the register index to be even, issusing a warning if it was not.
1286         (LD*, ST*): Use.
1287
1288 Wed Mar 12 14:57:26 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1289
1290         * d30v-insns (do_trap): Implement TRAP instruction.
1291
1292         * alu.h (PSW_F, PSW_FLAG_VAL, PSW_FLAG_SET): New macro, map flag
1293         onto PSW bit.
1294         * ic-d30v: Drop F* expressions.
1295         * d30v-insn: Use more explicit PSW_FLAG_ ops.
1296         * cpu.h (PSW_*): Redo PSW bit values.
1297         * alu.h (ALU*_END): Update. Fix setting of overflow - logic was
1298         backwards.
1299
1300         * d30v-insn (MVFSYS, MVTSYS): Implement.
1301         * cpu.h (PSWH, PSWL): New macros for high, low word of PSW.
1302
1303 Wed Mar 12 14:12:11 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1304
1305         * cpu.h (RPT_IS_CALL): New macro for processor field
1306         is_delayed_call.  That in turn used as a flag to indicate if a
1307         delayed branch or delayed call is to occure.
1308         * d30v-insns (do_dbra): Set/clear RPT_IS_CALL;
1309         (do_dbrai): Ditto.
1310         (do_dbsr): Ditto.
1311         (do_dbsr): Ditto.
1312         (do_djmp): Ditto.
1313         (do_djmpi): Dotto.
1314         (do_djsr): Ditto.
1315         (do_djsri): Ditto.
1316         (void):
1317
1318         * d30v-insn (do_incr): Finish - handle modulo registers.
1319
1320         * d30v-insns (CMPU): Include all possible compare
1321         operations. Issue a warning where op defined by the processor
1322         spec.
1323
1324 Wed Mar 12 13:55:55 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1325
1326         * d30v-insns: Add a new instruction class _EMUL and a new
1327         instruction EMUL that emulates a few basic IO operations.
1328
1329         * Makefile.in (tmp-igen): Filter in emul instructions.
1330
1331 Fri Mar  7 20:32:13 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1332
1333         * d30v-insns (void): Fill in the gaps.
1334
1335 Wed Feb 26 09:31:10 1997  Andrew Cagney  <cagney@kremvax.tpgi.com.au>
1336
1337         * Makefile.in (tmp-igen): Include ic-d30v in dependencies.
1338
1339         * ic-d30v (cache): Update to use H_word, L_word added to
1340         sim-endian.h.
1341
1342 Tue Feb 25 15:26:51 1997  Andrew Cagney  <cagney@kremvax.tpgi.com.au>
1343
1344         * Makefile.in (tmp-igen): Correctly run $(MAKE).
1345
1346 Thu Feb 20 20:30:31 1997  Andrew Cagney  <cagney@critters.cygnus.com>
1347
1348         * Makefile.in (FROM_IGEN, FROM_COMMON): Make the igen generated
1349         files dependant on tmp-igen. Define ENGINE_H.
1350
1351 Sun Feb 16 16:42:48 1997  Andrew Cagney  <cagney@critters.cygnus.com>
1352
1353         * configure.in: New file - follow Doug Evans instructions.
1354         * Makefile.in: Ditto.
1355