sim/d30v/ic-d30v

   1 # OBSOLETE # Instruction cache rules
   2 # OBSOLETE #
   3 # OBSOLETE #   This file is part of the program psim.
   4 # OBSOLETE #
   5 # OBSOLETE #   Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
   6 # OBSOLETE #
   7 # OBSOLETE #   This program is free software; you can redistribute it and/or modify
   8 # OBSOLETE #   it under the terms of the GNU General Public License as published by
   9 # OBSOLETE #   the Free Software Foundation; either version 2 of the License, or
  10 # OBSOLETE #   (at your option) any later version.
  11 # OBSOLETE #
  12 # OBSOLETE #   This program is distributed in the hope that it will be useful,
  13 # OBSOLETE #   but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 # OBSOLETE #   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 # OBSOLETE #   GNU General Public License for more details.
  16 # OBSOLETE #
  17 # OBSOLETE #   You should have received a copy of the GNU General Public License
  18 # OBSOLETE #   along with this program; if not, write to the Free Software
  19 # OBSOLETE #   Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  20 # OBSOLETE #
  21 # OBSOLETE compute:RA:RA::
  22 # OBSOLETE compute:RA:Ra:signed32 *:(&GPR[RA])
  23 # OBSOLETE compute:RA:RaH:signed16 *:AH2_4(Ra)
  24 # OBSOLETE compute:RA:RaL:signed16 *:AL2_4(Ra)
  25 # OBSOLETE compute:RA:val_Ra:signed32:(RA == 0 ? 0 : GPR[RA])
  26 # OBSOLETE #
  27 # OBSOLETE compute:RB:RB::
  28 # OBSOLETE compute:RB:Rb:signed32:(RB == 0 ? 0 : GPR[RB])
  29 # OBSOLETE compute:RB:RbU:unsigned32:(RB == 0 ? 0 : GPR[RB])
  30 # OBSOLETE compute:RB:RbH:signed16:VH2_4(Rb)
  31 # OBSOLETE compute:RB:RbL:signed16:VL2_4(Rb)
  32 # OBSOLETE compute:RB:RbHU:unsigned16:VH2_4(Rb)
  33 # OBSOLETE compute:RB:RbLU:unsigned16:VL2_4(Rb)
  34 # OBSOLETE #
  35 # OBSOLETE compute:RC:RC::
  36 # OBSOLETE compute:RC:Rc:signed32:(RC == 0 ? 0 : GPR[RC])
  37 # OBSOLETE compute:RC:RcU:unsigned32:(RC == 0 ? 0 : GPR[RC])
  38 # OBSOLETE compute:RC:RcH:signed16:VH2_4(Rc)
  39 # OBSOLETE compute:RC:RcL:signed16:VL2_4(Rc)
  40 # OBSOLETE #
  41 # OBSOLETE #
  42 # OBSOLETE compute:IMM_6S:IMM_6S::
  43 # OBSOLETE compute:IMM_6S:imm:signed32:SEXT32(IMM_6S, 32 - 6)
  44 # OBSOLETE # NB - for short imm[HL] are the same value
  45 # OBSOLETE compute:IMM_6S:immHL:signed32:((imm << 16) | MASKED32(imm, 16, 31))
  46 # OBSOLETE compute:IMM_6S:immH:signed32:imm
  47 # OBSOLETE compute:IMM_6S:immL:signed32:imm
  48 # OBSOLETE compute:IMM_6S:imm_6:signed32:IMM_6S
  49 # OBSOLETE compute:IMM_6S:imm_5:signed32:LSMASKED32(IMM_6S, 4, 0)
  50 # OBSOLETE compute:IMM_6S:imm_6u:unsigned32:(IMM_6S & 0x3f)
  51 # OBSOLETE #
  52 # OBSOLETE compute:RC:pcdisp:signed32:(Rc & ~0x7)
  53 # OBSOLETE compute:RC:pcaddr:signed32:pcdisp
  54 # OBSOLETE #
  55 # OBSOLETE compute:IMM_18S:IMM_18S::
  56 # OBSOLETE compute:IMM_18S:pcdisp:signed32:(SEXT32(IMM_18S, 32 - 18) << 3)
  57 # OBSOLETE compute:IMM_18S:pcaddr:signed32:pcdisp
  58 # OBSOLETE compute:IMM_12S:IMM_12S::
  59 # OBSOLETE compute:IMM_12S:pcdisp:signed32:(SEXT32(IMM_12S, 32 - 12) << 3)
  60 # OBSOLETE compute:IMM_12S:pcaddr:signed32:pcdisp
  61 # OBSOLETE #
  62 # OBSOLETE compute:IMM_8L:IMM_8L::
  63 # OBSOLETE compute:IMM_18L:IMM_18L::
  64 # OBSOLETE compute:IMM_6L:IMM_6L::
  65 # OBSOLETE compute:IMM_6L:imm:signed32:((((IMM_6L << 8) | IMM_8L) << 18) | IMM_18L)
  66 # OBSOLETE compute:IMM_6L:immHL:signed32:imm
  67 # OBSOLETE compute:IMM_6L:immH:signed32:EXTRACTED32(imm, 0, 15)
  68 # OBSOLETE compute:IMM_6L:immL:signed32:EXTRACTED32(imm, 16, 31)
  69 # OBSOLETE compute:IMM_6L:pcdisp:signed32:(imm & ~0x7)
  70 # OBSOLETE compute:IMM_6L:pcaddr:signed32:pcdisp
  71 # OBSOLETE #
  72 # OBSOLETE #
  73 # OBSOLETE compute:SRC_6:SRC_6::
  74 # OBSOLETE compute:SRC_6:src:unsigned32:(XX == 2 ? SEXT32(SRC_6, 32 - 6) : GPR[SRC_6])
  75 # OBSOLETE #
  76 # OBSOLETE #
  77 # OBSOLETE compute:AA:AA::
  78 # OBSOLETE compute:AA:Aa:unsigned64*:((CPU)->regs.accumulator + AA)
  79 # OBSOLETE compute:AB:AB::
  80 # OBSOLETE compute:AB:Ab:unsigned64*:((CPU)->regs.accumulator + AB)