1 /* This file is part of SIS (SPARC instruction simulator)
3 Copyright (C) 1995-2017 Free Software Foundation, Inc.
4 Contributed by Jiri Gaisler, European Space Agency
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19 /* This file implements the interface between the host and the simulated
20 FPU. IEEE trap handling is done as follows:
21 1. In the host, all IEEE traps are masked
22 2. After each simulated FPU instruction, check if any exception
23 occured by reading the exception bits from the host FPU status
24 register (get_accex()).
25 3. Propagate any exceptions to the simulated FSR.
26 4. Clear host exception bits.
33 /* This routine should return the accrued exceptions */
39 fexc
= fetestexcept (FE_ALL_EXCEPT
);
41 if (fexc
& FE_INEXACT
)
43 if (fexc
& FE_DIVBYZERO
)
45 if (fexc
& FE_UNDERFLOW
)
47 if (fexc
& FE_OVERFLOW
)
49 if (fexc
& FE_INVALID
)
54 /* How to clear the accrued exceptions */
58 feclearexcept (FE_ALL_EXCEPT
);
61 /* How to map SPARC FSR onto the host */
71 fround
= FE_TONEAREST
;
74 fround
= FE_TOWARDZERO
;
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