2 * This file is part of SIS.
4 * ERC32SIM, SPARC instruction simulator. Copyright (C) 1995 Jiri Gaisler,
5 * European Space Agency
7 * This program is free software; you can redistribute it and/or modify it under
8 * the terms of the GNU General Public License as published by the Free
9 * Software Foundation; either version 2 of the License, or (at your option)
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc., 675
19 * Mass Ave, Cambridge, MA 02139, USA.
27 /* Maximum events in event queue */
30 /* Maximum # of floating point queue */
33 /* Maximum # of breakpoints */
41 /* type definitions */
43 typedef short int int16
; /* 16-bit signed int */
44 typedef unsigned short int uint16
; /* 16-bit unsigned int */
45 typedef int int32
; /* 32-bit signed int */
46 typedef unsigned int uint32
; /* 32-bit unsigned int */
47 typedef float float32
; /* 32-bit float */
48 typedef double float64
; /* 64-bit float */
52 float64 fd
[16]; /* FPU registers */
53 #ifdef HOST_LITTLE_ENDIAN_FLOAT
62 uint32 fpq
[FPUQN
* 2];
69 uint32 fpu_pres
; /* FPU present (0 = No, 1 = Yes) */
71 uint32 psr
; /* IU registers */
80 uint32 trap
; /* Current trap type */
81 uint32 annul
; /* Instruction annul */
82 uint32 data
; /* Loaded data */
83 uint32 inst
; /* Current instruction */
84 uint32 asi
; /* Current ASI */
85 uint32 err_mode
; /* IU error mode */
89 uint32 bpts
[BPT_MAX
]; /* Breakpoints */
91 uint32 ltime
; /* Load interlock time */
92 uint32 hold
; /* IU hold cycles in current inst */
93 uint32 fhold
; /* FPU hold cycles in current inst */
94 uint32 icnt
; /* Instruction cycles in curr inst */
96 uint32 histlen
; /* Trace history management */
98 struct histype
*histbuf
;
99 float32 freq
; /* Simulated processor frequency */
110 uint32 pwdtime
; /* Cycles in power-down mode */
111 uint32 nstore
; /* Number of load instructions */
112 uint32 nload
; /* Number of store instructions */
113 uint32 nannul
; /* Number of annuled instructions */
114 uint32 nbranch
; /* Number of branch instructions */
115 uint32 ildreg
; /* Destination of last load instruction */
116 uint32 ildtime
; /* Last time point for load dependency */
118 int rett_err
; /* IU in jmpl/restore error state (Rev.0) */
131 struct evcell
*freeq
;
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