sim/fr30/fr30-sim.h

   1 /* collection of junk waiting time to sort out
   2    Copyright (C) 1998, 1999 Free Software Foundation, Inc.
   3    Contributed by Cygnus Solutions.
   4
   5 This file is part of the GNU Simulators.
   6
   7 This program is free software; you can redistribute it and/or modify
   8 it under the terms of the GNU General Public License as published by
   9 the Free Software Foundation; either version 2, or (at your option)
  10 any later version.
  11
  12 This program is distributed in the hope that it will be useful,
  13 but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 GNU General Public License for more details.
  16
  17 You should have received a copy of the GNU General Public License along
  18 with this program; if not, write to the Free Software Foundation, Inc.,
  19 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
  20
  21 #ifndef FR30_SIM_H
  22 #define FR30_SIM_H
  23
  24 /* gdb register numbers */
  25 #define PC_REGNUM       16
  26 #define PS_REGNUM       17
  27 #define TBR_REGNUM      18
  28 #define RP_REGNUM       19
  29 #define SSP_REGNUM      20
  30 #define USP_REGNUM      21
  31 #define MDH_REGNUM      22
  32 #define MDL_REGNUM      23
  33
  34 extern BI fr30bf_h_sbit_get_handler (SIM_CPU *);
  35 extern void fr30bf_h_sbit_set_handler (SIM_CPU *, BI);
  36
  37 extern UQI fr30bf_h_ccr_get_handler (SIM_CPU *);
  38 extern void fr30bf_h_ccr_set_handler (SIM_CPU *, UQI);
  39
  40 extern UQI fr30bf_h_scr_get_handler (SIM_CPU *);
  41 extern void fr30bf_h_scr_set_handler (SIM_CPU *, UQI);
  42
  43 extern UQI fr30bf_h_ilm_get_handler (SIM_CPU *);
  44 extern void fr30bf_h_ilm_set_handler (SIM_CPU *, UQI);
  45
  46 extern USI fr30bf_h_ps_get_handler (SIM_CPU *);
  47 extern void fr30bf_h_ps_set_handler (SIM_CPU *, USI);
  48
  49 extern SI fr30bf_h_dr_get_handler (SIM_CPU *, UINT);
  50 extern void fr30bf_h_dr_set_handler (SIM_CPU *, UINT, SI);
  51 \f
  52 #define GETTWI GETTSI
  53 #define SETTWI SETTSI
  54 \f
  55 /* Hardware/device support.
  56    ??? Will eventually want to move device stuff to config files.  */
  57
  58 /* Special purpose traps.  */
  59 #define TRAP_SYSCALL    10
  60 #define TRAP_BREAKPOINT 9
  61
  62 /* Support for the MCCR register (Cache Control Register) is needed in order
  63    for overlays to work correctly with the scache: cached instructions need
  64    to be flushed when the instruction space is changed at runtime.  */
  65
  66 /* Cache Control Register */
  67 #define MCCR_ADDR 0xffffffff
  68 #define MCCR_CP 0x80
  69 /* not supported */
  70 #define MCCR_CM0 2
  71 #define MCCR_CM1 1
  72
  73 /* Serial device addresses.  */
  74 /* These are the values for the MSA2000 board.
  75    ??? Will eventually need to move this to a config file.  */
  76 #define UART_INCHAR_ADDR        0xff004009
  77 #define UART_OUTCHAR_ADDR       0xff004007
  78 #define UART_STATUS_ADDR        0xff004002
  79
  80 #define UART_INPUT_READY        0x4
  81 #define UART_OUTPUT_READY       0x1
  82
  83 /* Start address and length of all device support.  */
  84 #define FR30_DEVICE_ADDR        0xff000000
  85 #define FR30_DEVICE_LEN         0x00ffffff
  86
  87 /* sim_core_attach device argument.  */
  88 extern device fr30_devices;
  89
  90 /* FIXME: Temporary, until device support ready.  */
  91 struct _device { int foo; };
  92
  93 /* Handle the trap insn.  */
  94 USI fr30_int (SIM_CPU *, PCADDR, int);
  95
  96 #endif /* FR30_SIM_H */