1 /* Decode header for frvbf.
3 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
7 This file is part of the GNU simulators.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2, or (at your option)
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License along
20 with this program; if not, write to the Free Software Foundation, Inc.,
21 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
25 #ifndef FRVBF_DECODE_H
26 #define FRVBF_DECODE_H
28 extern const IDESC
*frvbf_decode (SIM_CPU
*, IADDR
,
29 CGEN_INSN_INT
, CGEN_INSN_INT
,
31 extern void frvbf_init_idesc_table (SIM_CPU
*);
32 extern void frvbf_sem_init_idesc_table (SIM_CPU
*);
33 extern void frvbf_semf_init_idesc_table (SIM_CPU
*);
35 /* Enum declaration for instructions in cpu family frvbf. */
36 typedef enum frvbf_insn_type
{
37 FRVBF_INSN_X_INVALID
, FRVBF_INSN_X_AFTER
, FRVBF_INSN_X_BEFORE
, FRVBF_INSN_X_CTI_CHAIN
38 , FRVBF_INSN_X_CHAIN
, FRVBF_INSN_X_BEGIN
, FRVBF_INSN_ADD
, FRVBF_INSN_SUB
39 , FRVBF_INSN_AND
, FRVBF_INSN_OR
, FRVBF_INSN_XOR
, FRVBF_INSN_NOT
40 , FRVBF_INSN_SDIV
, FRVBF_INSN_NSDIV
, FRVBF_INSN_UDIV
, FRVBF_INSN_NUDIV
41 , FRVBF_INSN_SMUL
, FRVBF_INSN_UMUL
, FRVBF_INSN_SLL
, FRVBF_INSN_SRL
42 , FRVBF_INSN_SRA
, FRVBF_INSN_SCAN
, FRVBF_INSN_CADD
, FRVBF_INSN_CSUB
43 , FRVBF_INSN_CAND
, FRVBF_INSN_COR
, FRVBF_INSN_CXOR
, FRVBF_INSN_CNOT
44 , FRVBF_INSN_CSMUL
, FRVBF_INSN_CSDIV
, FRVBF_INSN_CUDIV
, FRVBF_INSN_CSLL
45 , FRVBF_INSN_CSRL
, FRVBF_INSN_CSRA
, FRVBF_INSN_CSCAN
, FRVBF_INSN_ADDCC
46 , FRVBF_INSN_SUBCC
, FRVBF_INSN_ANDCC
, FRVBF_INSN_ORCC
, FRVBF_INSN_XORCC
47 , FRVBF_INSN_SLLCC
, FRVBF_INSN_SRLCC
, FRVBF_INSN_SRACC
, FRVBF_INSN_SMULCC
48 , FRVBF_INSN_UMULCC
, FRVBF_INSN_CADDCC
, FRVBF_INSN_CSUBCC
, FRVBF_INSN_CSMULCC
49 , FRVBF_INSN_CANDCC
, FRVBF_INSN_CORCC
, FRVBF_INSN_CXORCC
, FRVBF_INSN_CSLLCC
50 , FRVBF_INSN_CSRLCC
, FRVBF_INSN_CSRACC
, FRVBF_INSN_ADDX
, FRVBF_INSN_SUBX
51 , FRVBF_INSN_ADDXCC
, FRVBF_INSN_SUBXCC
, FRVBF_INSN_ADDI
, FRVBF_INSN_SUBI
52 , FRVBF_INSN_ANDI
, FRVBF_INSN_ORI
, FRVBF_INSN_XORI
, FRVBF_INSN_SDIVI
53 , FRVBF_INSN_NSDIVI
, FRVBF_INSN_UDIVI
, FRVBF_INSN_NUDIVI
, FRVBF_INSN_SMULI
54 , FRVBF_INSN_UMULI
, FRVBF_INSN_SLLI
, FRVBF_INSN_SRLI
, FRVBF_INSN_SRAI
55 , FRVBF_INSN_SCANI
, FRVBF_INSN_ADDICC
, FRVBF_INSN_SUBICC
, FRVBF_INSN_ANDICC
56 , FRVBF_INSN_ORICC
, FRVBF_INSN_XORICC
, FRVBF_INSN_SMULICC
, FRVBF_INSN_UMULICC
57 , FRVBF_INSN_SLLICC
, FRVBF_INSN_SRLICC
, FRVBF_INSN_SRAICC
, FRVBF_INSN_ADDXI
58 , FRVBF_INSN_SUBXI
, FRVBF_INSN_ADDXICC
, FRVBF_INSN_SUBXICC
, FRVBF_INSN_CMPB
59 , FRVBF_INSN_CMPBA
, FRVBF_INSN_SETLO
, FRVBF_INSN_SETHI
, FRVBF_INSN_SETLOS
60 , FRVBF_INSN_LDSB
, FRVBF_INSN_LDUB
, FRVBF_INSN_LDSH
, FRVBF_INSN_LDUH
61 , FRVBF_INSN_LD
, FRVBF_INSN_LDBF
, FRVBF_INSN_LDHF
, FRVBF_INSN_LDF
62 , FRVBF_INSN_LDC
, FRVBF_INSN_NLDSB
, FRVBF_INSN_NLDUB
, FRVBF_INSN_NLDSH
63 , FRVBF_INSN_NLDUH
, FRVBF_INSN_NLD
, FRVBF_INSN_NLDBF
, FRVBF_INSN_NLDHF
64 , FRVBF_INSN_NLDF
, FRVBF_INSN_LDD
, FRVBF_INSN_LDDF
, FRVBF_INSN_LDDC
65 , FRVBF_INSN_NLDD
, FRVBF_INSN_NLDDF
, FRVBF_INSN_LDQ
, FRVBF_INSN_LDQF
66 , FRVBF_INSN_LDQC
, FRVBF_INSN_NLDQ
, FRVBF_INSN_NLDQF
, FRVBF_INSN_LDSBU
67 , FRVBF_INSN_LDUBU
, FRVBF_INSN_LDSHU
, FRVBF_INSN_LDUHU
, FRVBF_INSN_LDU
68 , FRVBF_INSN_NLDSBU
, FRVBF_INSN_NLDUBU
, FRVBF_INSN_NLDSHU
, FRVBF_INSN_NLDUHU
69 , FRVBF_INSN_NLDU
, FRVBF_INSN_LDBFU
, FRVBF_INSN_LDHFU
, FRVBF_INSN_LDFU
70 , FRVBF_INSN_LDCU
, FRVBF_INSN_NLDBFU
, FRVBF_INSN_NLDHFU
, FRVBF_INSN_NLDFU
71 , FRVBF_INSN_LDDU
, FRVBF_INSN_NLDDU
, FRVBF_INSN_LDDFU
, FRVBF_INSN_LDDCU
72 , FRVBF_INSN_NLDDFU
, FRVBF_INSN_LDQU
, FRVBF_INSN_NLDQU
, FRVBF_INSN_LDQFU
73 , FRVBF_INSN_LDQCU
, FRVBF_INSN_NLDQFU
, FRVBF_INSN_LDSBI
, FRVBF_INSN_LDSHI
74 , FRVBF_INSN_LDI
, FRVBF_INSN_LDUBI
, FRVBF_INSN_LDUHI
, FRVBF_INSN_LDBFI
75 , FRVBF_INSN_LDHFI
, FRVBF_INSN_LDFI
, FRVBF_INSN_NLDSBI
, FRVBF_INSN_NLDUBI
76 , FRVBF_INSN_NLDSHI
, FRVBF_INSN_NLDUHI
, FRVBF_INSN_NLDI
, FRVBF_INSN_NLDBFI
77 , FRVBF_INSN_NLDHFI
, FRVBF_INSN_NLDFI
, FRVBF_INSN_LDDI
, FRVBF_INSN_LDDFI
78 , FRVBF_INSN_NLDDI
, FRVBF_INSN_NLDDFI
, FRVBF_INSN_LDQI
, FRVBF_INSN_LDQFI
79 , FRVBF_INSN_NLDQI
, FRVBF_INSN_NLDQFI
, FRVBF_INSN_STB
, FRVBF_INSN_STH
80 , FRVBF_INSN_ST
, FRVBF_INSN_STBF
, FRVBF_INSN_STHF
, FRVBF_INSN_STF
81 , FRVBF_INSN_STC
, FRVBF_INSN_RSTB
, FRVBF_INSN_RSTH
, FRVBF_INSN_RST
82 , FRVBF_INSN_RSTBF
, FRVBF_INSN_RSTHF
, FRVBF_INSN_RSTF
, FRVBF_INSN_STD
83 , FRVBF_INSN_STDF
, FRVBF_INSN_STDC
, FRVBF_INSN_RSTD
, FRVBF_INSN_RSTDF
84 , FRVBF_INSN_STQ
, FRVBF_INSN_STQF
, FRVBF_INSN_STQC
, FRVBF_INSN_RSTQ
85 , FRVBF_INSN_RSTQF
, FRVBF_INSN_STBU
, FRVBF_INSN_STHU
, FRVBF_INSN_STU
86 , FRVBF_INSN_STBFU
, FRVBF_INSN_STHFU
, FRVBF_INSN_STFU
, FRVBF_INSN_STCU
87 , FRVBF_INSN_STDU
, FRVBF_INSN_STDFU
, FRVBF_INSN_STDCU
, FRVBF_INSN_STQU
88 , FRVBF_INSN_STQFU
, FRVBF_INSN_STQCU
, FRVBF_INSN_CLDSB
, FRVBF_INSN_CLDUB
89 , FRVBF_INSN_CLDSH
, FRVBF_INSN_CLDUH
, FRVBF_INSN_CLD
, FRVBF_INSN_CLDBF
90 , FRVBF_INSN_CLDHF
, FRVBF_INSN_CLDF
, FRVBF_INSN_CLDD
, FRVBF_INSN_CLDDF
91 , FRVBF_INSN_CLDQ
, FRVBF_INSN_CLDSBU
, FRVBF_INSN_CLDUBU
, FRVBF_INSN_CLDSHU
92 , FRVBF_INSN_CLDUHU
, FRVBF_INSN_CLDU
, FRVBF_INSN_CLDBFU
, FRVBF_INSN_CLDHFU
93 , FRVBF_INSN_CLDFU
, FRVBF_INSN_CLDDU
, FRVBF_INSN_CLDDFU
, FRVBF_INSN_CLDQU
94 , FRVBF_INSN_CSTB
, FRVBF_INSN_CSTH
, FRVBF_INSN_CST
, FRVBF_INSN_CSTBF
95 , FRVBF_INSN_CSTHF
, FRVBF_INSN_CSTF
, FRVBF_INSN_CSTD
, FRVBF_INSN_CSTDF
96 , FRVBF_INSN_CSTQ
, FRVBF_INSN_CSTBU
, FRVBF_INSN_CSTHU
, FRVBF_INSN_CSTU
97 , FRVBF_INSN_CSTBFU
, FRVBF_INSN_CSTHFU
, FRVBF_INSN_CSTFU
, FRVBF_INSN_CSTDU
98 , FRVBF_INSN_CSTDFU
, FRVBF_INSN_STBI
, FRVBF_INSN_STHI
, FRVBF_INSN_STI
99 , FRVBF_INSN_STBFI
, FRVBF_INSN_STHFI
, FRVBF_INSN_STFI
, FRVBF_INSN_STDI
100 , FRVBF_INSN_STDFI
, FRVBF_INSN_STQI
, FRVBF_INSN_STQFI
, FRVBF_INSN_SWAP
101 , FRVBF_INSN_SWAPI
, FRVBF_INSN_CSWAP
, FRVBF_INSN_MOVGF
, FRVBF_INSN_MOVFG
102 , FRVBF_INSN_MOVGFD
, FRVBF_INSN_MOVFGD
, FRVBF_INSN_MOVGFQ
, FRVBF_INSN_MOVFGQ
103 , FRVBF_INSN_CMOVGF
, FRVBF_INSN_CMOVFG
, FRVBF_INSN_CMOVGFD
, FRVBF_INSN_CMOVFGD
104 , FRVBF_INSN_MOVGS
, FRVBF_INSN_MOVSG
, FRVBF_INSN_BRA
, FRVBF_INSN_BNO
105 , FRVBF_INSN_BEQ
, FRVBF_INSN_BNE
, FRVBF_INSN_BLE
, FRVBF_INSN_BGT
106 , FRVBF_INSN_BLT
, FRVBF_INSN_BGE
, FRVBF_INSN_BLS
, FRVBF_INSN_BHI
107 , FRVBF_INSN_BC
, FRVBF_INSN_BNC
, FRVBF_INSN_BN
, FRVBF_INSN_BP
108 , FRVBF_INSN_BV
, FRVBF_INSN_BNV
, FRVBF_INSN_FBRA
, FRVBF_INSN_FBNO
109 , FRVBF_INSN_FBNE
, FRVBF_INSN_FBEQ
, FRVBF_INSN_FBLG
, FRVBF_INSN_FBUE
110 , FRVBF_INSN_FBUL
, FRVBF_INSN_FBGE
, FRVBF_INSN_FBLT
, FRVBF_INSN_FBUGE
111 , FRVBF_INSN_FBUG
, FRVBF_INSN_FBLE
, FRVBF_INSN_FBGT
, FRVBF_INSN_FBULE
112 , FRVBF_INSN_FBU
, FRVBF_INSN_FBO
, FRVBF_INSN_BCTRLR
, FRVBF_INSN_BRALR
113 , FRVBF_INSN_BNOLR
, FRVBF_INSN_BEQLR
, FRVBF_INSN_BNELR
, FRVBF_INSN_BLELR
114 , FRVBF_INSN_BGTLR
, FRVBF_INSN_BLTLR
, FRVBF_INSN_BGELR
, FRVBF_INSN_BLSLR
115 , FRVBF_INSN_BHILR
, FRVBF_INSN_BCLR
, FRVBF_INSN_BNCLR
, FRVBF_INSN_BNLR
116 , FRVBF_INSN_BPLR
, FRVBF_INSN_BVLR
, FRVBF_INSN_BNVLR
, FRVBF_INSN_FBRALR
117 , FRVBF_INSN_FBNOLR
, FRVBF_INSN_FBEQLR
, FRVBF_INSN_FBNELR
, FRVBF_INSN_FBLGLR
118 , FRVBF_INSN_FBUELR
, FRVBF_INSN_FBULLR
, FRVBF_INSN_FBGELR
, FRVBF_INSN_FBLTLR
119 , FRVBF_INSN_FBUGELR
, FRVBF_INSN_FBUGLR
, FRVBF_INSN_FBLELR
, FRVBF_INSN_FBGTLR
120 , FRVBF_INSN_FBULELR
, FRVBF_INSN_FBULR
, FRVBF_INSN_FBOLR
, FRVBF_INSN_BCRALR
121 , FRVBF_INSN_BCNOLR
, FRVBF_INSN_BCEQLR
, FRVBF_INSN_BCNELR
, FRVBF_INSN_BCLELR
122 , FRVBF_INSN_BCGTLR
, FRVBF_INSN_BCLTLR
, FRVBF_INSN_BCGELR
, FRVBF_INSN_BCLSLR
123 , FRVBF_INSN_BCHILR
, FRVBF_INSN_BCCLR
, FRVBF_INSN_BCNCLR
, FRVBF_INSN_BCNLR
124 , FRVBF_INSN_BCPLR
, FRVBF_INSN_BCVLR
, FRVBF_INSN_BCNVLR
, FRVBF_INSN_FCBRALR
125 , FRVBF_INSN_FCBNOLR
, FRVBF_INSN_FCBEQLR
, FRVBF_INSN_FCBNELR
, FRVBF_INSN_FCBLGLR
126 , FRVBF_INSN_FCBUELR
, FRVBF_INSN_FCBULLR
, FRVBF_INSN_FCBGELR
, FRVBF_INSN_FCBLTLR
127 , FRVBF_INSN_FCBUGELR
, FRVBF_INSN_FCBUGLR
, FRVBF_INSN_FCBLELR
, FRVBF_INSN_FCBGTLR
128 , FRVBF_INSN_FCBULELR
, FRVBF_INSN_FCBULR
, FRVBF_INSN_FCBOLR
, FRVBF_INSN_JMPL
129 , FRVBF_INSN_CALLL
, FRVBF_INSN_JMPIL
, FRVBF_INSN_CALLIL
, FRVBF_INSN_CALL
130 , FRVBF_INSN_RETT
, FRVBF_INSN_REI
, FRVBF_INSN_TRA
, FRVBF_INSN_TNO
131 , FRVBF_INSN_TEQ
, FRVBF_INSN_TNE
, FRVBF_INSN_TLE
, FRVBF_INSN_TGT
132 , FRVBF_INSN_TLT
, FRVBF_INSN_TGE
, FRVBF_INSN_TLS
, FRVBF_INSN_THI
133 , FRVBF_INSN_TC
, FRVBF_INSN_TNC
, FRVBF_INSN_TN
, FRVBF_INSN_TP
134 , FRVBF_INSN_TV
, FRVBF_INSN_TNV
, FRVBF_INSN_FTRA
, FRVBF_INSN_FTNO
135 , FRVBF_INSN_FTNE
, FRVBF_INSN_FTEQ
, FRVBF_INSN_FTLG
, FRVBF_INSN_FTUE
136 , FRVBF_INSN_FTUL
, FRVBF_INSN_FTGE
, FRVBF_INSN_FTLT
, FRVBF_INSN_FTUGE
137 , FRVBF_INSN_FTUG
, FRVBF_INSN_FTLE
, FRVBF_INSN_FTGT
, FRVBF_INSN_FTULE
138 , FRVBF_INSN_FTU
, FRVBF_INSN_FTO
, FRVBF_INSN_TIRA
, FRVBF_INSN_TINO
139 , FRVBF_INSN_TIEQ
, FRVBF_INSN_TINE
, FRVBF_INSN_TILE
, FRVBF_INSN_TIGT
140 , FRVBF_INSN_TILT
, FRVBF_INSN_TIGE
, FRVBF_INSN_TILS
, FRVBF_INSN_TIHI
141 , FRVBF_INSN_TIC
, FRVBF_INSN_TINC
, FRVBF_INSN_TIN
, FRVBF_INSN_TIP
142 , FRVBF_INSN_TIV
, FRVBF_INSN_TINV
, FRVBF_INSN_FTIRA
, FRVBF_INSN_FTINO
143 , FRVBF_INSN_FTINE
, FRVBF_INSN_FTIEQ
, FRVBF_INSN_FTILG
, FRVBF_INSN_FTIUE
144 , FRVBF_INSN_FTIUL
, FRVBF_INSN_FTIGE
, FRVBF_INSN_FTILT
, FRVBF_INSN_FTIUGE
145 , FRVBF_INSN_FTIUG
, FRVBF_INSN_FTILE
, FRVBF_INSN_FTIGT
, FRVBF_INSN_FTIULE
146 , FRVBF_INSN_FTIU
, FRVBF_INSN_FTIO
, FRVBF_INSN_BREAK
, FRVBF_INSN_MTRAP
147 , FRVBF_INSN_ANDCR
, FRVBF_INSN_ORCR
, FRVBF_INSN_XORCR
, FRVBF_INSN_NANDCR
148 , FRVBF_INSN_NORCR
, FRVBF_INSN_ANDNCR
, FRVBF_INSN_ORNCR
, FRVBF_INSN_NANDNCR
149 , FRVBF_INSN_NORNCR
, FRVBF_INSN_NOTCR
, FRVBF_INSN_CKRA
, FRVBF_INSN_CKNO
150 , FRVBF_INSN_CKEQ
, FRVBF_INSN_CKNE
, FRVBF_INSN_CKLE
, FRVBF_INSN_CKGT
151 , FRVBF_INSN_CKLT
, FRVBF_INSN_CKGE
, FRVBF_INSN_CKLS
, FRVBF_INSN_CKHI
152 , FRVBF_INSN_CKC
, FRVBF_INSN_CKNC
, FRVBF_INSN_CKN
, FRVBF_INSN_CKP
153 , FRVBF_INSN_CKV
, FRVBF_INSN_CKNV
, FRVBF_INSN_FCKRA
, FRVBF_INSN_FCKNO
154 , FRVBF_INSN_FCKNE
, FRVBF_INSN_FCKEQ
, FRVBF_INSN_FCKLG
, FRVBF_INSN_FCKUE
155 , FRVBF_INSN_FCKUL
, FRVBF_INSN_FCKGE
, FRVBF_INSN_FCKLT
, FRVBF_INSN_FCKUGE
156 , FRVBF_INSN_FCKUG
, FRVBF_INSN_FCKLE
, FRVBF_INSN_FCKGT
, FRVBF_INSN_FCKULE
157 , FRVBF_INSN_FCKU
, FRVBF_INSN_FCKO
, FRVBF_INSN_CCKRA
, FRVBF_INSN_CCKNO
158 , FRVBF_INSN_CCKEQ
, FRVBF_INSN_CCKNE
, FRVBF_INSN_CCKLE
, FRVBF_INSN_CCKGT
159 , FRVBF_INSN_CCKLT
, FRVBF_INSN_CCKGE
, FRVBF_INSN_CCKLS
, FRVBF_INSN_CCKHI
160 , FRVBF_INSN_CCKC
, FRVBF_INSN_CCKNC
, FRVBF_INSN_CCKN
, FRVBF_INSN_CCKP
161 , FRVBF_INSN_CCKV
, FRVBF_INSN_CCKNV
, FRVBF_INSN_CFCKRA
, FRVBF_INSN_CFCKNO
162 , FRVBF_INSN_CFCKNE
, FRVBF_INSN_CFCKEQ
, FRVBF_INSN_CFCKLG
, FRVBF_INSN_CFCKUE
163 , FRVBF_INSN_CFCKUL
, FRVBF_INSN_CFCKGE
, FRVBF_INSN_CFCKLT
, FRVBF_INSN_CFCKUGE
164 , FRVBF_INSN_CFCKUG
, FRVBF_INSN_CFCKLE
, FRVBF_INSN_CFCKGT
, FRVBF_INSN_CFCKULE
165 , FRVBF_INSN_CFCKU
, FRVBF_INSN_CFCKO
, FRVBF_INSN_CJMPL
, FRVBF_INSN_CCALLL
166 , FRVBF_INSN_ICI
, FRVBF_INSN_DCI
, FRVBF_INSN_ICEI
, FRVBF_INSN_DCEI
167 , FRVBF_INSN_DCF
, FRVBF_INSN_DCEF
, FRVBF_INSN_WITLB
, FRVBF_INSN_WDTLB
168 , FRVBF_INSN_ITLBI
, FRVBF_INSN_DTLBI
, FRVBF_INSN_ICPL
, FRVBF_INSN_DCPL
169 , FRVBF_INSN_ICUL
, FRVBF_INSN_DCUL
, FRVBF_INSN_BAR
, FRVBF_INSN_MEMBAR
170 , FRVBF_INSN_COP1
, FRVBF_INSN_COP2
, FRVBF_INSN_CLRGR
, FRVBF_INSN_CLRFR
171 , FRVBF_INSN_CLRGA
, FRVBF_INSN_CLRFA
, FRVBF_INSN_COMMITGR
, FRVBF_INSN_COMMITFR
172 , FRVBF_INSN_COMMITGA
, FRVBF_INSN_COMMITFA
, FRVBF_INSN_FITOS
, FRVBF_INSN_FSTOI
173 , FRVBF_INSN_FITOD
, FRVBF_INSN_FDTOI
, FRVBF_INSN_FDITOS
, FRVBF_INSN_FDSTOI
174 , FRVBF_INSN_NFDITOS
, FRVBF_INSN_NFDSTOI
, FRVBF_INSN_CFITOS
, FRVBF_INSN_CFSTOI
175 , FRVBF_INSN_NFITOS
, FRVBF_INSN_NFSTOI
, FRVBF_INSN_FMOVS
, FRVBF_INSN_FMOVD
176 , FRVBF_INSN_FDMOVS
, FRVBF_INSN_CFMOVS
, FRVBF_INSN_FNEGS
, FRVBF_INSN_FNEGD
177 , FRVBF_INSN_FDNEGS
, FRVBF_INSN_CFNEGS
, FRVBF_INSN_FABSS
, FRVBF_INSN_FABSD
178 , FRVBF_INSN_FDABSS
, FRVBF_INSN_CFABSS
, FRVBF_INSN_FSQRTS
, FRVBF_INSN_FDSQRTS
179 , FRVBF_INSN_NFDSQRTS
, FRVBF_INSN_FSQRTD
, FRVBF_INSN_CFSQRTS
, FRVBF_INSN_NFSQRTS
180 , FRVBF_INSN_FADDS
, FRVBF_INSN_FSUBS
, FRVBF_INSN_FMULS
, FRVBF_INSN_FDIVS
181 , FRVBF_INSN_FADDD
, FRVBF_INSN_FSUBD
, FRVBF_INSN_FMULD
, FRVBF_INSN_FDIVD
182 , FRVBF_INSN_CFADDS
, FRVBF_INSN_CFSUBS
, FRVBF_INSN_CFMULS
, FRVBF_INSN_CFDIVS
183 , FRVBF_INSN_NFADDS
, FRVBF_INSN_NFSUBS
, FRVBF_INSN_NFMULS
, FRVBF_INSN_NFDIVS
184 , FRVBF_INSN_FCMPS
, FRVBF_INSN_FCMPD
, FRVBF_INSN_CFCMPS
, FRVBF_INSN_FDCMPS
185 , FRVBF_INSN_FMADDS
, FRVBF_INSN_FMSUBS
, FRVBF_INSN_FMADDD
, FRVBF_INSN_FMSUBD
186 , FRVBF_INSN_FDMADDS
, FRVBF_INSN_NFDMADDS
, FRVBF_INSN_CFMADDS
, FRVBF_INSN_CFMSUBS
187 , FRVBF_INSN_NFMADDS
, FRVBF_INSN_NFMSUBS
, FRVBF_INSN_FMAS
, FRVBF_INSN_FMSS
188 , FRVBF_INSN_FDMAS
, FRVBF_INSN_FDMSS
, FRVBF_INSN_NFDMAS
, FRVBF_INSN_NFDMSS
189 , FRVBF_INSN_CFMAS
, FRVBF_INSN_CFMSS
, FRVBF_INSN_FMAD
, FRVBF_INSN_FMSD
190 , FRVBF_INSN_NFMAS
, FRVBF_INSN_NFMSS
, FRVBF_INSN_FDADDS
, FRVBF_INSN_FDSUBS
191 , FRVBF_INSN_FDMULS
, FRVBF_INSN_FDDIVS
, FRVBF_INSN_FDSADS
, FRVBF_INSN_FDMULCS
192 , FRVBF_INSN_NFDMULCS
, FRVBF_INSN_NFDADDS
, FRVBF_INSN_NFDSUBS
, FRVBF_INSN_NFDMULS
193 , FRVBF_INSN_NFDDIVS
, FRVBF_INSN_NFDSADS
, FRVBF_INSN_NFDCMPS
, FRVBF_INSN_MHSETLOS
194 , FRVBF_INSN_MHSETHIS
, FRVBF_INSN_MHDSETS
, FRVBF_INSN_MHSETLOH
, FRVBF_INSN_MHSETHIH
195 , FRVBF_INSN_MHDSETH
, FRVBF_INSN_MAND
, FRVBF_INSN_MOR
, FRVBF_INSN_MXOR
196 , FRVBF_INSN_CMAND
, FRVBF_INSN_CMOR
, FRVBF_INSN_CMXOR
, FRVBF_INSN_MNOT
197 , FRVBF_INSN_CMNOT
, FRVBF_INSN_MROTLI
, FRVBF_INSN_MROTRI
, FRVBF_INSN_MWCUT
198 , FRVBF_INSN_MWCUTI
, FRVBF_INSN_MCUT
, FRVBF_INSN_MCUTI
, FRVBF_INSN_MCUTSS
199 , FRVBF_INSN_MCUTSSI
, FRVBF_INSN_MDCUTSSI
, FRVBF_INSN_MAVEH
, FRVBF_INSN_MSLLHI
200 , FRVBF_INSN_MSRLHI
, FRVBF_INSN_MSRAHI
, FRVBF_INSN_MDROTLI
, FRVBF_INSN_MCPLHI
201 , FRVBF_INSN_MCPLI
, FRVBF_INSN_MSATHS
, FRVBF_INSN_MQSATHS
, FRVBF_INSN_MSATHU
202 , FRVBF_INSN_MCMPSH
, FRVBF_INSN_MCMPUH
, FRVBF_INSN_MABSHS
, FRVBF_INSN_MADDHSS
203 , FRVBF_INSN_MADDHUS
, FRVBF_INSN_MSUBHSS
, FRVBF_INSN_MSUBHUS
, FRVBF_INSN_CMADDHSS
204 , FRVBF_INSN_CMADDHUS
, FRVBF_INSN_CMSUBHSS
, FRVBF_INSN_CMSUBHUS
, FRVBF_INSN_MQADDHSS
205 , FRVBF_INSN_MQADDHUS
, FRVBF_INSN_MQSUBHSS
, FRVBF_INSN_MQSUBHUS
, FRVBF_INSN_CMQADDHSS
206 , FRVBF_INSN_CMQADDHUS
, FRVBF_INSN_CMQSUBHSS
, FRVBF_INSN_CMQSUBHUS
, FRVBF_INSN_MADDACCS
207 , FRVBF_INSN_MSUBACCS
, FRVBF_INSN_MDADDACCS
, FRVBF_INSN_MDSUBACCS
, FRVBF_INSN_MASACCS
208 , FRVBF_INSN_MDASACCS
, FRVBF_INSN_MMULHS
, FRVBF_INSN_MMULHU
, FRVBF_INSN_MMULXHS
209 , FRVBF_INSN_MMULXHU
, FRVBF_INSN_CMMULHS
, FRVBF_INSN_CMMULHU
, FRVBF_INSN_MQMULHS
210 , FRVBF_INSN_MQMULHU
, FRVBF_INSN_MQMULXHS
, FRVBF_INSN_MQMULXHU
, FRVBF_INSN_CMQMULHS
211 , FRVBF_INSN_CMQMULHU
, FRVBF_INSN_MMACHS
, FRVBF_INSN_MMACHU
, FRVBF_INSN_MMRDHS
212 , FRVBF_INSN_MMRDHU
, FRVBF_INSN_CMMACHS
, FRVBF_INSN_CMMACHU
, FRVBF_INSN_MQMACHS
213 , FRVBF_INSN_MQMACHU
, FRVBF_INSN_CMQMACHS
, FRVBF_INSN_CMQMACHU
, FRVBF_INSN_MQXMACHS
214 , FRVBF_INSN_MQXMACXHS
, FRVBF_INSN_MQMACXHS
, FRVBF_INSN_MCPXRS
, FRVBF_INSN_MCPXRU
215 , FRVBF_INSN_MCPXIS
, FRVBF_INSN_MCPXIU
, FRVBF_INSN_CMCPXRS
, FRVBF_INSN_CMCPXRU
216 , FRVBF_INSN_CMCPXIS
, FRVBF_INSN_CMCPXIU
, FRVBF_INSN_MQCPXRS
, FRVBF_INSN_MQCPXRU
217 , FRVBF_INSN_MQCPXIS
, FRVBF_INSN_MQCPXIU
, FRVBF_INSN_MEXPDHW
, FRVBF_INSN_CMEXPDHW
218 , FRVBF_INSN_MEXPDHD
, FRVBF_INSN_CMEXPDHD
, FRVBF_INSN_MPACKH
, FRVBF_INSN_MDPACKH
219 , FRVBF_INSN_MUNPACKH
, FRVBF_INSN_MDUNPACKH
, FRVBF_INSN_MBTOH
, FRVBF_INSN_CMBTOH
220 , FRVBF_INSN_MHTOB
, FRVBF_INSN_CMHTOB
, FRVBF_INSN_MBTOHE
, FRVBF_INSN_CMBTOHE
221 , FRVBF_INSN_MNOP
, FRVBF_INSN_MCLRACC_0
, FRVBF_INSN_MCLRACC_1
, FRVBF_INSN_MRDACC
222 , FRVBF_INSN_MRDACCG
, FRVBF_INSN_MWTACC
, FRVBF_INSN_MWTACCG
, FRVBF_INSN_MCOP1
223 , FRVBF_INSN_MCOP2
, FRVBF_INSN_FNOP
, FRVBF_INSN__MAX
226 /* Enum declaration for semantic formats in cpu family frvbf. */
227 typedef enum frvbf_sfmt_type
{
228 FRVBF_SFMT_EMPTY
, FRVBF_SFMT_ADD
, FRVBF_SFMT_NOT
, FRVBF_SFMT_SDIV
229 , FRVBF_SFMT_SMUL
, FRVBF_SFMT_CADD
, FRVBF_SFMT_CNOT
, FRVBF_SFMT_CSMUL
230 , FRVBF_SFMT_CSDIV
, FRVBF_SFMT_ADDCC
, FRVBF_SFMT_ANDCC
, FRVBF_SFMT_SMULCC
231 , FRVBF_SFMT_CADDCC
, FRVBF_SFMT_CSMULCC
, FRVBF_SFMT_ADDX
, FRVBF_SFMT_ADDI
232 , FRVBF_SFMT_SDIVI
, FRVBF_SFMT_SMULI
, FRVBF_SFMT_ADDICC
, FRVBF_SFMT_ANDICC
233 , FRVBF_SFMT_SMULICC
, FRVBF_SFMT_ADDXI
, FRVBF_SFMT_CMPB
, FRVBF_SFMT_SETLO
234 , FRVBF_SFMT_SETHI
, FRVBF_SFMT_SETLOS
, FRVBF_SFMT_LDSB
, FRVBF_SFMT_LDBF
235 , FRVBF_SFMT_LDC
, FRVBF_SFMT_NLDSB
, FRVBF_SFMT_NLDBF
, FRVBF_SFMT_LDD
236 , FRVBF_SFMT_LDDF
, FRVBF_SFMT_LDDC
, FRVBF_SFMT_NLDD
, FRVBF_SFMT_NLDDF
237 , FRVBF_SFMT_LDQ
, FRVBF_SFMT_LDQF
, FRVBF_SFMT_LDQC
, FRVBF_SFMT_NLDQ
238 , FRVBF_SFMT_NLDQF
, FRVBF_SFMT_LDSBU
, FRVBF_SFMT_NLDSBU
, FRVBF_SFMT_LDBFU
239 , FRVBF_SFMT_LDCU
, FRVBF_SFMT_NLDBFU
, FRVBF_SFMT_LDDU
, FRVBF_SFMT_NLDDU
240 , FRVBF_SFMT_LDDFU
, FRVBF_SFMT_LDDCU
, FRVBF_SFMT_NLDDFU
, FRVBF_SFMT_LDQU
241 , FRVBF_SFMT_NLDQU
, FRVBF_SFMT_LDQFU
, FRVBF_SFMT_LDQCU
, FRVBF_SFMT_NLDQFU
242 , FRVBF_SFMT_LDSBI
, FRVBF_SFMT_LDBFI
, FRVBF_SFMT_NLDSBI
, FRVBF_SFMT_NLDBFI
243 , FRVBF_SFMT_LDDI
, FRVBF_SFMT_LDDFI
, FRVBF_SFMT_NLDDI
, FRVBF_SFMT_NLDDFI
244 , FRVBF_SFMT_LDQI
, FRVBF_SFMT_LDQFI
, FRVBF_SFMT_NLDQI
, FRVBF_SFMT_NLDQFI
245 , FRVBF_SFMT_STB
, FRVBF_SFMT_STBF
, FRVBF_SFMT_STC
, FRVBF_SFMT_RSTB
246 , FRVBF_SFMT_RSTBF
, FRVBF_SFMT_STD
, FRVBF_SFMT_STDF
, FRVBF_SFMT_STDC
247 , FRVBF_SFMT_RSTD
, FRVBF_SFMT_RSTDF
, FRVBF_SFMT_STBU
, FRVBF_SFMT_STBFU
248 , FRVBF_SFMT_STCU
, FRVBF_SFMT_STDU
, FRVBF_SFMT_STDFU
, FRVBF_SFMT_STDCU
249 , FRVBF_SFMT_STQU
, FRVBF_SFMT_CLDSB
, FRVBF_SFMT_CLDBF
, FRVBF_SFMT_CLDD
250 , FRVBF_SFMT_CLDDF
, FRVBF_SFMT_CLDQ
, FRVBF_SFMT_CLDSBU
, FRVBF_SFMT_CLDBFU
251 , FRVBF_SFMT_CLDDU
, FRVBF_SFMT_CLDDFU
, FRVBF_SFMT_CLDQU
, FRVBF_SFMT_CSTB
252 , FRVBF_SFMT_CSTBF
, FRVBF_SFMT_CSTD
, FRVBF_SFMT_CSTDF
, FRVBF_SFMT_CSTBU
253 , FRVBF_SFMT_CSTBFU
, FRVBF_SFMT_CSTDU
, FRVBF_SFMT_CSTDFU
, FRVBF_SFMT_STBI
254 , FRVBF_SFMT_STBFI
, FRVBF_SFMT_STDI
, FRVBF_SFMT_STDFI
, FRVBF_SFMT_SWAP
255 , FRVBF_SFMT_SWAPI
, FRVBF_SFMT_CSWAP
, FRVBF_SFMT_MOVGF
, FRVBF_SFMT_MOVFG
256 , FRVBF_SFMT_MOVGFD
, FRVBF_SFMT_MOVFGD
, FRVBF_SFMT_MOVGFQ
, FRVBF_SFMT_MOVFGQ
257 , FRVBF_SFMT_CMOVGF
, FRVBF_SFMT_CMOVFG
, FRVBF_SFMT_CMOVGFD
, FRVBF_SFMT_CMOVFGD
258 , FRVBF_SFMT_MOVGS
, FRVBF_SFMT_MOVSG
, FRVBF_SFMT_BRA
, FRVBF_SFMT_BNO
259 , FRVBF_SFMT_BEQ
, FRVBF_SFMT_FBNE
, FRVBF_SFMT_BCTRLR
, FRVBF_SFMT_BRALR
260 , FRVBF_SFMT_BNOLR
, FRVBF_SFMT_BEQLR
, FRVBF_SFMT_FBEQLR
, FRVBF_SFMT_BCRALR
261 , FRVBF_SFMT_BCNOLR
, FRVBF_SFMT_BCEQLR
, FRVBF_SFMT_FCBEQLR
, FRVBF_SFMT_JMPL
262 , FRVBF_SFMT_JMPIL
, FRVBF_SFMT_CALL
, FRVBF_SFMT_RETT
, FRVBF_SFMT_REI
263 , FRVBF_SFMT_TRA
, FRVBF_SFMT_TEQ
, FRVBF_SFMT_FTNE
, FRVBF_SFMT_TIRA
264 , FRVBF_SFMT_TIEQ
, FRVBF_SFMT_FTINE
, FRVBF_SFMT_BREAK
, FRVBF_SFMT_ANDCR
265 , FRVBF_SFMT_NOTCR
, FRVBF_SFMT_CKRA
, FRVBF_SFMT_CKEQ
, FRVBF_SFMT_FCKRA
266 , FRVBF_SFMT_FCKNE
, FRVBF_SFMT_CCKRA
, FRVBF_SFMT_CCKEQ
, FRVBF_SFMT_CFCKRA
267 , FRVBF_SFMT_CFCKNE
, FRVBF_SFMT_CJMPL
, FRVBF_SFMT_ICI
, FRVBF_SFMT_ICEI
268 , FRVBF_SFMT_ICPL
, FRVBF_SFMT_ICUL
, FRVBF_SFMT_CLRGR
, FRVBF_SFMT_CLRFR
269 , FRVBF_SFMT_FITOS
, FRVBF_SFMT_FSTOI
, FRVBF_SFMT_FITOD
, FRVBF_SFMT_FDTOI
270 , FRVBF_SFMT_FDITOS
, FRVBF_SFMT_FDSTOI
, FRVBF_SFMT_CFITOS
, FRVBF_SFMT_CFSTOI
271 , FRVBF_SFMT_NFITOS
, FRVBF_SFMT_NFSTOI
, FRVBF_SFMT_FMOVS
, FRVBF_SFMT_FMOVD
272 , FRVBF_SFMT_FDMOVS
, FRVBF_SFMT_CFMOVS
, FRVBF_SFMT_NFSQRTS
, FRVBF_SFMT_FADDS
273 , FRVBF_SFMT_FADDD
, FRVBF_SFMT_CFADDS
, FRVBF_SFMT_NFADDS
, FRVBF_SFMT_FCMPS
274 , FRVBF_SFMT_FCMPD
, FRVBF_SFMT_CFCMPS
, FRVBF_SFMT_FDCMPS
, FRVBF_SFMT_FMADDS
275 , FRVBF_SFMT_FMADDD
, FRVBF_SFMT_FDMADDS
, FRVBF_SFMT_CFMADDS
, FRVBF_SFMT_NFMADDS
276 , FRVBF_SFMT_FMAS
, FRVBF_SFMT_FDMAS
, FRVBF_SFMT_CFMAS
, FRVBF_SFMT_NFDCMPS
277 , FRVBF_SFMT_MHSETLOS
, FRVBF_SFMT_MHSETHIS
, FRVBF_SFMT_MHDSETS
, FRVBF_SFMT_MHSETLOH
278 , FRVBF_SFMT_MHSETHIH
, FRVBF_SFMT_MHDSETH
, FRVBF_SFMT_MAND
, FRVBF_SFMT_CMAND
279 , FRVBF_SFMT_MNOT
, FRVBF_SFMT_CMNOT
, FRVBF_SFMT_MROTLI
, FRVBF_SFMT_MWCUT
280 , FRVBF_SFMT_MWCUTI
, FRVBF_SFMT_MCUT
, FRVBF_SFMT_MCUTI
, FRVBF_SFMT_MDCUTSSI
281 , FRVBF_SFMT_MSLLHI
, FRVBF_SFMT_MDROTLI
, FRVBF_SFMT_MCPLHI
, FRVBF_SFMT_MCPLI
282 , FRVBF_SFMT_MSATHS
, FRVBF_SFMT_MQSATHS
, FRVBF_SFMT_MCMPSH
, FRVBF_SFMT_MABSHS
283 , FRVBF_SFMT_CMADDHSS
, FRVBF_SFMT_CMQADDHSS
, FRVBF_SFMT_MADDACCS
, FRVBF_SFMT_MDADDACCS
284 , FRVBF_SFMT_MASACCS
, FRVBF_SFMT_MDASACCS
, FRVBF_SFMT_MMULHS
, FRVBF_SFMT_CMMULHS
285 , FRVBF_SFMT_MQMULHS
, FRVBF_SFMT_CMQMULHS
, FRVBF_SFMT_MMACHS
, FRVBF_SFMT_MMACHU
286 , FRVBF_SFMT_CMMACHS
, FRVBF_SFMT_CMMACHU
, FRVBF_SFMT_MQMACHS
, FRVBF_SFMT_MQMACHU
287 , FRVBF_SFMT_CMQMACHS
, FRVBF_SFMT_CMQMACHU
, FRVBF_SFMT_MCPXRS
, FRVBF_SFMT_CMCPXRS
288 , FRVBF_SFMT_MQCPXRS
, FRVBF_SFMT_MEXPDHW
, FRVBF_SFMT_CMEXPDHW
, FRVBF_SFMT_MEXPDHD
289 , FRVBF_SFMT_CMEXPDHD
, FRVBF_SFMT_MPACKH
, FRVBF_SFMT_MDPACKH
, FRVBF_SFMT_MUNPACKH
290 , FRVBF_SFMT_MDUNPACKH
, FRVBF_SFMT_MBTOH
, FRVBF_SFMT_CMBTOH
, FRVBF_SFMT_MHTOB
291 , FRVBF_SFMT_CMHTOB
, FRVBF_SFMT_MBTOHE
, FRVBF_SFMT_CMBTOHE
, FRVBF_SFMT_MCLRACC_0
292 , FRVBF_SFMT_MRDACC
, FRVBF_SFMT_MRDACCG
, FRVBF_SFMT_MWTACC
, FRVBF_SFMT_MWTACCG
295 /* Function unit handlers (user written). */
297 extern int frvbf_model_frv_u_exec (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/);
298 extern int frvbf_model_fr500_u_dcul (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/);
299 extern int frvbf_model_fr500_u_icul (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/);
300 extern int frvbf_model_fr500_u_dcpl (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/);
301 extern int frvbf_model_fr500_u_icpl (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/);
302 extern int frvbf_model_fr500_u_dcf (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/);
303 extern int frvbf_model_fr500_u_dci (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/);
304 extern int frvbf_model_fr500_u_ici (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/);
305 extern int frvbf_model_fr500_u_membar (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/);
306 extern int frvbf_model_fr500_u_barrier (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/);
307 extern int frvbf_model_fr500_u_media_dual_btohe (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRintj*/, INT
/*FRintk*/);
308 extern int frvbf_model_fr500_u_media_dual_htob (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRintj*/, INT
/*FRintk*/);
309 extern int frvbf_model_fr500_u_media_dual_btoh (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRintj*/, INT
/*FRintk*/);
310 extern int frvbf_model_fr500_u_media_dual_unpack (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintk*/);
311 extern int frvbf_model_fr500_u_media_dual_expand (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintk*/);
312 extern int frvbf_model_fr500_u_media_quad_complex (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintj*/, INT
/*ACC40Sk*/);
313 extern int frvbf_model_fr500_u_media_quad_mul (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintj*/, INT
/*ACC40Sk*/, INT
/*ACC40Uk*/);
314 extern int frvbf_model_fr500_u_media_dual_mul (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintj*/, INT
/*ACC40Sk*/, INT
/*ACC40Uk*/);
315 extern int frvbf_model_fr500_u_media_quad_arith (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintj*/, INT
/*FRintk*/);
316 extern int frvbf_model_fr500_u_media (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintj*/, INT
/*ACC40Si*/, INT
/*ACCGi*/, INT
/*FRintk*/, INT
/*ACC40Sk*/, INT
/*ACC40Uk*/, INT
/*ACCGk*/);
317 extern int frvbf_model_fr500_u_float_dual_convert (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRj*/, INT
/*FRintj*/, INT
/*FRk*/, INT
/*FRintk*/);
318 extern int frvbf_model_fr500_u_float_convert (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRj*/, INT
/*FRintj*/, INT
/*FRdoublej*/, INT
/*FRk*/, INT
/*FRintk*/, INT
/*FRdoublek*/);
319 extern int frvbf_model_fr500_u_float_dual_compare (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRi*/, INT
/*FRj*/, INT
/*FCCi_2*/);
320 extern int frvbf_model_fr500_u_float_compare (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRi*/, INT
/*FRj*/, INT
/*FRdoublei*/, INT
/*FRdoublej*/, INT
/*FCCi_2*/);
321 extern int frvbf_model_fr500_u_float_dual_sqrt (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRj*/, INT
/*FRk*/);
322 extern int frvbf_model_fr500_u_float_sqrt (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRj*/, INT
/*FRdoublej*/, INT
/*FRk*/, INT
/*FRdoublek*/);
323 extern int frvbf_model_fr500_u_float_div (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRi*/, INT
/*FRj*/, INT
/*FRk*/);
324 extern int frvbf_model_fr500_u_float_dual_arith (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRi*/, INT
/*FRj*/, INT
/*FRdoublei*/, INT
/*FRdoublej*/, INT
/*FRk*/, INT
/*FRdoublek*/);
325 extern int frvbf_model_fr500_u_float_arith (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRi*/, INT
/*FRj*/, INT
/*FRdoublei*/, INT
/*FRdoublej*/, INT
/*FRk*/, INT
/*FRdoublek*/);
326 extern int frvbf_model_fr500_u_gr2spr (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRj*/, INT
/*spr*/);
327 extern int frvbf_model_fr500_u_gr2fr (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRj*/, INT
/*FRintk*/);
328 extern int frvbf_model_fr500_u_spr2gr (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*spr*/, INT
/*GRj*/);
329 extern int frvbf_model_fr500_u_fr2gr (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRintk*/, INT
/*GRj*/);
330 extern int frvbf_model_fr500_u_fr2fr (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRi*/, INT
/*FRk*/);
331 extern int frvbf_model_fr500_u_swap (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*GRk*/);
332 extern int frvbf_model_fr500_u_fr_r_store (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*FRintk*/, INT
/*FRdoublek*/);
333 extern int frvbf_model_fr500_u_fr_store (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*FRintk*/, INT
/*FRdoublek*/);
334 extern int frvbf_model_fr500_u_fr_load (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*FRintk*/, INT
/*FRdoublek*/);
335 extern int frvbf_model_fr500_u_gr_r_store (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*GRk*/, INT
/*GRdoublek*/);
336 extern int frvbf_model_fr500_u_gr_store (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*GRk*/, INT
/*GRdoublek*/);
337 extern int frvbf_model_fr500_u_gr_load (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*GRk*/, INT
/*GRdoublek*/);
338 extern int frvbf_model_fr500_u_set_hilo (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRkhi*/, INT
/*GRklo*/);
339 extern int frvbf_model_fr500_u_check (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*ICCi_3*/, INT
/*FCCi_3*/);
340 extern int frvbf_model_fr500_u_trap (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*ICCi_2*/, INT
/*FCCi_2*/);
341 extern int frvbf_model_fr500_u_branch (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*ICCi_2*/, INT
/*FCCi_2*/);
342 extern int frvbf_model_fr500_u_idiv (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*GRk*/, INT
/*ICCi_1*/);
343 extern int frvbf_model_fr500_u_imul (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*GRdoublek*/, INT
/*ICCi_1*/);
344 extern int frvbf_model_fr500_u_integer (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*GRk*/, INT
/*ICCi_1*/);
345 extern int frvbf_model_fr500_u_exec (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/);
346 extern int frvbf_model_tomcat_u_exec (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/);
347 extern int frvbf_model_fr400_u_dcul (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/);
348 extern int frvbf_model_fr400_u_icul (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/);
349 extern int frvbf_model_fr400_u_dcpl (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/);
350 extern int frvbf_model_fr400_u_icpl (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/);
351 extern int frvbf_model_fr400_u_dcf (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/);
352 extern int frvbf_model_fr400_u_dci (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/);
353 extern int frvbf_model_fr400_u_ici (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/);
354 extern int frvbf_model_fr400_u_membar (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/);
355 extern int frvbf_model_fr400_u_barrier (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/);
356 extern int frvbf_model_fr400_u_media_dual_htob (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRintj*/, INT
/*FRintk*/);
357 extern int frvbf_model_fr400_u_media_dual_expand (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintk*/);
358 extern int frvbf_model_fr400_u_media_7 (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintj*/, INT
/*FCCk*/);
359 extern int frvbf_model_fr400_u_media_6 (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintk*/);
360 extern int frvbf_model_fr400_u_media_4_acc_dual (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*ACC40Si*/, INT
/*FRintk*/);
361 extern int frvbf_model_fr400_u_media_4_accg (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*ACCGi*/, INT
/*FRinti*/, INT
/*ACCGk*/, INT
/*FRintk*/);
362 extern int frvbf_model_fr400_u_media_4 (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*ACC40Si*/, INT
/*FRintj*/, INT
/*ACC40Sk*/, INT
/*FRintk*/);
363 extern int frvbf_model_fr400_u_media_3_quad (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintj*/, INT
/*FRintk*/);
364 extern int frvbf_model_fr400_u_media_3_dual (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintk*/);
365 extern int frvbf_model_fr400_u_media_3 (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintj*/, INT
/*FRintk*/);
366 extern int frvbf_model_fr400_u_media_2_add_sub_dual (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*ACC40Si*/, INT
/*ACC40Sk*/);
367 extern int frvbf_model_fr400_u_media_2_add_sub (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*ACC40Si*/, INT
/*ACC40Sk*/);
368 extern int frvbf_model_fr400_u_media_2_acc_dual (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*ACC40Si*/, INT
/*ACC40Sk*/);
369 extern int frvbf_model_fr400_u_media_2_acc (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*ACC40Si*/, INT
/*ACC40Sk*/);
370 extern int frvbf_model_fr400_u_media_2_quad (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintj*/, INT
/*ACC40Sk*/, INT
/*ACC40Uk*/);
371 extern int frvbf_model_fr400_u_media_2 (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintj*/, INT
/*ACC40Sk*/, INT
/*ACC40Uk*/);
372 extern int frvbf_model_fr400_u_media_hilo (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRkhi*/, INT
/*FRklo*/);
373 extern int frvbf_model_fr400_u_media_1_quad (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintj*/, INT
/*FRintk*/);
374 extern int frvbf_model_fr400_u_media_1 (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintj*/, INT
/*FRintk*/);
375 extern int frvbf_model_fr400_u_gr2spr (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRj*/, INT
/*spr*/);
376 extern int frvbf_model_fr400_u_gr2fr (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRj*/, INT
/*FRintk*/);
377 extern int frvbf_model_fr400_u_spr2gr (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*spr*/, INT
/*GRj*/);
378 extern int frvbf_model_fr400_u_fr2gr (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRintk*/, INT
/*GRj*/);
379 extern int frvbf_model_fr400_u_swap (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*GRk*/);
380 extern int frvbf_model_fr400_u_fr_store (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*FRintk*/, INT
/*FRdoublek*/);
381 extern int frvbf_model_fr400_u_fr_load (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*FRintk*/, INT
/*FRdoublek*/);
382 extern int frvbf_model_fr400_u_gr_store (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*GRk*/, INT
/*GRdoublek*/);
383 extern int frvbf_model_fr400_u_gr_load (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*GRk*/, INT
/*GRdoublek*/);
384 extern int frvbf_model_fr400_u_set_hilo (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRkhi*/, INT
/*GRklo*/);
385 extern int frvbf_model_fr400_u_check (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*ICCi_3*/, INT
/*FCCi_3*/);
386 extern int frvbf_model_fr400_u_trap (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*ICCi_2*/, INT
/*FCCi_2*/);
387 extern int frvbf_model_fr400_u_branch (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*ICCi_2*/, INT
/*FCCi_2*/);
388 extern int frvbf_model_fr400_u_idiv (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*GRk*/, INT
/*ICCi_1*/);
389 extern int frvbf_model_fr400_u_imul (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*GRdoublek*/, INT
/*ICCi_1*/);
390 extern int frvbf_model_fr400_u_integer (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*GRk*/, INT
/*ICCi_1*/);
391 extern int frvbf_model_fr400_u_exec (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/);
392 extern int frvbf_model_simple_u_exec (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/);
394 /* Profiling before/after handlers (user written) */
396 extern void frvbf_model_insn_before (SIM_CPU
*, int /*first_p*/);
397 extern void frvbf_model_insn_after (SIM_CPU
*, int /*last_p*/, int /*cycles*/);
399 #endif /* FRVBF_DECODE_H */
This page took 0.044483 seconds and 4 git commands to generate.