1 /* Decode header for frvbf.
3 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 Copyright 1996-2010 Free Software Foundation, Inc.
7 This file is part of the GNU simulators.
9 This file is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
14 It is distributed in the hope that it will be useful, but WITHOUT
15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
17 License for more details.
19 You should have received a copy of the GNU General Public License along
20 with this program; if not, write to the Free Software Foundation, Inc.,
21 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
25 #ifndef FRVBF_DECODE_H
26 #define FRVBF_DECODE_H
28 extern const IDESC
*frvbf_decode (SIM_CPU
*, IADDR
,
29 CGEN_INSN_WORD
, CGEN_INSN_WORD
,
31 extern void frvbf_init_idesc_table (SIM_CPU
*);
32 extern void frvbf_sem_init_idesc_table (SIM_CPU
*);
33 extern void frvbf_semf_init_idesc_table (SIM_CPU
*);
35 /* Enum declaration for instructions in cpu family frvbf. */
36 typedef enum frvbf_insn_type
{
37 FRVBF_INSN_X_INVALID
, FRVBF_INSN_X_AFTER
, FRVBF_INSN_X_BEFORE
, FRVBF_INSN_X_CTI_CHAIN
38 , FRVBF_INSN_X_CHAIN
, FRVBF_INSN_X_BEGIN
, FRVBF_INSN_ADD
, FRVBF_INSN_SUB
39 , FRVBF_INSN_AND
, FRVBF_INSN_OR
, FRVBF_INSN_XOR
, FRVBF_INSN_NOT
40 , FRVBF_INSN_SDIV
, FRVBF_INSN_NSDIV
, FRVBF_INSN_UDIV
, FRVBF_INSN_NUDIV
41 , FRVBF_INSN_SMUL
, FRVBF_INSN_UMUL
, FRVBF_INSN_SMU
, FRVBF_INSN_SMASS
42 , FRVBF_INSN_SMSSS
, FRVBF_INSN_SLL
, FRVBF_INSN_SRL
, FRVBF_INSN_SRA
43 , FRVBF_INSN_SLASS
, FRVBF_INSN_SCUTSS
, FRVBF_INSN_SCAN
, FRVBF_INSN_CADD
44 , FRVBF_INSN_CSUB
, FRVBF_INSN_CAND
, FRVBF_INSN_COR
, FRVBF_INSN_CXOR
45 , FRVBF_INSN_CNOT
, FRVBF_INSN_CSMUL
, FRVBF_INSN_CSDIV
, FRVBF_INSN_CUDIV
46 , FRVBF_INSN_CSLL
, FRVBF_INSN_CSRL
, FRVBF_INSN_CSRA
, FRVBF_INSN_CSCAN
47 , FRVBF_INSN_ADDCC
, FRVBF_INSN_SUBCC
, FRVBF_INSN_ANDCC
, FRVBF_INSN_ORCC
48 , FRVBF_INSN_XORCC
, FRVBF_INSN_SLLCC
, FRVBF_INSN_SRLCC
, FRVBF_INSN_SRACC
49 , FRVBF_INSN_SMULCC
, FRVBF_INSN_UMULCC
, FRVBF_INSN_CADDCC
, FRVBF_INSN_CSUBCC
50 , FRVBF_INSN_CSMULCC
, FRVBF_INSN_CANDCC
, FRVBF_INSN_CORCC
, FRVBF_INSN_CXORCC
51 , FRVBF_INSN_CSLLCC
, FRVBF_INSN_CSRLCC
, FRVBF_INSN_CSRACC
, FRVBF_INSN_ADDX
52 , FRVBF_INSN_SUBX
, FRVBF_INSN_ADDXCC
, FRVBF_INSN_SUBXCC
, FRVBF_INSN_ADDSS
53 , FRVBF_INSN_SUBSS
, FRVBF_INSN_ADDI
, FRVBF_INSN_SUBI
, FRVBF_INSN_ANDI
54 , FRVBF_INSN_ORI
, FRVBF_INSN_XORI
, FRVBF_INSN_SDIVI
, FRVBF_INSN_NSDIVI
55 , FRVBF_INSN_UDIVI
, FRVBF_INSN_NUDIVI
, FRVBF_INSN_SMULI
, FRVBF_INSN_UMULI
56 , FRVBF_INSN_SLLI
, FRVBF_INSN_SRLI
, FRVBF_INSN_SRAI
, FRVBF_INSN_SCANI
57 , FRVBF_INSN_ADDICC
, FRVBF_INSN_SUBICC
, FRVBF_INSN_ANDICC
, FRVBF_INSN_ORICC
58 , FRVBF_INSN_XORICC
, FRVBF_INSN_SMULICC
, FRVBF_INSN_UMULICC
, FRVBF_INSN_SLLICC
59 , FRVBF_INSN_SRLICC
, FRVBF_INSN_SRAICC
, FRVBF_INSN_ADDXI
, FRVBF_INSN_SUBXI
60 , FRVBF_INSN_ADDXICC
, FRVBF_INSN_SUBXICC
, FRVBF_INSN_CMPB
, FRVBF_INSN_CMPBA
61 , FRVBF_INSN_SETLO
, FRVBF_INSN_SETHI
, FRVBF_INSN_SETLOS
, FRVBF_INSN_LDSB
62 , FRVBF_INSN_LDUB
, FRVBF_INSN_LDSH
, FRVBF_INSN_LDUH
, FRVBF_INSN_LD
63 , FRVBF_INSN_LDBF
, FRVBF_INSN_LDHF
, FRVBF_INSN_LDF
, FRVBF_INSN_LDC
64 , FRVBF_INSN_NLDSB
, FRVBF_INSN_NLDUB
, FRVBF_INSN_NLDSH
, FRVBF_INSN_NLDUH
65 , FRVBF_INSN_NLD
, FRVBF_INSN_NLDBF
, FRVBF_INSN_NLDHF
, FRVBF_INSN_NLDF
66 , FRVBF_INSN_LDD
, FRVBF_INSN_LDDF
, FRVBF_INSN_LDDC
, FRVBF_INSN_NLDD
67 , FRVBF_INSN_NLDDF
, FRVBF_INSN_LDQ
, FRVBF_INSN_LDQF
, FRVBF_INSN_LDQC
68 , FRVBF_INSN_NLDQ
, FRVBF_INSN_NLDQF
, FRVBF_INSN_LDSBU
, FRVBF_INSN_LDUBU
69 , FRVBF_INSN_LDSHU
, FRVBF_INSN_LDUHU
, FRVBF_INSN_LDU
, FRVBF_INSN_NLDSBU
70 , FRVBF_INSN_NLDUBU
, FRVBF_INSN_NLDSHU
, FRVBF_INSN_NLDUHU
, FRVBF_INSN_NLDU
71 , FRVBF_INSN_LDBFU
, FRVBF_INSN_LDHFU
, FRVBF_INSN_LDFU
, FRVBF_INSN_LDCU
72 , FRVBF_INSN_NLDBFU
, FRVBF_INSN_NLDHFU
, FRVBF_INSN_NLDFU
, FRVBF_INSN_LDDU
73 , FRVBF_INSN_NLDDU
, FRVBF_INSN_LDDFU
, FRVBF_INSN_LDDCU
, FRVBF_INSN_NLDDFU
74 , FRVBF_INSN_LDQU
, FRVBF_INSN_NLDQU
, FRVBF_INSN_LDQFU
, FRVBF_INSN_LDQCU
75 , FRVBF_INSN_NLDQFU
, FRVBF_INSN_LDSBI
, FRVBF_INSN_LDSHI
, FRVBF_INSN_LDI
76 , FRVBF_INSN_LDUBI
, FRVBF_INSN_LDUHI
, FRVBF_INSN_LDBFI
, FRVBF_INSN_LDHFI
77 , FRVBF_INSN_LDFI
, FRVBF_INSN_NLDSBI
, FRVBF_INSN_NLDUBI
, FRVBF_INSN_NLDSHI
78 , FRVBF_INSN_NLDUHI
, FRVBF_INSN_NLDI
, FRVBF_INSN_NLDBFI
, FRVBF_INSN_NLDHFI
79 , FRVBF_INSN_NLDFI
, FRVBF_INSN_LDDI
, FRVBF_INSN_LDDFI
, FRVBF_INSN_NLDDI
80 , FRVBF_INSN_NLDDFI
, FRVBF_INSN_LDQI
, FRVBF_INSN_LDQFI
, FRVBF_INSN_NLDQFI
81 , FRVBF_INSN_STB
, FRVBF_INSN_STH
, FRVBF_INSN_ST
, FRVBF_INSN_STBF
82 , FRVBF_INSN_STHF
, FRVBF_INSN_STF
, FRVBF_INSN_STC
, FRVBF_INSN_STD
83 , FRVBF_INSN_STDF
, FRVBF_INSN_STDC
, FRVBF_INSN_STQ
, FRVBF_INSN_STQF
84 , FRVBF_INSN_STQC
, FRVBF_INSN_STBU
, FRVBF_INSN_STHU
, FRVBF_INSN_STU
85 , FRVBF_INSN_STBFU
, FRVBF_INSN_STHFU
, FRVBF_INSN_STFU
, FRVBF_INSN_STCU
86 , FRVBF_INSN_STDU
, FRVBF_INSN_STDFU
, FRVBF_INSN_STDCU
, FRVBF_INSN_STQU
87 , FRVBF_INSN_STQFU
, FRVBF_INSN_STQCU
, FRVBF_INSN_CLDSB
, FRVBF_INSN_CLDUB
88 , FRVBF_INSN_CLDSH
, FRVBF_INSN_CLDUH
, FRVBF_INSN_CLD
, FRVBF_INSN_CLDBF
89 , FRVBF_INSN_CLDHF
, FRVBF_INSN_CLDF
, FRVBF_INSN_CLDD
, FRVBF_INSN_CLDDF
90 , FRVBF_INSN_CLDQ
, FRVBF_INSN_CLDSBU
, FRVBF_INSN_CLDUBU
, FRVBF_INSN_CLDSHU
91 , FRVBF_INSN_CLDUHU
, FRVBF_INSN_CLDU
, FRVBF_INSN_CLDBFU
, FRVBF_INSN_CLDHFU
92 , FRVBF_INSN_CLDFU
, FRVBF_INSN_CLDDU
, FRVBF_INSN_CLDDFU
, FRVBF_INSN_CLDQU
93 , FRVBF_INSN_CSTB
, FRVBF_INSN_CSTH
, FRVBF_INSN_CST
, FRVBF_INSN_CSTBF
94 , FRVBF_INSN_CSTHF
, FRVBF_INSN_CSTF
, FRVBF_INSN_CSTD
, FRVBF_INSN_CSTDF
95 , FRVBF_INSN_CSTQ
, FRVBF_INSN_CSTBU
, FRVBF_INSN_CSTHU
, FRVBF_INSN_CSTU
96 , FRVBF_INSN_CSTBFU
, FRVBF_INSN_CSTHFU
, FRVBF_INSN_CSTFU
, FRVBF_INSN_CSTDU
97 , FRVBF_INSN_CSTDFU
, FRVBF_INSN_STBI
, FRVBF_INSN_STHI
, FRVBF_INSN_STI
98 , FRVBF_INSN_STBFI
, FRVBF_INSN_STHFI
, FRVBF_INSN_STFI
, FRVBF_INSN_STDI
99 , FRVBF_INSN_STDFI
, FRVBF_INSN_STQI
, FRVBF_INSN_STQFI
, FRVBF_INSN_SWAP
100 , FRVBF_INSN_SWAPI
, FRVBF_INSN_CSWAP
, FRVBF_INSN_MOVGF
, FRVBF_INSN_MOVFG
101 , FRVBF_INSN_MOVGFD
, FRVBF_INSN_MOVFGD
, FRVBF_INSN_MOVGFQ
, FRVBF_INSN_MOVFGQ
102 , FRVBF_INSN_CMOVGF
, FRVBF_INSN_CMOVFG
, FRVBF_INSN_CMOVGFD
, FRVBF_INSN_CMOVFGD
103 , FRVBF_INSN_MOVGS
, FRVBF_INSN_MOVSG
, FRVBF_INSN_BRA
, FRVBF_INSN_BNO
104 , FRVBF_INSN_BEQ
, FRVBF_INSN_BNE
, FRVBF_INSN_BLE
, FRVBF_INSN_BGT
105 , FRVBF_INSN_BLT
, FRVBF_INSN_BGE
, FRVBF_INSN_BLS
, FRVBF_INSN_BHI
106 , FRVBF_INSN_BC
, FRVBF_INSN_BNC
, FRVBF_INSN_BN
, FRVBF_INSN_BP
107 , FRVBF_INSN_BV
, FRVBF_INSN_BNV
, FRVBF_INSN_FBRA
, FRVBF_INSN_FBNO
108 , FRVBF_INSN_FBNE
, FRVBF_INSN_FBEQ
, FRVBF_INSN_FBLG
, FRVBF_INSN_FBUE
109 , FRVBF_INSN_FBUL
, FRVBF_INSN_FBGE
, FRVBF_INSN_FBLT
, FRVBF_INSN_FBUGE
110 , FRVBF_INSN_FBUG
, FRVBF_INSN_FBLE
, FRVBF_INSN_FBGT
, FRVBF_INSN_FBULE
111 , FRVBF_INSN_FBU
, FRVBF_INSN_FBO
, FRVBF_INSN_BCTRLR
, FRVBF_INSN_BRALR
112 , FRVBF_INSN_BNOLR
, FRVBF_INSN_BEQLR
, FRVBF_INSN_BNELR
, FRVBF_INSN_BLELR
113 , FRVBF_INSN_BGTLR
, FRVBF_INSN_BLTLR
, FRVBF_INSN_BGELR
, FRVBF_INSN_BLSLR
114 , FRVBF_INSN_BHILR
, FRVBF_INSN_BCLR
, FRVBF_INSN_BNCLR
, FRVBF_INSN_BNLR
115 , FRVBF_INSN_BPLR
, FRVBF_INSN_BVLR
, FRVBF_INSN_BNVLR
, FRVBF_INSN_FBRALR
116 , FRVBF_INSN_FBNOLR
, FRVBF_INSN_FBEQLR
, FRVBF_INSN_FBNELR
, FRVBF_INSN_FBLGLR
117 , FRVBF_INSN_FBUELR
, FRVBF_INSN_FBULLR
, FRVBF_INSN_FBGELR
, FRVBF_INSN_FBLTLR
118 , FRVBF_INSN_FBUGELR
, FRVBF_INSN_FBUGLR
, FRVBF_INSN_FBLELR
, FRVBF_INSN_FBGTLR
119 , FRVBF_INSN_FBULELR
, FRVBF_INSN_FBULR
, FRVBF_INSN_FBOLR
, FRVBF_INSN_BCRALR
120 , FRVBF_INSN_BCNOLR
, FRVBF_INSN_BCEQLR
, FRVBF_INSN_BCNELR
, FRVBF_INSN_BCLELR
121 , FRVBF_INSN_BCGTLR
, FRVBF_INSN_BCLTLR
, FRVBF_INSN_BCGELR
, FRVBF_INSN_BCLSLR
122 , FRVBF_INSN_BCHILR
, FRVBF_INSN_BCCLR
, FRVBF_INSN_BCNCLR
, FRVBF_INSN_BCNLR
123 , FRVBF_INSN_BCPLR
, FRVBF_INSN_BCVLR
, FRVBF_INSN_BCNVLR
, FRVBF_INSN_FCBRALR
124 , FRVBF_INSN_FCBNOLR
, FRVBF_INSN_FCBEQLR
, FRVBF_INSN_FCBNELR
, FRVBF_INSN_FCBLGLR
125 , FRVBF_INSN_FCBUELR
, FRVBF_INSN_FCBULLR
, FRVBF_INSN_FCBGELR
, FRVBF_INSN_FCBLTLR
126 , FRVBF_INSN_FCBUGELR
, FRVBF_INSN_FCBUGLR
, FRVBF_INSN_FCBLELR
, FRVBF_INSN_FCBGTLR
127 , FRVBF_INSN_FCBULELR
, FRVBF_INSN_FCBULR
, FRVBF_INSN_FCBOLR
, FRVBF_INSN_JMPL
128 , FRVBF_INSN_CALLL
, FRVBF_INSN_JMPIL
, FRVBF_INSN_CALLIL
, FRVBF_INSN_CALL
129 , FRVBF_INSN_RETT
, FRVBF_INSN_REI
, FRVBF_INSN_TRA
, FRVBF_INSN_TNO
130 , FRVBF_INSN_TEQ
, FRVBF_INSN_TNE
, FRVBF_INSN_TLE
, FRVBF_INSN_TGT
131 , FRVBF_INSN_TLT
, FRVBF_INSN_TGE
, FRVBF_INSN_TLS
, FRVBF_INSN_THI
132 , FRVBF_INSN_TC
, FRVBF_INSN_TNC
, FRVBF_INSN_TN
, FRVBF_INSN_TP
133 , FRVBF_INSN_TV
, FRVBF_INSN_TNV
, FRVBF_INSN_FTRA
, FRVBF_INSN_FTNO
134 , FRVBF_INSN_FTNE
, FRVBF_INSN_FTEQ
, FRVBF_INSN_FTLG
, FRVBF_INSN_FTUE
135 , FRVBF_INSN_FTUL
, FRVBF_INSN_FTGE
, FRVBF_INSN_FTLT
, FRVBF_INSN_FTUGE
136 , FRVBF_INSN_FTUG
, FRVBF_INSN_FTLE
, FRVBF_INSN_FTGT
, FRVBF_INSN_FTULE
137 , FRVBF_INSN_FTU
, FRVBF_INSN_FTO
, FRVBF_INSN_TIRA
, FRVBF_INSN_TINO
138 , FRVBF_INSN_TIEQ
, FRVBF_INSN_TINE
, FRVBF_INSN_TILE
, FRVBF_INSN_TIGT
139 , FRVBF_INSN_TILT
, FRVBF_INSN_TIGE
, FRVBF_INSN_TILS
, FRVBF_INSN_TIHI
140 , FRVBF_INSN_TIC
, FRVBF_INSN_TINC
, FRVBF_INSN_TIN
, FRVBF_INSN_TIP
141 , FRVBF_INSN_TIV
, FRVBF_INSN_TINV
, FRVBF_INSN_FTIRA
, FRVBF_INSN_FTINO
142 , FRVBF_INSN_FTINE
, FRVBF_INSN_FTIEQ
, FRVBF_INSN_FTILG
, FRVBF_INSN_FTIUE
143 , FRVBF_INSN_FTIUL
, FRVBF_INSN_FTIGE
, FRVBF_INSN_FTILT
, FRVBF_INSN_FTIUGE
144 , FRVBF_INSN_FTIUG
, FRVBF_INSN_FTILE
, FRVBF_INSN_FTIGT
, FRVBF_INSN_FTIULE
145 , FRVBF_INSN_FTIU
, FRVBF_INSN_FTIO
, FRVBF_INSN_BREAK
, FRVBF_INSN_MTRAP
146 , FRVBF_INSN_ANDCR
, FRVBF_INSN_ORCR
, FRVBF_INSN_XORCR
, FRVBF_INSN_NANDCR
147 , FRVBF_INSN_NORCR
, FRVBF_INSN_ANDNCR
, FRVBF_INSN_ORNCR
, FRVBF_INSN_NANDNCR
148 , FRVBF_INSN_NORNCR
, FRVBF_INSN_NOTCR
, FRVBF_INSN_CKRA
, FRVBF_INSN_CKNO
149 , FRVBF_INSN_CKEQ
, FRVBF_INSN_CKNE
, FRVBF_INSN_CKLE
, FRVBF_INSN_CKGT
150 , FRVBF_INSN_CKLT
, FRVBF_INSN_CKGE
, FRVBF_INSN_CKLS
, FRVBF_INSN_CKHI
151 , FRVBF_INSN_CKC
, FRVBF_INSN_CKNC
, FRVBF_INSN_CKN
, FRVBF_INSN_CKP
152 , FRVBF_INSN_CKV
, FRVBF_INSN_CKNV
, FRVBF_INSN_FCKRA
, FRVBF_INSN_FCKNO
153 , FRVBF_INSN_FCKNE
, FRVBF_INSN_FCKEQ
, FRVBF_INSN_FCKLG
, FRVBF_INSN_FCKUE
154 , FRVBF_INSN_FCKUL
, FRVBF_INSN_FCKGE
, FRVBF_INSN_FCKLT
, FRVBF_INSN_FCKUGE
155 , FRVBF_INSN_FCKUG
, FRVBF_INSN_FCKLE
, FRVBF_INSN_FCKGT
, FRVBF_INSN_FCKULE
156 , FRVBF_INSN_FCKU
, FRVBF_INSN_FCKO
, FRVBF_INSN_CCKRA
, FRVBF_INSN_CCKNO
157 , FRVBF_INSN_CCKEQ
, FRVBF_INSN_CCKNE
, FRVBF_INSN_CCKLE
, FRVBF_INSN_CCKGT
158 , FRVBF_INSN_CCKLT
, FRVBF_INSN_CCKGE
, FRVBF_INSN_CCKLS
, FRVBF_INSN_CCKHI
159 , FRVBF_INSN_CCKC
, FRVBF_INSN_CCKNC
, FRVBF_INSN_CCKN
, FRVBF_INSN_CCKP
160 , FRVBF_INSN_CCKV
, FRVBF_INSN_CCKNV
, FRVBF_INSN_CFCKRA
, FRVBF_INSN_CFCKNO
161 , FRVBF_INSN_CFCKNE
, FRVBF_INSN_CFCKEQ
, FRVBF_INSN_CFCKLG
, FRVBF_INSN_CFCKUE
162 , FRVBF_INSN_CFCKUL
, FRVBF_INSN_CFCKGE
, FRVBF_INSN_CFCKLT
, FRVBF_INSN_CFCKUGE
163 , FRVBF_INSN_CFCKUG
, FRVBF_INSN_CFCKLE
, FRVBF_INSN_CFCKGT
, FRVBF_INSN_CFCKULE
164 , FRVBF_INSN_CFCKU
, FRVBF_INSN_CFCKO
, FRVBF_INSN_CJMPL
, FRVBF_INSN_CCALLL
165 , FRVBF_INSN_ICI
, FRVBF_INSN_DCI
, FRVBF_INSN_ICEI
, FRVBF_INSN_DCEI
166 , FRVBF_INSN_DCF
, FRVBF_INSN_DCEF
, FRVBF_INSN_WITLB
, FRVBF_INSN_WDTLB
167 , FRVBF_INSN_ITLBI
, FRVBF_INSN_DTLBI
, FRVBF_INSN_ICPL
, FRVBF_INSN_DCPL
168 , FRVBF_INSN_ICUL
, FRVBF_INSN_DCUL
, FRVBF_INSN_BAR
, FRVBF_INSN_MEMBAR
169 , FRVBF_INSN_LRAI
, FRVBF_INSN_LRAD
, FRVBF_INSN_TLBPR
, FRVBF_INSN_COP1
170 , FRVBF_INSN_COP2
, FRVBF_INSN_CLRGR
, FRVBF_INSN_CLRFR
, FRVBF_INSN_CLRGA
171 , FRVBF_INSN_CLRFA
, FRVBF_INSN_COMMITGR
, FRVBF_INSN_COMMITFR
, FRVBF_INSN_COMMITGA
172 , FRVBF_INSN_COMMITFA
, FRVBF_INSN_FITOS
, FRVBF_INSN_FSTOI
, FRVBF_INSN_FITOD
173 , FRVBF_INSN_FDTOI
, FRVBF_INSN_FDITOS
, FRVBF_INSN_FDSTOI
, FRVBF_INSN_NFDITOS
174 , FRVBF_INSN_NFDSTOI
, FRVBF_INSN_CFITOS
, FRVBF_INSN_CFSTOI
, FRVBF_INSN_NFITOS
175 , FRVBF_INSN_NFSTOI
, FRVBF_INSN_FMOVS
, FRVBF_INSN_FMOVD
, FRVBF_INSN_FDMOVS
176 , FRVBF_INSN_CFMOVS
, FRVBF_INSN_FNEGS
, FRVBF_INSN_FNEGD
, FRVBF_INSN_FDNEGS
177 , FRVBF_INSN_CFNEGS
, FRVBF_INSN_FABSS
, FRVBF_INSN_FABSD
, FRVBF_INSN_FDABSS
178 , FRVBF_INSN_CFABSS
, FRVBF_INSN_FSQRTS
, FRVBF_INSN_FDSQRTS
, FRVBF_INSN_NFDSQRTS
179 , FRVBF_INSN_FSQRTD
, FRVBF_INSN_CFSQRTS
, FRVBF_INSN_NFSQRTS
, FRVBF_INSN_FADDS
180 , FRVBF_INSN_FSUBS
, FRVBF_INSN_FMULS
, FRVBF_INSN_FDIVS
, FRVBF_INSN_FADDD
181 , FRVBF_INSN_FSUBD
, FRVBF_INSN_FMULD
, FRVBF_INSN_FDIVD
, FRVBF_INSN_CFADDS
182 , FRVBF_INSN_CFSUBS
, FRVBF_INSN_CFMULS
, FRVBF_INSN_CFDIVS
, FRVBF_INSN_NFADDS
183 , FRVBF_INSN_NFSUBS
, FRVBF_INSN_NFMULS
, FRVBF_INSN_NFDIVS
, FRVBF_INSN_FCMPS
184 , FRVBF_INSN_FCMPD
, FRVBF_INSN_CFCMPS
, FRVBF_INSN_FDCMPS
, FRVBF_INSN_FMADDS
185 , FRVBF_INSN_FMSUBS
, FRVBF_INSN_FMADDD
, FRVBF_INSN_FMSUBD
, FRVBF_INSN_FDMADDS
186 , FRVBF_INSN_NFDMADDS
, FRVBF_INSN_CFMADDS
, FRVBF_INSN_CFMSUBS
, FRVBF_INSN_NFMADDS
187 , FRVBF_INSN_NFMSUBS
, FRVBF_INSN_FMAS
, FRVBF_INSN_FMSS
, FRVBF_INSN_FDMAS
188 , FRVBF_INSN_FDMSS
, FRVBF_INSN_NFDMAS
, FRVBF_INSN_NFDMSS
, FRVBF_INSN_CFMAS
189 , FRVBF_INSN_CFMSS
, FRVBF_INSN_FMAD
, FRVBF_INSN_FMSD
, FRVBF_INSN_NFMAS
190 , FRVBF_INSN_NFMSS
, FRVBF_INSN_FDADDS
, FRVBF_INSN_FDSUBS
, FRVBF_INSN_FDMULS
191 , FRVBF_INSN_FDDIVS
, FRVBF_INSN_FDSADS
, FRVBF_INSN_FDMULCS
, FRVBF_INSN_NFDMULCS
192 , FRVBF_INSN_NFDADDS
, FRVBF_INSN_NFDSUBS
, FRVBF_INSN_NFDMULS
, FRVBF_INSN_NFDDIVS
193 , FRVBF_INSN_NFDSADS
, FRVBF_INSN_NFDCMPS
, FRVBF_INSN_MHSETLOS
, FRVBF_INSN_MHSETHIS
194 , FRVBF_INSN_MHDSETS
, FRVBF_INSN_MHSETLOH
, FRVBF_INSN_MHSETHIH
, FRVBF_INSN_MHDSETH
195 , FRVBF_INSN_MAND
, FRVBF_INSN_MOR
, FRVBF_INSN_MXOR
, FRVBF_INSN_CMAND
196 , FRVBF_INSN_CMOR
, FRVBF_INSN_CMXOR
, FRVBF_INSN_MNOT
, FRVBF_INSN_CMNOT
197 , FRVBF_INSN_MROTLI
, FRVBF_INSN_MROTRI
, FRVBF_INSN_MWCUT
, FRVBF_INSN_MWCUTI
198 , FRVBF_INSN_MCUT
, FRVBF_INSN_MCUTI
, FRVBF_INSN_MCUTSS
, FRVBF_INSN_MCUTSSI
199 , FRVBF_INSN_MDCUTSSI
, FRVBF_INSN_MAVEH
, FRVBF_INSN_MSLLHI
, FRVBF_INSN_MSRLHI
200 , FRVBF_INSN_MSRAHI
, FRVBF_INSN_MDROTLI
, FRVBF_INSN_MCPLHI
, FRVBF_INSN_MCPLI
201 , FRVBF_INSN_MSATHS
, FRVBF_INSN_MQSATHS
, FRVBF_INSN_MSATHU
, FRVBF_INSN_MCMPSH
202 , FRVBF_INSN_MCMPUH
, FRVBF_INSN_MABSHS
, FRVBF_INSN_MADDHSS
, FRVBF_INSN_MADDHUS
203 , FRVBF_INSN_MSUBHSS
, FRVBF_INSN_MSUBHUS
, FRVBF_INSN_CMADDHSS
, FRVBF_INSN_CMADDHUS
204 , FRVBF_INSN_CMSUBHSS
, FRVBF_INSN_CMSUBHUS
, FRVBF_INSN_MQADDHSS
, FRVBF_INSN_MQADDHUS
205 , FRVBF_INSN_MQSUBHSS
, FRVBF_INSN_MQSUBHUS
, FRVBF_INSN_CMQADDHSS
, FRVBF_INSN_CMQADDHUS
206 , FRVBF_INSN_CMQSUBHSS
, FRVBF_INSN_CMQSUBHUS
, FRVBF_INSN_MQLCLRHS
, FRVBF_INSN_MQLMTHS
207 , FRVBF_INSN_MQSLLHI
, FRVBF_INSN_MQSRAHI
, FRVBF_INSN_MADDACCS
, FRVBF_INSN_MSUBACCS
208 , FRVBF_INSN_MDADDACCS
, FRVBF_INSN_MDSUBACCS
, FRVBF_INSN_MASACCS
, FRVBF_INSN_MDASACCS
209 , FRVBF_INSN_MMULHS
, FRVBF_INSN_MMULHU
, FRVBF_INSN_MMULXHS
, FRVBF_INSN_MMULXHU
210 , FRVBF_INSN_CMMULHS
, FRVBF_INSN_CMMULHU
, FRVBF_INSN_MQMULHS
, FRVBF_INSN_MQMULHU
211 , FRVBF_INSN_MQMULXHS
, FRVBF_INSN_MQMULXHU
, FRVBF_INSN_CMQMULHS
, FRVBF_INSN_CMQMULHU
212 , FRVBF_INSN_MMACHS
, FRVBF_INSN_MMACHU
, FRVBF_INSN_MMRDHS
, FRVBF_INSN_MMRDHU
213 , FRVBF_INSN_CMMACHS
, FRVBF_INSN_CMMACHU
, FRVBF_INSN_MQMACHS
, FRVBF_INSN_MQMACHU
214 , FRVBF_INSN_CMQMACHS
, FRVBF_INSN_CMQMACHU
, FRVBF_INSN_MQXMACHS
, FRVBF_INSN_MQXMACXHS
215 , FRVBF_INSN_MQMACXHS
, FRVBF_INSN_MCPXRS
, FRVBF_INSN_MCPXRU
, FRVBF_INSN_MCPXIS
216 , FRVBF_INSN_MCPXIU
, FRVBF_INSN_CMCPXRS
, FRVBF_INSN_CMCPXRU
, FRVBF_INSN_CMCPXIS
217 , FRVBF_INSN_CMCPXIU
, FRVBF_INSN_MQCPXRS
, FRVBF_INSN_MQCPXRU
, FRVBF_INSN_MQCPXIS
218 , FRVBF_INSN_MQCPXIU
, FRVBF_INSN_MEXPDHW
, FRVBF_INSN_CMEXPDHW
, FRVBF_INSN_MEXPDHD
219 , FRVBF_INSN_CMEXPDHD
, FRVBF_INSN_MPACKH
, FRVBF_INSN_MDPACKH
, FRVBF_INSN_MUNPACKH
220 , FRVBF_INSN_MDUNPACKH
, FRVBF_INSN_MBTOH
, FRVBF_INSN_CMBTOH
, FRVBF_INSN_MHTOB
221 , FRVBF_INSN_CMHTOB
, FRVBF_INSN_MBTOHE
, FRVBF_INSN_CMBTOHE
, FRVBF_INSN_MNOP
222 , FRVBF_INSN_MCLRACC_0
, FRVBF_INSN_MCLRACC_1
, FRVBF_INSN_MRDACC
, FRVBF_INSN_MRDACCG
223 , FRVBF_INSN_MWTACC
, FRVBF_INSN_MWTACCG
, FRVBF_INSN_MCOP1
, FRVBF_INSN_MCOP2
224 , FRVBF_INSN_FNOP
, FRVBF_INSN__MAX
227 /* Enum declaration for semantic formats in cpu family frvbf. */
228 typedef enum frvbf_sfmt_type
{
229 FRVBF_SFMT_EMPTY
, FRVBF_SFMT_ADD
, FRVBF_SFMT_NOT
, FRVBF_SFMT_SDIV
230 , FRVBF_SFMT_SMUL
, FRVBF_SFMT_SMU
, FRVBF_SFMT_SMASS
, FRVBF_SFMT_SLASS
231 , FRVBF_SFMT_SCUTSS
, FRVBF_SFMT_CADD
, FRVBF_SFMT_CNOT
, FRVBF_SFMT_CSMUL
232 , FRVBF_SFMT_CSDIV
, FRVBF_SFMT_ADDCC
, FRVBF_SFMT_ANDCC
, FRVBF_SFMT_SMULCC
233 , FRVBF_SFMT_CADDCC
, FRVBF_SFMT_CSMULCC
, FRVBF_SFMT_ADDX
, FRVBF_SFMT_ADDI
234 , FRVBF_SFMT_SDIVI
, FRVBF_SFMT_SMULI
, FRVBF_SFMT_ADDICC
, FRVBF_SFMT_ANDICC
235 , FRVBF_SFMT_SMULICC
, FRVBF_SFMT_ADDXI
, FRVBF_SFMT_CMPB
, FRVBF_SFMT_SETLO
236 , FRVBF_SFMT_SETHI
, FRVBF_SFMT_SETLOS
, FRVBF_SFMT_LDSB
, FRVBF_SFMT_LDBF
237 , FRVBF_SFMT_LDC
, FRVBF_SFMT_NLDSB
, FRVBF_SFMT_NLDBF
, FRVBF_SFMT_LDD
238 , FRVBF_SFMT_LDDF
, FRVBF_SFMT_LDDC
, FRVBF_SFMT_NLDD
, FRVBF_SFMT_NLDDF
239 , FRVBF_SFMT_LDQ
, FRVBF_SFMT_LDQF
, FRVBF_SFMT_LDQC
, FRVBF_SFMT_NLDQ
240 , FRVBF_SFMT_NLDQF
, FRVBF_SFMT_LDSBU
, FRVBF_SFMT_NLDSBU
, FRVBF_SFMT_LDBFU
241 , FRVBF_SFMT_LDCU
, FRVBF_SFMT_NLDBFU
, FRVBF_SFMT_LDDU
, FRVBF_SFMT_NLDDU
242 , FRVBF_SFMT_LDDFU
, FRVBF_SFMT_LDDCU
, FRVBF_SFMT_NLDDFU
, FRVBF_SFMT_LDQU
243 , FRVBF_SFMT_NLDQU
, FRVBF_SFMT_LDQFU
, FRVBF_SFMT_LDQCU
, FRVBF_SFMT_NLDQFU
244 , FRVBF_SFMT_LDSBI
, FRVBF_SFMT_LDBFI
, FRVBF_SFMT_NLDSBI
, FRVBF_SFMT_NLDBFI
245 , FRVBF_SFMT_LDDI
, FRVBF_SFMT_LDDFI
, FRVBF_SFMT_NLDDI
, FRVBF_SFMT_NLDDFI
246 , FRVBF_SFMT_LDQI
, FRVBF_SFMT_LDQFI
, FRVBF_SFMT_NLDQFI
, FRVBF_SFMT_STB
247 , FRVBF_SFMT_STBF
, FRVBF_SFMT_STC
, FRVBF_SFMT_STD
, FRVBF_SFMT_STDF
248 , FRVBF_SFMT_STDC
, FRVBF_SFMT_STBU
, FRVBF_SFMT_STBFU
, FRVBF_SFMT_STCU
249 , FRVBF_SFMT_STDU
, FRVBF_SFMT_STDFU
, FRVBF_SFMT_STDCU
, FRVBF_SFMT_STQU
250 , FRVBF_SFMT_CLDSB
, FRVBF_SFMT_CLDBF
, FRVBF_SFMT_CLDD
, FRVBF_SFMT_CLDDF
251 , FRVBF_SFMT_CLDQ
, FRVBF_SFMT_CLDSBU
, FRVBF_SFMT_CLDBFU
, FRVBF_SFMT_CLDDU
252 , FRVBF_SFMT_CLDDFU
, FRVBF_SFMT_CLDQU
, FRVBF_SFMT_CSTB
, FRVBF_SFMT_CSTBF
253 , FRVBF_SFMT_CSTD
, FRVBF_SFMT_CSTDF
, FRVBF_SFMT_CSTBU
, FRVBF_SFMT_CSTBFU
254 , FRVBF_SFMT_CSTDU
, FRVBF_SFMT_CSTDFU
, FRVBF_SFMT_STBI
, FRVBF_SFMT_STBFI
255 , FRVBF_SFMT_STDI
, FRVBF_SFMT_STDFI
, FRVBF_SFMT_SWAP
, FRVBF_SFMT_SWAPI
256 , FRVBF_SFMT_CSWAP
, FRVBF_SFMT_MOVGF
, FRVBF_SFMT_MOVFG
, FRVBF_SFMT_MOVGFD
257 , FRVBF_SFMT_MOVFGD
, FRVBF_SFMT_MOVGFQ
, FRVBF_SFMT_MOVFGQ
, FRVBF_SFMT_CMOVGF
258 , FRVBF_SFMT_CMOVFG
, FRVBF_SFMT_CMOVGFD
, FRVBF_SFMT_CMOVFGD
, FRVBF_SFMT_MOVGS
259 , FRVBF_SFMT_MOVSG
, FRVBF_SFMT_BRA
, FRVBF_SFMT_BNO
, FRVBF_SFMT_BEQ
260 , FRVBF_SFMT_FBRA
, FRVBF_SFMT_FBNO
, FRVBF_SFMT_FBNE
, FRVBF_SFMT_BCTRLR
261 , FRVBF_SFMT_BRALR
, FRVBF_SFMT_BNOLR
, FRVBF_SFMT_BEQLR
, FRVBF_SFMT_FBRALR
262 , FRVBF_SFMT_FBNOLR
, FRVBF_SFMT_FBEQLR
, FRVBF_SFMT_BCRALR
, FRVBF_SFMT_BCNOLR
263 , FRVBF_SFMT_BCEQLR
, FRVBF_SFMT_FCBRALR
, FRVBF_SFMT_FCBNOLR
, FRVBF_SFMT_FCBEQLR
264 , FRVBF_SFMT_JMPL
, FRVBF_SFMT_CALLL
, FRVBF_SFMT_JMPIL
, FRVBF_SFMT_CALLIL
265 , FRVBF_SFMT_CALL
, FRVBF_SFMT_RETT
, FRVBF_SFMT_REI
, FRVBF_SFMT_TRA
266 , FRVBF_SFMT_TEQ
, FRVBF_SFMT_FTRA
, FRVBF_SFMT_FTNE
, FRVBF_SFMT_TIRA
267 , FRVBF_SFMT_TIEQ
, FRVBF_SFMT_FTIRA
, FRVBF_SFMT_FTINE
, FRVBF_SFMT_BREAK
268 , FRVBF_SFMT_ANDCR
, FRVBF_SFMT_NOTCR
, FRVBF_SFMT_CKRA
, FRVBF_SFMT_CKEQ
269 , FRVBF_SFMT_FCKRA
, FRVBF_SFMT_FCKNE
, FRVBF_SFMT_CCKRA
, FRVBF_SFMT_CCKEQ
270 , FRVBF_SFMT_CFCKRA
, FRVBF_SFMT_CFCKNE
, FRVBF_SFMT_CJMPL
, FRVBF_SFMT_CCALLL
271 , FRVBF_SFMT_ICI
, FRVBF_SFMT_ICEI
, FRVBF_SFMT_ICPL
, FRVBF_SFMT_ICUL
272 , FRVBF_SFMT_CLRGR
, FRVBF_SFMT_CLRFR
, FRVBF_SFMT_COMMITGR
, FRVBF_SFMT_COMMITFR
273 , FRVBF_SFMT_FITOS
, FRVBF_SFMT_FSTOI
, FRVBF_SFMT_FITOD
, FRVBF_SFMT_FDTOI
274 , FRVBF_SFMT_FDITOS
, FRVBF_SFMT_FDSTOI
, FRVBF_SFMT_CFITOS
, FRVBF_SFMT_CFSTOI
275 , FRVBF_SFMT_NFITOS
, FRVBF_SFMT_NFSTOI
, FRVBF_SFMT_FMOVS
, FRVBF_SFMT_FMOVD
276 , FRVBF_SFMT_FDMOVS
, FRVBF_SFMT_CFMOVS
, FRVBF_SFMT_NFSQRTS
, FRVBF_SFMT_FADDS
277 , FRVBF_SFMT_FADDD
, FRVBF_SFMT_CFADDS
, FRVBF_SFMT_NFADDS
, FRVBF_SFMT_FCMPS
278 , FRVBF_SFMT_FCMPD
, FRVBF_SFMT_CFCMPS
, FRVBF_SFMT_FDCMPS
, FRVBF_SFMT_FMADDS
279 , FRVBF_SFMT_FMADDD
, FRVBF_SFMT_FDMADDS
, FRVBF_SFMT_CFMADDS
, FRVBF_SFMT_NFMADDS
280 , FRVBF_SFMT_FMAS
, FRVBF_SFMT_FDMAS
, FRVBF_SFMT_CFMAS
, FRVBF_SFMT_NFDCMPS
281 , FRVBF_SFMT_MHSETLOS
, FRVBF_SFMT_MHSETHIS
, FRVBF_SFMT_MHDSETS
, FRVBF_SFMT_MHSETLOH
282 , FRVBF_SFMT_MHSETHIH
, FRVBF_SFMT_MHDSETH
, FRVBF_SFMT_MAND
, FRVBF_SFMT_CMAND
283 , FRVBF_SFMT_MNOT
, FRVBF_SFMT_CMNOT
, FRVBF_SFMT_MROTLI
, FRVBF_SFMT_MWCUT
284 , FRVBF_SFMT_MWCUTI
, FRVBF_SFMT_MCUT
, FRVBF_SFMT_MCUTI
, FRVBF_SFMT_MDCUTSSI
285 , FRVBF_SFMT_MSLLHI
, FRVBF_SFMT_MDROTLI
, FRVBF_SFMT_MCPLHI
, FRVBF_SFMT_MCPLI
286 , FRVBF_SFMT_MSATHS
, FRVBF_SFMT_MQSATHS
, FRVBF_SFMT_MCMPSH
, FRVBF_SFMT_MABSHS
287 , FRVBF_SFMT_CMADDHSS
, FRVBF_SFMT_CMQADDHSS
, FRVBF_SFMT_MQSLLHI
, FRVBF_SFMT_MADDACCS
288 , FRVBF_SFMT_MDADDACCS
, FRVBF_SFMT_MASACCS
, FRVBF_SFMT_MDASACCS
, FRVBF_SFMT_MMULHS
289 , FRVBF_SFMT_CMMULHS
, FRVBF_SFMT_MQMULHS
, FRVBF_SFMT_CMQMULHS
, FRVBF_SFMT_MMACHS
290 , FRVBF_SFMT_MMACHU
, FRVBF_SFMT_CMMACHS
, FRVBF_SFMT_CMMACHU
, FRVBF_SFMT_MQMACHS
291 , FRVBF_SFMT_MQMACHU
, FRVBF_SFMT_CMQMACHS
, FRVBF_SFMT_CMQMACHU
, FRVBF_SFMT_MCPXRS
292 , FRVBF_SFMT_CMCPXRS
, FRVBF_SFMT_MQCPXRS
, FRVBF_SFMT_MEXPDHW
, FRVBF_SFMT_CMEXPDHW
293 , FRVBF_SFMT_MEXPDHD
, FRVBF_SFMT_CMEXPDHD
, FRVBF_SFMT_MPACKH
, FRVBF_SFMT_MDPACKH
294 , FRVBF_SFMT_MUNPACKH
, FRVBF_SFMT_MDUNPACKH
, FRVBF_SFMT_MBTOH
, FRVBF_SFMT_CMBTOH
295 , FRVBF_SFMT_MHTOB
, FRVBF_SFMT_CMHTOB
, FRVBF_SFMT_MBTOHE
, FRVBF_SFMT_CMBTOHE
296 , FRVBF_SFMT_MCLRACC_0
, FRVBF_SFMT_MRDACC
, FRVBF_SFMT_MRDACCG
, FRVBF_SFMT_MWTACC
300 /* Function unit handlers (user written). */
302 extern int frvbf_model_frv_u_exec (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/);
303 extern int frvbf_model_fr550_u_media_4_quad (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRintieven*/, INT
/*FRintjeven*/, INT
/*ACC40Sk*/, INT
/*ACC40Uk*/);
304 extern int frvbf_model_fr550_u_media_4_add_sub_dual (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*ACC40Si*/, INT
/*ACC40Sk*/);
305 extern int frvbf_model_fr550_u_media_4_add_sub (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*ACC40Si*/, INT
/*ACC40Sk*/);
306 extern int frvbf_model_fr550_u_media_4_acc_dual (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*ACC40Si*/, INT
/*ACC40Sk*/);
307 extern int frvbf_model_fr550_u_media_4_acc (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*ACC40Si*/, INT
/*ACC40Sk*/);
308 extern int frvbf_model_fr550_u_media_4 (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintj*/, INT
/*ACC40Sk*/, INT
/*ACC40Uk*/);
309 extern int frvbf_model_fr550_u_media_set (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRintk*/);
310 extern int frvbf_model_fr550_u_media_3_mclracc (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/);
311 extern int frvbf_model_fr550_u_media_3_wtacc (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*ACC40Sk*/);
312 extern int frvbf_model_fr550_u_media_3_acc_dual (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*ACC40Si*/, INT
/*FRintkeven*/);
313 extern int frvbf_model_fr550_u_media_3_acc (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRintj*/, INT
/*ACC40Si*/, INT
/*FRintk*/);
314 extern int frvbf_model_fr550_u_media_3_dual (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintk*/);
315 extern int frvbf_model_fr550_u_media_dual_expand (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintkeven*/);
316 extern int frvbf_model_fr550_u_media_quad (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRintieven*/, INT
/*FRintjeven*/, INT
/*FRintkeven*/);
317 extern int frvbf_model_fr550_u_media (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintj*/, INT
/*FRintk*/);
318 extern int frvbf_model_fr550_u_float_convert (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRj*/, INT
/*FRintj*/, INT
/*FRdoublej*/, INT
/*FRk*/, INT
/*FRintk*/, INT
/*FRdoublek*/);
319 extern int frvbf_model_fr550_u_commit (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRk*/, INT
/*FRk*/);
320 extern int frvbf_model_fr550_u_dcul (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/);
321 extern int frvbf_model_fr550_u_icul (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/);
322 extern int frvbf_model_fr550_u_dcpl (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/);
323 extern int frvbf_model_fr550_u_icpl (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/);
324 extern int frvbf_model_fr550_u_dcf (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/);
325 extern int frvbf_model_fr550_u_dci (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/);
326 extern int frvbf_model_fr550_u_ici (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/);
327 extern int frvbf_model_fr550_u_clrfr (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRk*/);
328 extern int frvbf_model_fr550_u_clrgr (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRk*/);
329 extern int frvbf_model_fr550_u_fr2fr (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRi*/, INT
/*FRk*/);
330 extern int frvbf_model_fr550_u_swap (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*GRk*/);
331 extern int frvbf_model_fr550_u_fr_store (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*FRintk*/, INT
/*FRdoublek*/);
332 extern int frvbf_model_fr550_u_fr_load (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*FRintk*/, INT
/*FRdoublek*/);
333 extern int frvbf_model_fr550_u_gr_store (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*GRk*/, INT
/*GRdoublek*/);
334 extern int frvbf_model_fr550_u_gr_load (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*GRk*/, INT
/*GRdoublek*/);
335 extern int frvbf_model_fr550_u_set_hilo (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRkhi*/, INT
/*GRklo*/);
336 extern int frvbf_model_fr550_u_gr2spr (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRj*/, INT
/*spr*/);
337 extern int frvbf_model_fr550_u_spr2gr (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*spr*/, INT
/*GRj*/);
338 extern int frvbf_model_fr550_u_gr2fr (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRj*/, INT
/*FRintk*/);
339 extern int frvbf_model_fr550_u_fr2gr (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRintk*/, INT
/*GRj*/);
340 extern int frvbf_model_fr550_u_float_dual_compare (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRi*/, INT
/*FRj*/, INT
/*FCCi_2*/);
341 extern int frvbf_model_fr550_u_float_compare (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRi*/, INT
/*FRj*/, INT
/*FRdoublei*/, INT
/*FRdoublej*/, INT
/*FCCi_2*/);
342 extern int frvbf_model_fr550_u_float_sqrt (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRj*/, INT
/*FRdoublej*/, INT
/*FRk*/, INT
/*FRdoublek*/);
343 extern int frvbf_model_fr550_u_float_div (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRi*/, INT
/*FRj*/, INT
/*FRk*/);
344 extern int frvbf_model_fr550_u_float_dual_arith (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRi*/, INT
/*FRj*/, INT
/*FRdoublei*/, INT
/*FRdoublej*/, INT
/*FRk*/, INT
/*FRdoublek*/);
345 extern int frvbf_model_fr550_u_float_arith (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRi*/, INT
/*FRj*/, INT
/*FRdoublei*/, INT
/*FRdoublej*/, INT
/*FRk*/, INT
/*FRdoublek*/);
346 extern int frvbf_model_fr550_u_check (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*ICCi_3*/, INT
/*FCCi_3*/);
347 extern int frvbf_model_fr550_u_trap (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*ICCi_2*/, INT
/*FCCi_2*/);
348 extern int frvbf_model_fr550_u_branch (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*ICCi_2*/, INT
/*FCCi_2*/);
349 extern int frvbf_model_fr550_u_idiv (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*GRk*/, INT
/*ICCi_1*/);
350 extern int frvbf_model_fr550_u_imul (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*GRdoublek*/, INT
/*ICCi_1*/);
351 extern int frvbf_model_fr550_u_integer (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*GRk*/, INT
/*ICCi_1*/);
352 extern int frvbf_model_fr550_u_exec (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/);
353 extern int frvbf_model_fr500_u_commit (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRk*/, INT
/*FRk*/);
354 extern int frvbf_model_fr500_u_dcul (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/);
355 extern int frvbf_model_fr500_u_icul (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/);
356 extern int frvbf_model_fr500_u_dcpl (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/);
357 extern int frvbf_model_fr500_u_icpl (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/);
358 extern int frvbf_model_fr500_u_dcf (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/);
359 extern int frvbf_model_fr500_u_dci (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/);
360 extern int frvbf_model_fr500_u_ici (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/);
361 extern int frvbf_model_fr500_u_membar (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/);
362 extern int frvbf_model_fr500_u_barrier (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/);
363 extern int frvbf_model_fr500_u_media_dual_btohe (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRintj*/, INT
/*FRintk*/);
364 extern int frvbf_model_fr500_u_media_dual_htob (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRintj*/, INT
/*FRintk*/);
365 extern int frvbf_model_fr500_u_media_dual_btoh (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRintj*/, INT
/*FRintk*/);
366 extern int frvbf_model_fr500_u_media_dual_unpack (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintk*/);
367 extern int frvbf_model_fr500_u_media_dual_expand (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintk*/);
368 extern int frvbf_model_fr500_u_media_quad_complex (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintj*/, INT
/*ACC40Sk*/);
369 extern int frvbf_model_fr500_u_media_quad_mul (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintj*/, INT
/*ACC40Sk*/, INT
/*ACC40Uk*/);
370 extern int frvbf_model_fr500_u_media_dual_mul (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintj*/, INT
/*ACC40Sk*/, INT
/*ACC40Uk*/);
371 extern int frvbf_model_fr500_u_media_quad_arith (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintj*/, INT
/*FRintk*/);
372 extern int frvbf_model_fr500_u_media (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintj*/, INT
/*ACC40Si*/, INT
/*ACCGi*/, INT
/*FRintk*/, INT
/*ACC40Sk*/, INT
/*ACC40Uk*/, INT
/*ACCGk*/);
373 extern int frvbf_model_fr500_u_float_dual_convert (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRj*/, INT
/*FRintj*/, INT
/*FRk*/, INT
/*FRintk*/);
374 extern int frvbf_model_fr500_u_float_convert (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRj*/, INT
/*FRintj*/, INT
/*FRdoublej*/, INT
/*FRk*/, INT
/*FRintk*/, INT
/*FRdoublek*/);
375 extern int frvbf_model_fr500_u_float_dual_compare (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRi*/, INT
/*FRj*/, INT
/*FCCi_2*/);
376 extern int frvbf_model_fr500_u_float_compare (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRi*/, INT
/*FRj*/, INT
/*FRdoublei*/, INT
/*FRdoublej*/, INT
/*FCCi_2*/);
377 extern int frvbf_model_fr500_u_float_dual_sqrt (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRj*/, INT
/*FRk*/);
378 extern int frvbf_model_fr500_u_float_sqrt (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRj*/, INT
/*FRdoublej*/, INT
/*FRk*/, INT
/*FRdoublek*/);
379 extern int frvbf_model_fr500_u_float_div (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRi*/, INT
/*FRj*/, INT
/*FRk*/);
380 extern int frvbf_model_fr500_u_float_dual_arith (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRi*/, INT
/*FRj*/, INT
/*FRdoublei*/, INT
/*FRdoublej*/, INT
/*FRk*/, INT
/*FRdoublek*/);
381 extern int frvbf_model_fr500_u_float_arith (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRi*/, INT
/*FRj*/, INT
/*FRdoublei*/, INT
/*FRdoublej*/, INT
/*FRk*/, INT
/*FRdoublek*/);
382 extern int frvbf_model_fr500_u_gr2spr (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRj*/, INT
/*spr*/);
383 extern int frvbf_model_fr500_u_gr2fr (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRj*/, INT
/*FRintk*/);
384 extern int frvbf_model_fr500_u_spr2gr (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*spr*/, INT
/*GRj*/);
385 extern int frvbf_model_fr500_u_fr2gr (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRintk*/, INT
/*GRj*/);
386 extern int frvbf_model_fr500_u_fr2fr (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRi*/, INT
/*FRk*/);
387 extern int frvbf_model_fr500_u_swap (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*GRk*/);
388 extern int frvbf_model_fr500_u_fr_r_store (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*FRintk*/, INT
/*FRdoublek*/);
389 extern int frvbf_model_fr500_u_fr_store (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*FRintk*/, INT
/*FRdoublek*/);
390 extern int frvbf_model_fr500_u_fr_load (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*FRintk*/, INT
/*FRdoublek*/);
391 extern int frvbf_model_fr500_u_gr_r_store (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*GRk*/, INT
/*GRdoublek*/);
392 extern int frvbf_model_fr500_u_gr_store (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*GRk*/, INT
/*GRdoublek*/);
393 extern int frvbf_model_fr500_u_gr_load (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*GRk*/, INT
/*GRdoublek*/);
394 extern int frvbf_model_fr500_u_set_hilo (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRkhi*/, INT
/*GRklo*/);
395 extern int frvbf_model_fr500_u_clrfr (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRk*/);
396 extern int frvbf_model_fr500_u_clrgr (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRk*/);
397 extern int frvbf_model_fr500_u_check (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*ICCi_3*/, INT
/*FCCi_3*/);
398 extern int frvbf_model_fr500_u_trap (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*ICCi_2*/, INT
/*FCCi_2*/);
399 extern int frvbf_model_fr500_u_branch (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*ICCi_2*/, INT
/*FCCi_2*/);
400 extern int frvbf_model_fr500_u_idiv (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*GRk*/, INT
/*ICCi_1*/);
401 extern int frvbf_model_fr500_u_imul (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*GRdoublek*/, INT
/*ICCi_1*/);
402 extern int frvbf_model_fr500_u_integer (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*GRk*/, INT
/*ICCi_1*/);
403 extern int frvbf_model_fr500_u_exec (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/);
404 extern int frvbf_model_tomcat_u_exec (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/);
405 extern int frvbf_model_fr400_u_dcul (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/);
406 extern int frvbf_model_fr400_u_icul (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/);
407 extern int frvbf_model_fr400_u_dcpl (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/);
408 extern int frvbf_model_fr400_u_icpl (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/);
409 extern int frvbf_model_fr400_u_dcf (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/);
410 extern int frvbf_model_fr400_u_dci (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/);
411 extern int frvbf_model_fr400_u_ici (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/);
412 extern int frvbf_model_fr400_u_membar (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/);
413 extern int frvbf_model_fr400_u_barrier (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/);
414 extern int frvbf_model_fr400_u_media_dual_htob (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRintj*/, INT
/*FRintk*/);
415 extern int frvbf_model_fr400_u_media_dual_expand (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintk*/);
416 extern int frvbf_model_fr400_u_media_7 (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintj*/, INT
/*FCCk*/);
417 extern int frvbf_model_fr400_u_media_6 (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintk*/);
418 extern int frvbf_model_fr400_u_media_4_acc_dual (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*ACC40Si*/, INT
/*FRintk*/);
419 extern int frvbf_model_fr400_u_media_4_accg (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*ACCGi*/, INT
/*FRinti*/, INT
/*ACCGk*/, INT
/*FRintk*/);
420 extern int frvbf_model_fr400_u_media_4 (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*ACC40Si*/, INT
/*FRintj*/, INT
/*ACC40Sk*/, INT
/*FRintk*/);
421 extern int frvbf_model_fr400_u_media_3_quad (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintj*/, INT
/*FRintk*/);
422 extern int frvbf_model_fr400_u_media_3_dual (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintk*/);
423 extern int frvbf_model_fr400_u_media_3 (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintj*/, INT
/*FRintk*/);
424 extern int frvbf_model_fr400_u_media_2_add_sub_dual (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*ACC40Si*/, INT
/*ACC40Sk*/);
425 extern int frvbf_model_fr400_u_media_2_add_sub (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*ACC40Si*/, INT
/*ACC40Sk*/);
426 extern int frvbf_model_fr400_u_media_2_acc_dual (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*ACC40Si*/, INT
/*ACC40Sk*/);
427 extern int frvbf_model_fr400_u_media_2_acc (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*ACC40Si*/, INT
/*ACC40Sk*/);
428 extern int frvbf_model_fr400_u_media_2_quad (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintj*/, INT
/*ACC40Sk*/, INT
/*ACC40Uk*/);
429 extern int frvbf_model_fr400_u_media_2 (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintj*/, INT
/*ACC40Sk*/, INT
/*ACC40Uk*/);
430 extern int frvbf_model_fr400_u_media_hilo (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRkhi*/, INT
/*FRklo*/);
431 extern int frvbf_model_fr400_u_media_1_quad (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintj*/, INT
/*FRintk*/);
432 extern int frvbf_model_fr400_u_media_1 (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintj*/, INT
/*FRintk*/);
433 extern int frvbf_model_fr400_u_gr2spr (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRj*/, INT
/*spr*/);
434 extern int frvbf_model_fr400_u_gr2fr (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRj*/, INT
/*FRintk*/);
435 extern int frvbf_model_fr400_u_spr2gr (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*spr*/, INT
/*GRj*/);
436 extern int frvbf_model_fr400_u_fr2gr (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRintk*/, INT
/*GRj*/);
437 extern int frvbf_model_fr400_u_swap (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*GRk*/);
438 extern int frvbf_model_fr400_u_fr_store (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*FRintk*/, INT
/*FRdoublek*/);
439 extern int frvbf_model_fr400_u_fr_load (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*FRintk*/, INT
/*FRdoublek*/);
440 extern int frvbf_model_fr400_u_gr_store (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*GRk*/, INT
/*GRdoublek*/);
441 extern int frvbf_model_fr400_u_gr_load (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*GRk*/, INT
/*GRdoublek*/);
442 extern int frvbf_model_fr400_u_set_hilo (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRkhi*/, INT
/*GRklo*/);
443 extern int frvbf_model_fr400_u_check (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*ICCi_3*/, INT
/*FCCi_3*/);
444 extern int frvbf_model_fr400_u_trap (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*ICCi_2*/, INT
/*FCCi_2*/);
445 extern int frvbf_model_fr400_u_branch (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*ICCi_2*/, INT
/*FCCi_2*/);
446 extern int frvbf_model_fr400_u_idiv (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*GRk*/, INT
/*ICCi_1*/);
447 extern int frvbf_model_fr400_u_imul (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*GRdoublek*/, INT
/*ICCi_1*/);
448 extern int frvbf_model_fr400_u_integer (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*GRk*/, INT
/*ICCi_1*/);
449 extern int frvbf_model_fr400_u_exec (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/);
450 extern int frvbf_model_fr450_u_dcul (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/);
451 extern int frvbf_model_fr450_u_icul (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/);
452 extern int frvbf_model_fr450_u_dcpl (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/);
453 extern int frvbf_model_fr450_u_icpl (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/);
454 extern int frvbf_model_fr450_u_dcf (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/);
455 extern int frvbf_model_fr450_u_dci (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/);
456 extern int frvbf_model_fr450_u_ici (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/);
457 extern int frvbf_model_fr450_u_membar (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/);
458 extern int frvbf_model_fr450_u_barrier (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/);
459 extern int frvbf_model_fr450_u_media_dual_htob (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRintj*/, INT
/*FRintk*/);
460 extern int frvbf_model_fr450_u_media_dual_expand (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintk*/);
461 extern int frvbf_model_fr450_u_media_7 (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintj*/, INT
/*FCCk*/);
462 extern int frvbf_model_fr450_u_media_6 (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintk*/);
463 extern int frvbf_model_fr450_u_media_4_mclracca (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/);
464 extern int frvbf_model_fr450_u_media_4_acc_dual (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*ACC40Si*/, INT
/*FRintk*/);
465 extern int frvbf_model_fr450_u_media_4_accg (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*ACCGi*/, INT
/*FRinti*/, INT
/*ACCGk*/, INT
/*FRintk*/);
466 extern int frvbf_model_fr450_u_media_4 (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*ACC40Si*/, INT
/*FRintj*/, INT
/*ACC40Sk*/, INT
/*FRintk*/);
467 extern int frvbf_model_fr450_u_media_3_quad (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintj*/, INT
/*FRintk*/);
468 extern int frvbf_model_fr450_u_media_3_dual (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintk*/);
469 extern int frvbf_model_fr450_u_media_3 (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintj*/, INT
/*FRintk*/);
470 extern int frvbf_model_fr450_u_media_2_add_sub_dual (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*ACC40Si*/, INT
/*ACC40Sk*/);
471 extern int frvbf_model_fr450_u_media_2_add_sub (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*ACC40Si*/, INT
/*ACC40Sk*/);
472 extern int frvbf_model_fr450_u_media_2_acc_dual (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*ACC40Si*/, INT
/*ACC40Sk*/);
473 extern int frvbf_model_fr450_u_media_2_acc (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*ACC40Si*/, INT
/*ACC40Sk*/);
474 extern int frvbf_model_fr450_u_media_2_quad (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintj*/, INT
/*ACC40Sk*/, INT
/*ACC40Uk*/);
475 extern int frvbf_model_fr450_u_media_2 (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintj*/, INT
/*ACC40Sk*/, INT
/*ACC40Uk*/);
476 extern int frvbf_model_fr450_u_media_hilo (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRkhi*/, INT
/*FRklo*/);
477 extern int frvbf_model_fr450_u_media_1_quad (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintj*/, INT
/*FRintk*/);
478 extern int frvbf_model_fr450_u_media_1 (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRinti*/, INT
/*FRintj*/, INT
/*FRintk*/);
479 extern int frvbf_model_fr450_u_gr2spr (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRj*/, INT
/*spr*/);
480 extern int frvbf_model_fr450_u_gr2fr (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRj*/, INT
/*FRintk*/);
481 extern int frvbf_model_fr450_u_spr2gr (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*spr*/, INT
/*GRj*/);
482 extern int frvbf_model_fr450_u_fr2gr (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*FRintk*/, INT
/*GRj*/);
483 extern int frvbf_model_fr450_u_swap (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*GRk*/);
484 extern int frvbf_model_fr450_u_fr_store (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*FRintk*/, INT
/*FRdoublek*/);
485 extern int frvbf_model_fr450_u_fr_load (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*FRintk*/, INT
/*FRdoublek*/);
486 extern int frvbf_model_fr450_u_gr_store (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*GRk*/, INT
/*GRdoublek*/);
487 extern int frvbf_model_fr450_u_gr_load (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*GRk*/, INT
/*GRdoublek*/);
488 extern int frvbf_model_fr450_u_set_hilo (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRkhi*/, INT
/*GRklo*/);
489 extern int frvbf_model_fr450_u_check (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*ICCi_3*/, INT
/*FCCi_3*/);
490 extern int frvbf_model_fr450_u_trap (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*ICCi_2*/, INT
/*FCCi_2*/);
491 extern int frvbf_model_fr450_u_branch (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*ICCi_2*/, INT
/*FCCi_2*/);
492 extern int frvbf_model_fr450_u_idiv (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*GRk*/, INT
/*ICCi_1*/);
493 extern int frvbf_model_fr450_u_imul (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*GRdoublek*/, INT
/*ICCi_1*/);
494 extern int frvbf_model_fr450_u_integer (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*GRi*/, INT
/*GRj*/, INT
/*GRk*/, INT
/*ICCi_1*/);
495 extern int frvbf_model_fr450_u_exec (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/);
496 extern int frvbf_model_simple_u_exec (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/);
498 /* Profiling before/after handlers (user written) */
500 extern void frvbf_model_insn_before (SIM_CPU
*, int /*first_p*/);
501 extern void frvbf_model_insn_after (SIM_CPU
*, int /*last_p*/, int /*cycles*/);
503 #endif /* FRVBF_DECODE_H */
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