sim/igen/igen.h

   1 /*  This file is part of the program psim.
   2
   3     Copyright (C) 1994-1998, Andrew Cagney <cagney@highland.com.au>
   4
   5     This program is free software; you can redistribute it and/or modify
   6     it under the terms of the GNU General Public License as published by
   7     the Free Software Foundation; either version 2 of the License, or
   8     (at your option) any later version.
   9
  10     This program is distributed in the hope that it will be useful,
  11     but WITHOUT ANY WARRANTY; without even the implied warranty of
  12     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13     GNU General Public License for more details.
  14
  15     You should have received a copy of the GNU General Public License
  16     along with this program; if not, write to the Free Software
  17     Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  18
  19     */
  20
  21 /* code-generation options: */
  22
  23 typedef enum {
  24
  25   /* Transfer control to an instructions semantic code using the the
  26      standard call/return mechanism */
  27
  28   generate_calls,
  29
  30   /* Transfer control to an instructions semantic code using
  31      (computed) goto's instead of the more conventional call/return
  32      mechanism */
  33
  34   generate_jumps,
  35
  36 } igen_code;
  37
  38 typedef enum {
  39   nia_is_cia_plus_one,
  40   nia_is_void,
  41   nia_is_invalid,
  42 } igen_nia;
  43
  44
  45
  46 typedef struct _igen_gen_options igen_gen_options;
  47 struct _igen_gen_options {
  48   int direct_access;
  49   int semantic_icache;
  50   int insn_in_icache;
  51   int conditional_issue;
  52   int slot_verification;
  53   int delayed_branch;
  54
  55   /* If zeroing a register, which one? */
  56   int zero_reg;
  57   int zero_reg_nr;
  58
  59   /* should multiple simulators be generated? */
  60   int multi_sim;
  61
  62   /* name of the default multi-sim model */
  63   char *default_model;
  64
  65   /* should the simulator support multi word instructions and if so,
  66      what is the max nr of words. */
  67   int multi_word;
  68
  69   /* SMP?  Should the generated code include SMP support (>0) and if
  70      so, for how many processors? */
  71   int smp;
  72
  73   /* how should the next instruction address be computed? */
  74   igen_nia nia;
  75
  76   /* nr of instructions in the decoded instruction cache */
  77   int icache;
  78   int icache_size;
  79
  80   /* see above */
  81   igen_code code;
  82 };
  83
  84
  85 typedef struct _igen_trace_options igen_trace_options;
  86 struct _igen_trace_options {
  87   int rule_selection;
  88   int rule_rejection;
  89   int entries;
  90   int combine;
  91 };
  92
  93 typedef struct _igen_name {
  94   char *u;
  95   char *l;
  96 } igen_name;
  97 typedef struct _igen_module {
  98   igen_name prefix;
  99   igen_name suffix;
 100 } igen_module;
 101
 102 typedef struct _igen_module_options {
 103   igen_module global;
 104   igen_module engine;
 105   igen_module icache;
 106   igen_module idecode;
 107   igen_module itable;
 108   igen_module semantics;
 109   igen_module support;
 110 } igen_module_options;
 111
 112 typedef struct _igen_decode_options igen_decode_options ;
 113 struct _igen_decode_options {
 114
 115   /* Combine tables?  Should the generator make a second pass through
 116      each generated table looking for any sub-entries that contain the
 117      same instructions.  Those entries being merged into a single
 118      table */
 119   int combine;
 120
 121   /* Instruction expansion? Should the semantic code for each
 122      instruction, when the oportunity arrises, be expanded according
 123      to the variable opcode files that the instruction decode process
 124      renders constant */
 125   int duplicate;
 126
 127   /* Treat reserved fields as constant (zero) instead of ignoring
 128      their value when determining decode tables */
 129   int zero_reserved;
 130
 131   /* Convert any padded switch rules into goto_switch */
 132   int switch_as_goto;
 133
 134   /* Force all tables to be generated with this lookup mechanism */
 135   char *overriding_gen;
 136 };
 137
 138
 139 typedef struct _igen_warn_options igen_warn_options;
 140 struct _igen_warn_options {
 141
 142   /* Issue warning about discarded instructions */
 143   int discard;
 144
 145   /* Issue warning about invalid instruction widths */
 146   int width;
 147 };
 148
 149
 150
 151 typedef struct _igen_options igen_options;
 152 struct _igen_options {
 153
 154   /* What does the instruction look like - bit ordering, size, widths or
 155      offesets */
 156   int hi_bit_nr;
 157   int insn_bit_size;
 158   int insn_specifying_widths;
 159
 160   /* what should global names be prefixed with? */
 161   igen_module_options module;
 162
 163   /* See above for options and flags */
 164   igen_gen_options gen;
 165
 166   /* See above for trace options */
 167   igen_trace_options trace;
 168
 169   /* See above for include options */
 170   table_include *include;
 171
 172   /* See above for decode options */
 173   igen_decode_options decode;
 174
 175   /* Filter set to be used on the flag field of the instruction table */
 176   filter *flags_filter;
 177
 178   /* See above for warn options */
 179   igen_warn_options warn;
 180
 181   /* Be more picky about the input */
 182   error_func (*warning);
 183
 184   /* Model (processor) set - like flags_filter. Used to select the
 185      specific ISA within a processor family. */
 186   filter *model_filter;
 187
 188   /* Format name set */
 189   filter *format_name_filter;
 190 };
 191
 192 extern igen_options options;
 193
 194 /* default options - hopefully backward compatible */ \
 195 #define INIT_OPTIONS() \
 196 do { \
 197   memset (&options, 0, sizeof options); \
 198   memset (&options.warn, -1, sizeof (options.warn)); \
 199   options.hi_bit_nr = 0; \
 200   options.insn_bit_size = default_insn_bit_size; \
 201   options.insn_specifying_widths = 0; \
 202   options.module.global.prefix.u = ""; \
 203   options.module.global.prefix.l = ""; \
 204   /* the prefixes */ \
 205   options.module.engine = options.module.global; \
 206   options.module.icache = options.module.global; \
 207   options.module.idecode = options.module.global; \
 208   options.module.itable = options.module.global; \
 209   options.module.semantics = options.module.global; \
 210   options.module.support = options.module.global; \
 211   /* the suffixes */ \
 212   options.module.engine.suffix.l = "engine"; \
 213   options.module.engine.suffix.u = "ENGINE"; \
 214   options.module.icache.suffix.l = "icache"; \
 215   options.module.icache.suffix.u = "ICACHE"; \
 216   options.module.idecode.suffix.l = "idecode"; \
 217   options.module.idecode.suffix.u = "IDECODE"; \
 218   options.module.itable.suffix.l = "itable"; \
 219   options.module.itable.suffix.u = "ITABLE"; \
 220   options.module.semantics.suffix.l = "semantics"; \
 221   options.module.semantics.suffix.u = "SEMANTICS"; \
 222   options.module.support.suffix.l = "support"; \
 223   options.module.support.suffix.u = "SUPPORT"; \
 224   /* misc stuff */ \
 225   options.gen.code = generate_calls; \
 226   options.gen.icache_size = 1024; \
 227   options.warning = warning; \
 228 } while (0)