1 /* Simulator instruction decoder for lm32bf.
3 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 Copyright 1996-2005 Free Software Foundation, Inc.
7 This file is part of the GNU simulators.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2, or (at your option)
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License along
20 with this program; if not, write to the Free Software Foundation, Inc.,
21 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
25 #define WANT_CPU lm32bf
26 #define WANT_CPU_LM32BF
29 #include "sim-assert.h"
31 /* The instruction descriptor array.
32 This is computed at runtime. Space for it is not malloc'd to save a
33 teensy bit of cpu in the decoder. Moving it to malloc space is trivial
34 but won't be done until necessary (we don't currently support the runtime
35 addition of instructions nor an SMP machine with different cpus). */
36 static IDESC lm32bf_insn_data
[LM32BF_INSN__MAX
];
38 /* Commas between elements are contained in the macros.
39 Some of these are conditionally compiled out. */
41 static const struct insn_sem lm32bf_insn_sem
[] =
43 { VIRTUAL_INSN_X_INVALID
, LM32BF_INSN_X_INVALID
, LM32BF_SFMT_EMPTY
},
44 { VIRTUAL_INSN_X_AFTER
, LM32BF_INSN_X_AFTER
, LM32BF_SFMT_EMPTY
},
45 { VIRTUAL_INSN_X_BEFORE
, LM32BF_INSN_X_BEFORE
, LM32BF_SFMT_EMPTY
},
46 { VIRTUAL_INSN_X_CTI_CHAIN
, LM32BF_INSN_X_CTI_CHAIN
, LM32BF_SFMT_EMPTY
},
47 { VIRTUAL_INSN_X_CHAIN
, LM32BF_INSN_X_CHAIN
, LM32BF_SFMT_EMPTY
},
48 { VIRTUAL_INSN_X_BEGIN
, LM32BF_INSN_X_BEGIN
, LM32BF_SFMT_EMPTY
},
49 { LM32_INSN_ADD
, LM32BF_INSN_ADD
, LM32BF_SFMT_ADD
},
50 { LM32_INSN_ADDI
, LM32BF_INSN_ADDI
, LM32BF_SFMT_ADDI
},
51 { LM32_INSN_AND
, LM32BF_INSN_AND
, LM32BF_SFMT_ADD
},
52 { LM32_INSN_ANDI
, LM32BF_INSN_ANDI
, LM32BF_SFMT_ANDI
},
53 { LM32_INSN_ANDHII
, LM32BF_INSN_ANDHII
, LM32BF_SFMT_ANDHII
},
54 { LM32_INSN_B
, LM32BF_INSN_B
, LM32BF_SFMT_B
},
55 { LM32_INSN_BI
, LM32BF_INSN_BI
, LM32BF_SFMT_BI
},
56 { LM32_INSN_BE
, LM32BF_INSN_BE
, LM32BF_SFMT_BE
},
57 { LM32_INSN_BG
, LM32BF_INSN_BG
, LM32BF_SFMT_BE
},
58 { LM32_INSN_BGE
, LM32BF_INSN_BGE
, LM32BF_SFMT_BE
},
59 { LM32_INSN_BGEU
, LM32BF_INSN_BGEU
, LM32BF_SFMT_BE
},
60 { LM32_INSN_BGU
, LM32BF_INSN_BGU
, LM32BF_SFMT_BE
},
61 { LM32_INSN_BNE
, LM32BF_INSN_BNE
, LM32BF_SFMT_BE
},
62 { LM32_INSN_CALL
, LM32BF_INSN_CALL
, LM32BF_SFMT_CALL
},
63 { LM32_INSN_CALLI
, LM32BF_INSN_CALLI
, LM32BF_SFMT_CALLI
},
64 { LM32_INSN_CMPE
, LM32BF_INSN_CMPE
, LM32BF_SFMT_ADD
},
65 { LM32_INSN_CMPEI
, LM32BF_INSN_CMPEI
, LM32BF_SFMT_ADDI
},
66 { LM32_INSN_CMPG
, LM32BF_INSN_CMPG
, LM32BF_SFMT_ADD
},
67 { LM32_INSN_CMPGI
, LM32BF_INSN_CMPGI
, LM32BF_SFMT_ADDI
},
68 { LM32_INSN_CMPGE
, LM32BF_INSN_CMPGE
, LM32BF_SFMT_ADD
},
69 { LM32_INSN_CMPGEI
, LM32BF_INSN_CMPGEI
, LM32BF_SFMT_ADDI
},
70 { LM32_INSN_CMPGEU
, LM32BF_INSN_CMPGEU
, LM32BF_SFMT_ADD
},
71 { LM32_INSN_CMPGEUI
, LM32BF_INSN_CMPGEUI
, LM32BF_SFMT_ANDI
},
72 { LM32_INSN_CMPGU
, LM32BF_INSN_CMPGU
, LM32BF_SFMT_ADD
},
73 { LM32_INSN_CMPGUI
, LM32BF_INSN_CMPGUI
, LM32BF_SFMT_ANDI
},
74 { LM32_INSN_CMPNE
, LM32BF_INSN_CMPNE
, LM32BF_SFMT_ADD
},
75 { LM32_INSN_CMPNEI
, LM32BF_INSN_CMPNEI
, LM32BF_SFMT_ADDI
},
76 { LM32_INSN_DIVU
, LM32BF_INSN_DIVU
, LM32BF_SFMT_DIVU
},
77 { LM32_INSN_LB
, LM32BF_INSN_LB
, LM32BF_SFMT_LB
},
78 { LM32_INSN_LBU
, LM32BF_INSN_LBU
, LM32BF_SFMT_LB
},
79 { LM32_INSN_LH
, LM32BF_INSN_LH
, LM32BF_SFMT_LH
},
80 { LM32_INSN_LHU
, LM32BF_INSN_LHU
, LM32BF_SFMT_LH
},
81 { LM32_INSN_LW
, LM32BF_INSN_LW
, LM32BF_SFMT_LW
},
82 { LM32_INSN_MODU
, LM32BF_INSN_MODU
, LM32BF_SFMT_DIVU
},
83 { LM32_INSN_MUL
, LM32BF_INSN_MUL
, LM32BF_SFMT_ADD
},
84 { LM32_INSN_MULI
, LM32BF_INSN_MULI
, LM32BF_SFMT_ADDI
},
85 { LM32_INSN_NOR
, LM32BF_INSN_NOR
, LM32BF_SFMT_ADD
},
86 { LM32_INSN_NORI
, LM32BF_INSN_NORI
, LM32BF_SFMT_ANDI
},
87 { LM32_INSN_OR
, LM32BF_INSN_OR
, LM32BF_SFMT_ADD
},
88 { LM32_INSN_ORI
, LM32BF_INSN_ORI
, LM32BF_SFMT_ORI
},
89 { LM32_INSN_ORHII
, LM32BF_INSN_ORHII
, LM32BF_SFMT_ANDHII
},
90 { LM32_INSN_RCSR
, LM32BF_INSN_RCSR
, LM32BF_SFMT_RCSR
},
91 { LM32_INSN_SB
, LM32BF_INSN_SB
, LM32BF_SFMT_SB
},
92 { LM32_INSN_SEXTB
, LM32BF_INSN_SEXTB
, LM32BF_SFMT_SEXTB
},
93 { LM32_INSN_SEXTH
, LM32BF_INSN_SEXTH
, LM32BF_SFMT_SEXTB
},
94 { LM32_INSN_SH
, LM32BF_INSN_SH
, LM32BF_SFMT_SH
},
95 { LM32_INSN_SL
, LM32BF_INSN_SL
, LM32BF_SFMT_SL
},
96 { LM32_INSN_SLI
, LM32BF_INSN_SLI
, LM32BF_SFMT_ADDI
},
97 { LM32_INSN_SR
, LM32BF_INSN_SR
, LM32BF_SFMT_SL
},
98 { LM32_INSN_SRI
, LM32BF_INSN_SRI
, LM32BF_SFMT_ADDI
},
99 { LM32_INSN_SRU
, LM32BF_INSN_SRU
, LM32BF_SFMT_SL
},
100 { LM32_INSN_SRUI
, LM32BF_INSN_SRUI
, LM32BF_SFMT_ADDI
},
101 { LM32_INSN_SUB
, LM32BF_INSN_SUB
, LM32BF_SFMT_ADD
},
102 { LM32_INSN_SW
, LM32BF_INSN_SW
, LM32BF_SFMT_SW
},
103 { LM32_INSN_USER
, LM32BF_INSN_USER
, LM32BF_SFMT_USER
},
104 { LM32_INSN_WCSR
, LM32BF_INSN_WCSR
, LM32BF_SFMT_WCSR
},
105 { LM32_INSN_XOR
, LM32BF_INSN_XOR
, LM32BF_SFMT_ADD
},
106 { LM32_INSN_XORI
, LM32BF_INSN_XORI
, LM32BF_SFMT_ANDI
},
107 { LM32_INSN_XNOR
, LM32BF_INSN_XNOR
, LM32BF_SFMT_ADD
},
108 { LM32_INSN_XNORI
, LM32BF_INSN_XNORI
, LM32BF_SFMT_ANDI
},
109 { LM32_INSN_BREAK
, LM32BF_INSN_BREAK
, LM32BF_SFMT_BREAK
},
110 { LM32_INSN_SCALL
, LM32BF_INSN_SCALL
, LM32BF_SFMT_BREAK
},
113 static const struct insn_sem lm32bf_insn_sem_invalid
= {
114 VIRTUAL_INSN_X_INVALID
, LM32BF_INSN_X_INVALID
, LM32BF_SFMT_EMPTY
117 /* Initialize an IDESC from the compile-time computable parts. */
120 init_idesc (SIM_CPU
*cpu
, IDESC
*id
, const struct insn_sem
*t
)
122 const CGEN_INSN
*insn_table
= CGEN_CPU_INSN_TABLE (CPU_CPU_DESC (cpu
))->init_entries
;
126 if ((int) t
->type
<= 0)
127 id
->idata
= & cgen_virtual_insn_table
[- (int) t
->type
];
129 id
->idata
= & insn_table
[t
->type
];
130 id
->attrs
= CGEN_INSN_ATTRS (id
->idata
);
131 /* Oh my god, a magic number. */
132 id
->length
= CGEN_INSN_BITSIZE (id
->idata
) / 8;
134 #if WITH_PROFILE_MODEL_P
135 id
->timing
= & MODEL_TIMING (CPU_MODEL (cpu
)) [t
->index
];
137 SIM_DESC sd
= CPU_STATE (cpu
);
138 SIM_ASSERT (t
->index
== id
->timing
->num
);
142 /* Semantic pointers are initialized elsewhere. */
145 /* Initialize the instruction descriptor table. */
148 lm32bf_init_idesc_table (SIM_CPU
*cpu
)
151 const struct insn_sem
*t
,*tend
;
152 int tabsize
= LM32BF_INSN__MAX
;
153 IDESC
*table
= lm32bf_insn_data
;
155 memset (table
, 0, tabsize
* sizeof (IDESC
));
157 /* First set all entries to the `invalid insn'. */
158 t
= & lm32bf_insn_sem_invalid
;
159 for (id
= table
, tabend
= table
+ tabsize
; id
< tabend
; ++id
)
160 init_idesc (cpu
, id
, t
);
162 /* Now fill in the values for the chosen cpu. */
163 for (t
= lm32bf_insn_sem
, tend
= t
+ sizeof (lm32bf_insn_sem
) / sizeof (*t
);
166 init_idesc (cpu
, & table
[t
->index
], t
);
169 /* Link the IDESC table into the cpu. */
170 CPU_IDESC (cpu
) = table
;
173 /* Given an instruction, return a pointer to its IDESC entry. */
176 lm32bf_decode (SIM_CPU
*current_cpu
, IADDR pc
,
177 CGEN_INSN_INT base_insn
, CGEN_INSN_INT entire_insn
,
180 /* Result of decoder. */
181 LM32BF_INSN_TYPE itype
;
184 CGEN_INSN_INT insn
= base_insn
;
187 unsigned int val
= (((insn
>> 26) & (63 << 0)));
191 if ((entire_insn
& 0xfc000000) == 0x0)
192 { itype
= LM32BF_INSN_SRUI
; goto extract_sfmt_addi
; }
193 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
195 if ((entire_insn
& 0xfc000000) == 0x4000000)
196 { itype
= LM32BF_INSN_NORI
; goto extract_sfmt_andi
; }
197 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
199 if ((entire_insn
& 0xfc000000) == 0x8000000)
200 { itype
= LM32BF_INSN_MULI
; goto extract_sfmt_addi
; }
201 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
203 if ((entire_insn
& 0xfc000000) == 0xc000000)
204 { itype
= LM32BF_INSN_SH
; goto extract_sfmt_sh
; }
205 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
207 if ((entire_insn
& 0xfc000000) == 0x10000000)
208 { itype
= LM32BF_INSN_LB
; goto extract_sfmt_lb
; }
209 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
211 if ((entire_insn
& 0xfc000000) == 0x14000000)
212 { itype
= LM32BF_INSN_SRI
; goto extract_sfmt_addi
; }
213 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
215 if ((entire_insn
& 0xfc000000) == 0x18000000)
216 { itype
= LM32BF_INSN_XORI
; goto extract_sfmt_andi
; }
217 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
219 if ((entire_insn
& 0xfc000000) == 0x1c000000)
220 { itype
= LM32BF_INSN_LH
; goto extract_sfmt_lh
; }
221 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
223 if ((entire_insn
& 0xfc000000) == 0x20000000)
224 { itype
= LM32BF_INSN_ANDI
; goto extract_sfmt_andi
; }
225 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
227 if ((entire_insn
& 0xfc000000) == 0x24000000)
228 { itype
= LM32BF_INSN_XNORI
; goto extract_sfmt_andi
; }
229 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
231 if ((entire_insn
& 0xfc000000) == 0x28000000)
232 { itype
= LM32BF_INSN_LW
; goto extract_sfmt_lw
; }
233 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
235 if ((entire_insn
& 0xfc000000) == 0x2c000000)
236 { itype
= LM32BF_INSN_LHU
; goto extract_sfmt_lh
; }
237 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
239 if ((entire_insn
& 0xfc000000) == 0x30000000)
240 { itype
= LM32BF_INSN_SB
; goto extract_sfmt_sb
; }
241 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
243 if ((entire_insn
& 0xfc000000) == 0x34000000)
244 { itype
= LM32BF_INSN_ADDI
; goto extract_sfmt_addi
; }
245 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
247 if ((entire_insn
& 0xfc000000) == 0x38000000)
248 { itype
= LM32BF_INSN_ORI
; goto extract_sfmt_ori
; }
249 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
251 if ((entire_insn
& 0xfc000000) == 0x3c000000)
252 { itype
= LM32BF_INSN_SLI
; goto extract_sfmt_addi
; }
253 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
255 if ((entire_insn
& 0xfc000000) == 0x40000000)
256 { itype
= LM32BF_INSN_LBU
; goto extract_sfmt_lb
; }
257 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
259 if ((entire_insn
& 0xfc000000) == 0x44000000)
260 { itype
= LM32BF_INSN_BE
; goto extract_sfmt_be
; }
261 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
263 if ((entire_insn
& 0xfc000000) == 0x48000000)
264 { itype
= LM32BF_INSN_BG
; goto extract_sfmt_be
; }
265 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
267 if ((entire_insn
& 0xfc000000) == 0x4c000000)
268 { itype
= LM32BF_INSN_BGE
; goto extract_sfmt_be
; }
269 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
271 if ((entire_insn
& 0xfc000000) == 0x50000000)
272 { itype
= LM32BF_INSN_BGEU
; goto extract_sfmt_be
; }
273 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
275 if ((entire_insn
& 0xfc000000) == 0x54000000)
276 { itype
= LM32BF_INSN_BGU
; goto extract_sfmt_be
; }
277 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
279 if ((entire_insn
& 0xfc000000) == 0x58000000)
280 { itype
= LM32BF_INSN_SW
; goto extract_sfmt_sw
; }
281 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
283 if ((entire_insn
& 0xfc000000) == 0x5c000000)
284 { itype
= LM32BF_INSN_BNE
; goto extract_sfmt_be
; }
285 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
287 if ((entire_insn
& 0xfc000000) == 0x60000000)
288 { itype
= LM32BF_INSN_ANDHII
; goto extract_sfmt_andhii
; }
289 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
291 if ((entire_insn
& 0xfc000000) == 0x64000000)
292 { itype
= LM32BF_INSN_CMPEI
; goto extract_sfmt_addi
; }
293 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
295 if ((entire_insn
& 0xfc000000) == 0x68000000)
296 { itype
= LM32BF_INSN_CMPGI
; goto extract_sfmt_addi
; }
297 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
299 if ((entire_insn
& 0xfc000000) == 0x6c000000)
300 { itype
= LM32BF_INSN_CMPGEI
; goto extract_sfmt_addi
; }
301 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
303 if ((entire_insn
& 0xfc000000) == 0x70000000)
304 { itype
= LM32BF_INSN_CMPGEUI
; goto extract_sfmt_andi
; }
305 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
307 if ((entire_insn
& 0xfc000000) == 0x74000000)
308 { itype
= LM32BF_INSN_CMPGUI
; goto extract_sfmt_andi
; }
309 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
311 if ((entire_insn
& 0xfc000000) == 0x78000000)
312 { itype
= LM32BF_INSN_ORHII
; goto extract_sfmt_andhii
; }
313 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
315 if ((entire_insn
& 0xfc000000) == 0x7c000000)
316 { itype
= LM32BF_INSN_CMPNEI
; goto extract_sfmt_addi
; }
317 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
319 if ((entire_insn
& 0xfc0007ff) == 0x80000000)
320 { itype
= LM32BF_INSN_SRU
; goto extract_sfmt_sl
; }
321 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
323 if ((entire_insn
& 0xfc0007ff) == 0x84000000)
324 { itype
= LM32BF_INSN_NOR
; goto extract_sfmt_add
; }
325 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
327 if ((entire_insn
& 0xfc0007ff) == 0x88000000)
328 { itype
= LM32BF_INSN_MUL
; goto extract_sfmt_add
; }
329 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
331 if ((entire_insn
& 0xfc0007ff) == 0x8c000000)
332 { itype
= LM32BF_INSN_DIVU
; goto extract_sfmt_divu
; }
333 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
335 if ((entire_insn
& 0xfc1f07ff) == 0x90000000)
336 { itype
= LM32BF_INSN_RCSR
; goto extract_sfmt_rcsr
; }
337 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
339 if ((entire_insn
& 0xfc0007ff) == 0x94000000)
340 { itype
= LM32BF_INSN_SR
; goto extract_sfmt_sl
; }
341 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
343 if ((entire_insn
& 0xfc0007ff) == 0x98000000)
344 { itype
= LM32BF_INSN_XOR
; goto extract_sfmt_add
; }
345 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
347 if ((entire_insn
& 0xfc0007ff) == 0xa0000000)
348 { itype
= LM32BF_INSN_AND
; goto extract_sfmt_add
; }
349 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
351 if ((entire_insn
& 0xfc0007ff) == 0xa4000000)
352 { itype
= LM32BF_INSN_XNOR
; goto extract_sfmt_add
; }
353 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
356 unsigned int val
= (((insn
>> 1) & (1 << 1)) | ((insn
>> 0) & (1 << 0)));
360 if ((entire_insn
& 0xffffffff) == 0xac000002)
361 { itype
= LM32BF_INSN_BREAK
; goto extract_sfmt_break
; }
362 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
364 if ((entire_insn
& 0xffffffff) == 0xac000007)
365 { itype
= LM32BF_INSN_SCALL
; goto extract_sfmt_break
; }
366 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
367 default : itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
371 if ((entire_insn
& 0xfc1f07ff) == 0xb0000000)
372 { itype
= LM32BF_INSN_SEXTB
; goto extract_sfmt_sextb
; }
373 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
375 if ((entire_insn
& 0xfc0007ff) == 0xb4000000)
376 { itype
= LM32BF_INSN_ADD
; goto extract_sfmt_add
; }
377 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
379 if ((entire_insn
& 0xfc0007ff) == 0xb8000000)
380 { itype
= LM32BF_INSN_OR
; goto extract_sfmt_add
; }
381 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
383 if ((entire_insn
& 0xfc0007ff) == 0xbc000000)
384 { itype
= LM32BF_INSN_SL
; goto extract_sfmt_sl
; }
385 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
387 if ((entire_insn
& 0xfc1fffff) == 0xc0000000)
388 { itype
= LM32BF_INSN_B
; goto extract_sfmt_b
; }
389 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
391 if ((entire_insn
& 0xfc0007ff) == 0xc4000000)
392 { itype
= LM32BF_INSN_MODU
; goto extract_sfmt_divu
; }
393 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
395 if ((entire_insn
& 0xfc0007ff) == 0xc8000000)
396 { itype
= LM32BF_INSN_SUB
; goto extract_sfmt_add
; }
397 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
399 if ((entire_insn
& 0xfc000000) == 0xcc000000)
400 { itype
= LM32BF_INSN_USER
; goto extract_sfmt_user
; }
401 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
403 if ((entire_insn
& 0xfc00ffff) == 0xd0000000)
404 { itype
= LM32BF_INSN_WCSR
; goto extract_sfmt_wcsr
; }
405 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
407 if ((entire_insn
& 0xfc1fffff) == 0xd8000000)
408 { itype
= LM32BF_INSN_CALL
; goto extract_sfmt_call
; }
409 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
411 if ((entire_insn
& 0xfc1f07ff) == 0xdc000000)
412 { itype
= LM32BF_INSN_SEXTH
; goto extract_sfmt_sextb
; }
413 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
415 if ((entire_insn
& 0xfc000000) == 0xe0000000)
416 { itype
= LM32BF_INSN_BI
; goto extract_sfmt_bi
; }
417 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
419 if ((entire_insn
& 0xfc0007ff) == 0xe4000000)
420 { itype
= LM32BF_INSN_CMPE
; goto extract_sfmt_add
; }
421 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
423 if ((entire_insn
& 0xfc0007ff) == 0xe8000000)
424 { itype
= LM32BF_INSN_CMPG
; goto extract_sfmt_add
; }
425 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
427 if ((entire_insn
& 0xfc0007ff) == 0xec000000)
428 { itype
= LM32BF_INSN_CMPGE
; goto extract_sfmt_add
; }
429 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
431 if ((entire_insn
& 0xfc0007ff) == 0xf0000000)
432 { itype
= LM32BF_INSN_CMPGEU
; goto extract_sfmt_add
; }
433 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
435 if ((entire_insn
& 0xfc0007ff) == 0xf4000000)
436 { itype
= LM32BF_INSN_CMPGU
; goto extract_sfmt_add
; }
437 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
439 if ((entire_insn
& 0xfc000000) == 0xf8000000)
440 { itype
= LM32BF_INSN_CALLI
; goto extract_sfmt_calli
; }
441 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
443 if ((entire_insn
& 0xfc0007ff) == 0xfc000000)
444 { itype
= LM32BF_INSN_CMPNE
; goto extract_sfmt_add
; }
445 itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
446 default : itype
= LM32BF_INSN_X_INVALID
; goto extract_sfmt_empty
;
451 /* The instruction has been decoded, now extract the fields. */
455 const IDESC
*idesc
= &lm32bf_insn_data
[itype
];
456 #define FLD(f) abuf->fields.fmt_empty.f
459 /* Record the fields for the semantic handler. */
460 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_empty", (char *) 0));
468 const IDESC
*idesc
= &lm32bf_insn_data
[itype
];
469 CGEN_INSN_INT insn
= entire_insn
;
470 #define FLD(f) abuf->fields.sfmt_user.f
475 f_r0
= EXTRACT_LSB0_UINT (insn
, 32, 25, 5);
476 f_r1
= EXTRACT_LSB0_UINT (insn
, 32, 20, 5);
477 f_r2
= EXTRACT_LSB0_UINT (insn
, 32, 15, 5);
479 /* Record the fields for the semantic handler. */
483 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_add", "f_r0 0x%x", 'x', f_r0
, "f_r1 0x%x", 'x', f_r1
, "f_r2 0x%x", 'x', f_r2
, (char *) 0));
491 const IDESC
*idesc
= &lm32bf_insn_data
[itype
];
492 CGEN_INSN_INT insn
= entire_insn
;
493 #define FLD(f) abuf->fields.sfmt_addi.f
498 f_r0
= EXTRACT_LSB0_UINT (insn
, 32, 25, 5);
499 f_r1
= EXTRACT_LSB0_UINT (insn
, 32, 20, 5);
500 f_imm
= EXTRACT_LSB0_INT (insn
, 32, 15, 16);
502 /* Record the fields for the semantic handler. */
506 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_addi", "f_imm 0x%x", 'x', f_imm
, "f_r0 0x%x", 'x', f_r0
, "f_r1 0x%x", 'x', f_r1
, (char *) 0));
514 const IDESC
*idesc
= &lm32bf_insn_data
[itype
];
515 CGEN_INSN_INT insn
= entire_insn
;
516 #define FLD(f) abuf->fields.sfmt_andi.f
521 f_r0
= EXTRACT_LSB0_UINT (insn
, 32, 25, 5);
522 f_r1
= EXTRACT_LSB0_UINT (insn
, 32, 20, 5);
523 f_uimm
= EXTRACT_LSB0_UINT (insn
, 32, 15, 16);
525 /* Record the fields for the semantic handler. */
527 FLD (f_uimm
) = f_uimm
;
529 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_andi", "f_r0 0x%x", 'x', f_r0
, "f_uimm 0x%x", 'x', f_uimm
, "f_r1 0x%x", 'x', f_r1
, (char *) 0));
537 const IDESC
*idesc
= &lm32bf_insn_data
[itype
];
538 CGEN_INSN_INT insn
= entire_insn
;
539 #define FLD(f) abuf->fields.sfmt_andi.f
544 f_r0
= EXTRACT_LSB0_UINT (insn
, 32, 25, 5);
545 f_r1
= EXTRACT_LSB0_UINT (insn
, 32, 20, 5);
546 f_uimm
= EXTRACT_LSB0_UINT (insn
, 32, 15, 16);
548 /* Record the fields for the semantic handler. */
549 FLD (f_uimm
) = f_uimm
;
552 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_andhii", "f_uimm 0x%x", 'x', f_uimm
, "f_r0 0x%x", 'x', f_r0
, "f_r1 0x%x", 'x', f_r1
, (char *) 0));
560 const IDESC
*idesc
= &lm32bf_insn_data
[itype
];
561 CGEN_INSN_INT insn
= entire_insn
;
562 #define FLD(f) abuf->fields.sfmt_be.f
565 f_r0
= EXTRACT_LSB0_UINT (insn
, 32, 25, 5);
567 /* Record the fields for the semantic handler. */
569 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_b", "f_r0 0x%x", 'x', f_r0
, (char *) 0));
577 const IDESC
*idesc
= &lm32bf_insn_data
[itype
];
578 CGEN_INSN_INT insn
= entire_insn
;
579 #define FLD(f) abuf->fields.sfmt_bi.f
582 f_call
= ((pc
) + (((int) (((EXTRACT_LSB0_INT (insn
, 32, 25, 26)) << (6))) >> (4))));
584 /* Record the fields for the semantic handler. */
585 FLD (i_call
) = f_call
;
586 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_bi", "call 0x%x", 'x', f_call
, (char *) 0));
594 const IDESC
*idesc
= &lm32bf_insn_data
[itype
];
595 CGEN_INSN_INT insn
= entire_insn
;
596 #define FLD(f) abuf->fields.sfmt_be.f
601 f_r0
= EXTRACT_LSB0_UINT (insn
, 32, 25, 5);
602 f_r1
= EXTRACT_LSB0_UINT (insn
, 32, 20, 5);
603 f_branch
= ((pc
) + (((int) (((EXTRACT_LSB0_INT (insn
, 32, 15, 16)) << (16))) >> (14))));
605 /* Record the fields for the semantic handler. */
608 FLD (i_branch
) = f_branch
;
609 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_be", "f_r0 0x%x", 'x', f_r0
, "f_r1 0x%x", 'x', f_r1
, "branch 0x%x", 'x', f_branch
, (char *) 0));
617 const IDESC
*idesc
= &lm32bf_insn_data
[itype
];
618 CGEN_INSN_INT insn
= entire_insn
;
619 #define FLD(f) abuf->fields.sfmt_be.f
622 f_r0
= EXTRACT_LSB0_UINT (insn
, 32, 25, 5);
624 /* Record the fields for the semantic handler. */
626 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_call", "f_r0 0x%x", 'x', f_r0
, (char *) 0));
634 const IDESC
*idesc
= &lm32bf_insn_data
[itype
];
635 CGEN_INSN_INT insn
= entire_insn
;
636 #define FLD(f) abuf->fields.sfmt_bi.f
639 f_call
= ((pc
) + (((int) (((EXTRACT_LSB0_INT (insn
, 32, 25, 26)) << (6))) >> (4))));
641 /* Record the fields for the semantic handler. */
642 FLD (i_call
) = f_call
;
643 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_calli", "call 0x%x", 'x', f_call
, (char *) 0));
651 const IDESC
*idesc
= &lm32bf_insn_data
[itype
];
652 CGEN_INSN_INT insn
= entire_insn
;
653 #define FLD(f) abuf->fields.sfmt_user.f
658 f_r0
= EXTRACT_LSB0_UINT (insn
, 32, 25, 5);
659 f_r1
= EXTRACT_LSB0_UINT (insn
, 32, 20, 5);
660 f_r2
= EXTRACT_LSB0_UINT (insn
, 32, 15, 5);
662 /* Record the fields for the semantic handler. */
666 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_divu", "f_r0 0x%x", 'x', f_r0
, "f_r1 0x%x", 'x', f_r1
, "f_r2 0x%x", 'x', f_r2
, (char *) 0));
674 const IDESC
*idesc
= &lm32bf_insn_data
[itype
];
675 CGEN_INSN_INT insn
= entire_insn
;
676 #define FLD(f) abuf->fields.sfmt_addi.f
681 f_r0
= EXTRACT_LSB0_UINT (insn
, 32, 25, 5);
682 f_r1
= EXTRACT_LSB0_UINT (insn
, 32, 20, 5);
683 f_imm
= EXTRACT_LSB0_INT (insn
, 32, 15, 16);
685 /* Record the fields for the semantic handler. */
689 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_lb", "f_imm 0x%x", 'x', f_imm
, "f_r0 0x%x", 'x', f_r0
, "f_r1 0x%x", 'x', f_r1
, (char *) 0));
697 const IDESC
*idesc
= &lm32bf_insn_data
[itype
];
698 CGEN_INSN_INT insn
= entire_insn
;
699 #define FLD(f) abuf->fields.sfmt_addi.f
704 f_r0
= EXTRACT_LSB0_UINT (insn
, 32, 25, 5);
705 f_r1
= EXTRACT_LSB0_UINT (insn
, 32, 20, 5);
706 f_imm
= EXTRACT_LSB0_INT (insn
, 32, 15, 16);
708 /* Record the fields for the semantic handler. */
712 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_lh", "f_imm 0x%x", 'x', f_imm
, "f_r0 0x%x", 'x', f_r0
, "f_r1 0x%x", 'x', f_r1
, (char *) 0));
720 const IDESC
*idesc
= &lm32bf_insn_data
[itype
];
721 CGEN_INSN_INT insn
= entire_insn
;
722 #define FLD(f) abuf->fields.sfmt_addi.f
727 f_r0
= EXTRACT_LSB0_UINT (insn
, 32, 25, 5);
728 f_r1
= EXTRACT_LSB0_UINT (insn
, 32, 20, 5);
729 f_imm
= EXTRACT_LSB0_INT (insn
, 32, 15, 16);
731 /* Record the fields for the semantic handler. */
735 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_lw", "f_imm 0x%x", 'x', f_imm
, "f_r0 0x%x", 'x', f_r0
, "f_r1 0x%x", 'x', f_r1
, (char *) 0));
743 const IDESC
*idesc
= &lm32bf_insn_data
[itype
];
744 CGEN_INSN_INT insn
= entire_insn
;
745 #define FLD(f) abuf->fields.sfmt_andi.f
750 f_r0
= EXTRACT_LSB0_UINT (insn
, 32, 25, 5);
751 f_r1
= EXTRACT_LSB0_UINT (insn
, 32, 20, 5);
752 f_uimm
= EXTRACT_LSB0_UINT (insn
, 32, 15, 16);
754 /* Record the fields for the semantic handler. */
755 FLD (f_uimm
) = f_uimm
;
758 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_ori", "f_uimm 0x%x", 'x', f_uimm
, "f_r0 0x%x", 'x', f_r0
, "f_r1 0x%x", 'x', f_r1
, (char *) 0));
766 const IDESC
*idesc
= &lm32bf_insn_data
[itype
];
767 CGEN_INSN_INT insn
= entire_insn
;
768 #define FLD(f) abuf->fields.sfmt_rcsr.f
772 f_csr
= EXTRACT_LSB0_UINT (insn
, 32, 25, 5);
773 f_r2
= EXTRACT_LSB0_UINT (insn
, 32, 15, 5);
775 /* Record the fields for the semantic handler. */
778 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_rcsr", "f_csr 0x%x", 'x', f_csr
, "f_r2 0x%x", 'x', f_r2
, (char *) 0));
786 const IDESC
*idesc
= &lm32bf_insn_data
[itype
];
787 CGEN_INSN_INT insn
= entire_insn
;
788 #define FLD(f) abuf->fields.sfmt_addi.f
793 f_r0
= EXTRACT_LSB0_UINT (insn
, 32, 25, 5);
794 f_r1
= EXTRACT_LSB0_UINT (insn
, 32, 20, 5);
795 f_imm
= EXTRACT_LSB0_INT (insn
, 32, 15, 16);
797 /* Record the fields for the semantic handler. */
801 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_sb", "f_imm 0x%x", 'x', f_imm
, "f_r0 0x%x", 'x', f_r0
, "f_r1 0x%x", 'x', f_r1
, (char *) 0));
809 const IDESC
*idesc
= &lm32bf_insn_data
[itype
];
810 CGEN_INSN_INT insn
= entire_insn
;
811 #define FLD(f) abuf->fields.sfmt_user.f
815 f_r0
= EXTRACT_LSB0_UINT (insn
, 32, 25, 5);
816 f_r2
= EXTRACT_LSB0_UINT (insn
, 32, 15, 5);
818 /* Record the fields for the semantic handler. */
821 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_sextb", "f_r0 0x%x", 'x', f_r0
, "f_r2 0x%x", 'x', f_r2
, (char *) 0));
829 const IDESC
*idesc
= &lm32bf_insn_data
[itype
];
830 CGEN_INSN_INT insn
= entire_insn
;
831 #define FLD(f) abuf->fields.sfmt_addi.f
836 f_r0
= EXTRACT_LSB0_UINT (insn
, 32, 25, 5);
837 f_r1
= EXTRACT_LSB0_UINT (insn
, 32, 20, 5);
838 f_imm
= EXTRACT_LSB0_INT (insn
, 32, 15, 16);
840 /* Record the fields for the semantic handler. */
844 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_sh", "f_imm 0x%x", 'x', f_imm
, "f_r0 0x%x", 'x', f_r0
, "f_r1 0x%x", 'x', f_r1
, (char *) 0));
852 const IDESC
*idesc
= &lm32bf_insn_data
[itype
];
853 CGEN_INSN_INT insn
= entire_insn
;
854 #define FLD(f) abuf->fields.sfmt_user.f
859 f_r0
= EXTRACT_LSB0_UINT (insn
, 32, 25, 5);
860 f_r1
= EXTRACT_LSB0_UINT (insn
, 32, 20, 5);
861 f_r2
= EXTRACT_LSB0_UINT (insn
, 32, 15, 5);
863 /* Record the fields for the semantic handler. */
867 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_sl", "f_r0 0x%x", 'x', f_r0
, "f_r1 0x%x", 'x', f_r1
, "f_r2 0x%x", 'x', f_r2
, (char *) 0));
875 const IDESC
*idesc
= &lm32bf_insn_data
[itype
];
876 CGEN_INSN_INT insn
= entire_insn
;
877 #define FLD(f) abuf->fields.sfmt_addi.f
882 f_r0
= EXTRACT_LSB0_UINT (insn
, 32, 25, 5);
883 f_r1
= EXTRACT_LSB0_UINT (insn
, 32, 20, 5);
884 f_imm
= EXTRACT_LSB0_INT (insn
, 32, 15, 16);
886 /* Record the fields for the semantic handler. */
890 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_sw", "f_imm 0x%x", 'x', f_imm
, "f_r0 0x%x", 'x', f_r0
, "f_r1 0x%x", 'x', f_r1
, (char *) 0));
898 const IDESC
*idesc
= &lm32bf_insn_data
[itype
];
899 CGEN_INSN_INT insn
= entire_insn
;
900 #define FLD(f) abuf->fields.sfmt_user.f
906 f_r0
= EXTRACT_LSB0_UINT (insn
, 32, 25, 5);
907 f_r1
= EXTRACT_LSB0_UINT (insn
, 32, 20, 5);
908 f_r2
= EXTRACT_LSB0_UINT (insn
, 32, 15, 5);
909 f_user
= EXTRACT_LSB0_UINT (insn
, 32, 10, 11);
911 /* Record the fields for the semantic handler. */
914 FLD (f_user
) = f_user
;
916 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_user", "f_r0 0x%x", 'x', f_r0
, "f_r1 0x%x", 'x', f_r1
, "f_user 0x%x", 'x', f_user
, "f_r2 0x%x", 'x', f_r2
, (char *) 0));
924 const IDESC
*idesc
= &lm32bf_insn_data
[itype
];
925 CGEN_INSN_INT insn
= entire_insn
;
926 #define FLD(f) abuf->fields.sfmt_wcsr.f
930 f_csr
= EXTRACT_LSB0_UINT (insn
, 32, 25, 5);
931 f_r1
= EXTRACT_LSB0_UINT (insn
, 32, 20, 5);
933 /* Record the fields for the semantic handler. */
936 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_wcsr", "f_csr 0x%x", 'x', f_csr
, "f_r1 0x%x", 'x', f_r1
, (char *) 0));
944 const IDESC
*idesc
= &lm32bf_insn_data
[itype
];
945 #define FLD(f) abuf->fields.fmt_empty.f
948 /* Record the fields for the semantic handler. */
949 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_break", (char *) 0));