1 /* Decode header for m32rbf.
3 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
7 This file is part of the GNU Simulators.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2, or (at your option)
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License along
20 with this program; if not, write to the Free Software Foundation, Inc.,
21 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
25 #ifndef M32RBF_DECODE_H
26 #define M32RBF_DECODE_H
28 extern const IDESC
*m32rbf_decode (SIM_CPU
*, IADDR
,
29 CGEN_INSN_INT
, CGEN_INSN_INT
,
31 extern void m32rbf_init_idesc_table (SIM_CPU
*);
33 /* Enum declaration for instructions in cpu family m32rbf. */
34 typedef enum m32rbf_insn_type
{
35 M32RBF_INSN_X_INVALID
, M32RBF_INSN_X_AFTER
, M32RBF_INSN_X_BEFORE
, M32RBF_INSN_X_CTI_CHAIN
36 , M32RBF_INSN_X_CHAIN
, M32RBF_INSN_X_BEGIN
, M32RBF_INSN_ADD
, M32RBF_INSN_ADD3
37 , M32RBF_INSN_AND
, M32RBF_INSN_AND3
, M32RBF_INSN_OR
, M32RBF_INSN_OR3
38 , M32RBF_INSN_XOR
, M32RBF_INSN_XOR3
, M32RBF_INSN_ADDI
, M32RBF_INSN_ADDV
39 , M32RBF_INSN_ADDV3
, M32RBF_INSN_ADDX
, M32RBF_INSN_BC8
, M32RBF_INSN_BC24
40 , M32RBF_INSN_BEQ
, M32RBF_INSN_BEQZ
, M32RBF_INSN_BGEZ
, M32RBF_INSN_BGTZ
41 , M32RBF_INSN_BLEZ
, M32RBF_INSN_BLTZ
, M32RBF_INSN_BNEZ
, M32RBF_INSN_BL8
42 , M32RBF_INSN_BL24
, M32RBF_INSN_BNC8
, M32RBF_INSN_BNC24
, M32RBF_INSN_BNE
43 , M32RBF_INSN_BRA8
, M32RBF_INSN_BRA24
, M32RBF_INSN_CMP
, M32RBF_INSN_CMPI
44 , M32RBF_INSN_CMPU
, M32RBF_INSN_CMPUI
, M32RBF_INSN_DIV
, M32RBF_INSN_DIVU
45 , M32RBF_INSN_REM
, M32RBF_INSN_REMU
, M32RBF_INSN_JL
, M32RBF_INSN_JMP
46 , M32RBF_INSN_LD
, M32RBF_INSN_LD_D
, M32RBF_INSN_LDB
, M32RBF_INSN_LDB_D
47 , M32RBF_INSN_LDH
, M32RBF_INSN_LDH_D
, M32RBF_INSN_LDUB
, M32RBF_INSN_LDUB_D
48 , M32RBF_INSN_LDUH
, M32RBF_INSN_LDUH_D
, M32RBF_INSN_LD_PLUS
, M32RBF_INSN_LD24
49 , M32RBF_INSN_LDI8
, M32RBF_INSN_LDI16
, M32RBF_INSN_LOCK
, M32RBF_INSN_MACHI
50 , M32RBF_INSN_MACLO
, M32RBF_INSN_MACWHI
, M32RBF_INSN_MACWLO
, M32RBF_INSN_MUL
51 , M32RBF_INSN_MULHI
, M32RBF_INSN_MULLO
, M32RBF_INSN_MULWHI
, M32RBF_INSN_MULWLO
52 , M32RBF_INSN_MV
, M32RBF_INSN_MVFACHI
, M32RBF_INSN_MVFACLO
, M32RBF_INSN_MVFACMI
53 , M32RBF_INSN_MVFC
, M32RBF_INSN_MVTACHI
, M32RBF_INSN_MVTACLO
, M32RBF_INSN_MVTC
54 , M32RBF_INSN_NEG
, M32RBF_INSN_NOP
, M32RBF_INSN_NOT
, M32RBF_INSN_RAC
55 , M32RBF_INSN_RACH
, M32RBF_INSN_RTE
, M32RBF_INSN_SETH
, M32RBF_INSN_SLL
56 , M32RBF_INSN_SLL3
, M32RBF_INSN_SLLI
, M32RBF_INSN_SRA
, M32RBF_INSN_SRA3
57 , M32RBF_INSN_SRAI
, M32RBF_INSN_SRL
, M32RBF_INSN_SRL3
, M32RBF_INSN_SRLI
58 , M32RBF_INSN_ST
, M32RBF_INSN_ST_D
, M32RBF_INSN_STB
, M32RBF_INSN_STB_D
59 , M32RBF_INSN_STH
, M32RBF_INSN_STH_D
, M32RBF_INSN_ST_PLUS
, M32RBF_INSN_ST_MINUS
60 , M32RBF_INSN_SUB
, M32RBF_INSN_SUBV
, M32RBF_INSN_SUBX
, M32RBF_INSN_TRAP
61 , M32RBF_INSN_UNLOCK
, M32RBF_INSN_MAX
64 #if ! WITH_SEM_SWITCH_FULL
65 #define SEMFULL(fn) extern SEMANTIC_FN CONCAT3 (m32rbf,_sem_,fn);
70 #if ! WITH_SEM_SWITCH_FAST
71 #define SEMFAST(fn) extern SEMANTIC_FN CONCAT3 (m32rbf,_semf_,fn);
76 #define SEM(fn) SEMFULL (fn) SEMFAST (fn)
78 /* The function version of the before/after handlers is always needed,
79 so we always want the SEMFULL declaration of them. */
80 extern SEMANTIC_FN
CONCAT3 (m32rbf
,_sem_
,x_before
);
81 extern SEMANTIC_FN
CONCAT3 (m32rbf
,_sem_
,x_after
);
193 /* Function unit handlers (user written). */
195 extern int m32rbf_model_m32r_d_u_store (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*src1*/, INT
/*src2*/);
196 extern int m32rbf_model_m32r_d_u_load (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*sr*/, INT
/*dr*/);
197 extern int m32rbf_model_m32r_d_u_cti (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*sr*/);
198 extern int m32rbf_model_m32r_d_u_mac (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*src1*/, INT
/*src2*/);
199 extern int m32rbf_model_m32r_d_u_cmp (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*src1*/, INT
/*src2*/);
200 extern int m32rbf_model_m32r_d_u_exec (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/, INT
/*sr*/, INT
/*dr*/, INT
/*dr*/);
201 extern int m32rbf_model_test_u_exec (SIM_CPU
*, const IDESC
*, int /*unit_num*/, int /*referenced*/);
203 /* Profiling before/after handlers (user written) */
205 extern void m32rbf_model_insn_before (SIM_CPU
*, int /*first_p*/);
206 extern void m32rbf_model_insn_after (SIM_CPU
*, int /*last_p*/, int /*cycles*/);
208 #endif /* M32RBF_DECODE_H */
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