1 /* Simulator instruction decoder for m32rxf.
3 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
7 This file is part of the GNU simulators.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>.
24 #define WANT_CPU m32rxf
25 #define WANT_CPU_M32RXF
28 #include "sim-assert.h"
30 /* Insn can't be executed in parallel.
31 Or is that "do NOt Pass to Air defense Radar"? :-) */
34 /* The instruction descriptor array.
35 This is computed at runtime. Space for it is not malloc'd to save a
36 teensy bit of cpu in the decoder. Moving it to malloc space is trivial
37 but won't be done until necessary (we don't currently support the runtime
38 addition of instructions nor an SMP machine with different cpus). */
39 static IDESC m32rxf_insn_data
[M32RXF_INSN__MAX
];
41 /* Commas between elements are contained in the macros.
42 Some of these are conditionally compiled out. */
44 static const struct insn_sem m32rxf_insn_sem
[] =
46 { VIRTUAL_INSN_X_INVALID
, M32RXF_INSN_X_INVALID
, M32RXF_SFMT_EMPTY
, NOPAR
, NOPAR
},
47 { VIRTUAL_INSN_X_AFTER
, M32RXF_INSN_X_AFTER
, M32RXF_SFMT_EMPTY
, NOPAR
, NOPAR
},
48 { VIRTUAL_INSN_X_BEFORE
, M32RXF_INSN_X_BEFORE
, M32RXF_SFMT_EMPTY
, NOPAR
, NOPAR
},
49 { VIRTUAL_INSN_X_CTI_CHAIN
, M32RXF_INSN_X_CTI_CHAIN
, M32RXF_SFMT_EMPTY
, NOPAR
, NOPAR
},
50 { VIRTUAL_INSN_X_CHAIN
, M32RXF_INSN_X_CHAIN
, M32RXF_SFMT_EMPTY
, NOPAR
, NOPAR
},
51 { VIRTUAL_INSN_X_BEGIN
, M32RXF_INSN_X_BEGIN
, M32RXF_SFMT_EMPTY
, NOPAR
, NOPAR
},
52 { M32R_INSN_ADD
, M32RXF_INSN_ADD
, M32RXF_SFMT_ADD
, M32RXF_INSN_PAR_ADD
, M32RXF_INSN_WRITE_ADD
},
53 { M32R_INSN_ADD3
, M32RXF_INSN_ADD3
, M32RXF_SFMT_ADD3
, NOPAR
, NOPAR
},
54 { M32R_INSN_AND
, M32RXF_INSN_AND
, M32RXF_SFMT_ADD
, M32RXF_INSN_PAR_AND
, M32RXF_INSN_WRITE_AND
},
55 { M32R_INSN_AND3
, M32RXF_INSN_AND3
, M32RXF_SFMT_AND3
, NOPAR
, NOPAR
},
56 { M32R_INSN_OR
, M32RXF_INSN_OR
, M32RXF_SFMT_ADD
, M32RXF_INSN_PAR_OR
, M32RXF_INSN_WRITE_OR
},
57 { M32R_INSN_OR3
, M32RXF_INSN_OR3
, M32RXF_SFMT_OR3
, NOPAR
, NOPAR
},
58 { M32R_INSN_XOR
, M32RXF_INSN_XOR
, M32RXF_SFMT_ADD
, M32RXF_INSN_PAR_XOR
, M32RXF_INSN_WRITE_XOR
},
59 { M32R_INSN_XOR3
, M32RXF_INSN_XOR3
, M32RXF_SFMT_AND3
, NOPAR
, NOPAR
},
60 { M32R_INSN_ADDI
, M32RXF_INSN_ADDI
, M32RXF_SFMT_ADDI
, M32RXF_INSN_PAR_ADDI
, M32RXF_INSN_WRITE_ADDI
},
61 { M32R_INSN_ADDV
, M32RXF_INSN_ADDV
, M32RXF_SFMT_ADDV
, M32RXF_INSN_PAR_ADDV
, M32RXF_INSN_WRITE_ADDV
},
62 { M32R_INSN_ADDV3
, M32RXF_INSN_ADDV3
, M32RXF_SFMT_ADDV3
, NOPAR
, NOPAR
},
63 { M32R_INSN_ADDX
, M32RXF_INSN_ADDX
, M32RXF_SFMT_ADDX
, M32RXF_INSN_PAR_ADDX
, M32RXF_INSN_WRITE_ADDX
},
64 { M32R_INSN_BC8
, M32RXF_INSN_BC8
, M32RXF_SFMT_BC8
, M32RXF_INSN_PAR_BC8
, M32RXF_INSN_WRITE_BC8
},
65 { M32R_INSN_BC24
, M32RXF_INSN_BC24
, M32RXF_SFMT_BC24
, NOPAR
, NOPAR
},
66 { M32R_INSN_BEQ
, M32RXF_INSN_BEQ
, M32RXF_SFMT_BEQ
, NOPAR
, NOPAR
},
67 { M32R_INSN_BEQZ
, M32RXF_INSN_BEQZ
, M32RXF_SFMT_BEQZ
, NOPAR
, NOPAR
},
68 { M32R_INSN_BGEZ
, M32RXF_INSN_BGEZ
, M32RXF_SFMT_BEQZ
, NOPAR
, NOPAR
},
69 { M32R_INSN_BGTZ
, M32RXF_INSN_BGTZ
, M32RXF_SFMT_BEQZ
, NOPAR
, NOPAR
},
70 { M32R_INSN_BLEZ
, M32RXF_INSN_BLEZ
, M32RXF_SFMT_BEQZ
, NOPAR
, NOPAR
},
71 { M32R_INSN_BLTZ
, M32RXF_INSN_BLTZ
, M32RXF_SFMT_BEQZ
, NOPAR
, NOPAR
},
72 { M32R_INSN_BNEZ
, M32RXF_INSN_BNEZ
, M32RXF_SFMT_BEQZ
, NOPAR
, NOPAR
},
73 { M32R_INSN_BL8
, M32RXF_INSN_BL8
, M32RXF_SFMT_BL8
, M32RXF_INSN_PAR_BL8
, M32RXF_INSN_WRITE_BL8
},
74 { M32R_INSN_BL24
, M32RXF_INSN_BL24
, M32RXF_SFMT_BL24
, NOPAR
, NOPAR
},
75 { M32R_INSN_BCL8
, M32RXF_INSN_BCL8
, M32RXF_SFMT_BCL8
, M32RXF_INSN_PAR_BCL8
, M32RXF_INSN_WRITE_BCL8
},
76 { M32R_INSN_BCL24
, M32RXF_INSN_BCL24
, M32RXF_SFMT_BCL24
, NOPAR
, NOPAR
},
77 { M32R_INSN_BNC8
, M32RXF_INSN_BNC8
, M32RXF_SFMT_BC8
, M32RXF_INSN_PAR_BNC8
, M32RXF_INSN_WRITE_BNC8
},
78 { M32R_INSN_BNC24
, M32RXF_INSN_BNC24
, M32RXF_SFMT_BC24
, NOPAR
, NOPAR
},
79 { M32R_INSN_BNE
, M32RXF_INSN_BNE
, M32RXF_SFMT_BEQ
, NOPAR
, NOPAR
},
80 { M32R_INSN_BRA8
, M32RXF_INSN_BRA8
, M32RXF_SFMT_BRA8
, M32RXF_INSN_PAR_BRA8
, M32RXF_INSN_WRITE_BRA8
},
81 { M32R_INSN_BRA24
, M32RXF_INSN_BRA24
, M32RXF_SFMT_BRA24
, NOPAR
, NOPAR
},
82 { M32R_INSN_BNCL8
, M32RXF_INSN_BNCL8
, M32RXF_SFMT_BCL8
, M32RXF_INSN_PAR_BNCL8
, M32RXF_INSN_WRITE_BNCL8
},
83 { M32R_INSN_BNCL24
, M32RXF_INSN_BNCL24
, M32RXF_SFMT_BCL24
, NOPAR
, NOPAR
},
84 { M32R_INSN_CMP
, M32RXF_INSN_CMP
, M32RXF_SFMT_CMP
, M32RXF_INSN_PAR_CMP
, M32RXF_INSN_WRITE_CMP
},
85 { M32R_INSN_CMPI
, M32RXF_INSN_CMPI
, M32RXF_SFMT_CMPI
, NOPAR
, NOPAR
},
86 { M32R_INSN_CMPU
, M32RXF_INSN_CMPU
, M32RXF_SFMT_CMP
, M32RXF_INSN_PAR_CMPU
, M32RXF_INSN_WRITE_CMPU
},
87 { M32R_INSN_CMPUI
, M32RXF_INSN_CMPUI
, M32RXF_SFMT_CMPI
, NOPAR
, NOPAR
},
88 { M32R_INSN_CMPEQ
, M32RXF_INSN_CMPEQ
, M32RXF_SFMT_CMP
, M32RXF_INSN_PAR_CMPEQ
, M32RXF_INSN_WRITE_CMPEQ
},
89 { M32R_INSN_CMPZ
, M32RXF_INSN_CMPZ
, M32RXF_SFMT_CMPZ
, M32RXF_INSN_PAR_CMPZ
, M32RXF_INSN_WRITE_CMPZ
},
90 { M32R_INSN_DIV
, M32RXF_INSN_DIV
, M32RXF_SFMT_DIV
, NOPAR
, NOPAR
},
91 { M32R_INSN_DIVU
, M32RXF_INSN_DIVU
, M32RXF_SFMT_DIV
, NOPAR
, NOPAR
},
92 { M32R_INSN_REM
, M32RXF_INSN_REM
, M32RXF_SFMT_DIV
, NOPAR
, NOPAR
},
93 { M32R_INSN_REMU
, M32RXF_INSN_REMU
, M32RXF_SFMT_DIV
, NOPAR
, NOPAR
},
94 { M32R_INSN_DIVH
, M32RXF_INSN_DIVH
, M32RXF_SFMT_DIV
, NOPAR
, NOPAR
},
95 { M32R_INSN_JC
, M32RXF_INSN_JC
, M32RXF_SFMT_JC
, M32RXF_INSN_PAR_JC
, M32RXF_INSN_WRITE_JC
},
96 { M32R_INSN_JNC
, M32RXF_INSN_JNC
, M32RXF_SFMT_JC
, M32RXF_INSN_PAR_JNC
, M32RXF_INSN_WRITE_JNC
},
97 { M32R_INSN_JL
, M32RXF_INSN_JL
, M32RXF_SFMT_JL
, M32RXF_INSN_PAR_JL
, M32RXF_INSN_WRITE_JL
},
98 { M32R_INSN_JMP
, M32RXF_INSN_JMP
, M32RXF_SFMT_JMP
, M32RXF_INSN_PAR_JMP
, M32RXF_INSN_WRITE_JMP
},
99 { M32R_INSN_LD
, M32RXF_INSN_LD
, M32RXF_SFMT_LD
, M32RXF_INSN_PAR_LD
, M32RXF_INSN_WRITE_LD
},
100 { M32R_INSN_LD_D
, M32RXF_INSN_LD_D
, M32RXF_SFMT_LD_D
, NOPAR
, NOPAR
},
101 { M32R_INSN_LDB
, M32RXF_INSN_LDB
, M32RXF_SFMT_LDB
, M32RXF_INSN_PAR_LDB
, M32RXF_INSN_WRITE_LDB
},
102 { M32R_INSN_LDB_D
, M32RXF_INSN_LDB_D
, M32RXF_SFMT_LDB_D
, NOPAR
, NOPAR
},
103 { M32R_INSN_LDH
, M32RXF_INSN_LDH
, M32RXF_SFMT_LDH
, M32RXF_INSN_PAR_LDH
, M32RXF_INSN_WRITE_LDH
},
104 { M32R_INSN_LDH_D
, M32RXF_INSN_LDH_D
, M32RXF_SFMT_LDH_D
, NOPAR
, NOPAR
},
105 { M32R_INSN_LDUB
, M32RXF_INSN_LDUB
, M32RXF_SFMT_LDB
, M32RXF_INSN_PAR_LDUB
, M32RXF_INSN_WRITE_LDUB
},
106 { M32R_INSN_LDUB_D
, M32RXF_INSN_LDUB_D
, M32RXF_SFMT_LDB_D
, NOPAR
, NOPAR
},
107 { M32R_INSN_LDUH
, M32RXF_INSN_LDUH
, M32RXF_SFMT_LDH
, M32RXF_INSN_PAR_LDUH
, M32RXF_INSN_WRITE_LDUH
},
108 { M32R_INSN_LDUH_D
, M32RXF_INSN_LDUH_D
, M32RXF_SFMT_LDH_D
, NOPAR
, NOPAR
},
109 { M32R_INSN_LD_PLUS
, M32RXF_INSN_LD_PLUS
, M32RXF_SFMT_LD_PLUS
, M32RXF_INSN_PAR_LD_PLUS
, M32RXF_INSN_WRITE_LD_PLUS
},
110 { M32R_INSN_LD24
, M32RXF_INSN_LD24
, M32RXF_SFMT_LD24
, NOPAR
, NOPAR
},
111 { M32R_INSN_LDI8
, M32RXF_INSN_LDI8
, M32RXF_SFMT_LDI8
, M32RXF_INSN_PAR_LDI8
, M32RXF_INSN_WRITE_LDI8
},
112 { M32R_INSN_LDI16
, M32RXF_INSN_LDI16
, M32RXF_SFMT_LDI16
, NOPAR
, NOPAR
},
113 { M32R_INSN_LOCK
, M32RXF_INSN_LOCK
, M32RXF_SFMT_LOCK
, M32RXF_INSN_PAR_LOCK
, M32RXF_INSN_WRITE_LOCK
},
114 { M32R_INSN_MACHI_A
, M32RXF_INSN_MACHI_A
, M32RXF_SFMT_MACHI_A
, M32RXF_INSN_PAR_MACHI_A
, M32RXF_INSN_WRITE_MACHI_A
},
115 { M32R_INSN_MACLO_A
, M32RXF_INSN_MACLO_A
, M32RXF_SFMT_MACHI_A
, M32RXF_INSN_PAR_MACLO_A
, M32RXF_INSN_WRITE_MACLO_A
},
116 { M32R_INSN_MACWHI_A
, M32RXF_INSN_MACWHI_A
, M32RXF_SFMT_MACHI_A
, M32RXF_INSN_PAR_MACWHI_A
, M32RXF_INSN_WRITE_MACWHI_A
},
117 { M32R_INSN_MACWLO_A
, M32RXF_INSN_MACWLO_A
, M32RXF_SFMT_MACHI_A
, M32RXF_INSN_PAR_MACWLO_A
, M32RXF_INSN_WRITE_MACWLO_A
},
118 { M32R_INSN_MUL
, M32RXF_INSN_MUL
, M32RXF_SFMT_ADD
, M32RXF_INSN_PAR_MUL
, M32RXF_INSN_WRITE_MUL
},
119 { M32R_INSN_MULHI_A
, M32RXF_INSN_MULHI_A
, M32RXF_SFMT_MULHI_A
, M32RXF_INSN_PAR_MULHI_A
, M32RXF_INSN_WRITE_MULHI_A
},
120 { M32R_INSN_MULLO_A
, M32RXF_INSN_MULLO_A
, M32RXF_SFMT_MULHI_A
, M32RXF_INSN_PAR_MULLO_A
, M32RXF_INSN_WRITE_MULLO_A
},
121 { M32R_INSN_MULWHI_A
, M32RXF_INSN_MULWHI_A
, M32RXF_SFMT_MULHI_A
, M32RXF_INSN_PAR_MULWHI_A
, M32RXF_INSN_WRITE_MULWHI_A
},
122 { M32R_INSN_MULWLO_A
, M32RXF_INSN_MULWLO_A
, M32RXF_SFMT_MULHI_A
, M32RXF_INSN_PAR_MULWLO_A
, M32RXF_INSN_WRITE_MULWLO_A
},
123 { M32R_INSN_MV
, M32RXF_INSN_MV
, M32RXF_SFMT_MV
, M32RXF_INSN_PAR_MV
, M32RXF_INSN_WRITE_MV
},
124 { M32R_INSN_MVFACHI_A
, M32RXF_INSN_MVFACHI_A
, M32RXF_SFMT_MVFACHI_A
, M32RXF_INSN_PAR_MVFACHI_A
, M32RXF_INSN_WRITE_MVFACHI_A
},
125 { M32R_INSN_MVFACLO_A
, M32RXF_INSN_MVFACLO_A
, M32RXF_SFMT_MVFACHI_A
, M32RXF_INSN_PAR_MVFACLO_A
, M32RXF_INSN_WRITE_MVFACLO_A
},
126 { M32R_INSN_MVFACMI_A
, M32RXF_INSN_MVFACMI_A
, M32RXF_SFMT_MVFACHI_A
, M32RXF_INSN_PAR_MVFACMI_A
, M32RXF_INSN_WRITE_MVFACMI_A
},
127 { M32R_INSN_MVFC
, M32RXF_INSN_MVFC
, M32RXF_SFMT_MVFC
, M32RXF_INSN_PAR_MVFC
, M32RXF_INSN_WRITE_MVFC
},
128 { M32R_INSN_MVTACHI_A
, M32RXF_INSN_MVTACHI_A
, M32RXF_SFMT_MVTACHI_A
, M32RXF_INSN_PAR_MVTACHI_A
, M32RXF_INSN_WRITE_MVTACHI_A
},
129 { M32R_INSN_MVTACLO_A
, M32RXF_INSN_MVTACLO_A
, M32RXF_SFMT_MVTACHI_A
, M32RXF_INSN_PAR_MVTACLO_A
, M32RXF_INSN_WRITE_MVTACLO_A
},
130 { M32R_INSN_MVTC
, M32RXF_INSN_MVTC
, M32RXF_SFMT_MVTC
, M32RXF_INSN_PAR_MVTC
, M32RXF_INSN_WRITE_MVTC
},
131 { M32R_INSN_NEG
, M32RXF_INSN_NEG
, M32RXF_SFMT_MV
, M32RXF_INSN_PAR_NEG
, M32RXF_INSN_WRITE_NEG
},
132 { M32R_INSN_NOP
, M32RXF_INSN_NOP
, M32RXF_SFMT_NOP
, M32RXF_INSN_PAR_NOP
, M32RXF_INSN_WRITE_NOP
},
133 { M32R_INSN_NOT
, M32RXF_INSN_NOT
, M32RXF_SFMT_MV
, M32RXF_INSN_PAR_NOT
, M32RXF_INSN_WRITE_NOT
},
134 { M32R_INSN_RAC_DSI
, M32RXF_INSN_RAC_DSI
, M32RXF_SFMT_RAC_DSI
, M32RXF_INSN_PAR_RAC_DSI
, M32RXF_INSN_WRITE_RAC_DSI
},
135 { M32R_INSN_RACH_DSI
, M32RXF_INSN_RACH_DSI
, M32RXF_SFMT_RAC_DSI
, M32RXF_INSN_PAR_RACH_DSI
, M32RXF_INSN_WRITE_RACH_DSI
},
136 { M32R_INSN_RTE
, M32RXF_INSN_RTE
, M32RXF_SFMT_RTE
, M32RXF_INSN_PAR_RTE
, M32RXF_INSN_WRITE_RTE
},
137 { M32R_INSN_SETH
, M32RXF_INSN_SETH
, M32RXF_SFMT_SETH
, NOPAR
, NOPAR
},
138 { M32R_INSN_SLL
, M32RXF_INSN_SLL
, M32RXF_SFMT_ADD
, M32RXF_INSN_PAR_SLL
, M32RXF_INSN_WRITE_SLL
},
139 { M32R_INSN_SLL3
, M32RXF_INSN_SLL3
, M32RXF_SFMT_SLL3
, NOPAR
, NOPAR
},
140 { M32R_INSN_SLLI
, M32RXF_INSN_SLLI
, M32RXF_SFMT_SLLI
, M32RXF_INSN_PAR_SLLI
, M32RXF_INSN_WRITE_SLLI
},
141 { M32R_INSN_SRA
, M32RXF_INSN_SRA
, M32RXF_SFMT_ADD
, M32RXF_INSN_PAR_SRA
, M32RXF_INSN_WRITE_SRA
},
142 { M32R_INSN_SRA3
, M32RXF_INSN_SRA3
, M32RXF_SFMT_SLL3
, NOPAR
, NOPAR
},
143 { M32R_INSN_SRAI
, M32RXF_INSN_SRAI
, M32RXF_SFMT_SLLI
, M32RXF_INSN_PAR_SRAI
, M32RXF_INSN_WRITE_SRAI
},
144 { M32R_INSN_SRL
, M32RXF_INSN_SRL
, M32RXF_SFMT_ADD
, M32RXF_INSN_PAR_SRL
, M32RXF_INSN_WRITE_SRL
},
145 { M32R_INSN_SRL3
, M32RXF_INSN_SRL3
, M32RXF_SFMT_SLL3
, NOPAR
, NOPAR
},
146 { M32R_INSN_SRLI
, M32RXF_INSN_SRLI
, M32RXF_SFMT_SLLI
, M32RXF_INSN_PAR_SRLI
, M32RXF_INSN_WRITE_SRLI
},
147 { M32R_INSN_ST
, M32RXF_INSN_ST
, M32RXF_SFMT_ST
, M32RXF_INSN_PAR_ST
, M32RXF_INSN_WRITE_ST
},
148 { M32R_INSN_ST_D
, M32RXF_INSN_ST_D
, M32RXF_SFMT_ST_D
, NOPAR
, NOPAR
},
149 { M32R_INSN_STB
, M32RXF_INSN_STB
, M32RXF_SFMT_STB
, M32RXF_INSN_PAR_STB
, M32RXF_INSN_WRITE_STB
},
150 { M32R_INSN_STB_D
, M32RXF_INSN_STB_D
, M32RXF_SFMT_STB_D
, NOPAR
, NOPAR
},
151 { M32R_INSN_STH
, M32RXF_INSN_STH
, M32RXF_SFMT_STH
, M32RXF_INSN_PAR_STH
, M32RXF_INSN_WRITE_STH
},
152 { M32R_INSN_STH_D
, M32RXF_INSN_STH_D
, M32RXF_SFMT_STH_D
, NOPAR
, NOPAR
},
153 { M32R_INSN_ST_PLUS
, M32RXF_INSN_ST_PLUS
, M32RXF_SFMT_ST_PLUS
, M32RXF_INSN_PAR_ST_PLUS
, M32RXF_INSN_WRITE_ST_PLUS
},
154 { M32R_INSN_STH_PLUS
, M32RXF_INSN_STH_PLUS
, M32RXF_SFMT_STH_PLUS
, M32RXF_INSN_PAR_STH_PLUS
, M32RXF_INSN_WRITE_STH_PLUS
},
155 { M32R_INSN_STB_PLUS
, M32RXF_INSN_STB_PLUS
, M32RXF_SFMT_STB_PLUS
, M32RXF_INSN_PAR_STB_PLUS
, M32RXF_INSN_WRITE_STB_PLUS
},
156 { M32R_INSN_ST_MINUS
, M32RXF_INSN_ST_MINUS
, M32RXF_SFMT_ST_PLUS
, M32RXF_INSN_PAR_ST_MINUS
, M32RXF_INSN_WRITE_ST_MINUS
},
157 { M32R_INSN_SUB
, M32RXF_INSN_SUB
, M32RXF_SFMT_ADD
, M32RXF_INSN_PAR_SUB
, M32RXF_INSN_WRITE_SUB
},
158 { M32R_INSN_SUBV
, M32RXF_INSN_SUBV
, M32RXF_SFMT_ADDV
, M32RXF_INSN_PAR_SUBV
, M32RXF_INSN_WRITE_SUBV
},
159 { M32R_INSN_SUBX
, M32RXF_INSN_SUBX
, M32RXF_SFMT_ADDX
, M32RXF_INSN_PAR_SUBX
, M32RXF_INSN_WRITE_SUBX
},
160 { M32R_INSN_TRAP
, M32RXF_INSN_TRAP
, M32RXF_SFMT_TRAP
, M32RXF_INSN_PAR_TRAP
, M32RXF_INSN_WRITE_TRAP
},
161 { M32R_INSN_UNLOCK
, M32RXF_INSN_UNLOCK
, M32RXF_SFMT_UNLOCK
, M32RXF_INSN_PAR_UNLOCK
, M32RXF_INSN_WRITE_UNLOCK
},
162 { M32R_INSN_SATB
, M32RXF_INSN_SATB
, M32RXF_SFMT_SATB
, NOPAR
, NOPAR
},
163 { M32R_INSN_SATH
, M32RXF_INSN_SATH
, M32RXF_SFMT_SATB
, NOPAR
, NOPAR
},
164 { M32R_INSN_SAT
, M32RXF_INSN_SAT
, M32RXF_SFMT_SAT
, NOPAR
, NOPAR
},
165 { M32R_INSN_PCMPBZ
, M32RXF_INSN_PCMPBZ
, M32RXF_SFMT_CMPZ
, M32RXF_INSN_PAR_PCMPBZ
, M32RXF_INSN_WRITE_PCMPBZ
},
166 { M32R_INSN_SADD
, M32RXF_INSN_SADD
, M32RXF_SFMT_SADD
, M32RXF_INSN_PAR_SADD
, M32RXF_INSN_WRITE_SADD
},
167 { M32R_INSN_MACWU1
, M32RXF_INSN_MACWU1
, M32RXF_SFMT_MACWU1
, M32RXF_INSN_PAR_MACWU1
, M32RXF_INSN_WRITE_MACWU1
},
168 { M32R_INSN_MSBLO
, M32RXF_INSN_MSBLO
, M32RXF_SFMT_MSBLO
, M32RXF_INSN_PAR_MSBLO
, M32RXF_INSN_WRITE_MSBLO
},
169 { M32R_INSN_MULWU1
, M32RXF_INSN_MULWU1
, M32RXF_SFMT_MULWU1
, M32RXF_INSN_PAR_MULWU1
, M32RXF_INSN_WRITE_MULWU1
},
170 { M32R_INSN_MACLH1
, M32RXF_INSN_MACLH1
, M32RXF_SFMT_MACWU1
, M32RXF_INSN_PAR_MACLH1
, M32RXF_INSN_WRITE_MACLH1
},
171 { M32R_INSN_SC
, M32RXF_INSN_SC
, M32RXF_SFMT_SC
, M32RXF_INSN_PAR_SC
, M32RXF_INSN_WRITE_SC
},
172 { M32R_INSN_SNC
, M32RXF_INSN_SNC
, M32RXF_SFMT_SC
, M32RXF_INSN_PAR_SNC
, M32RXF_INSN_WRITE_SNC
},
173 { M32R_INSN_CLRPSW
, M32RXF_INSN_CLRPSW
, M32RXF_SFMT_CLRPSW
, M32RXF_INSN_PAR_CLRPSW
, M32RXF_INSN_WRITE_CLRPSW
},
174 { M32R_INSN_SETPSW
, M32RXF_INSN_SETPSW
, M32RXF_SFMT_SETPSW
, M32RXF_INSN_PAR_SETPSW
, M32RXF_INSN_WRITE_SETPSW
},
175 { M32R_INSN_BSET
, M32RXF_INSN_BSET
, M32RXF_SFMT_BSET
, NOPAR
, NOPAR
},
176 { M32R_INSN_BCLR
, M32RXF_INSN_BCLR
, M32RXF_SFMT_BSET
, NOPAR
, NOPAR
},
177 { M32R_INSN_BTST
, M32RXF_INSN_BTST
, M32RXF_SFMT_BTST
, M32RXF_INSN_PAR_BTST
, M32RXF_INSN_WRITE_BTST
},
180 static const struct insn_sem m32rxf_insn_sem_invalid
= {
181 VIRTUAL_INSN_X_INVALID
, M32RXF_INSN_X_INVALID
, M32RXF_SFMT_EMPTY
, NOPAR
, NOPAR
184 /* Initialize an IDESC from the compile-time computable parts. */
187 init_idesc (SIM_CPU
*cpu
, IDESC
*id
, const struct insn_sem
*t
)
189 const CGEN_INSN
*insn_table
= CGEN_CPU_INSN_TABLE (CPU_CPU_DESC (cpu
))->init_entries
;
193 if ((int) t
->type
<= 0)
194 id
->idata
= & cgen_virtual_insn_table
[- (int) t
->type
];
196 id
->idata
= & insn_table
[t
->type
];
197 id
->attrs
= CGEN_INSN_ATTRS (id
->idata
);
198 /* Oh my god, a magic number. */
199 id
->length
= CGEN_INSN_BITSIZE (id
->idata
) / 8;
201 #if WITH_PROFILE_MODEL_P
202 id
->timing
= & MODEL_TIMING (CPU_MODEL (cpu
)) [t
->index
];
204 SIM_DESC sd
= CPU_STATE (cpu
);
205 SIM_ASSERT (t
->index
== id
->timing
->num
);
209 /* Semantic pointers are initialized elsewhere. */
212 /* Initialize the instruction descriptor table. */
215 m32rxf_init_idesc_table (SIM_CPU
*cpu
)
218 const struct insn_sem
*t
,*tend
;
219 int tabsize
= M32RXF_INSN__MAX
;
220 IDESC
*table
= m32rxf_insn_data
;
222 memset (table
, 0, tabsize
* sizeof (IDESC
));
224 /* First set all entries to the `invalid insn'. */
225 t
= & m32rxf_insn_sem_invalid
;
226 for (id
= table
, tabend
= table
+ tabsize
; id
< tabend
; ++id
)
227 init_idesc (cpu
, id
, t
);
229 /* Now fill in the values for the chosen cpu. */
230 for (t
= m32rxf_insn_sem
, tend
= t
+ sizeof (m32rxf_insn_sem
) / sizeof (*t
);
233 init_idesc (cpu
, & table
[t
->index
], t
);
234 if (t
->par_index
!= NOPAR
)
236 init_idesc (cpu
, &table
[t
->par_index
], t
);
237 table
[t
->index
].par_idesc
= &table
[t
->par_index
];
239 if (t
->par_index
!= NOPAR
)
241 init_idesc (cpu
, &table
[t
->write_index
], t
);
242 table
[t
->par_index
].par_idesc
= &table
[t
->write_index
];
246 /* Link the IDESC table into the cpu. */
247 CPU_IDESC (cpu
) = table
;
250 /* Given an instruction, return a pointer to its IDESC entry. */
253 m32rxf_decode (SIM_CPU
*current_cpu
, IADDR pc
,
254 CGEN_INSN_INT base_insn
, CGEN_INSN_INT entire_insn
,
257 /* Result of decoder. */
258 M32RXF_INSN_TYPE itype
;
261 CGEN_INSN_INT insn
= base_insn
;
264 unsigned int val
= (((insn
>> 8) & (15 << 4)) | ((insn
>> 4) & (15 << 0)));
267 case 0 : itype
= M32RXF_INSN_SUBV
; goto extract_sfmt_addv
;
268 case 1 : itype
= M32RXF_INSN_SUBX
; goto extract_sfmt_addx
;
269 case 2 : itype
= M32RXF_INSN_SUB
; goto extract_sfmt_add
;
270 case 3 : itype
= M32RXF_INSN_NEG
; goto extract_sfmt_mv
;
271 case 4 : itype
= M32RXF_INSN_CMP
; goto extract_sfmt_cmp
;
272 case 5 : itype
= M32RXF_INSN_CMPU
; goto extract_sfmt_cmp
;
273 case 6 : itype
= M32RXF_INSN_CMPEQ
; goto extract_sfmt_cmp
;
276 unsigned int val
= (((insn
>> 8) & (3 << 0)));
279 case 0 : itype
= M32RXF_INSN_CMPZ
; goto extract_sfmt_cmpz
;
280 case 3 : itype
= M32RXF_INSN_PCMPBZ
; goto extract_sfmt_cmpz
;
281 default : itype
= M32RXF_INSN_X_INVALID
; goto extract_sfmt_empty
;
284 case 8 : itype
= M32RXF_INSN_ADDV
; goto extract_sfmt_addv
;
285 case 9 : itype
= M32RXF_INSN_ADDX
; goto extract_sfmt_addx
;
286 case 10 : itype
= M32RXF_INSN_ADD
; goto extract_sfmt_add
;
287 case 11 : itype
= M32RXF_INSN_NOT
; goto extract_sfmt_mv
;
288 case 12 : itype
= M32RXF_INSN_AND
; goto extract_sfmt_add
;
289 case 13 : itype
= M32RXF_INSN_XOR
; goto extract_sfmt_add
;
290 case 14 : itype
= M32RXF_INSN_OR
; goto extract_sfmt_add
;
291 case 15 : itype
= M32RXF_INSN_BTST
; goto extract_sfmt_btst
;
292 case 16 : itype
= M32RXF_INSN_SRL
; goto extract_sfmt_add
;
293 case 18 : itype
= M32RXF_INSN_SRA
; goto extract_sfmt_add
;
294 case 20 : itype
= M32RXF_INSN_SLL
; goto extract_sfmt_add
;
295 case 22 : itype
= M32RXF_INSN_MUL
; goto extract_sfmt_add
;
296 case 24 : itype
= M32RXF_INSN_MV
; goto extract_sfmt_mv
;
297 case 25 : itype
= M32RXF_INSN_MVFC
; goto extract_sfmt_mvfc
;
298 case 26 : itype
= M32RXF_INSN_MVTC
; goto extract_sfmt_mvtc
;
301 unsigned int val
= (((insn
>> 8) & (3 << 0)));
304 case 0 : itype
= M32RXF_INSN_JC
; goto extract_sfmt_jc
;
305 case 1 : itype
= M32RXF_INSN_JNC
; goto extract_sfmt_jc
;
306 case 2 : itype
= M32RXF_INSN_JL
; goto extract_sfmt_jl
;
307 case 3 : itype
= M32RXF_INSN_JMP
; goto extract_sfmt_jmp
;
308 default : itype
= M32RXF_INSN_X_INVALID
; goto extract_sfmt_empty
;
311 case 29 : itype
= M32RXF_INSN_RTE
; goto extract_sfmt_rte
;
312 case 31 : itype
= M32RXF_INSN_TRAP
; goto extract_sfmt_trap
;
313 case 32 : itype
= M32RXF_INSN_STB
; goto extract_sfmt_stb
;
314 case 33 : itype
= M32RXF_INSN_STB_PLUS
; goto extract_sfmt_stb_plus
;
315 case 34 : itype
= M32RXF_INSN_STH
; goto extract_sfmt_sth
;
316 case 35 : itype
= M32RXF_INSN_STH_PLUS
; goto extract_sfmt_sth_plus
;
317 case 36 : itype
= M32RXF_INSN_ST
; goto extract_sfmt_st
;
318 case 37 : itype
= M32RXF_INSN_UNLOCK
; goto extract_sfmt_unlock
;
319 case 38 : itype
= M32RXF_INSN_ST_PLUS
; goto extract_sfmt_st_plus
;
320 case 39 : itype
= M32RXF_INSN_ST_MINUS
; goto extract_sfmt_st_plus
;
321 case 40 : itype
= M32RXF_INSN_LDB
; goto extract_sfmt_ldb
;
322 case 41 : itype
= M32RXF_INSN_LDUB
; goto extract_sfmt_ldb
;
323 case 42 : itype
= M32RXF_INSN_LDH
; goto extract_sfmt_ldh
;
324 case 43 : itype
= M32RXF_INSN_LDUH
; goto extract_sfmt_ldh
;
325 case 44 : itype
= M32RXF_INSN_LD
; goto extract_sfmt_ld
;
326 case 45 : itype
= M32RXF_INSN_LOCK
; goto extract_sfmt_lock
;
327 case 46 : itype
= M32RXF_INSN_LD_PLUS
; goto extract_sfmt_ld_plus
;
328 case 48 : /* fall through */
329 case 56 : itype
= M32RXF_INSN_MULHI_A
; goto extract_sfmt_mulhi_a
;
330 case 49 : /* fall through */
331 case 57 : itype
= M32RXF_INSN_MULLO_A
; goto extract_sfmt_mulhi_a
;
332 case 50 : /* fall through */
333 case 58 : itype
= M32RXF_INSN_MULWHI_A
; goto extract_sfmt_mulhi_a
;
334 case 51 : /* fall through */
335 case 59 : itype
= M32RXF_INSN_MULWLO_A
; goto extract_sfmt_mulhi_a
;
336 case 52 : /* fall through */
337 case 60 : itype
= M32RXF_INSN_MACHI_A
; goto extract_sfmt_machi_a
;
338 case 53 : /* fall through */
339 case 61 : itype
= M32RXF_INSN_MACLO_A
; goto extract_sfmt_machi_a
;
340 case 54 : /* fall through */
341 case 62 : itype
= M32RXF_INSN_MACWHI_A
; goto extract_sfmt_machi_a
;
342 case 55 : /* fall through */
343 case 63 : itype
= M32RXF_INSN_MACWLO_A
; goto extract_sfmt_machi_a
;
344 case 64 : /* fall through */
345 case 65 : /* fall through */
346 case 66 : /* fall through */
347 case 67 : /* fall through */
348 case 68 : /* fall through */
349 case 69 : /* fall through */
350 case 70 : /* fall through */
351 case 71 : /* fall through */
352 case 72 : /* fall through */
353 case 73 : /* fall through */
354 case 74 : /* fall through */
355 case 75 : /* fall through */
356 case 76 : /* fall through */
357 case 77 : /* fall through */
358 case 78 : /* fall through */
359 case 79 : itype
= M32RXF_INSN_ADDI
; goto extract_sfmt_addi
;
360 case 80 : /* fall through */
361 case 81 : itype
= M32RXF_INSN_SRLI
; goto extract_sfmt_slli
;
362 case 82 : /* fall through */
363 case 83 : itype
= M32RXF_INSN_SRAI
; goto extract_sfmt_slli
;
364 case 84 : /* fall through */
365 case 85 : itype
= M32RXF_INSN_SLLI
; goto extract_sfmt_slli
;
368 unsigned int val
= (((insn
>> 0) & (1 << 0)));
371 case 0 : itype
= M32RXF_INSN_MVTACHI_A
; goto extract_sfmt_mvtachi_a
;
372 case 1 : itype
= M32RXF_INSN_MVTACLO_A
; goto extract_sfmt_mvtachi_a
;
373 default : itype
= M32RXF_INSN_X_INVALID
; goto extract_sfmt_empty
;
376 case 88 : itype
= M32RXF_INSN_RACH_DSI
; goto extract_sfmt_rac_dsi
;
377 case 89 : itype
= M32RXF_INSN_RAC_DSI
; goto extract_sfmt_rac_dsi
;
378 case 90 : itype
= M32RXF_INSN_MULWU1
; goto extract_sfmt_mulwu1
;
379 case 91 : itype
= M32RXF_INSN_MACWU1
; goto extract_sfmt_macwu1
;
380 case 92 : itype
= M32RXF_INSN_MACLH1
; goto extract_sfmt_macwu1
;
381 case 93 : itype
= M32RXF_INSN_MSBLO
; goto extract_sfmt_msblo
;
382 case 94 : itype
= M32RXF_INSN_SADD
; goto extract_sfmt_sadd
;
385 unsigned int val
= (((insn
>> 0) & (3 << 0)));
388 case 0 : itype
= M32RXF_INSN_MVFACHI_A
; goto extract_sfmt_mvfachi_a
;
389 case 1 : itype
= M32RXF_INSN_MVFACLO_A
; goto extract_sfmt_mvfachi_a
;
390 case 2 : itype
= M32RXF_INSN_MVFACMI_A
; goto extract_sfmt_mvfachi_a
;
391 default : itype
= M32RXF_INSN_X_INVALID
; goto extract_sfmt_empty
;
394 case 96 : /* fall through */
395 case 97 : /* fall through */
396 case 98 : /* fall through */
397 case 99 : /* fall through */
398 case 100 : /* fall through */
399 case 101 : /* fall through */
400 case 102 : /* fall through */
401 case 103 : /* fall through */
402 case 104 : /* fall through */
403 case 105 : /* fall through */
404 case 106 : /* fall through */
405 case 107 : /* fall through */
406 case 108 : /* fall through */
407 case 109 : /* fall through */
408 case 110 : /* fall through */
409 case 111 : itype
= M32RXF_INSN_LDI8
; goto extract_sfmt_ldi8
;
412 unsigned int val
= (((insn
>> 7) & (15 << 1)) | ((insn
>> 0) & (1 << 0)));
415 case 0 : itype
= M32RXF_INSN_NOP
; goto extract_sfmt_nop
;
416 case 2 : /* fall through */
417 case 3 : itype
= M32RXF_INSN_SETPSW
; goto extract_sfmt_setpsw
;
418 case 4 : /* fall through */
419 case 5 : itype
= M32RXF_INSN_CLRPSW
; goto extract_sfmt_clrpsw
;
420 case 9 : itype
= M32RXF_INSN_SC
; goto extract_sfmt_sc
;
421 case 11 : itype
= M32RXF_INSN_SNC
; goto extract_sfmt_sc
;
422 case 16 : /* fall through */
423 case 17 : itype
= M32RXF_INSN_BCL8
; goto extract_sfmt_bcl8
;
424 case 18 : /* fall through */
425 case 19 : itype
= M32RXF_INSN_BNCL8
; goto extract_sfmt_bcl8
;
426 case 24 : /* fall through */
427 case 25 : itype
= M32RXF_INSN_BC8
; goto extract_sfmt_bc8
;
428 case 26 : /* fall through */
429 case 27 : itype
= M32RXF_INSN_BNC8
; goto extract_sfmt_bc8
;
430 case 28 : /* fall through */
431 case 29 : itype
= M32RXF_INSN_BL8
; goto extract_sfmt_bl8
;
432 case 30 : /* fall through */
433 case 31 : itype
= M32RXF_INSN_BRA8
; goto extract_sfmt_bra8
;
434 default : itype
= M32RXF_INSN_X_INVALID
; goto extract_sfmt_empty
;
437 case 113 : /* fall through */
438 case 114 : /* fall through */
439 case 115 : /* fall through */
440 case 116 : /* fall through */
441 case 117 : /* fall through */
442 case 118 : /* fall through */
443 case 119 : /* fall through */
444 case 120 : /* fall through */
445 case 121 : /* fall through */
446 case 122 : /* fall through */
447 case 123 : /* fall through */
448 case 124 : /* fall through */
449 case 125 : /* fall through */
450 case 126 : /* fall through */
453 unsigned int val
= (((insn
>> 8) & (15 << 0)));
456 case 1 : itype
= M32RXF_INSN_SETPSW
; goto extract_sfmt_setpsw
;
457 case 2 : itype
= M32RXF_INSN_CLRPSW
; goto extract_sfmt_clrpsw
;
458 case 8 : itype
= M32RXF_INSN_BCL8
; goto extract_sfmt_bcl8
;
459 case 9 : itype
= M32RXF_INSN_BNCL8
; goto extract_sfmt_bcl8
;
460 case 12 : itype
= M32RXF_INSN_BC8
; goto extract_sfmt_bc8
;
461 case 13 : itype
= M32RXF_INSN_BNC8
; goto extract_sfmt_bc8
;
462 case 14 : itype
= M32RXF_INSN_BL8
; goto extract_sfmt_bl8
;
463 case 15 : itype
= M32RXF_INSN_BRA8
; goto extract_sfmt_bra8
;
464 default : itype
= M32RXF_INSN_X_INVALID
; goto extract_sfmt_empty
;
467 case 132 : itype
= M32RXF_INSN_CMPI
; goto extract_sfmt_cmpi
;
468 case 133 : itype
= M32RXF_INSN_CMPUI
; goto extract_sfmt_cmpi
;
471 unsigned int val
= (((insn
>> -8) & (3 << 0)));
474 case 0 : itype
= M32RXF_INSN_SAT
; goto extract_sfmt_sat
;
475 case 2 : itype
= M32RXF_INSN_SATH
; goto extract_sfmt_satb
;
476 case 3 : itype
= M32RXF_INSN_SATB
; goto extract_sfmt_satb
;
477 default : itype
= M32RXF_INSN_X_INVALID
; goto extract_sfmt_empty
;
480 case 136 : itype
= M32RXF_INSN_ADDV3
; goto extract_sfmt_addv3
;
481 case 138 : itype
= M32RXF_INSN_ADD3
; goto extract_sfmt_add3
;
482 case 140 : itype
= M32RXF_INSN_AND3
; goto extract_sfmt_and3
;
483 case 141 : itype
= M32RXF_INSN_XOR3
; goto extract_sfmt_and3
;
484 case 142 : itype
= M32RXF_INSN_OR3
; goto extract_sfmt_or3
;
487 unsigned int val
= (((insn
>> -12) & (1 << 0)));
490 case 0 : itype
= M32RXF_INSN_DIV
; goto extract_sfmt_div
;
491 case 1 : itype
= M32RXF_INSN_DIVH
; goto extract_sfmt_div
;
492 default : itype
= M32RXF_INSN_X_INVALID
; goto extract_sfmt_empty
;
495 case 145 : itype
= M32RXF_INSN_DIVU
; goto extract_sfmt_div
;
496 case 146 : itype
= M32RXF_INSN_REM
; goto extract_sfmt_div
;
497 case 147 : itype
= M32RXF_INSN_REMU
; goto extract_sfmt_div
;
498 case 152 : itype
= M32RXF_INSN_SRL3
; goto extract_sfmt_sll3
;
499 case 154 : itype
= M32RXF_INSN_SRA3
; goto extract_sfmt_sll3
;
500 case 156 : itype
= M32RXF_INSN_SLL3
; goto extract_sfmt_sll3
;
501 case 159 : itype
= M32RXF_INSN_LDI16
; goto extract_sfmt_ldi16
;
502 case 160 : itype
= M32RXF_INSN_STB_D
; goto extract_sfmt_stb_d
;
503 case 162 : itype
= M32RXF_INSN_STH_D
; goto extract_sfmt_sth_d
;
504 case 164 : itype
= M32RXF_INSN_ST_D
; goto extract_sfmt_st_d
;
505 case 166 : itype
= M32RXF_INSN_BSET
; goto extract_sfmt_bset
;
506 case 167 : itype
= M32RXF_INSN_BCLR
; goto extract_sfmt_bset
;
507 case 168 : itype
= M32RXF_INSN_LDB_D
; goto extract_sfmt_ldb_d
;
508 case 169 : itype
= M32RXF_INSN_LDUB_D
; goto extract_sfmt_ldb_d
;
509 case 170 : itype
= M32RXF_INSN_LDH_D
; goto extract_sfmt_ldh_d
;
510 case 171 : itype
= M32RXF_INSN_LDUH_D
; goto extract_sfmt_ldh_d
;
511 case 172 : itype
= M32RXF_INSN_LD_D
; goto extract_sfmt_ld_d
;
512 case 176 : itype
= M32RXF_INSN_BEQ
; goto extract_sfmt_beq
;
513 case 177 : itype
= M32RXF_INSN_BNE
; goto extract_sfmt_beq
;
514 case 184 : itype
= M32RXF_INSN_BEQZ
; goto extract_sfmt_beqz
;
515 case 185 : itype
= M32RXF_INSN_BNEZ
; goto extract_sfmt_beqz
;
516 case 186 : itype
= M32RXF_INSN_BLTZ
; goto extract_sfmt_beqz
;
517 case 187 : itype
= M32RXF_INSN_BGEZ
; goto extract_sfmt_beqz
;
518 case 188 : itype
= M32RXF_INSN_BLEZ
; goto extract_sfmt_beqz
;
519 case 189 : itype
= M32RXF_INSN_BGTZ
; goto extract_sfmt_beqz
;
520 case 220 : itype
= M32RXF_INSN_SETH
; goto extract_sfmt_seth
;
521 case 224 : /* fall through */
522 case 225 : /* fall through */
523 case 226 : /* fall through */
524 case 227 : /* fall through */
525 case 228 : /* fall through */
526 case 229 : /* fall through */
527 case 230 : /* fall through */
528 case 231 : /* fall through */
529 case 232 : /* fall through */
530 case 233 : /* fall through */
531 case 234 : /* fall through */
532 case 235 : /* fall through */
533 case 236 : /* fall through */
534 case 237 : /* fall through */
535 case 238 : /* fall through */
536 case 239 : itype
= M32RXF_INSN_LD24
; goto extract_sfmt_ld24
;
537 case 240 : /* fall through */
538 case 241 : /* fall through */
539 case 242 : /* fall through */
540 case 243 : /* fall through */
541 case 244 : /* fall through */
542 case 245 : /* fall through */
543 case 246 : /* fall through */
544 case 247 : /* fall through */
545 case 248 : /* fall through */
546 case 249 : /* fall through */
547 case 250 : /* fall through */
548 case 251 : /* fall through */
549 case 252 : /* fall through */
550 case 253 : /* fall through */
551 case 254 : /* fall through */
554 unsigned int val
= (((insn
>> 8) & (7 << 0)));
557 case 0 : itype
= M32RXF_INSN_BCL24
; goto extract_sfmt_bcl24
;
558 case 1 : itype
= M32RXF_INSN_BNCL24
; goto extract_sfmt_bcl24
;
559 case 4 : itype
= M32RXF_INSN_BC24
; goto extract_sfmt_bc24
;
560 case 5 : itype
= M32RXF_INSN_BNC24
; goto extract_sfmt_bc24
;
561 case 6 : itype
= M32RXF_INSN_BL24
; goto extract_sfmt_bl24
;
562 case 7 : itype
= M32RXF_INSN_BRA24
; goto extract_sfmt_bra24
;
563 default : itype
= M32RXF_INSN_X_INVALID
; goto extract_sfmt_empty
;
566 default : itype
= M32RXF_INSN_X_INVALID
; goto extract_sfmt_empty
;
571 /* The instruction has been decoded, now extract the fields. */
575 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
576 #define FLD(f) abuf->fields.fmt_empty.f
579 /* Record the fields for the semantic handler. */
580 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_empty", (char *) 0));
588 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
589 CGEN_INSN_INT insn
= entire_insn
;
590 #define FLD(f) abuf->fields.sfmt_add.f
594 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
595 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
597 /* Record the fields for the semantic handler. */
600 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
601 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
602 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_add", "f_r1 0x%x", 'x', f_r1
, "f_r2 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, (char *) 0));
604 #if WITH_PROFILE_MODEL_P
605 /* Record the fields for profiling. */
606 if (PROFILE_MODEL_P (current_cpu
))
619 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
620 CGEN_INSN_INT insn
= entire_insn
;
621 #define FLD(f) abuf->fields.sfmt_add3.f
626 f_r1
= EXTRACT_MSB0_UINT (insn
, 32, 4, 4);
627 f_r2
= EXTRACT_MSB0_UINT (insn
, 32, 12, 4);
628 f_simm16
= EXTRACT_MSB0_INT (insn
, 32, 16, 16);
630 /* Record the fields for the semantic handler. */
631 FLD (f_simm16
) = f_simm16
;
634 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
635 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
636 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_add3", "f_simm16 0x%x", 'x', f_simm16
, "f_r2 0x%x", 'x', f_r2
, "f_r1 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
638 #if WITH_PROFILE_MODEL_P
639 /* Record the fields for profiling. */
640 if (PROFILE_MODEL_P (current_cpu
))
652 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
653 CGEN_INSN_INT insn
= entire_insn
;
654 #define FLD(f) abuf->fields.sfmt_and3.f
659 f_r1
= EXTRACT_MSB0_UINT (insn
, 32, 4, 4);
660 f_r2
= EXTRACT_MSB0_UINT (insn
, 32, 12, 4);
661 f_uimm16
= EXTRACT_MSB0_UINT (insn
, 32, 16, 16);
663 /* Record the fields for the semantic handler. */
665 FLD (f_uimm16
) = f_uimm16
;
667 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
668 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
669 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_and3", "f_r2 0x%x", 'x', f_r2
, "f_uimm16 0x%x", 'x', f_uimm16
, "f_r1 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
671 #if WITH_PROFILE_MODEL_P
672 /* Record the fields for profiling. */
673 if (PROFILE_MODEL_P (current_cpu
))
685 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
686 CGEN_INSN_INT insn
= entire_insn
;
687 #define FLD(f) abuf->fields.sfmt_and3.f
692 f_r1
= EXTRACT_MSB0_UINT (insn
, 32, 4, 4);
693 f_r2
= EXTRACT_MSB0_UINT (insn
, 32, 12, 4);
694 f_uimm16
= EXTRACT_MSB0_UINT (insn
, 32, 16, 16);
696 /* Record the fields for the semantic handler. */
698 FLD (f_uimm16
) = f_uimm16
;
700 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
701 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
702 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_or3", "f_r2 0x%x", 'x', f_r2
, "f_uimm16 0x%x", 'x', f_uimm16
, "f_r1 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
704 #if WITH_PROFILE_MODEL_P
705 /* Record the fields for profiling. */
706 if (PROFILE_MODEL_P (current_cpu
))
718 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
719 CGEN_INSN_INT insn
= entire_insn
;
720 #define FLD(f) abuf->fields.sfmt_addi.f
724 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
725 f_simm8
= EXTRACT_MSB0_INT (insn
, 16, 8, 8);
727 /* Record the fields for the semantic handler. */
729 FLD (f_simm8
) = f_simm8
;
730 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
731 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_addi", "f_r1 0x%x", 'x', f_r1
, "f_simm8 0x%x", 'x', f_simm8
, "dr 0x%x", 'x', f_r1
, (char *) 0));
733 #if WITH_PROFILE_MODEL_P
734 /* Record the fields for profiling. */
735 if (PROFILE_MODEL_P (current_cpu
))
747 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
748 CGEN_INSN_INT insn
= entire_insn
;
749 #define FLD(f) abuf->fields.sfmt_add.f
753 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
754 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
756 /* Record the fields for the semantic handler. */
759 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
760 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
761 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_addv", "f_r1 0x%x", 'x', f_r1
, "f_r2 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, (char *) 0));
763 #if WITH_PROFILE_MODEL_P
764 /* Record the fields for profiling. */
765 if (PROFILE_MODEL_P (current_cpu
))
778 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
779 CGEN_INSN_INT insn
= entire_insn
;
780 #define FLD(f) abuf->fields.sfmt_add3.f
785 f_r1
= EXTRACT_MSB0_UINT (insn
, 32, 4, 4);
786 f_r2
= EXTRACT_MSB0_UINT (insn
, 32, 12, 4);
787 f_simm16
= EXTRACT_MSB0_INT (insn
, 32, 16, 16);
789 /* Record the fields for the semantic handler. */
790 FLD (f_simm16
) = f_simm16
;
793 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
794 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
795 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_addv3", "f_simm16 0x%x", 'x', f_simm16
, "f_r2 0x%x", 'x', f_r2
, "f_r1 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
797 #if WITH_PROFILE_MODEL_P
798 /* Record the fields for profiling. */
799 if (PROFILE_MODEL_P (current_cpu
))
811 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
812 CGEN_INSN_INT insn
= entire_insn
;
813 #define FLD(f) abuf->fields.sfmt_add.f
817 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
818 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
820 /* Record the fields for the semantic handler. */
823 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
824 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
825 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_addx", "f_r1 0x%x", 'x', f_r1
, "f_r2 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, (char *) 0));
827 #if WITH_PROFILE_MODEL_P
828 /* Record the fields for profiling. */
829 if (PROFILE_MODEL_P (current_cpu
))
842 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
843 CGEN_INSN_INT insn
= entire_insn
;
844 #define FLD(f) abuf->fields.sfmt_bl8.f
847 f_disp8
= ((((EXTRACT_MSB0_INT (insn
, 16, 8, 8)) << (2))) + (((pc
) & (-4))));
849 /* Record the fields for the semantic handler. */
850 FLD (i_disp8
) = f_disp8
;
851 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_bc8", "disp8 0x%x", 'x', f_disp8
, (char *) 0));
853 #if WITH_PROFILE_MODEL_P
854 /* Record the fields for profiling. */
855 if (PROFILE_MODEL_P (current_cpu
))
865 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
866 CGEN_INSN_INT insn
= entire_insn
;
867 #define FLD(f) abuf->fields.sfmt_bl24.f
870 f_disp24
= ((((EXTRACT_MSB0_INT (insn
, 32, 8, 24)) << (2))) + (pc
));
872 /* Record the fields for the semantic handler. */
873 FLD (i_disp24
) = f_disp24
;
874 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_bc24", "disp24 0x%x", 'x', f_disp24
, (char *) 0));
876 #if WITH_PROFILE_MODEL_P
877 /* Record the fields for profiling. */
878 if (PROFILE_MODEL_P (current_cpu
))
888 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
889 CGEN_INSN_INT insn
= entire_insn
;
890 #define FLD(f) abuf->fields.sfmt_beq.f
895 f_r1
= EXTRACT_MSB0_UINT (insn
, 32, 4, 4);
896 f_r2
= EXTRACT_MSB0_UINT (insn
, 32, 12, 4);
897 f_disp16
= ((((EXTRACT_MSB0_INT (insn
, 32, 16, 16)) << (2))) + (pc
));
899 /* Record the fields for the semantic handler. */
902 FLD (i_disp16
) = f_disp16
;
903 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
904 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
905 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_beq", "f_r1 0x%x", 'x', f_r1
, "f_r2 0x%x", 'x', f_r2
, "disp16 0x%x", 'x', f_disp16
, "src1 0x%x", 'x', f_r1
, "src2 0x%x", 'x', f_r2
, (char *) 0));
907 #if WITH_PROFILE_MODEL_P
908 /* Record the fields for profiling. */
909 if (PROFILE_MODEL_P (current_cpu
))
911 FLD (in_src1
) = f_r1
;
912 FLD (in_src2
) = f_r2
;
921 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
922 CGEN_INSN_INT insn
= entire_insn
;
923 #define FLD(f) abuf->fields.sfmt_beq.f
927 f_r2
= EXTRACT_MSB0_UINT (insn
, 32, 12, 4);
928 f_disp16
= ((((EXTRACT_MSB0_INT (insn
, 32, 16, 16)) << (2))) + (pc
));
930 /* Record the fields for the semantic handler. */
932 FLD (i_disp16
) = f_disp16
;
933 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
934 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_beqz", "f_r2 0x%x", 'x', f_r2
, "disp16 0x%x", 'x', f_disp16
, "src2 0x%x", 'x', f_r2
, (char *) 0));
936 #if WITH_PROFILE_MODEL_P
937 /* Record the fields for profiling. */
938 if (PROFILE_MODEL_P (current_cpu
))
940 FLD (in_src2
) = f_r2
;
949 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
950 CGEN_INSN_INT insn
= entire_insn
;
951 #define FLD(f) abuf->fields.sfmt_bl8.f
954 f_disp8
= ((((EXTRACT_MSB0_INT (insn
, 16, 8, 8)) << (2))) + (((pc
) & (-4))));
956 /* Record the fields for the semantic handler. */
957 FLD (i_disp8
) = f_disp8
;
958 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_bl8", "disp8 0x%x", 'x', f_disp8
, (char *) 0));
960 #if WITH_PROFILE_MODEL_P
961 /* Record the fields for profiling. */
962 if (PROFILE_MODEL_P (current_cpu
))
964 FLD (out_h_gr_SI_14
) = 14;
973 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
974 CGEN_INSN_INT insn
= entire_insn
;
975 #define FLD(f) abuf->fields.sfmt_bl24.f
978 f_disp24
= ((((EXTRACT_MSB0_INT (insn
, 32, 8, 24)) << (2))) + (pc
));
980 /* Record the fields for the semantic handler. */
981 FLD (i_disp24
) = f_disp24
;
982 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_bl24", "disp24 0x%x", 'x', f_disp24
, (char *) 0));
984 #if WITH_PROFILE_MODEL_P
985 /* Record the fields for profiling. */
986 if (PROFILE_MODEL_P (current_cpu
))
988 FLD (out_h_gr_SI_14
) = 14;
997 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
998 CGEN_INSN_INT insn
= entire_insn
;
999 #define FLD(f) abuf->fields.sfmt_bl8.f
1002 f_disp8
= ((((EXTRACT_MSB0_INT (insn
, 16, 8, 8)) << (2))) + (((pc
) & (-4))));
1004 /* Record the fields for the semantic handler. */
1005 FLD (i_disp8
) = f_disp8
;
1006 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_bcl8", "disp8 0x%x", 'x', f_disp8
, (char *) 0));
1008 #if WITH_PROFILE_MODEL_P
1009 /* Record the fields for profiling. */
1010 if (PROFILE_MODEL_P (current_cpu
))
1012 FLD (out_h_gr_SI_14
) = 14;
1021 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
1022 CGEN_INSN_INT insn
= entire_insn
;
1023 #define FLD(f) abuf->fields.sfmt_bl24.f
1026 f_disp24
= ((((EXTRACT_MSB0_INT (insn
, 32, 8, 24)) << (2))) + (pc
));
1028 /* Record the fields for the semantic handler. */
1029 FLD (i_disp24
) = f_disp24
;
1030 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_bcl24", "disp24 0x%x", 'x', f_disp24
, (char *) 0));
1032 #if WITH_PROFILE_MODEL_P
1033 /* Record the fields for profiling. */
1034 if (PROFILE_MODEL_P (current_cpu
))
1036 FLD (out_h_gr_SI_14
) = 14;
1045 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
1046 CGEN_INSN_INT insn
= entire_insn
;
1047 #define FLD(f) abuf->fields.sfmt_bl8.f
1050 f_disp8
= ((((EXTRACT_MSB0_INT (insn
, 16, 8, 8)) << (2))) + (((pc
) & (-4))));
1052 /* Record the fields for the semantic handler. */
1053 FLD (i_disp8
) = f_disp8
;
1054 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_bra8", "disp8 0x%x", 'x', f_disp8
, (char *) 0));
1056 #if WITH_PROFILE_MODEL_P
1057 /* Record the fields for profiling. */
1058 if (PROFILE_MODEL_P (current_cpu
))
1068 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
1069 CGEN_INSN_INT insn
= entire_insn
;
1070 #define FLD(f) abuf->fields.sfmt_bl24.f
1073 f_disp24
= ((((EXTRACT_MSB0_INT (insn
, 32, 8, 24)) << (2))) + (pc
));
1075 /* Record the fields for the semantic handler. */
1076 FLD (i_disp24
) = f_disp24
;
1077 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_bra24", "disp24 0x%x", 'x', f_disp24
, (char *) 0));
1079 #if WITH_PROFILE_MODEL_P
1080 /* Record the fields for profiling. */
1081 if (PROFILE_MODEL_P (current_cpu
))
1091 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
1092 CGEN_INSN_INT insn
= entire_insn
;
1093 #define FLD(f) abuf->fields.sfmt_st_plus.f
1097 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
1098 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
1100 /* Record the fields for the semantic handler. */
1103 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
1104 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
1105 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_cmp", "f_r1 0x%x", 'x', f_r1
, "f_r2 0x%x", 'x', f_r2
, "src1 0x%x", 'x', f_r1
, "src2 0x%x", 'x', f_r2
, (char *) 0));
1107 #if WITH_PROFILE_MODEL_P
1108 /* Record the fields for profiling. */
1109 if (PROFILE_MODEL_P (current_cpu
))
1111 FLD (in_src1
) = f_r1
;
1112 FLD (in_src2
) = f_r2
;
1121 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
1122 CGEN_INSN_INT insn
= entire_insn
;
1123 #define FLD(f) abuf->fields.sfmt_st_d.f
1127 f_r2
= EXTRACT_MSB0_UINT (insn
, 32, 12, 4);
1128 f_simm16
= EXTRACT_MSB0_INT (insn
, 32, 16, 16);
1130 /* Record the fields for the semantic handler. */
1131 FLD (f_simm16
) = f_simm16
;
1133 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
1134 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_cmpi", "f_simm16 0x%x", 'x', f_simm16
, "f_r2 0x%x", 'x', f_r2
, "src2 0x%x", 'x', f_r2
, (char *) 0));
1136 #if WITH_PROFILE_MODEL_P
1137 /* Record the fields for profiling. */
1138 if (PROFILE_MODEL_P (current_cpu
))
1140 FLD (in_src2
) = f_r2
;
1149 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
1150 CGEN_INSN_INT insn
= entire_insn
;
1151 #define FLD(f) abuf->fields.sfmt_st_plus.f
1154 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
1156 /* Record the fields for the semantic handler. */
1158 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
1159 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_cmpz", "f_r2 0x%x", 'x', f_r2
, "src2 0x%x", 'x', f_r2
, (char *) 0));
1161 #if WITH_PROFILE_MODEL_P
1162 /* Record the fields for profiling. */
1163 if (PROFILE_MODEL_P (current_cpu
))
1165 FLD (in_src2
) = f_r2
;
1174 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
1175 CGEN_INSN_INT insn
= entire_insn
;
1176 #define FLD(f) abuf->fields.sfmt_add.f
1180 f_r1
= EXTRACT_MSB0_UINT (insn
, 32, 4, 4);
1181 f_r2
= EXTRACT_MSB0_UINT (insn
, 32, 12, 4);
1183 /* Record the fields for the semantic handler. */
1186 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1187 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
1188 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_div", "f_r1 0x%x", 'x', f_r1
, "f_r2 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, (char *) 0));
1190 #if WITH_PROFILE_MODEL_P
1191 /* Record the fields for profiling. */
1192 if (PROFILE_MODEL_P (current_cpu
))
1196 FLD (out_dr
) = f_r1
;
1205 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
1206 CGEN_INSN_INT insn
= entire_insn
;
1207 #define FLD(f) abuf->fields.sfmt_jl.f
1210 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
1212 /* Record the fields for the semantic handler. */
1214 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
1215 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_jc", "f_r2 0x%x", 'x', f_r2
, "sr 0x%x", 'x', f_r2
, (char *) 0));
1217 #if WITH_PROFILE_MODEL_P
1218 /* Record the fields for profiling. */
1219 if (PROFILE_MODEL_P (current_cpu
))
1230 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
1231 CGEN_INSN_INT insn
= entire_insn
;
1232 #define FLD(f) abuf->fields.sfmt_jl.f
1235 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
1237 /* Record the fields for the semantic handler. */
1239 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
1240 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_jl", "f_r2 0x%x", 'x', f_r2
, "sr 0x%x", 'x', f_r2
, (char *) 0));
1242 #if WITH_PROFILE_MODEL_P
1243 /* Record the fields for profiling. */
1244 if (PROFILE_MODEL_P (current_cpu
))
1247 FLD (out_h_gr_SI_14
) = 14;
1256 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
1257 CGEN_INSN_INT insn
= entire_insn
;
1258 #define FLD(f) abuf->fields.sfmt_jl.f
1261 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
1263 /* Record the fields for the semantic handler. */
1265 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
1266 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_jmp", "f_r2 0x%x", 'x', f_r2
, "sr 0x%x", 'x', f_r2
, (char *) 0));
1268 #if WITH_PROFILE_MODEL_P
1269 /* Record the fields for profiling. */
1270 if (PROFILE_MODEL_P (current_cpu
))
1281 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
1282 CGEN_INSN_INT insn
= entire_insn
;
1283 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1287 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
1288 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
1290 /* Record the fields for the semantic handler. */
1293 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
1294 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1295 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_ld", "f_r2 0x%x", 'x', f_r2
, "f_r1 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1297 #if WITH_PROFILE_MODEL_P
1298 /* Record the fields for profiling. */
1299 if (PROFILE_MODEL_P (current_cpu
))
1302 FLD (out_dr
) = f_r1
;
1311 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
1312 CGEN_INSN_INT insn
= entire_insn
;
1313 #define FLD(f) abuf->fields.sfmt_add3.f
1318 f_r1
= EXTRACT_MSB0_UINT (insn
, 32, 4, 4);
1319 f_r2
= EXTRACT_MSB0_UINT (insn
, 32, 12, 4);
1320 f_simm16
= EXTRACT_MSB0_INT (insn
, 32, 16, 16);
1322 /* Record the fields for the semantic handler. */
1323 FLD (f_simm16
) = f_simm16
;
1326 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
1327 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1328 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_ld_d", "f_simm16 0x%x", 'x', f_simm16
, "f_r2 0x%x", 'x', f_r2
, "f_r1 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1330 #if WITH_PROFILE_MODEL_P
1331 /* Record the fields for profiling. */
1332 if (PROFILE_MODEL_P (current_cpu
))
1335 FLD (out_dr
) = f_r1
;
1344 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
1345 CGEN_INSN_INT insn
= entire_insn
;
1346 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1350 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
1351 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
1353 /* Record the fields for the semantic handler. */
1356 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
1357 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1358 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_ldb", "f_r2 0x%x", 'x', f_r2
, "f_r1 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1360 #if WITH_PROFILE_MODEL_P
1361 /* Record the fields for profiling. */
1362 if (PROFILE_MODEL_P (current_cpu
))
1365 FLD (out_dr
) = f_r1
;
1374 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
1375 CGEN_INSN_INT insn
= entire_insn
;
1376 #define FLD(f) abuf->fields.sfmt_add3.f
1381 f_r1
= EXTRACT_MSB0_UINT (insn
, 32, 4, 4);
1382 f_r2
= EXTRACT_MSB0_UINT (insn
, 32, 12, 4);
1383 f_simm16
= EXTRACT_MSB0_INT (insn
, 32, 16, 16);
1385 /* Record the fields for the semantic handler. */
1386 FLD (f_simm16
) = f_simm16
;
1389 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
1390 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1391 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_ldb_d", "f_simm16 0x%x", 'x', f_simm16
, "f_r2 0x%x", 'x', f_r2
, "f_r1 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1393 #if WITH_PROFILE_MODEL_P
1394 /* Record the fields for profiling. */
1395 if (PROFILE_MODEL_P (current_cpu
))
1398 FLD (out_dr
) = f_r1
;
1407 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
1408 CGEN_INSN_INT insn
= entire_insn
;
1409 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1413 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
1414 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
1416 /* Record the fields for the semantic handler. */
1419 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
1420 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1421 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_ldh", "f_r2 0x%x", 'x', f_r2
, "f_r1 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1423 #if WITH_PROFILE_MODEL_P
1424 /* Record the fields for profiling. */
1425 if (PROFILE_MODEL_P (current_cpu
))
1428 FLD (out_dr
) = f_r1
;
1437 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
1438 CGEN_INSN_INT insn
= entire_insn
;
1439 #define FLD(f) abuf->fields.sfmt_add3.f
1444 f_r1
= EXTRACT_MSB0_UINT (insn
, 32, 4, 4);
1445 f_r2
= EXTRACT_MSB0_UINT (insn
, 32, 12, 4);
1446 f_simm16
= EXTRACT_MSB0_INT (insn
, 32, 16, 16);
1448 /* Record the fields for the semantic handler. */
1449 FLD (f_simm16
) = f_simm16
;
1452 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
1453 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1454 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_ldh_d", "f_simm16 0x%x", 'x', f_simm16
, "f_r2 0x%x", 'x', f_r2
, "f_r1 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1456 #if WITH_PROFILE_MODEL_P
1457 /* Record the fields for profiling. */
1458 if (PROFILE_MODEL_P (current_cpu
))
1461 FLD (out_dr
) = f_r1
;
1468 extract_sfmt_ld_plus
:
1470 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
1471 CGEN_INSN_INT insn
= entire_insn
;
1472 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1476 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
1477 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
1479 /* Record the fields for the semantic handler. */
1482 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
1483 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1484 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_ld_plus", "f_r2 0x%x", 'x', f_r2
, "f_r1 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1486 #if WITH_PROFILE_MODEL_P
1487 /* Record the fields for profiling. */
1488 if (PROFILE_MODEL_P (current_cpu
))
1491 FLD (out_dr
) = f_r1
;
1492 FLD (out_sr
) = f_r2
;
1501 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
1502 CGEN_INSN_INT insn
= entire_insn
;
1503 #define FLD(f) abuf->fields.sfmt_ld24.f
1507 f_r1
= EXTRACT_MSB0_UINT (insn
, 32, 4, 4);
1508 f_uimm24
= EXTRACT_MSB0_UINT (insn
, 32, 8, 24);
1510 /* Record the fields for the semantic handler. */
1512 FLD (i_uimm24
) = f_uimm24
;
1513 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1514 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_ld24", "f_r1 0x%x", 'x', f_r1
, "uimm24 0x%x", 'x', f_uimm24
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1516 #if WITH_PROFILE_MODEL_P
1517 /* Record the fields for profiling. */
1518 if (PROFILE_MODEL_P (current_cpu
))
1520 FLD (out_dr
) = f_r1
;
1529 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
1530 CGEN_INSN_INT insn
= entire_insn
;
1531 #define FLD(f) abuf->fields.sfmt_addi.f
1535 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
1536 f_simm8
= EXTRACT_MSB0_INT (insn
, 16, 8, 8);
1538 /* Record the fields for the semantic handler. */
1539 FLD (f_simm8
) = f_simm8
;
1541 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1542 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_ldi8", "f_simm8 0x%x", 'x', f_simm8
, "f_r1 0x%x", 'x', f_r1
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1544 #if WITH_PROFILE_MODEL_P
1545 /* Record the fields for profiling. */
1546 if (PROFILE_MODEL_P (current_cpu
))
1548 FLD (out_dr
) = f_r1
;
1557 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
1558 CGEN_INSN_INT insn
= entire_insn
;
1559 #define FLD(f) abuf->fields.sfmt_add3.f
1563 f_r1
= EXTRACT_MSB0_UINT (insn
, 32, 4, 4);
1564 f_simm16
= EXTRACT_MSB0_INT (insn
, 32, 16, 16);
1566 /* Record the fields for the semantic handler. */
1567 FLD (f_simm16
) = f_simm16
;
1569 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1570 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_ldi16", "f_simm16 0x%x", 'x', f_simm16
, "f_r1 0x%x", 'x', f_r1
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1572 #if WITH_PROFILE_MODEL_P
1573 /* Record the fields for profiling. */
1574 if (PROFILE_MODEL_P (current_cpu
))
1576 FLD (out_dr
) = f_r1
;
1585 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
1586 CGEN_INSN_INT insn
= entire_insn
;
1587 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1591 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
1592 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
1594 /* Record the fields for the semantic handler. */
1597 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
1598 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1599 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_lock", "f_r2 0x%x", 'x', f_r2
, "f_r1 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1601 #if WITH_PROFILE_MODEL_P
1602 /* Record the fields for profiling. */
1603 if (PROFILE_MODEL_P (current_cpu
))
1606 FLD (out_dr
) = f_r1
;
1613 extract_sfmt_machi_a
:
1615 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
1616 CGEN_INSN_INT insn
= entire_insn
;
1617 #define FLD(f) abuf->fields.sfmt_machi_a.f
1622 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
1623 f_acc
= EXTRACT_MSB0_UINT (insn
, 16, 8, 1);
1624 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
1626 /* Record the fields for the semantic handler. */
1627 FLD (f_acc
) = f_acc
;
1630 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
1631 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
1632 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_machi_a", "f_acc 0x%x", 'x', f_acc
, "f_r1 0x%x", 'x', f_r1
, "f_r2 0x%x", 'x', f_r2
, "src1 0x%x", 'x', f_r1
, "src2 0x%x", 'x', f_r2
, (char *) 0));
1634 #if WITH_PROFILE_MODEL_P
1635 /* Record the fields for profiling. */
1636 if (PROFILE_MODEL_P (current_cpu
))
1638 FLD (in_src1
) = f_r1
;
1639 FLD (in_src2
) = f_r2
;
1646 extract_sfmt_mulhi_a
:
1648 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
1649 CGEN_INSN_INT insn
= entire_insn
;
1650 #define FLD(f) abuf->fields.sfmt_machi_a.f
1655 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
1656 f_acc
= EXTRACT_MSB0_UINT (insn
, 16, 8, 1);
1657 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
1659 /* Record the fields for the semantic handler. */
1662 FLD (f_acc
) = f_acc
;
1663 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
1664 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
1665 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_mulhi_a", "f_r1 0x%x", 'x', f_r1
, "f_r2 0x%x", 'x', f_r2
, "f_acc 0x%x", 'x', f_acc
, "src1 0x%x", 'x', f_r1
, "src2 0x%x", 'x', f_r2
, (char *) 0));
1667 #if WITH_PROFILE_MODEL_P
1668 /* Record the fields for profiling. */
1669 if (PROFILE_MODEL_P (current_cpu
))
1671 FLD (in_src1
) = f_r1
;
1672 FLD (in_src2
) = f_r2
;
1681 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
1682 CGEN_INSN_INT insn
= entire_insn
;
1683 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1687 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
1688 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
1690 /* Record the fields for the semantic handler. */
1693 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
1694 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1695 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_mv", "f_r2 0x%x", 'x', f_r2
, "f_r1 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1697 #if WITH_PROFILE_MODEL_P
1698 /* Record the fields for profiling. */
1699 if (PROFILE_MODEL_P (current_cpu
))
1702 FLD (out_dr
) = f_r1
;
1709 extract_sfmt_mvfachi_a
:
1711 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
1712 CGEN_INSN_INT insn
= entire_insn
;
1713 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
1717 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
1718 f_accs
= EXTRACT_MSB0_UINT (insn
, 16, 12, 2);
1720 /* Record the fields for the semantic handler. */
1721 FLD (f_accs
) = f_accs
;
1723 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1724 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_mvfachi_a", "f_accs 0x%x", 'x', f_accs
, "f_r1 0x%x", 'x', f_r1
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1726 #if WITH_PROFILE_MODEL_P
1727 /* Record the fields for profiling. */
1728 if (PROFILE_MODEL_P (current_cpu
))
1730 FLD (out_dr
) = f_r1
;
1739 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
1740 CGEN_INSN_INT insn
= entire_insn
;
1741 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1745 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
1746 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
1748 /* Record the fields for the semantic handler. */
1751 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1752 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_mvfc", "f_r2 0x%x", 'x', f_r2
, "f_r1 0x%x", 'x', f_r1
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1754 #if WITH_PROFILE_MODEL_P
1755 /* Record the fields for profiling. */
1756 if (PROFILE_MODEL_P (current_cpu
))
1758 FLD (out_dr
) = f_r1
;
1765 extract_sfmt_mvtachi_a
:
1767 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
1768 CGEN_INSN_INT insn
= entire_insn
;
1769 #define FLD(f) abuf->fields.sfmt_mvtachi_a.f
1773 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
1774 f_accs
= EXTRACT_MSB0_UINT (insn
, 16, 12, 2);
1776 /* Record the fields for the semantic handler. */
1777 FLD (f_accs
) = f_accs
;
1779 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
1780 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_mvtachi_a", "f_accs 0x%x", 'x', f_accs
, "f_r1 0x%x", 'x', f_r1
, "src1 0x%x", 'x', f_r1
, (char *) 0));
1782 #if WITH_PROFILE_MODEL_P
1783 /* Record the fields for profiling. */
1784 if (PROFILE_MODEL_P (current_cpu
))
1786 FLD (in_src1
) = f_r1
;
1795 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
1796 CGEN_INSN_INT insn
= entire_insn
;
1797 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1801 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
1802 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
1804 /* Record the fields for the semantic handler. */
1807 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
1808 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_mvtc", "f_r2 0x%x", 'x', f_r2
, "f_r1 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, (char *) 0));
1810 #if WITH_PROFILE_MODEL_P
1811 /* Record the fields for profiling. */
1812 if (PROFILE_MODEL_P (current_cpu
))
1823 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
1824 #define FLD(f) abuf->fields.fmt_empty.f
1827 /* Record the fields for the semantic handler. */
1828 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_nop", (char *) 0));
1834 extract_sfmt_rac_dsi
:
1836 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
1837 CGEN_INSN_INT insn
= entire_insn
;
1838 #define FLD(f) abuf->fields.sfmt_rac_dsi.f
1843 f_accd
= EXTRACT_MSB0_UINT (insn
, 16, 4, 2);
1844 f_accs
= EXTRACT_MSB0_UINT (insn
, 16, 12, 2);
1845 f_imm1
= ((EXTRACT_MSB0_UINT (insn
, 16, 15, 1)) + (1));
1847 /* Record the fields for the semantic handler. */
1848 FLD (f_accs
) = f_accs
;
1849 FLD (f_imm1
) = f_imm1
;
1850 FLD (f_accd
) = f_accd
;
1851 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_rac_dsi", "f_accs 0x%x", 'x', f_accs
, "f_imm1 0x%x", 'x', f_imm1
, "f_accd 0x%x", 'x', f_accd
, (char *) 0));
1859 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
1860 #define FLD(f) abuf->fields.fmt_empty.f
1863 /* Record the fields for the semantic handler. */
1864 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_rte", (char *) 0));
1866 #if WITH_PROFILE_MODEL_P
1867 /* Record the fields for profiling. */
1868 if (PROFILE_MODEL_P (current_cpu
))
1878 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
1879 CGEN_INSN_INT insn
= entire_insn
;
1880 #define FLD(f) abuf->fields.sfmt_seth.f
1884 f_r1
= EXTRACT_MSB0_UINT (insn
, 32, 4, 4);
1885 f_hi16
= EXTRACT_MSB0_UINT (insn
, 32, 16, 16);
1887 /* Record the fields for the semantic handler. */
1888 FLD (f_hi16
) = f_hi16
;
1890 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1891 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_seth", "f_hi16 0x%x", 'x', f_hi16
, "f_r1 0x%x", 'x', f_r1
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1893 #if WITH_PROFILE_MODEL_P
1894 /* Record the fields for profiling. */
1895 if (PROFILE_MODEL_P (current_cpu
))
1897 FLD (out_dr
) = f_r1
;
1906 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
1907 CGEN_INSN_INT insn
= entire_insn
;
1908 #define FLD(f) abuf->fields.sfmt_add3.f
1913 f_r1
= EXTRACT_MSB0_UINT (insn
, 32, 4, 4);
1914 f_r2
= EXTRACT_MSB0_UINT (insn
, 32, 12, 4);
1915 f_simm16
= EXTRACT_MSB0_INT (insn
, 32, 16, 16);
1917 /* Record the fields for the semantic handler. */
1918 FLD (f_simm16
) = f_simm16
;
1921 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
1922 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1923 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_sll3", "f_simm16 0x%x", 'x', f_simm16
, "f_r2 0x%x", 'x', f_r2
, "f_r1 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1925 #if WITH_PROFILE_MODEL_P
1926 /* Record the fields for profiling. */
1927 if (PROFILE_MODEL_P (current_cpu
))
1930 FLD (out_dr
) = f_r1
;
1939 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
1940 CGEN_INSN_INT insn
= entire_insn
;
1941 #define FLD(f) abuf->fields.sfmt_slli.f
1945 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
1946 f_uimm5
= EXTRACT_MSB0_UINT (insn
, 16, 11, 5);
1948 /* Record the fields for the semantic handler. */
1950 FLD (f_uimm5
) = f_uimm5
;
1951 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
1952 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_slli", "f_r1 0x%x", 'x', f_r1
, "f_uimm5 0x%x", 'x', f_uimm5
, "dr 0x%x", 'x', f_r1
, (char *) 0));
1954 #if WITH_PROFILE_MODEL_P
1955 /* Record the fields for profiling. */
1956 if (PROFILE_MODEL_P (current_cpu
))
1959 FLD (out_dr
) = f_r1
;
1968 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
1969 CGEN_INSN_INT insn
= entire_insn
;
1970 #define FLD(f) abuf->fields.sfmt_st_plus.f
1974 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
1975 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
1977 /* Record the fields for the semantic handler. */
1980 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
1981 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
1982 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_st", "f_r1 0x%x", 'x', f_r1
, "f_r2 0x%x", 'x', f_r2
, "src1 0x%x", 'x', f_r1
, "src2 0x%x", 'x', f_r2
, (char *) 0));
1984 #if WITH_PROFILE_MODEL_P
1985 /* Record the fields for profiling. */
1986 if (PROFILE_MODEL_P (current_cpu
))
1988 FLD (in_src1
) = f_r1
;
1989 FLD (in_src2
) = f_r2
;
1998 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
1999 CGEN_INSN_INT insn
= entire_insn
;
2000 #define FLD(f) abuf->fields.sfmt_st_d.f
2005 f_r1
= EXTRACT_MSB0_UINT (insn
, 32, 4, 4);
2006 f_r2
= EXTRACT_MSB0_UINT (insn
, 32, 12, 4);
2007 f_simm16
= EXTRACT_MSB0_INT (insn
, 32, 16, 16);
2009 /* Record the fields for the semantic handler. */
2010 FLD (f_simm16
) = f_simm16
;
2013 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
2014 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
2015 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_st_d", "f_simm16 0x%x", 'x', f_simm16
, "f_r1 0x%x", 'x', f_r1
, "f_r2 0x%x", 'x', f_r2
, "src1 0x%x", 'x', f_r1
, "src2 0x%x", 'x', f_r2
, (char *) 0));
2017 #if WITH_PROFILE_MODEL_P
2018 /* Record the fields for profiling. */
2019 if (PROFILE_MODEL_P (current_cpu
))
2021 FLD (in_src1
) = f_r1
;
2022 FLD (in_src2
) = f_r2
;
2031 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
2032 CGEN_INSN_INT insn
= entire_insn
;
2033 #define FLD(f) abuf->fields.sfmt_st_plus.f
2037 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
2038 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
2040 /* Record the fields for the semantic handler. */
2043 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
2044 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
2045 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_stb", "f_r1 0x%x", 'x', f_r1
, "f_r2 0x%x", 'x', f_r2
, "src1 0x%x", 'x', f_r1
, "src2 0x%x", 'x', f_r2
, (char *) 0));
2047 #if WITH_PROFILE_MODEL_P
2048 /* Record the fields for profiling. */
2049 if (PROFILE_MODEL_P (current_cpu
))
2051 FLD (in_src1
) = f_r1
;
2052 FLD (in_src2
) = f_r2
;
2061 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
2062 CGEN_INSN_INT insn
= entire_insn
;
2063 #define FLD(f) abuf->fields.sfmt_st_d.f
2068 f_r1
= EXTRACT_MSB0_UINT (insn
, 32, 4, 4);
2069 f_r2
= EXTRACT_MSB0_UINT (insn
, 32, 12, 4);
2070 f_simm16
= EXTRACT_MSB0_INT (insn
, 32, 16, 16);
2072 /* Record the fields for the semantic handler. */
2073 FLD (f_simm16
) = f_simm16
;
2076 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
2077 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
2078 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_stb_d", "f_simm16 0x%x", 'x', f_simm16
, "f_r1 0x%x", 'x', f_r1
, "f_r2 0x%x", 'x', f_r2
, "src1 0x%x", 'x', f_r1
, "src2 0x%x", 'x', f_r2
, (char *) 0));
2080 #if WITH_PROFILE_MODEL_P
2081 /* Record the fields for profiling. */
2082 if (PROFILE_MODEL_P (current_cpu
))
2084 FLD (in_src1
) = f_r1
;
2085 FLD (in_src2
) = f_r2
;
2094 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
2095 CGEN_INSN_INT insn
= entire_insn
;
2096 #define FLD(f) abuf->fields.sfmt_st_plus.f
2100 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
2101 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
2103 /* Record the fields for the semantic handler. */
2106 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
2107 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
2108 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_sth", "f_r1 0x%x", 'x', f_r1
, "f_r2 0x%x", 'x', f_r2
, "src1 0x%x", 'x', f_r1
, "src2 0x%x", 'x', f_r2
, (char *) 0));
2110 #if WITH_PROFILE_MODEL_P
2111 /* Record the fields for profiling. */
2112 if (PROFILE_MODEL_P (current_cpu
))
2114 FLD (in_src1
) = f_r1
;
2115 FLD (in_src2
) = f_r2
;
2124 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
2125 CGEN_INSN_INT insn
= entire_insn
;
2126 #define FLD(f) abuf->fields.sfmt_st_d.f
2131 f_r1
= EXTRACT_MSB0_UINT (insn
, 32, 4, 4);
2132 f_r2
= EXTRACT_MSB0_UINT (insn
, 32, 12, 4);
2133 f_simm16
= EXTRACT_MSB0_INT (insn
, 32, 16, 16);
2135 /* Record the fields for the semantic handler. */
2136 FLD (f_simm16
) = f_simm16
;
2139 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
2140 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
2141 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_sth_d", "f_simm16 0x%x", 'x', f_simm16
, "f_r1 0x%x", 'x', f_r1
, "f_r2 0x%x", 'x', f_r2
, "src1 0x%x", 'x', f_r1
, "src2 0x%x", 'x', f_r2
, (char *) 0));
2143 #if WITH_PROFILE_MODEL_P
2144 /* Record the fields for profiling. */
2145 if (PROFILE_MODEL_P (current_cpu
))
2147 FLD (in_src1
) = f_r1
;
2148 FLD (in_src2
) = f_r2
;
2155 extract_sfmt_st_plus
:
2157 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
2158 CGEN_INSN_INT insn
= entire_insn
;
2159 #define FLD(f) abuf->fields.sfmt_st_plus.f
2163 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
2164 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
2166 /* Record the fields for the semantic handler. */
2169 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
2170 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
2171 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_st_plus", "f_r1 0x%x", 'x', f_r1
, "f_r2 0x%x", 'x', f_r2
, "src1 0x%x", 'x', f_r1
, "src2 0x%x", 'x', f_r2
, (char *) 0));
2173 #if WITH_PROFILE_MODEL_P
2174 /* Record the fields for profiling. */
2175 if (PROFILE_MODEL_P (current_cpu
))
2177 FLD (in_src1
) = f_r1
;
2178 FLD (in_src2
) = f_r2
;
2179 FLD (out_src2
) = f_r2
;
2186 extract_sfmt_sth_plus
:
2188 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
2189 CGEN_INSN_INT insn
= entire_insn
;
2190 #define FLD(f) abuf->fields.sfmt_st_plus.f
2194 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
2195 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
2197 /* Record the fields for the semantic handler. */
2200 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
2201 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
2202 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_sth_plus", "f_r1 0x%x", 'x', f_r1
, "f_r2 0x%x", 'x', f_r2
, "src1 0x%x", 'x', f_r1
, "src2 0x%x", 'x', f_r2
, (char *) 0));
2204 #if WITH_PROFILE_MODEL_P
2205 /* Record the fields for profiling. */
2206 if (PROFILE_MODEL_P (current_cpu
))
2208 FLD (in_src1
) = f_r1
;
2209 FLD (in_src2
) = f_r2
;
2210 FLD (out_src2
) = f_r2
;
2217 extract_sfmt_stb_plus
:
2219 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
2220 CGEN_INSN_INT insn
= entire_insn
;
2221 #define FLD(f) abuf->fields.sfmt_st_plus.f
2225 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
2226 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
2228 /* Record the fields for the semantic handler. */
2231 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
2232 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
2233 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_stb_plus", "f_r1 0x%x", 'x', f_r1
, "f_r2 0x%x", 'x', f_r2
, "src1 0x%x", 'x', f_r1
, "src2 0x%x", 'x', f_r2
, (char *) 0));
2235 #if WITH_PROFILE_MODEL_P
2236 /* Record the fields for profiling. */
2237 if (PROFILE_MODEL_P (current_cpu
))
2239 FLD (in_src1
) = f_r1
;
2240 FLD (in_src2
) = f_r2
;
2241 FLD (out_src2
) = f_r2
;
2250 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
2251 CGEN_INSN_INT insn
= entire_insn
;
2252 #define FLD(f) abuf->fields.sfmt_trap.f
2255 f_uimm4
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
2257 /* Record the fields for the semantic handler. */
2258 FLD (f_uimm4
) = f_uimm4
;
2259 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_trap", "f_uimm4 0x%x", 'x', f_uimm4
, (char *) 0));
2261 #if WITH_PROFILE_MODEL_P
2262 /* Record the fields for profiling. */
2263 if (PROFILE_MODEL_P (current_cpu
))
2271 extract_sfmt_unlock
:
2273 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
2274 CGEN_INSN_INT insn
= entire_insn
;
2275 #define FLD(f) abuf->fields.sfmt_st_plus.f
2279 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
2280 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
2282 /* Record the fields for the semantic handler. */
2285 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
2286 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
2287 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_unlock", "f_r1 0x%x", 'x', f_r1
, "f_r2 0x%x", 'x', f_r2
, "src1 0x%x", 'x', f_r1
, "src2 0x%x", 'x', f_r2
, (char *) 0));
2289 #if WITH_PROFILE_MODEL_P
2290 /* Record the fields for profiling. */
2291 if (PROFILE_MODEL_P (current_cpu
))
2293 FLD (in_src1
) = f_r1
;
2294 FLD (in_src2
) = f_r2
;
2303 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
2304 CGEN_INSN_INT insn
= entire_insn
;
2305 #define FLD(f) abuf->fields.sfmt_ld_plus.f
2309 f_r1
= EXTRACT_MSB0_UINT (insn
, 32, 4, 4);
2310 f_r2
= EXTRACT_MSB0_UINT (insn
, 32, 12, 4);
2312 /* Record the fields for the semantic handler. */
2315 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
2316 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
2317 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_satb", "f_r2 0x%x", 'x', f_r2
, "f_r1 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
2319 #if WITH_PROFILE_MODEL_P
2320 /* Record the fields for profiling. */
2321 if (PROFILE_MODEL_P (current_cpu
))
2324 FLD (out_dr
) = f_r1
;
2333 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
2334 CGEN_INSN_INT insn
= entire_insn
;
2335 #define FLD(f) abuf->fields.sfmt_ld_plus.f
2339 f_r1
= EXTRACT_MSB0_UINT (insn
, 32, 4, 4);
2340 f_r2
= EXTRACT_MSB0_UINT (insn
, 32, 12, 4);
2342 /* Record the fields for the semantic handler. */
2345 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
2346 FLD (i_dr
) = & CPU (h_gr
)[f_r1
];
2347 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_sat", "f_r2 0x%x", 'x', f_r2
, "f_r1 0x%x", 'x', f_r1
, "sr 0x%x", 'x', f_r2
, "dr 0x%x", 'x', f_r1
, (char *) 0));
2349 #if WITH_PROFILE_MODEL_P
2350 /* Record the fields for profiling. */
2351 if (PROFILE_MODEL_P (current_cpu
))
2354 FLD (out_dr
) = f_r1
;
2363 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
2364 #define FLD(f) abuf->fields.fmt_empty.f
2367 /* Record the fields for the semantic handler. */
2368 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_sadd", (char *) 0));
2374 extract_sfmt_macwu1
:
2376 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
2377 CGEN_INSN_INT insn
= entire_insn
;
2378 #define FLD(f) abuf->fields.sfmt_st_plus.f
2382 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
2383 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
2385 /* Record the fields for the semantic handler. */
2388 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
2389 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
2390 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_macwu1", "f_r1 0x%x", 'x', f_r1
, "f_r2 0x%x", 'x', f_r2
, "src1 0x%x", 'x', f_r1
, "src2 0x%x", 'x', f_r2
, (char *) 0));
2392 #if WITH_PROFILE_MODEL_P
2393 /* Record the fields for profiling. */
2394 if (PROFILE_MODEL_P (current_cpu
))
2396 FLD (in_src1
) = f_r1
;
2397 FLD (in_src2
) = f_r2
;
2406 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
2407 CGEN_INSN_INT insn
= entire_insn
;
2408 #define FLD(f) abuf->fields.sfmt_st_plus.f
2412 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
2413 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
2415 /* Record the fields for the semantic handler. */
2418 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
2419 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
2420 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_msblo", "f_r1 0x%x", 'x', f_r1
, "f_r2 0x%x", 'x', f_r2
, "src1 0x%x", 'x', f_r1
, "src2 0x%x", 'x', f_r2
, (char *) 0));
2422 #if WITH_PROFILE_MODEL_P
2423 /* Record the fields for profiling. */
2424 if (PROFILE_MODEL_P (current_cpu
))
2426 FLD (in_src1
) = f_r1
;
2427 FLD (in_src2
) = f_r2
;
2434 extract_sfmt_mulwu1
:
2436 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
2437 CGEN_INSN_INT insn
= entire_insn
;
2438 #define FLD(f) abuf->fields.sfmt_st_plus.f
2442 f_r1
= EXTRACT_MSB0_UINT (insn
, 16, 4, 4);
2443 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
2445 /* Record the fields for the semantic handler. */
2448 FLD (i_src1
) = & CPU (h_gr
)[f_r1
];
2449 FLD (i_src2
) = & CPU (h_gr
)[f_r2
];
2450 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_mulwu1", "f_r1 0x%x", 'x', f_r1
, "f_r2 0x%x", 'x', f_r2
, "src1 0x%x", 'x', f_r1
, "src2 0x%x", 'x', f_r2
, (char *) 0));
2452 #if WITH_PROFILE_MODEL_P
2453 /* Record the fields for profiling. */
2454 if (PROFILE_MODEL_P (current_cpu
))
2456 FLD (in_src1
) = f_r1
;
2457 FLD (in_src2
) = f_r2
;
2466 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
2467 #define FLD(f) abuf->fields.fmt_empty.f
2470 /* Record the fields for the semantic handler. */
2471 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_sc", (char *) 0));
2477 extract_sfmt_clrpsw
:
2479 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
2480 CGEN_INSN_INT insn
= entire_insn
;
2481 #define FLD(f) abuf->fields.sfmt_clrpsw.f
2484 f_uimm8
= EXTRACT_MSB0_UINT (insn
, 16, 8, 8);
2486 /* Record the fields for the semantic handler. */
2487 FLD (f_uimm8
) = f_uimm8
;
2488 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_clrpsw", "f_uimm8 0x%x", 'x', f_uimm8
, (char *) 0));
2494 extract_sfmt_setpsw
:
2496 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
2497 CGEN_INSN_INT insn
= entire_insn
;
2498 #define FLD(f) abuf->fields.sfmt_clrpsw.f
2501 f_uimm8
= EXTRACT_MSB0_UINT (insn
, 16, 8, 8);
2503 /* Record the fields for the semantic handler. */
2504 FLD (f_uimm8
) = f_uimm8
;
2505 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_setpsw", "f_uimm8 0x%x", 'x', f_uimm8
, (char *) 0));
2513 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
2514 CGEN_INSN_INT insn
= entire_insn
;
2515 #define FLD(f) abuf->fields.sfmt_bset.f
2520 f_uimm3
= EXTRACT_MSB0_UINT (insn
, 32, 5, 3);
2521 f_r2
= EXTRACT_MSB0_UINT (insn
, 32, 12, 4);
2522 f_simm16
= EXTRACT_MSB0_INT (insn
, 32, 16, 16);
2524 /* Record the fields for the semantic handler. */
2525 FLD (f_simm16
) = f_simm16
;
2527 FLD (f_uimm3
) = f_uimm3
;
2528 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
2529 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_bset", "f_simm16 0x%x", 'x', f_simm16
, "f_r2 0x%x", 'x', f_r2
, "f_uimm3 0x%x", 'x', f_uimm3
, "sr 0x%x", 'x', f_r2
, (char *) 0));
2531 #if WITH_PROFILE_MODEL_P
2532 /* Record the fields for profiling. */
2533 if (PROFILE_MODEL_P (current_cpu
))
2544 const IDESC
*idesc
= &m32rxf_insn_data
[itype
];
2545 CGEN_INSN_INT insn
= entire_insn
;
2546 #define FLD(f) abuf->fields.sfmt_bset.f
2550 f_uimm3
= EXTRACT_MSB0_UINT (insn
, 16, 5, 3);
2551 f_r2
= EXTRACT_MSB0_UINT (insn
, 16, 12, 4);
2553 /* Record the fields for the semantic handler. */
2555 FLD (f_uimm3
) = f_uimm3
;
2556 FLD (i_sr
) = & CPU (h_gr
)[f_r2
];
2557 TRACE_EXTRACT (current_cpu
, abuf
, (current_cpu
, pc
, "sfmt_btst", "f_r2 0x%x", 'x', f_r2
, "f_uimm3 0x%x", 'x', f_uimm3
, "sr 0x%x", 'x', f_r2
, (char *) 0));
2559 #if WITH_PROFILE_MODEL_P
2560 /* Record the fields for profiling. */
2561 if (PROFILE_MODEL_P (current_cpu
))