1 /* Handle cache related addresses.
3 Copyright (C) 1996-2016 Free Software Foundation, Inc.
4 Contributed by Cygnus Solutions and Mike Frysinger.
6 This file is part of the GNU simulators.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21 #ifndef DV_M32R_CACHE_H
22 #define DV_M32R_CACHE_H
24 /* Support for the MSPR register (Cache Purge Control Register)
25 and the MCCR register (Cache Control Register) are needed in order for
26 overlays to work correctly with the scache.
27 MSPR no longer exists but is supported for upward compatibility with
28 early overlay support. */
30 /* Cache Purge Control (only exists on early versions of chips) */
31 #define MSPR_ADDR 0xfffffff7
34 /* Lock Control Register (not supported) */
35 #define MLCR_ADDR 0xfffffff7
38 /* Power Management Control Register (not supported) */
39 #define MPMR_ADDR 0xfffffffb
41 /* Cache Control Register */
42 #define MCCR_ADDR 0xffffffff
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