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* arch-defs.h: Deleted.
[deliverable/binutils-gdb.git] / sim / m32r / model.c
1 /* Simulator model support for m32r.
2
3 Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
4
5 This file is part of the GNU Simulators.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License along
18 with this program; if not, write to the Free Software Foundation, Inc.,
19 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20
21 */
22
23 #define WANT_CPU
24 #define WANT_CPU_M32R
25
26 #include "sim-main.h"
27 #include "cpu-sim.h"
28 #include "cpu-opc.h"
29
30 /* The profiling data is recorded here, but is accessed via the profiling
31 mechanism. After all, this is information for profiling. */
32
33 #if WITH_PROFILE_MODEL_P
34
35 /* Track function unit usage for an instruction. */
36
37 void
38 model_profile_insn (SIM_CPU *current_cpu, ARGBUF *abuf)
39 {
40 const MODEL *model = CPU_MODEL (current_cpu);
41 const INSN_TIMING *timing = MODEL_TIMING (model);
42 const CGEN_INSN *insn = abuf->opcode;
43 const UNIT *unit = &timing[CGEN_INSN_INDEX (insn)].units[0];
44 const UNIT *unit_end = unit + MAX_UNITS;
45 PROFILE_DATA *profile = CPU_PROFILE_DATA (current_cpu);
46
47 do
48 {
49 switch (unit->name)
50 {
51 case UNIT_M32R_D_U_STORE :
52 PROFILE_MODEL_CYCLE_COUNT (profile) += unit->done;
53 m32r_model_mark_unbusy_reg (current_cpu, abuf);
54 break;
55 case UNIT_M32R_D_U_LOAD :
56 PROFILE_MODEL_CYCLE_COUNT (profile) += unit->done;
57 m32r_model_mark_busy_reg (current_cpu, abuf);
58 break;
59 case UNIT_M32R_D_U_EXEC :
60 PROFILE_MODEL_CYCLE_COUNT (profile) += unit->done;
61 m32r_model_mark_unbusy_reg (current_cpu, abuf);
62 break;
63 case UNIT_TEST_U_EXEC :
64 PROFILE_MODEL_CYCLE_COUNT (profile) += unit->done;
65 break;
66 }
67 ++unit;
68 }
69 while (unit != unit_end && unit->name != UNIT_NONE);
70 }
71
72 /* Track function unit usage for an instruction. */
73
74 void
75 model_profile_cti_insn (SIM_CPU *current_cpu, ARGBUF *abuf, int taken_p)
76 {
77 const MODEL *model = CPU_MODEL (current_cpu);
78 const INSN_TIMING *timing = MODEL_TIMING (model);
79 const CGEN_INSN *insn = abuf->opcode;
80 const UNIT *unit = &timing[CGEN_INSN_INDEX (insn)].units[0];
81 const UNIT *unit_end = unit + MAX_UNITS;
82 PROFILE_DATA *profile = CPU_PROFILE_DATA (current_cpu);
83
84 do
85 {
86 switch (unit->name)
87 {
88 case UNIT_M32R_D_U_STORE :
89 PROFILE_MODEL_CYCLE_COUNT (profile) += unit->done;
90 m32r_model_mark_unbusy_reg (current_cpu, abuf);
91 break;
92 case UNIT_M32R_D_U_LOAD :
93 PROFILE_MODEL_CYCLE_COUNT (profile) += unit->done;
94 m32r_model_mark_busy_reg (current_cpu, abuf);
95 break;
96 case UNIT_M32R_D_U_EXEC :
97 PROFILE_MODEL_CYCLE_COUNT (profile) += unit->done;
98 if (taken_p) PROFILE_MODEL_CTI_STALL_COUNT (profile) += 2;
99 m32r_model_mark_unbusy_reg (current_cpu, abuf);
100 break;
101 case UNIT_TEST_U_EXEC :
102 PROFILE_MODEL_CYCLE_COUNT (profile) += unit->done;
103 break;
104 }
105 if (taken_p)
106 PROFILE_MODEL_TAKEN_COUNT (profile) += 1;
107 else
108 PROFILE_MODEL_UNTAKEN_COUNT (profile) += 1;
109 ++unit;
110 }
111 while (unit != unit_end && unit->name != UNIT_NONE);
112 }
113
114 /* We assume UNIT_NONE == 0 because the tables don't always terminate
115 entries with it. */
116
117 /* Model timing data for `m32r/d'. */
118
119 static const INSN_TIMING m32r_d_timing[] = {
120 { { (UQI) UNIT_NONE } }, /* illegal insn */
121 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* add */
122 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* add3 */
123 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* and */
124 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* and3 */
125 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* or */
126 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* or3 */
127 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* xor */
128 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* xor3 */
129 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* addi */
130 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* addv */
131 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* addv3 */
132 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* addx */
133 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bc8 */
134 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bc8.s */
135 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bc24 */
136 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bc24.l */
137 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* beq */
138 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* beqz */
139 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bgez */
140 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bgtz */
141 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* blez */
142 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bltz */
143 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bnez */
144 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bl8 */
145 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bl8.s */
146 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bl24 */
147 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bl24.l */
148 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bnc8 */
149 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bnc8.s */
150 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bnc24 */
151 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bnc24.l */
152 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bne */
153 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bra8 */
154 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bra8.s */
155 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bra24 */
156 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* bra24.l */
157 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* cmp */
158 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* cmpi */
159 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* cmpu */
160 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* cmpui */
161 { { (UQI) UNIT_M32R_D_U_EXEC, 37, 37 } }, /* div */
162 { { (UQI) UNIT_M32R_D_U_EXEC, 37, 37 } }, /* divu */
163 { { (UQI) UNIT_M32R_D_U_EXEC, 37, 37 } }, /* rem */
164 { { (UQI) UNIT_M32R_D_U_EXEC, 37, 37 } }, /* remu */
165 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* jl */
166 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* jmp */
167 { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* ld */
168 { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* ld-2 */
169 { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* ld-d */
170 { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* ld-d2 */
171 { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* ldb */
172 { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* ldb-2 */
173 { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* ldb-d */
174 { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* ldb-d2 */
175 { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* ldh */
176 { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* ldh-2 */
177 { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* ldh-d */
178 { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* ldh-d2 */
179 { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* ldub */
180 { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* ldub-2 */
181 { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* ldub-d */
182 { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* ldub-d2 */
183 { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* lduh */
184 { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* lduh-2 */
185 { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* lduh-d */
186 { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* lduh-d2 */
187 { { (UQI) UNIT_M32R_D_U_LOAD, 1, 1 } }, /* ld-plus */
188 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* ld24 */
189 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* ldi8 */
190 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* ldi8a */
191 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* ldi16 */
192 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* ldi16a */
193 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* lock */
194 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* machi */
195 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* maclo */
196 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* macwhi */
197 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* macwlo */
198 { { (UQI) UNIT_M32R_D_U_EXEC, 3, 3 } }, /* mul */
199 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* mulhi */
200 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* mullo */
201 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* mulwhi */
202 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* mulwlo */
203 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* mv */
204 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* mvfachi */
205 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* mvfaclo */
206 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* mvfacmi */
207 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* mvfc */
208 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* mvtachi */
209 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* mvtaclo */
210 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* mvtc */
211 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* neg */
212 { { (UQI) UNIT_M32R_D_U_EXEC, 0, 0 } }, /* nop */
213 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* not */
214 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* rac */
215 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* rach */
216 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* rte */
217 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* seth */
218 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* sll */
219 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* sll3 */
220 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* slli */
221 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* sra */
222 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* sra3 */
223 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* srai */
224 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* srl */
225 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* srl3 */
226 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* srli */
227 { { (UQI) UNIT_M32R_D_U_STORE, 1, 1 } }, /* st */
228 { { (UQI) UNIT_M32R_D_U_STORE, 1, 1 } }, /* st-2 */
229 { { (UQI) UNIT_M32R_D_U_STORE, 1, 1 } }, /* st-d */
230 { { (UQI) UNIT_M32R_D_U_STORE, 1, 1 } }, /* st-d2 */
231 { { (UQI) UNIT_M32R_D_U_STORE, 1, 1 } }, /* stb */
232 { { (UQI) UNIT_M32R_D_U_STORE, 1, 1 } }, /* stb-2 */
233 { { (UQI) UNIT_M32R_D_U_STORE, 1, 1 } }, /* stb-d */
234 { { (UQI) UNIT_M32R_D_U_STORE, 1, 1 } }, /* stb-d2 */
235 { { (UQI) UNIT_M32R_D_U_STORE, 1, 1 } }, /* sth */
236 { { (UQI) UNIT_M32R_D_U_STORE, 1, 1 } }, /* sth-2 */
237 { { (UQI) UNIT_M32R_D_U_STORE, 1, 1 } }, /* sth-d */
238 { { (UQI) UNIT_M32R_D_U_STORE, 1, 1 } }, /* sth-d2 */
239 { { (UQI) UNIT_M32R_D_U_STORE, 1, 1 } }, /* st-plus */
240 { { (UQI) UNIT_M32R_D_U_STORE, 1, 1 } }, /* st-minus */
241 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* sub */
242 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* subv */
243 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* subx */
244 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* trap */
245 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* unlock */
246 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* push */
247 { { (UQI) UNIT_M32R_D_U_EXEC, 1, 1 } }, /* pop */
248 };
249
250 /* Model timing data for `test'. */
251
252 static const INSN_TIMING test_timing[] = {
253 { { (UQI) UNIT_NONE } }, /* illegal insn */
254 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* add */
255 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* add3 */
256 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* and */
257 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* and3 */
258 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* or */
259 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* or3 */
260 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* xor */
261 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* xor3 */
262 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* addi */
263 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* addv */
264 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* addv3 */
265 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* addx */
266 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bc8 */
267 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bc8.s */
268 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bc24 */
269 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bc24.l */
270 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* beq */
271 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* beqz */
272 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bgez */
273 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bgtz */
274 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* blez */
275 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bltz */
276 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bnez */
277 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bl8 */
278 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bl8.s */
279 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bl24 */
280 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bl24.l */
281 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bnc8 */
282 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bnc8.s */
283 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bnc24 */
284 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bnc24.l */
285 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bne */
286 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bra8 */
287 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bra8.s */
288 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bra24 */
289 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* bra24.l */
290 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* cmp */
291 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* cmpi */
292 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* cmpu */
293 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* cmpui */
294 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* div */
295 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* divu */
296 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* rem */
297 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* remu */
298 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* jl */
299 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* jmp */
300 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ld */
301 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ld-2 */
302 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ld-d */
303 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ld-d2 */
304 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldb */
305 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldb-2 */
306 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldb-d */
307 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldb-d2 */
308 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldh */
309 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldh-2 */
310 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldh-d */
311 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldh-d2 */
312 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldub */
313 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldub-2 */
314 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldub-d */
315 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldub-d2 */
316 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* lduh */
317 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* lduh-2 */
318 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* lduh-d */
319 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* lduh-d2 */
320 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ld-plus */
321 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ld24 */
322 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldi8 */
323 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldi8a */
324 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldi16 */
325 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* ldi16a */
326 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* lock */
327 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* machi */
328 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* maclo */
329 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* macwhi */
330 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* macwlo */
331 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* mul */
332 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* mulhi */
333 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* mullo */
334 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* mulwhi */
335 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* mulwlo */
336 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* mv */
337 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* mvfachi */
338 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* mvfaclo */
339 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* mvfacmi */
340 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* mvfc */
341 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* mvtachi */
342 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* mvtaclo */
343 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* mvtc */
344 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* neg */
345 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* nop */
346 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* not */
347 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* rac */
348 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* rach */
349 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* rte */
350 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* seth */
351 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* sll */
352 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* sll3 */
353 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* slli */
354 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* sra */
355 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* sra3 */
356 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* srai */
357 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* srl */
358 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* srl3 */
359 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* srli */
360 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* st */
361 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* st-2 */
362 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* st-d */
363 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* st-d2 */
364 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* stb */
365 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* stb-2 */
366 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* stb-d */
367 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* stb-d2 */
368 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* sth */
369 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* sth-2 */
370 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* sth-d */
371 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* sth-d2 */
372 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* st-plus */
373 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* st-minus */
374 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* sub */
375 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* subv */
376 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* subx */
377 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* trap */
378 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* unlock */
379 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* push */
380 { { (UQI) UNIT_TEST_U_EXEC, 1, 1 } }, /* pop */
381 };
382
383 #endif /* WITH_PROFILE_MODEL_P */
384
385 #if WITH_PROFILE_MODEL_P
386 #define TIMING_DATA(td) td
387 #else
388 #define TIMING_DATA(td) 0
389 #endif
390
391 const MODEL m32r_models[] = {
392 { "m32r/d", &machs[MACH_M32R], TIMING_DATA (& m32r_d_timing[0]) },
393 { "test", &machs[MACH_M32R], TIMING_DATA (& test_timing[0]) },
394 { 0 }
395 };
396
397 /* The properties of this cpu's implementation. */
398
399 const IMP_PROPERTIES m32r_imp_properties = {
400 sizeof (SIM_CPU)
401 #if WITH_SCACHE
402 , sizeof (SCACHE)
403 #endif
404 };
405
GDB Binutils - Deliverables
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