1 /* Simulator instruction semantics for m32r.
3 This file is machine generated with CGEN.
5 Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
7 This file is part of the GNU Simulators.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2, or (at your option)
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License along
20 with this program; if not, write to the Free Software Foundation, Inc.,
21 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
28 /* The labels have the case they have because the enum of insn types
29 is all uppercase and in the non-stdc case the insn symbol is built
30 into the enum name. */
36 { M32R_XINSN_ILLEGAL
, && case_sem_INSN_ILLEGAL
},
37 { M32R_XINSN_ADD
, && case_sem_INSN_ADD
},
38 { M32R_XINSN_ADD3
, && case_sem_INSN_ADD3
},
39 { M32R_XINSN_AND
, && case_sem_INSN_AND
},
40 { M32R_XINSN_AND3
, && case_sem_INSN_AND3
},
41 { M32R_XINSN_OR
, && case_sem_INSN_OR
},
42 { M32R_XINSN_OR3
, && case_sem_INSN_OR3
},
43 { M32R_XINSN_XOR
, && case_sem_INSN_XOR
},
44 { M32R_XINSN_XOR3
, && case_sem_INSN_XOR3
},
45 { M32R_XINSN_ADDI
, && case_sem_INSN_ADDI
},
46 { M32R_XINSN_ADDV
, && case_sem_INSN_ADDV
},
47 { M32R_XINSN_ADDV3
, && case_sem_INSN_ADDV3
},
48 { M32R_XINSN_ADDX
, && case_sem_INSN_ADDX
},
49 { M32R_XINSN_BC8
, && case_sem_INSN_BC8
},
50 { M32R_XINSN_BC24
, && case_sem_INSN_BC24
},
51 { M32R_XINSN_BEQ
, && case_sem_INSN_BEQ
},
52 { M32R_XINSN_BEQZ
, && case_sem_INSN_BEQZ
},
53 { M32R_XINSN_BGEZ
, && case_sem_INSN_BGEZ
},
54 { M32R_XINSN_BGTZ
, && case_sem_INSN_BGTZ
},
55 { M32R_XINSN_BLEZ
, && case_sem_INSN_BLEZ
},
56 { M32R_XINSN_BLTZ
, && case_sem_INSN_BLTZ
},
57 { M32R_XINSN_BNEZ
, && case_sem_INSN_BNEZ
},
58 { M32R_XINSN_BL8
, && case_sem_INSN_BL8
},
59 { M32R_XINSN_BL24
, && case_sem_INSN_BL24
},
60 { M32R_XINSN_BNC8
, && case_sem_INSN_BNC8
},
61 { M32R_XINSN_BNC24
, && case_sem_INSN_BNC24
},
62 { M32R_XINSN_BNE
, && case_sem_INSN_BNE
},
63 { M32R_XINSN_BRA8
, && case_sem_INSN_BRA8
},
64 { M32R_XINSN_BRA24
, && case_sem_INSN_BRA24
},
65 { M32R_XINSN_CMP
, && case_sem_INSN_CMP
},
66 { M32R_XINSN_CMPI
, && case_sem_INSN_CMPI
},
67 { M32R_XINSN_CMPU
, && case_sem_INSN_CMPU
},
68 { M32R_XINSN_CMPUI
, && case_sem_INSN_CMPUI
},
69 { M32R_XINSN_DIV
, && case_sem_INSN_DIV
},
70 { M32R_XINSN_DIVU
, && case_sem_INSN_DIVU
},
71 { M32R_XINSN_REM
, && case_sem_INSN_REM
},
72 { M32R_XINSN_REMU
, && case_sem_INSN_REMU
},
73 { M32R_XINSN_JL
, && case_sem_INSN_JL
},
74 { M32R_XINSN_JMP
, && case_sem_INSN_JMP
},
75 { M32R_XINSN_LD
, && case_sem_INSN_LD
},
76 { M32R_XINSN_LD_D
, && case_sem_INSN_LD_D
},
77 { M32R_XINSN_LDB
, && case_sem_INSN_LDB
},
78 { M32R_XINSN_LDB_D
, && case_sem_INSN_LDB_D
},
79 { M32R_XINSN_LDH
, && case_sem_INSN_LDH
},
80 { M32R_XINSN_LDH_D
, && case_sem_INSN_LDH_D
},
81 { M32R_XINSN_LDUB
, && case_sem_INSN_LDUB
},
82 { M32R_XINSN_LDUB_D
, && case_sem_INSN_LDUB_D
},
83 { M32R_XINSN_LDUH
, && case_sem_INSN_LDUH
},
84 { M32R_XINSN_LDUH_D
, && case_sem_INSN_LDUH_D
},
85 { M32R_XINSN_LD_PLUS
, && case_sem_INSN_LD_PLUS
},
86 { M32R_XINSN_LD24
, && case_sem_INSN_LD24
},
87 { M32R_XINSN_LDI8
, && case_sem_INSN_LDI8
},
88 { M32R_XINSN_LDI16
, && case_sem_INSN_LDI16
},
89 { M32R_XINSN_LOCK
, && case_sem_INSN_LOCK
},
90 { M32R_XINSN_MACHI
, && case_sem_INSN_MACHI
},
91 { M32R_XINSN_MACLO
, && case_sem_INSN_MACLO
},
92 { M32R_XINSN_MACWHI
, && case_sem_INSN_MACWHI
},
93 { M32R_XINSN_MACWLO
, && case_sem_INSN_MACWLO
},
94 { M32R_XINSN_MUL
, && case_sem_INSN_MUL
},
95 { M32R_XINSN_MULHI
, && case_sem_INSN_MULHI
},
96 { M32R_XINSN_MULLO
, && case_sem_INSN_MULLO
},
97 { M32R_XINSN_MULWHI
, && case_sem_INSN_MULWHI
},
98 { M32R_XINSN_MULWLO
, && case_sem_INSN_MULWLO
},
99 { M32R_XINSN_MV
, && case_sem_INSN_MV
},
100 { M32R_XINSN_MVFACHI
, && case_sem_INSN_MVFACHI
},
101 { M32R_XINSN_MVFACLO
, && case_sem_INSN_MVFACLO
},
102 { M32R_XINSN_MVFACMI
, && case_sem_INSN_MVFACMI
},
103 { M32R_XINSN_MVFC
, && case_sem_INSN_MVFC
},
104 { M32R_XINSN_MVTACHI
, && case_sem_INSN_MVTACHI
},
105 { M32R_XINSN_MVTACLO
, && case_sem_INSN_MVTACLO
},
106 { M32R_XINSN_MVTC
, && case_sem_INSN_MVTC
},
107 { M32R_XINSN_NEG
, && case_sem_INSN_NEG
},
108 { M32R_XINSN_NOP
, && case_sem_INSN_NOP
},
109 { M32R_XINSN_NOT
, && case_sem_INSN_NOT
},
110 { M32R_XINSN_RAC
, && case_sem_INSN_RAC
},
111 { M32R_XINSN_RACH
, && case_sem_INSN_RACH
},
112 { M32R_XINSN_RTE
, && case_sem_INSN_RTE
},
113 { M32R_XINSN_SETH
, && case_sem_INSN_SETH
},
114 { M32R_XINSN_SLL
, && case_sem_INSN_SLL
},
115 { M32R_XINSN_SLL3
, && case_sem_INSN_SLL3
},
116 { M32R_XINSN_SLLI
, && case_sem_INSN_SLLI
},
117 { M32R_XINSN_SRA
, && case_sem_INSN_SRA
},
118 { M32R_XINSN_SRA3
, && case_sem_INSN_SRA3
},
119 { M32R_XINSN_SRAI
, && case_sem_INSN_SRAI
},
120 { M32R_XINSN_SRL
, && case_sem_INSN_SRL
},
121 { M32R_XINSN_SRL3
, && case_sem_INSN_SRL3
},
122 { M32R_XINSN_SRLI
, && case_sem_INSN_SRLI
},
123 { M32R_XINSN_ST
, && case_sem_INSN_ST
},
124 { M32R_XINSN_ST_D
, && case_sem_INSN_ST_D
},
125 { M32R_XINSN_STB
, && case_sem_INSN_STB
},
126 { M32R_XINSN_STB_D
, && case_sem_INSN_STB_D
},
127 { M32R_XINSN_STH
, && case_sem_INSN_STH
},
128 { M32R_XINSN_STH_D
, && case_sem_INSN_STH_D
},
129 { M32R_XINSN_ST_PLUS
, && case_sem_INSN_ST_PLUS
},
130 { M32R_XINSN_ST_MINUS
, && case_sem_INSN_ST_MINUS
},
131 { M32R_XINSN_SUB
, && case_sem_INSN_SUB
},
132 { M32R_XINSN_SUBV
, && case_sem_INSN_SUBV
},
133 { M32R_XINSN_SUBX
, && case_sem_INSN_SUBX
},
134 { M32R_XINSN_TRAP
, && case_sem_INSN_TRAP
},
135 { M32R_XINSN_UNLOCK
, && case_sem_INSN_UNLOCK
},
140 for (i
= 0; labels
[i
].label
!= 0; ++i
)
141 CPU_IDESC (current_cpu
) [labels
[i
].index
].sem_fast_lab
= labels
[i
].label
;
143 #endif /* DEFINE_LABELS */
148 /* If hyper-fast [well not unnecessarily slow] execution is selected, turn
149 off frills like tracing and profiling. */
150 /* FIXME: A better way would be to have TRACE_RESULT check for something
151 that can cause it to be optimized out. */
155 #define TRACE_RESULT(cpu, name, type, val)
159 #define GET_ATTR(cpu, num, attr) CGEN_INSN_ATTR (abuf->idesc->opcode, CGEN_INSN_##attr)
162 SEM_ARG sem_arg
= sc
;
163 ARGBUF
*abuf
= SEM_ARGBUF (sem_arg
);
166 SWITCH (sem
, sem_arg
->semantic
.sem_case
)
169 CASE (sem
, INSN_ILLEGAL
) :
171 sim_engine_halt (CPU_STATE (current_cpu
), current_cpu
, NULL
, NULL_CIA
/*FIXME*/,
172 sim_stopped
, SIM_SIGILL
);
176 CASE (sem
, INSN_ADD
) : /* add $dr,$sr */
178 #define FLD(f) abuf->fields.fmt_add.f
179 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
181 * FLD (f_r1
) = ADDSI (* FLD (f_r1
), * FLD (f_r2
));
182 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
188 CASE (sem
, INSN_ADD3
) : /* add3 $dr,$sr,$hash$slo16 */
190 #define FLD(f) abuf->fields.fmt_add3.f
191 new_pc
= SEM_NEXT_PC (sem_arg
, 4);
193 * FLD (f_r1
) = ADDSI (* FLD (f_r2
), FLD (f_simm16
));
194 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
200 CASE (sem
, INSN_AND
) : /* and $dr,$sr */
202 #define FLD(f) abuf->fields.fmt_add.f
203 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
205 * FLD (f_r1
) = ANDSI (* FLD (f_r1
), * FLD (f_r2
));
206 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
212 CASE (sem
, INSN_AND3
) : /* and3 $dr,$sr,$uimm16 */
214 #define FLD(f) abuf->fields.fmt_and3.f
215 new_pc
= SEM_NEXT_PC (sem_arg
, 4);
217 * FLD (f_r1
) = ANDSI (* FLD (f_r2
), FLD (f_uimm16
));
218 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
224 CASE (sem
, INSN_OR
) : /* or $dr,$sr */
226 #define FLD(f) abuf->fields.fmt_add.f
227 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
229 * FLD (f_r1
) = ORSI (* FLD (f_r1
), * FLD (f_r2
));
230 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
236 CASE (sem
, INSN_OR3
) : /* or3 $dr,$sr,$hash$ulo16 */
238 #define FLD(f) abuf->fields.fmt_or3.f
239 new_pc
= SEM_NEXT_PC (sem_arg
, 4);
241 * FLD (f_r1
) = ORSI (* FLD (f_r2
), FLD (f_uimm16
));
242 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
248 CASE (sem
, INSN_XOR
) : /* xor $dr,$sr */
250 #define FLD(f) abuf->fields.fmt_add.f
251 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
253 * FLD (f_r1
) = XORSI (* FLD (f_r1
), * FLD (f_r2
));
254 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
260 CASE (sem
, INSN_XOR3
) : /* xor3 $dr,$sr,$uimm16 */
262 #define FLD(f) abuf->fields.fmt_and3.f
263 new_pc
= SEM_NEXT_PC (sem_arg
, 4);
265 * FLD (f_r1
) = XORSI (* FLD (f_r2
), FLD (f_uimm16
));
266 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
272 CASE (sem
, INSN_ADDI
) : /* addi $dr,$simm8 */
274 #define FLD(f) abuf->fields.fmt_addi.f
275 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
277 * FLD (f_r1
) = ADDSI (* FLD (f_r1
), FLD (f_simm8
));
278 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
284 CASE (sem
, INSN_ADDV
) : /* addv $dr,$sr */
286 #define FLD(f) abuf->fields.fmt_addv.f
287 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
291 temp0
= ADDSI (* FLD (f_r1
), * FLD (f_r2
));
292 temp1
= ADDOFSI (* FLD (f_r1
), * FLD (f_r2
), 0);
293 * FLD (f_r1
) = temp0
;
294 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
295 CPU (h_cond
) = temp1
;
296 TRACE_RESULT (current_cpu
, "condbit", 'x', CPU (h_cond
));
303 CASE (sem
, INSN_ADDV3
) : /* addv3 $dr,$sr,$simm16 */
305 #define FLD(f) abuf->fields.fmt_addv3.f
306 new_pc
= SEM_NEXT_PC (sem_arg
, 4);
310 temp0
= ADDSI (* FLD (f_r2
), FLD (f_simm16
));
311 temp1
= ADDOFSI (* FLD (f_r2
), FLD (f_simm16
), 0);
312 * FLD (f_r1
) = temp0
;
313 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
314 CPU (h_cond
) = temp1
;
315 TRACE_RESULT (current_cpu
, "condbit", 'x', CPU (h_cond
));
322 CASE (sem
, INSN_ADDX
) : /* addx $dr,$sr */
324 #define FLD(f) abuf->fields.fmt_addx.f
325 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
329 temp0
= ADDCSI (* FLD (f_r1
), * FLD (f_r2
), CPU (h_cond
));
330 temp1
= ADDCFSI (* FLD (f_r1
), * FLD (f_r2
), CPU (h_cond
));
331 * FLD (f_r1
) = temp0
;
332 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
333 CPU (h_cond
) = temp1
;
334 TRACE_RESULT (current_cpu
, "condbit", 'x', CPU (h_cond
));
341 CASE (sem
, INSN_BC8
) : /* bc.s $disp8 */
343 #define FLD(f) abuf->fields.fmt_bc8.f
344 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
347 BRANCH_NEW_PC (new_pc
, SEM_BRANCH_VIA_CACHE (sem_arg
, FLD (f_disp8
)));
348 TRACE_RESULT (current_cpu
, "pc", 'x', new_pc
);
355 CASE (sem
, INSN_BC24
) : /* bc.l $disp24 */
357 #define FLD(f) abuf->fields.fmt_bc24.f
358 new_pc
= SEM_NEXT_PC (sem_arg
, 4);
361 BRANCH_NEW_PC (new_pc
, SEM_BRANCH_VIA_CACHE (sem_arg
, FLD (f_disp24
)));
362 TRACE_RESULT (current_cpu
, "pc", 'x', new_pc
);
369 CASE (sem
, INSN_BEQ
) : /* beq $src1,$src2,$disp16 */
371 #define FLD(f) abuf->fields.fmt_beq.f
372 new_pc
= SEM_NEXT_PC (sem_arg
, 4);
374 if (EQSI (* FLD (f_r1
), * FLD (f_r2
))) {
375 BRANCH_NEW_PC (new_pc
, SEM_BRANCH_VIA_CACHE (sem_arg
, FLD (f_disp16
)));
376 TRACE_RESULT (current_cpu
, "pc", 'x', new_pc
);
383 CASE (sem
, INSN_BEQZ
) : /* beqz $src2,$disp16 */
385 #define FLD(f) abuf->fields.fmt_beqz.f
386 new_pc
= SEM_NEXT_PC (sem_arg
, 4);
388 if (EQSI (* FLD (f_r2
), 0)) {
389 BRANCH_NEW_PC (new_pc
, SEM_BRANCH_VIA_CACHE (sem_arg
, FLD (f_disp16
)));
390 TRACE_RESULT (current_cpu
, "pc", 'x', new_pc
);
397 CASE (sem
, INSN_BGEZ
) : /* bgez $src2,$disp16 */
399 #define FLD(f) abuf->fields.fmt_beqz.f
400 new_pc
= SEM_NEXT_PC (sem_arg
, 4);
402 if (GESI (* FLD (f_r2
), 0)) {
403 BRANCH_NEW_PC (new_pc
, SEM_BRANCH_VIA_CACHE (sem_arg
, FLD (f_disp16
)));
404 TRACE_RESULT (current_cpu
, "pc", 'x', new_pc
);
411 CASE (sem
, INSN_BGTZ
) : /* bgtz $src2,$disp16 */
413 #define FLD(f) abuf->fields.fmt_beqz.f
414 new_pc
= SEM_NEXT_PC (sem_arg
, 4);
416 if (GTSI (* FLD (f_r2
), 0)) {
417 BRANCH_NEW_PC (new_pc
, SEM_BRANCH_VIA_CACHE (sem_arg
, FLD (f_disp16
)));
418 TRACE_RESULT (current_cpu
, "pc", 'x', new_pc
);
425 CASE (sem
, INSN_BLEZ
) : /* blez $src2,$disp16 */
427 #define FLD(f) abuf->fields.fmt_beqz.f
428 new_pc
= SEM_NEXT_PC (sem_arg
, 4);
430 if (LESI (* FLD (f_r2
), 0)) {
431 BRANCH_NEW_PC (new_pc
, SEM_BRANCH_VIA_CACHE (sem_arg
, FLD (f_disp16
)));
432 TRACE_RESULT (current_cpu
, "pc", 'x', new_pc
);
439 CASE (sem
, INSN_BLTZ
) : /* bltz $src2,$disp16 */
441 #define FLD(f) abuf->fields.fmt_beqz.f
442 new_pc
= SEM_NEXT_PC (sem_arg
, 4);
444 if (LTSI (* FLD (f_r2
), 0)) {
445 BRANCH_NEW_PC (new_pc
, SEM_BRANCH_VIA_CACHE (sem_arg
, FLD (f_disp16
)));
446 TRACE_RESULT (current_cpu
, "pc", 'x', new_pc
);
453 CASE (sem
, INSN_BNEZ
) : /* bnez $src2,$disp16 */
455 #define FLD(f) abuf->fields.fmt_beqz.f
456 new_pc
= SEM_NEXT_PC (sem_arg
, 4);
458 if (NESI (* FLD (f_r2
), 0)) {
459 BRANCH_NEW_PC (new_pc
, SEM_BRANCH_VIA_CACHE (sem_arg
, FLD (f_disp16
)));
460 TRACE_RESULT (current_cpu
, "pc", 'x', new_pc
);
467 CASE (sem
, INSN_BL8
) : /* bl.s $disp8 */
469 #define FLD(f) abuf->fields.fmt_bl8.f
470 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
473 CPU (h_gr
[14]) = ADDSI (ANDSI (CPU (h_pc
), -4), 4);
474 TRACE_RESULT (current_cpu
, "gr-14", 'x', CPU (h_gr
[14]));
475 BRANCH_NEW_PC (new_pc
, SEM_BRANCH_VIA_CACHE (sem_arg
, FLD (f_disp8
)));
476 TRACE_RESULT (current_cpu
, "pc", 'x', new_pc
);
483 CASE (sem
, INSN_BL24
) : /* bl.l $disp24 */
485 #define FLD(f) abuf->fields.fmt_bl24.f
486 new_pc
= SEM_NEXT_PC (sem_arg
, 4);
489 CPU (h_gr
[14]) = ADDSI (CPU (h_pc
), 4);
490 TRACE_RESULT (current_cpu
, "gr-14", 'x', CPU (h_gr
[14]));
491 BRANCH_NEW_PC (new_pc
, SEM_BRANCH_VIA_CACHE (sem_arg
, FLD (f_disp24
)));
492 TRACE_RESULT (current_cpu
, "pc", 'x', new_pc
);
499 CASE (sem
, INSN_BNC8
) : /* bnc.s $disp8 */
501 #define FLD(f) abuf->fields.fmt_bc8.f
502 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
504 if (NOTBI (CPU (h_cond
))) {
505 BRANCH_NEW_PC (new_pc
, SEM_BRANCH_VIA_CACHE (sem_arg
, FLD (f_disp8
)));
506 TRACE_RESULT (current_cpu
, "pc", 'x', new_pc
);
513 CASE (sem
, INSN_BNC24
) : /* bnc.l $disp24 */
515 #define FLD(f) abuf->fields.fmt_bc24.f
516 new_pc
= SEM_NEXT_PC (sem_arg
, 4);
518 if (NOTBI (CPU (h_cond
))) {
519 BRANCH_NEW_PC (new_pc
, SEM_BRANCH_VIA_CACHE (sem_arg
, FLD (f_disp24
)));
520 TRACE_RESULT (current_cpu
, "pc", 'x', new_pc
);
527 CASE (sem
, INSN_BNE
) : /* bne $src1,$src2,$disp16 */
529 #define FLD(f) abuf->fields.fmt_beq.f
530 new_pc
= SEM_NEXT_PC (sem_arg
, 4);
532 if (NESI (* FLD (f_r1
), * FLD (f_r2
))) {
533 BRANCH_NEW_PC (new_pc
, SEM_BRANCH_VIA_CACHE (sem_arg
, FLD (f_disp16
)));
534 TRACE_RESULT (current_cpu
, "pc", 'x', new_pc
);
541 CASE (sem
, INSN_BRA8
) : /* bra.s $disp8 */
543 #define FLD(f) abuf->fields.fmt_bra8.f
544 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
546 BRANCH_NEW_PC (new_pc
, SEM_BRANCH_VIA_CACHE (sem_arg
, FLD (f_disp8
)));
547 TRACE_RESULT (current_cpu
, "pc", 'x', new_pc
);
553 CASE (sem
, INSN_BRA24
) : /* bra.l $disp24 */
555 #define FLD(f) abuf->fields.fmt_bra24.f
556 new_pc
= SEM_NEXT_PC (sem_arg
, 4);
558 BRANCH_NEW_PC (new_pc
, SEM_BRANCH_VIA_CACHE (sem_arg
, FLD (f_disp24
)));
559 TRACE_RESULT (current_cpu
, "pc", 'x', new_pc
);
565 CASE (sem
, INSN_CMP
) : /* cmp $src1,$src2 */
567 #define FLD(f) abuf->fields.fmt_cmp.f
568 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
570 CPU (h_cond
) = LTSI (* FLD (f_r1
), * FLD (f_r2
));
571 TRACE_RESULT (current_cpu
, "condbit", 'x', CPU (h_cond
));
577 CASE (sem
, INSN_CMPI
) : /* cmpi $src2,$simm16 */
579 #define FLD(f) abuf->fields.fmt_cmpi.f
580 new_pc
= SEM_NEXT_PC (sem_arg
, 4);
582 CPU (h_cond
) = LTSI (* FLD (f_r2
), FLD (f_simm16
));
583 TRACE_RESULT (current_cpu
, "condbit", 'x', CPU (h_cond
));
589 CASE (sem
, INSN_CMPU
) : /* cmpu $src1,$src2 */
591 #define FLD(f) abuf->fields.fmt_cmp.f
592 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
594 CPU (h_cond
) = LTUSI (* FLD (f_r1
), * FLD (f_r2
));
595 TRACE_RESULT (current_cpu
, "condbit", 'x', CPU (h_cond
));
601 CASE (sem
, INSN_CMPUI
) : /* cmpui $src2,$simm16 */
603 #define FLD(f) abuf->fields.fmt_cmpi.f
604 new_pc
= SEM_NEXT_PC (sem_arg
, 4);
606 CPU (h_cond
) = LTUSI (* FLD (f_r2
), FLD (f_simm16
));
607 TRACE_RESULT (current_cpu
, "condbit", 'x', CPU (h_cond
));
613 CASE (sem
, INSN_DIV
) : /* div $dr,$sr */
615 #define FLD(f) abuf->fields.fmt_div.f
616 new_pc
= SEM_NEXT_PC (sem_arg
, 4);
618 if (NESI (* FLD (f_r2
), 0)) {
619 * FLD (f_r1
) = DIVSI (* FLD (f_r1
), * FLD (f_r2
));
620 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
627 CASE (sem
, INSN_DIVU
) : /* divu $dr,$sr */
629 #define FLD(f) abuf->fields.fmt_div.f
630 new_pc
= SEM_NEXT_PC (sem_arg
, 4);
632 if (NESI (* FLD (f_r2
), 0)) {
633 * FLD (f_r1
) = UDIVSI (* FLD (f_r1
), * FLD (f_r2
));
634 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
641 CASE (sem
, INSN_REM
) : /* rem $dr,$sr */
643 #define FLD(f) abuf->fields.fmt_div.f
644 new_pc
= SEM_NEXT_PC (sem_arg
, 4);
646 if (NESI (* FLD (f_r2
), 0)) {
647 * FLD (f_r1
) = MODSI (* FLD (f_r1
), * FLD (f_r2
));
648 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
655 CASE (sem
, INSN_REMU
) : /* remu $dr,$sr */
657 #define FLD(f) abuf->fields.fmt_div.f
658 new_pc
= SEM_NEXT_PC (sem_arg
, 4);
660 if (NESI (* FLD (f_r2
), 0)) {
661 * FLD (f_r1
) = UMODSI (* FLD (f_r1
), * FLD (f_r2
));
662 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
669 CASE (sem
, INSN_JL
) : /* jl $sr */
671 #define FLD(f) abuf->fields.fmt_jl.f
672 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
676 temp0
= ADDSI (ANDSI (CPU (h_pc
), -4), 4);
677 temp1
= ANDSI (* FLD (f_r2
), -4);
678 CPU (h_gr
[14]) = temp0
;
679 TRACE_RESULT (current_cpu
, "gr-14", 'x', CPU (h_gr
[14]));
680 BRANCH_NEW_PC (new_pc
, SEM_BRANCH_VIA_ADDR (sem_arg
, temp1
));
681 TRACE_RESULT (current_cpu
, "pc", 'x', new_pc
);
688 CASE (sem
, INSN_JMP
) : /* jmp $sr */
690 #define FLD(f) abuf->fields.fmt_jmp.f
691 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
693 BRANCH_NEW_PC (new_pc
, SEM_BRANCH_VIA_ADDR (sem_arg
, ANDSI (* FLD (f_r2
), -4)));
694 TRACE_RESULT (current_cpu
, "pc", 'x', new_pc
);
700 CASE (sem
, INSN_LD
) : /* ld $dr,@$sr */
702 #define FLD(f) abuf->fields.fmt_ld.f
703 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
705 * FLD (f_r1
) = GETMEMSI (current_cpu
, * FLD (f_r2
));
706 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
712 CASE (sem
, INSN_LD_D
) : /* ld $dr,@($slo16,$sr) */
714 #define FLD(f) abuf->fields.fmt_ld_d.f
715 new_pc
= SEM_NEXT_PC (sem_arg
, 4);
717 * FLD (f_r1
) = GETMEMSI (current_cpu
, ADDSI (* FLD (f_r2
), FLD (f_simm16
)));
718 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
724 CASE (sem
, INSN_LDB
) : /* ldb $dr,@$sr */
726 #define FLD(f) abuf->fields.fmt_ldb.f
727 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
729 * FLD (f_r1
) = EXTQISI (GETMEMQI (current_cpu
, * FLD (f_r2
)));
730 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
736 CASE (sem
, INSN_LDB_D
) : /* ldb $dr,@($slo16,$sr) */
738 #define FLD(f) abuf->fields.fmt_ldb_d.f
739 new_pc
= SEM_NEXT_PC (sem_arg
, 4);
741 * FLD (f_r1
) = EXTQISI (GETMEMQI (current_cpu
, ADDSI (* FLD (f_r2
), FLD (f_simm16
))));
742 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
748 CASE (sem
, INSN_LDH
) : /* ldh $dr,@$sr */
750 #define FLD(f) abuf->fields.fmt_ldh.f
751 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
753 * FLD (f_r1
) = EXTHISI (GETMEMHI (current_cpu
, * FLD (f_r2
)));
754 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
760 CASE (sem
, INSN_LDH_D
) : /* ldh $dr,@($slo16,$sr) */
762 #define FLD(f) abuf->fields.fmt_ldh_d.f
763 new_pc
= SEM_NEXT_PC (sem_arg
, 4);
765 * FLD (f_r1
) = EXTHISI (GETMEMHI (current_cpu
, ADDSI (* FLD (f_r2
), FLD (f_simm16
))));
766 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
772 CASE (sem
, INSN_LDUB
) : /* ldub $dr,@$sr */
774 #define FLD(f) abuf->fields.fmt_ldb.f
775 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
777 * FLD (f_r1
) = ZEXTQISI (GETMEMQI (current_cpu
, * FLD (f_r2
)));
778 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
784 CASE (sem
, INSN_LDUB_D
) : /* ldub $dr,@($slo16,$sr) */
786 #define FLD(f) abuf->fields.fmt_ldb_d.f
787 new_pc
= SEM_NEXT_PC (sem_arg
, 4);
789 * FLD (f_r1
) = ZEXTQISI (GETMEMQI (current_cpu
, ADDSI (* FLD (f_r2
), FLD (f_simm16
))));
790 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
796 CASE (sem
, INSN_LDUH
) : /* lduh $dr,@$sr */
798 #define FLD(f) abuf->fields.fmt_ldh.f
799 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
801 * FLD (f_r1
) = ZEXTHISI (GETMEMHI (current_cpu
, * FLD (f_r2
)));
802 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
808 CASE (sem
, INSN_LDUH_D
) : /* lduh $dr,@($slo16,$sr) */
810 #define FLD(f) abuf->fields.fmt_ldh_d.f
811 new_pc
= SEM_NEXT_PC (sem_arg
, 4);
813 * FLD (f_r1
) = ZEXTHISI (GETMEMHI (current_cpu
, ADDSI (* FLD (f_r2
), FLD (f_simm16
))));
814 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
820 CASE (sem
, INSN_LD_PLUS
) : /* ld $dr,@$sr+ */
822 #define FLD(f) abuf->fields.fmt_ld_plus.f
823 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
827 temp0
= GETMEMSI (current_cpu
, * FLD (f_r2
));
828 temp1
= ADDSI (* FLD (f_r2
), 4);
829 * FLD (f_r1
) = temp0
;
830 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
831 * FLD (f_r2
) = temp1
;
832 TRACE_RESULT (current_cpu
, "sr", 'x', * FLD (f_r2
));
839 CASE (sem
, INSN_LD24
) : /* ld24 $dr,$uimm24 */
841 #define FLD(f) abuf->fields.fmt_ld24.f
842 new_pc
= SEM_NEXT_PC (sem_arg
, 4);
844 * FLD (f_r1
) = FLD (f_uimm24
);
845 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
851 CASE (sem
, INSN_LDI8
) : /* ldi8 $dr,$simm8 */
853 #define FLD(f) abuf->fields.fmt_ldi8.f
854 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
856 * FLD (f_r1
) = FLD (f_simm8
);
857 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
863 CASE (sem
, INSN_LDI16
) : /* ldi16 $dr,$hash$slo16 */
865 #define FLD(f) abuf->fields.fmt_ldi16.f
866 new_pc
= SEM_NEXT_PC (sem_arg
, 4);
868 * FLD (f_r1
) = FLD (f_simm16
);
869 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
875 CASE (sem
, INSN_LOCK
) : /* lock $dr,@$sr */
877 #define FLD(f) abuf->fields.fmt_lock.f
878 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
882 TRACE_RESULT (current_cpu
, "lock-0", 'x', CPU (h_lock
));
883 * FLD (f_r1
) = GETMEMSI (current_cpu
, * FLD (f_r2
));
884 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
891 CASE (sem
, INSN_MACHI
) : /* machi $src1,$src2 */
893 #define FLD(f) abuf->fields.fmt_machi.f
894 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
896 m32r_h_accum_set (current_cpu
, SRADI (SLLDI (ADDDI (m32r_h_accum_get (current_cpu
), MULDI (EXTSIDI (ANDSI (* FLD (f_r1
), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (f_r2
), 16))))), 8), 8));
897 TRACE_RESULT (current_cpu
, "accum", 'D', m32r_h_accum_get (current_cpu
));
903 CASE (sem
, INSN_MACLO
) : /* maclo $src1,$src2 */
905 #define FLD(f) abuf->fields.fmt_machi.f
906 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
908 m32r_h_accum_set (current_cpu
, SRADI (SLLDI (ADDDI (m32r_h_accum_get (current_cpu
), MULDI (EXTSIDI (SLLSI (* FLD (f_r1
), 16)), EXTHIDI (TRUNCSIHI (* FLD (f_r2
))))), 8), 8));
909 TRACE_RESULT (current_cpu
, "accum", 'D', m32r_h_accum_get (current_cpu
));
915 CASE (sem
, INSN_MACWHI
) : /* macwhi $src1,$src2 */
917 #define FLD(f) abuf->fields.fmt_machi.f
918 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
920 m32r_h_accum_set (current_cpu
, SRADI (SLLDI (ADDDI (m32r_h_accum_get (current_cpu
), MULDI (EXTSIDI (* FLD (f_r1
)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (f_r2
), 16))))), 8), 8));
921 TRACE_RESULT (current_cpu
, "accum", 'D', m32r_h_accum_get (current_cpu
));
927 CASE (sem
, INSN_MACWLO
) : /* macwlo $src1,$src2 */
929 #define FLD(f) abuf->fields.fmt_machi.f
930 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
932 m32r_h_accum_set (current_cpu
, SRADI (SLLDI (ADDDI (m32r_h_accum_get (current_cpu
), MULDI (EXTSIDI (* FLD (f_r1
)), EXTHIDI (TRUNCSIHI (* FLD (f_r2
))))), 8), 8));
933 TRACE_RESULT (current_cpu
, "accum", 'D', m32r_h_accum_get (current_cpu
));
939 CASE (sem
, INSN_MUL
) : /* mul $dr,$sr */
941 #define FLD(f) abuf->fields.fmt_add.f
942 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
944 * FLD (f_r1
) = MULSI (* FLD (f_r1
), * FLD (f_r2
));
945 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
951 CASE (sem
, INSN_MULHI
) : /* mulhi $src1,$src2 */
953 #define FLD(f) abuf->fields.fmt_mulhi.f
954 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
956 m32r_h_accum_set (current_cpu
, SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (* FLD (f_r1
), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (f_r2
), 16)))), 16), 16));
957 TRACE_RESULT (current_cpu
, "accum", 'D', m32r_h_accum_get (current_cpu
));
963 CASE (sem
, INSN_MULLO
) : /* mullo $src1,$src2 */
965 #define FLD(f) abuf->fields.fmt_mulhi.f
966 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
968 m32r_h_accum_set (current_cpu
, SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (* FLD (f_r1
), 16)), EXTHIDI (TRUNCSIHI (* FLD (f_r2
)))), 16), 16));
969 TRACE_RESULT (current_cpu
, "accum", 'D', m32r_h_accum_get (current_cpu
));
975 CASE (sem
, INSN_MULWHI
) : /* mulwhi $src1,$src2 */
977 #define FLD(f) abuf->fields.fmt_mulhi.f
978 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
980 m32r_h_accum_set (current_cpu
, SRADI (SLLDI (MULDI (EXTSIDI (* FLD (f_r1
)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (f_r2
), 16)))), 8), 8));
981 TRACE_RESULT (current_cpu
, "accum", 'D', m32r_h_accum_get (current_cpu
));
987 CASE (sem
, INSN_MULWLO
) : /* mulwlo $src1,$src2 */
989 #define FLD(f) abuf->fields.fmt_mulhi.f
990 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
992 m32r_h_accum_set (current_cpu
, SRADI (SLLDI (MULDI (EXTSIDI (* FLD (f_r1
)), EXTHIDI (TRUNCSIHI (* FLD (f_r2
)))), 8), 8));
993 TRACE_RESULT (current_cpu
, "accum", 'D', m32r_h_accum_get (current_cpu
));
999 CASE (sem
, INSN_MV
) : /* mv $dr,$sr */
1001 #define FLD(f) abuf->fields.fmt_mv.f
1002 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
1004 * FLD (f_r1
) = * FLD (f_r2
);
1005 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
1011 CASE (sem
, INSN_MVFACHI
) : /* mvfachi $dr */
1013 #define FLD(f) abuf->fields.fmt_mvfachi.f
1014 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
1016 * FLD (f_r1
) = TRUNCDISI (SRADI (m32r_h_accum_get (current_cpu
), 32));
1017 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
1023 CASE (sem
, INSN_MVFACLO
) : /* mvfaclo $dr */
1025 #define FLD(f) abuf->fields.fmt_mvfachi.f
1026 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
1028 * FLD (f_r1
) = TRUNCDISI (m32r_h_accum_get (current_cpu
));
1029 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
1035 CASE (sem
, INSN_MVFACMI
) : /* mvfacmi $dr */
1037 #define FLD(f) abuf->fields.fmt_mvfachi.f
1038 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
1040 * FLD (f_r1
) = TRUNCDISI (SRADI (m32r_h_accum_get (current_cpu
), 16));
1041 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
1047 CASE (sem
, INSN_MVFC
) : /* mvfc $dr,$scr */
1049 #define FLD(f) abuf->fields.fmt_mvfc.f
1050 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
1052 * FLD (f_r1
) = m32r_h_cr_get (current_cpu
, FLD (f_r2
));
1053 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
1059 CASE (sem
, INSN_MVTACHI
) : /* mvtachi $src1 */
1061 #define FLD(f) abuf->fields.fmt_mvtachi.f
1062 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
1064 m32r_h_accum_set (current_cpu
, ORDI (ANDDI (m32r_h_accum_get (current_cpu
), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (* FLD (f_r1
)), 32)));
1065 TRACE_RESULT (current_cpu
, "accum", 'D', m32r_h_accum_get (current_cpu
));
1071 CASE (sem
, INSN_MVTACLO
) : /* mvtaclo $src1 */
1073 #define FLD(f) abuf->fields.fmt_mvtachi.f
1074 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
1076 m32r_h_accum_set (current_cpu
, ORDI (ANDDI (m32r_h_accum_get (current_cpu
), MAKEDI (0xffffffff, 0)), ZEXTSIDI (* FLD (f_r1
))));
1077 TRACE_RESULT (current_cpu
, "accum", 'D', m32r_h_accum_get (current_cpu
));
1083 CASE (sem
, INSN_MVTC
) : /* mvtc $sr,$dcr */
1085 #define FLD(f) abuf->fields.fmt_mvtc.f
1086 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
1088 m32r_h_cr_set (current_cpu
, FLD (f_r1
), * FLD (f_r2
));
1089 TRACE_RESULT (current_cpu
, "dcr", 'x', m32r_h_cr_get (current_cpu
, FLD (f_r1
)));
1095 CASE (sem
, INSN_NEG
) : /* neg $dr,$sr */
1097 #define FLD(f) abuf->fields.fmt_mv.f
1098 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
1100 * FLD (f_r1
) = NEGSI (* FLD (f_r2
));
1101 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
1107 CASE (sem
, INSN_NOP
) : /* nop */
1109 #define FLD(f) abuf->fields.fmt_nop.f
1110 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
1112 PROFILE_COUNT_FILLNOPS (current_cpu
, abuf
->addr
);
1118 CASE (sem
, INSN_NOT
) : /* not $dr,$sr */
1120 #define FLD(f) abuf->fields.fmt_mv.f
1121 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
1123 * FLD (f_r1
) = INVSI (* FLD (f_r2
));
1124 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
1130 CASE (sem
, INSN_RAC
) : /* rac */
1132 #define FLD(f) abuf->fields.fmt_rac.f
1133 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
1137 tmp_tmp1
= SLLDI (m32r_h_accum_get (current_cpu
), 1);
1138 tmp_tmp1
= ADDDI (tmp_tmp1
, MAKEDI (0, 32768));
1139 m32r_h_accum_set (current_cpu
, (GTDI (tmp_tmp1
, MAKEDI (32767, 0xffff0000))) ? (MAKEDI (32767, 0xffff0000)) : (LTDI (tmp_tmp1
, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1
, MAKEDI (0xffffffff, 0xffff0000))));
1140 TRACE_RESULT (current_cpu
, "accum", 'D', m32r_h_accum_get (current_cpu
));
1147 CASE (sem
, INSN_RACH
) : /* rach */
1149 #define FLD(f) abuf->fields.fmt_rac.f
1150 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
1154 tmp_tmp1
= ANDDI (m32r_h_accum_get (current_cpu
), MAKEDI (16777215, 0xffffffff));
1155 if (ANDIF (GEDI (tmp_tmp1
, MAKEDI (16383, 0x80000000)), LEDI (tmp_tmp1
, MAKEDI (8388607, 0xffffffff)))) {
1156 tmp_tmp1
= MAKEDI (16383, 0x80000000);
1158 if (ANDIF (GEDI (tmp_tmp1
, MAKEDI (8388608, 0)), LEDI (tmp_tmp1
, MAKEDI (16760832, 0)))) {
1159 tmp_tmp1
= MAKEDI (16760832, 0);
1161 tmp_tmp1
= ANDDI (ADDDI (m32r_h_accum_get (current_cpu
), MAKEDI (0, 1073741824)), MAKEDI (0xffffffff, 0x80000000));
1164 tmp_tmp1
= SLLDI (tmp_tmp1
, 1);
1165 m32r_h_accum_set (current_cpu
, SRADI (SLLDI (tmp_tmp1
, 7), 7));
1166 TRACE_RESULT (current_cpu
, "accum", 'D', m32r_h_accum_get (current_cpu
));
1173 CASE (sem
, INSN_RTE
) : /* rte */
1175 #define FLD(f) abuf->fields.fmt_rte.f
1176 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
1179 CPU (h_sm
) = CPU (h_bsm
);
1180 TRACE_RESULT (current_cpu
, "sm-0", 'x', CPU (h_sm
));
1181 CPU (h_ie
) = CPU (h_bie
);
1182 TRACE_RESULT (current_cpu
, "ie-0", 'x', CPU (h_ie
));
1183 CPU (h_cond
) = CPU (h_bcond
);
1184 TRACE_RESULT (current_cpu
, "condbit", 'x', CPU (h_cond
));
1185 BRANCH_NEW_PC (new_pc
, SEM_BRANCH_VIA_ADDR (sem_arg
, ANDSI (CPU (h_bpc
), -4)));
1186 TRACE_RESULT (current_cpu
, "pc", 'x', new_pc
);
1193 CASE (sem
, INSN_SETH
) : /* seth $dr,$hash$hi16 */
1195 #define FLD(f) abuf->fields.fmt_seth.f
1196 new_pc
= SEM_NEXT_PC (sem_arg
, 4);
1198 * FLD (f_r1
) = SLLSI (FLD (f_hi16
), 16);
1199 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
1205 CASE (sem
, INSN_SLL
) : /* sll $dr,$sr */
1207 #define FLD(f) abuf->fields.fmt_add.f
1208 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
1210 * FLD (f_r1
) = SLLSI (* FLD (f_r1
), ANDSI (* FLD (f_r2
), 31));
1211 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
1217 CASE (sem
, INSN_SLL3
) : /* sll3 $dr,$sr,$simm16 */
1219 #define FLD(f) abuf->fields.fmt_sll3.f
1220 new_pc
= SEM_NEXT_PC (sem_arg
, 4);
1222 * FLD (f_r1
) = SLLSI (* FLD (f_r2
), ANDSI (FLD (f_simm16
), 31));
1223 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
1229 CASE (sem
, INSN_SLLI
) : /* slli $dr,$uimm5 */
1231 #define FLD(f) abuf->fields.fmt_slli.f
1232 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
1234 * FLD (f_r1
) = SLLSI (* FLD (f_r1
), FLD (f_uimm5
));
1235 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
1241 CASE (sem
, INSN_SRA
) : /* sra $dr,$sr */
1243 #define FLD(f) abuf->fields.fmt_add.f
1244 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
1246 * FLD (f_r1
) = SRASI (* FLD (f_r1
), ANDSI (* FLD (f_r2
), 31));
1247 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
1253 CASE (sem
, INSN_SRA3
) : /* sra3 $dr,$sr,$simm16 */
1255 #define FLD(f) abuf->fields.fmt_sll3.f
1256 new_pc
= SEM_NEXT_PC (sem_arg
, 4);
1258 * FLD (f_r1
) = SRASI (* FLD (f_r2
), ANDSI (FLD (f_simm16
), 31));
1259 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
1265 CASE (sem
, INSN_SRAI
) : /* srai $dr,$uimm5 */
1267 #define FLD(f) abuf->fields.fmt_slli.f
1268 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
1270 * FLD (f_r1
) = SRASI (* FLD (f_r1
), FLD (f_uimm5
));
1271 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
1277 CASE (sem
, INSN_SRL
) : /* srl $dr,$sr */
1279 #define FLD(f) abuf->fields.fmt_add.f
1280 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
1282 * FLD (f_r1
) = SRLSI (* FLD (f_r1
), ANDSI (* FLD (f_r2
), 31));
1283 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
1289 CASE (sem
, INSN_SRL3
) : /* srl3 $dr,$sr,$simm16 */
1291 #define FLD(f) abuf->fields.fmt_sll3.f
1292 new_pc
= SEM_NEXT_PC (sem_arg
, 4);
1294 * FLD (f_r1
) = SRLSI (* FLD (f_r2
), ANDSI (FLD (f_simm16
), 31));
1295 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
1301 CASE (sem
, INSN_SRLI
) : /* srli $dr,$uimm5 */
1303 #define FLD(f) abuf->fields.fmt_slli.f
1304 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
1306 * FLD (f_r1
) = SRLSI (* FLD (f_r1
), FLD (f_uimm5
));
1307 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
1313 CASE (sem
, INSN_ST
) : /* st $src1,@$src2 */
1315 #define FLD(f) abuf->fields.fmt_st.f
1316 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
1318 SETMEMSI (current_cpu
, * FLD (f_r2
), * FLD (f_r1
));
1319 TRACE_RESULT (current_cpu
, "memory", 'x', GETMEMSI (current_cpu
, * FLD (f_r2
)));
1325 CASE (sem
, INSN_ST_D
) : /* st $src1,@($slo16,$src2) */
1327 #define FLD(f) abuf->fields.fmt_st_d.f
1328 new_pc
= SEM_NEXT_PC (sem_arg
, 4);
1330 SETMEMSI (current_cpu
, ADDSI (* FLD (f_r2
), FLD (f_simm16
)), * FLD (f_r1
));
1331 TRACE_RESULT (current_cpu
, "memory", 'x', GETMEMSI (current_cpu
, ADDSI (* FLD (f_r2
), FLD (f_simm16
))));
1337 CASE (sem
, INSN_STB
) : /* stb $src1,@$src2 */
1339 #define FLD(f) abuf->fields.fmt_stb.f
1340 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
1342 SETMEMQI (current_cpu
, * FLD (f_r2
), * FLD (f_r1
));
1343 TRACE_RESULT (current_cpu
, "memory", 'x', GETMEMQI (current_cpu
, * FLD (f_r2
)));
1349 CASE (sem
, INSN_STB_D
) : /* stb $src1,@($slo16,$src2) */
1351 #define FLD(f) abuf->fields.fmt_stb_d.f
1352 new_pc
= SEM_NEXT_PC (sem_arg
, 4);
1354 SETMEMQI (current_cpu
, ADDSI (* FLD (f_r2
), FLD (f_simm16
)), * FLD (f_r1
));
1355 TRACE_RESULT (current_cpu
, "memory", 'x', GETMEMQI (current_cpu
, ADDSI (* FLD (f_r2
), FLD (f_simm16
))));
1361 CASE (sem
, INSN_STH
) : /* sth $src1,@$src2 */
1363 #define FLD(f) abuf->fields.fmt_sth.f
1364 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
1366 SETMEMHI (current_cpu
, * FLD (f_r2
), * FLD (f_r1
));
1367 TRACE_RESULT (current_cpu
, "memory", 'x', GETMEMHI (current_cpu
, * FLD (f_r2
)));
1373 CASE (sem
, INSN_STH_D
) : /* sth $src1,@($slo16,$src2) */
1375 #define FLD(f) abuf->fields.fmt_sth_d.f
1376 new_pc
= SEM_NEXT_PC (sem_arg
, 4);
1378 SETMEMHI (current_cpu
, ADDSI (* FLD (f_r2
), FLD (f_simm16
)), * FLD (f_r1
));
1379 TRACE_RESULT (current_cpu
, "memory", 'x', GETMEMHI (current_cpu
, ADDSI (* FLD (f_r2
), FLD (f_simm16
))));
1385 CASE (sem
, INSN_ST_PLUS
) : /* st $src1,@+$src2 */
1387 #define FLD(f) abuf->fields.fmt_st_plus.f
1388 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
1392 tmp_new_src2
= ADDSI (* FLD (f_r2
), 4);
1393 SETMEMSI (current_cpu
, tmp_new_src2
, * FLD (f_r1
));
1394 TRACE_RESULT (current_cpu
, "memory", 'x', GETMEMSI (current_cpu
, tmp_new_src2
));
1395 * FLD (f_r2
) = tmp_new_src2
;
1396 TRACE_RESULT (current_cpu
, "src2", 'x', * FLD (f_r2
));
1403 CASE (sem
, INSN_ST_MINUS
) : /* st $src1,@-$src2 */
1405 #define FLD(f) abuf->fields.fmt_st_plus.f
1406 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
1410 tmp_new_src2
= SUBSI (* FLD (f_r2
), 4);
1411 SETMEMSI (current_cpu
, tmp_new_src2
, * FLD (f_r1
));
1412 TRACE_RESULT (current_cpu
, "memory", 'x', GETMEMSI (current_cpu
, tmp_new_src2
));
1413 * FLD (f_r2
) = tmp_new_src2
;
1414 TRACE_RESULT (current_cpu
, "src2", 'x', * FLD (f_r2
));
1421 CASE (sem
, INSN_SUB
) : /* sub $dr,$sr */
1423 #define FLD(f) abuf->fields.fmt_add.f
1424 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
1426 * FLD (f_r1
) = SUBSI (* FLD (f_r1
), * FLD (f_r2
));
1427 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
1433 CASE (sem
, INSN_SUBV
) : /* subv $dr,$sr */
1435 #define FLD(f) abuf->fields.fmt_addv.f
1436 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
1440 temp0
= SUBSI (* FLD (f_r1
), * FLD (f_r2
));
1441 temp1
= SUBOFSI (* FLD (f_r1
), * FLD (f_r2
), 0);
1442 * FLD (f_r1
) = temp0
;
1443 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
1444 CPU (h_cond
) = temp1
;
1445 TRACE_RESULT (current_cpu
, "condbit", 'x', CPU (h_cond
));
1452 CASE (sem
, INSN_SUBX
) : /* subx $dr,$sr */
1454 #define FLD(f) abuf->fields.fmt_addx.f
1455 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
1459 temp0
= SUBCSI (* FLD (f_r1
), * FLD (f_r2
), CPU (h_cond
));
1460 temp1
= SUBCFSI (* FLD (f_r1
), * FLD (f_r2
), CPU (h_cond
));
1461 * FLD (f_r1
) = temp0
;
1462 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
1463 CPU (h_cond
) = temp1
;
1464 TRACE_RESULT (current_cpu
, "condbit", 'x', CPU (h_cond
));
1471 CASE (sem
, INSN_TRAP
) : /* trap $uimm4 */
1473 #define FLD(f) abuf->fields.fmt_trap.f
1474 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
1477 m32r_h_cr_set (current_cpu
, 6, ADDSI (CPU (h_pc
), 4));
1478 TRACE_RESULT (current_cpu
, "cr-6", 'x', m32r_h_cr_get (current_cpu
, 6));
1479 m32r_h_cr_set (current_cpu
, 0, ANDSI (SLLSI (m32r_h_cr_get (current_cpu
, 0), 8), 65408));
1480 TRACE_RESULT (current_cpu
, "cr-0", 'x', m32r_h_cr_get (current_cpu
, 0));
1481 BRANCH_NEW_PC (new_pc
, SEM_BRANCH_VIA_ADDR (sem_arg
, a_m32r_trap (current_cpu
, FLD (f_uimm4
))));
1482 TRACE_RESULT (current_cpu
, "pc", 'x', new_pc
);
1489 CASE (sem
, INSN_UNLOCK
) : /* unlock $src1,@$src2 */
1491 #define FLD(f) abuf->fields.fmt_unlock.f
1492 new_pc
= SEM_NEXT_PC (sem_arg
, 2);
1496 SETMEMSI (current_cpu
, * FLD (f_r2
), * FLD (f_r1
));
1497 TRACE_RESULT (current_cpu
, "memory", 'x', GETMEMSI (current_cpu
, * FLD (f_r2
)));
1500 TRACE_RESULT (current_cpu
, "lock-0", 'x', CPU (h_lock
));
1509 ENDSWITCH (sem
) /* End of semantic switch. */
1514 #endif /* DEFINE_SWITCH */
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