1 /* Simulator instruction semantics for m32r.
3 This file is machine generated with CGEN.
5 Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
7 This file is part of the GNU Simulators.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2, or (at your option)
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License along
20 with this program; if not, write to the Free Software Foundation, Inc.,
21 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
28 /* The labels have the case they have because the enum of insn types
29 is all uppercase and in the non-stdc case the insn symbol is built
32 The order here must match the order in m32r_decode_vars in decode.c. */
34 static void *labels
[] = {
35 && case_sem_INSN_ILLEGAL
,
37 && case_sem_INSN_ADD3
,
39 && case_sem_INSN_AND3
,
43 && case_sem_INSN_XOR3
,
44 && case_sem_INSN_ADDI
,
45 && case_sem_INSN_ADDV
,
46 && case_sem_INSN_ADDV3
,
47 && case_sem_INSN_ADDX
,
49 && case_sem_INSN_BC24
,
51 && case_sem_INSN_BEQZ
,
52 && case_sem_INSN_BGEZ
,
53 && case_sem_INSN_BGTZ
,
54 && case_sem_INSN_BLEZ
,
55 && case_sem_INSN_BLTZ
,
56 && case_sem_INSN_BNEZ
,
58 && case_sem_INSN_BL24
,
59 && case_sem_INSN_BNC8
,
60 && case_sem_INSN_BNC24
,
62 && case_sem_INSN_BRA8
,
63 && case_sem_INSN_BRA24
,
65 && case_sem_INSN_CMPI
,
66 && case_sem_INSN_CMPU
,
67 && case_sem_INSN_CMPUI
,
69 && case_sem_INSN_DIVU
,
71 && case_sem_INSN_REMU
,
72 && case_sem_INSN_DIVH
,
76 && case_sem_INSN_LD_D
,
78 && case_sem_INSN_LDB_D
,
80 && case_sem_INSN_LDH_D
,
81 && case_sem_INSN_LDUB
,
82 && case_sem_INSN_LDUB_D
,
83 && case_sem_INSN_LDUH
,
84 && case_sem_INSN_LDUH_D
,
85 && case_sem_INSN_LD_PLUS
,
86 && case_sem_INSN_LD24
,
87 && case_sem_INSN_LDI8
,
88 && case_sem_INSN_LDI16
,
89 && case_sem_INSN_LOCK
,
90 && case_sem_INSN_MACHI
,
91 && case_sem_INSN_MACLO
,
92 && case_sem_INSN_MACWHI
,
93 && case_sem_INSN_MACWLO
,
95 && case_sem_INSN_MULHI
,
96 && case_sem_INSN_MULLO
,
97 && case_sem_INSN_MULWHI
,
98 && case_sem_INSN_MULWLO
,
100 && case_sem_INSN_MVFACHI
,
101 && case_sem_INSN_MVFACLO
,
102 && case_sem_INSN_MVFACMI
,
103 && case_sem_INSN_MVFC
,
104 && case_sem_INSN_MVTACHI
,
105 && case_sem_INSN_MVTACLO
,
106 && case_sem_INSN_MVTC
,
107 && case_sem_INSN_NEG
,
108 && case_sem_INSN_NOP
,
109 && case_sem_INSN_NOT
,
110 && case_sem_INSN_RAC
,
111 && case_sem_INSN_RACH
,
112 && case_sem_INSN_RTE
,
113 && case_sem_INSN_SETH
,
114 && case_sem_INSN_SLL
,
115 && case_sem_INSN_SLL3
,
116 && case_sem_INSN_SLLI
,
117 && case_sem_INSN_SRA
,
118 && case_sem_INSN_SRA3
,
119 && case_sem_INSN_SRAI
,
120 && case_sem_INSN_SRL
,
121 && case_sem_INSN_SRL3
,
122 && case_sem_INSN_SRLI
,
124 && case_sem_INSN_ST_D
,
125 && case_sem_INSN_STB
,
126 && case_sem_INSN_STB_D
,
127 && case_sem_INSN_STH
,
128 && case_sem_INSN_STH_D
,
129 && case_sem_INSN_ST_PLUS
,
130 && case_sem_INSN_ST_MINUS
,
131 && case_sem_INSN_SUB
,
132 && case_sem_INSN_SUBV
,
133 && case_sem_INSN_SUBX
,
134 && case_sem_INSN_TRAP
,
135 && case_sem_INSN_UNLOCK
,
138 extern DECODE
*m32r_decode_vars
[];
141 for (i
= 0; m32r_decode_vars
[i
] != 0; ++i
)
142 m32r_decode_vars
[i
]->semantic_lab
= labels
[i
];
144 #endif /* DEFINE_LABELS */
149 /* If hyper-fast [well not unnecessarily slow] execution is selected, turn
150 off frills like tracing and profiling. */
151 /* FIXME: A better way would be to have TRACE_RESULT check for something
152 that can cause it to be optimized out. */
156 #define TRACE_RESULT(cpu, name, type, val)
160 #define GET_ATTR(cpu, num, attr) CGEN_INSN_ATTR (abuf->opcode, CGEN_INSN_##attr)
163 SEM_ARG sem_arg
= sc
;
164 ARGBUF
*abuf
= SEM_ARGBUF (sem_arg
);
167 SWITCH (sem
, sem_arg
->semantic
.sem_case
)
170 CASE (sem
, INSN_ILLEGAL
) :
172 sim_engine_halt (CPU_STATE (current_cpu
), current_cpu
, NULL
, NULL_CIA
/*FIXME*/,
173 sim_stopped
, SIM_SIGILL
);
177 CASE (sem
, INSN_ADD
) : /* add $dr,$sr */
179 #define FLD(f) abuf->fields.fmt_0_add.f
180 new_pc
= SEM_NEXT_PC (sem_arg
);
182 * FLD (f_r1
) = ADDSI (* FLD (f_r1
), * FLD (f_r2
));
183 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
189 CASE (sem
, INSN_ADD3
) : /* add3 $dr,$sr,#$slo16 */
191 #define FLD(f) abuf->fields.fmt_1_add3.f
192 new_pc
= SEM_NEXT_PC (sem_arg
);
194 * FLD (f_r1
) = ADDSI (* FLD (f_r2
), FLD (f_simm16
));
195 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
201 CASE (sem
, INSN_AND
) : /* and $dr,$sr */
203 #define FLD(f) abuf->fields.fmt_0_add.f
204 new_pc
= SEM_NEXT_PC (sem_arg
);
206 * FLD (f_r1
) = ANDSI (* FLD (f_r1
), * FLD (f_r2
));
207 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
213 CASE (sem
, INSN_AND3
) : /* and3 $dr,$sr,#$uimm16 */
215 #define FLD(f) abuf->fields.fmt_2_and3.f
216 new_pc
= SEM_NEXT_PC (sem_arg
);
218 * FLD (f_r1
) = ANDSI (* FLD (f_r2
), FLD (f_uimm16
));
219 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
225 CASE (sem
, INSN_OR
) : /* or $dr,$sr */
227 #define FLD(f) abuf->fields.fmt_0_add.f
228 new_pc
= SEM_NEXT_PC (sem_arg
);
230 * FLD (f_r1
) = ORSI (* FLD (f_r1
), * FLD (f_r2
));
231 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
237 CASE (sem
, INSN_OR3
) : /* or3 $dr,$sr,#$ulo16 */
239 #define FLD(f) abuf->fields.fmt_3_or3.f
240 new_pc
= SEM_NEXT_PC (sem_arg
);
242 * FLD (f_r1
) = ORSI (* FLD (f_r2
), FLD (f_uimm16
));
243 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
249 CASE (sem
, INSN_XOR
) : /* xor $dr,$sr */
251 #define FLD(f) abuf->fields.fmt_0_add.f
252 new_pc
= SEM_NEXT_PC (sem_arg
);
254 * FLD (f_r1
) = XORSI (* FLD (f_r1
), * FLD (f_r2
));
255 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
261 CASE (sem
, INSN_XOR3
) : /* xor3 $dr,$sr,#$uimm16 */
263 #define FLD(f) abuf->fields.fmt_2_and3.f
264 new_pc
= SEM_NEXT_PC (sem_arg
);
266 * FLD (f_r1
) = XORSI (* FLD (f_r2
), FLD (f_uimm16
));
267 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
273 CASE (sem
, INSN_ADDI
) : /* addi $dr,#$simm8 */
275 #define FLD(f) abuf->fields.fmt_4_addi.f
276 new_pc
= SEM_NEXT_PC (sem_arg
);
278 * FLD (f_r1
) = ADDSI (* FLD (f_r1
), FLD (f_simm8
));
279 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
285 CASE (sem
, INSN_ADDV
) : /* addv $dr,$sr */
287 #define FLD(f) abuf->fields.fmt_0_add.f
288 new_pc
= SEM_NEXT_PC (sem_arg
);
292 temp0
= ADDSI (* FLD (f_r1
), * FLD (f_r2
));
293 temp1
= ADDOFSI (* FLD (f_r1
), * FLD (f_r2
), 0);
294 * FLD (f_r1
) = temp0
;
295 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
296 CPU (h_cond
) = temp1
;
297 TRACE_RESULT (current_cpu
, "condbit", 'x', CPU (h_cond
));
304 CASE (sem
, INSN_ADDV3
) : /* addv3 $dr,$sr,#$simm16 */
306 #define FLD(f) abuf->fields.fmt_5_addv3.f
307 new_pc
= SEM_NEXT_PC (sem_arg
);
311 temp0
= ADDSI (* FLD (f_r2
), FLD (f_simm16
));
312 temp1
= ADDOFSI (* FLD (f_r2
), FLD (f_simm16
), 0);
313 * FLD (f_r1
) = temp0
;
314 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
315 CPU (h_cond
) = temp1
;
316 TRACE_RESULT (current_cpu
, "condbit", 'x', CPU (h_cond
));
323 CASE (sem
, INSN_ADDX
) : /* addx $dr,$sr */
325 #define FLD(f) abuf->fields.fmt_6_addx.f
326 new_pc
= SEM_NEXT_PC (sem_arg
);
330 temp0
= ADDCSI (* FLD (f_r1
), * FLD (f_r2
), CPU (h_cond
));
331 temp1
= ADDCFSI (* FLD (f_r1
), * FLD (f_r2
), CPU (h_cond
));
332 * FLD (f_r1
) = temp0
;
333 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
334 CPU (h_cond
) = temp1
;
335 TRACE_RESULT (current_cpu
, "condbit", 'x', CPU (h_cond
));
342 CASE (sem
, INSN_BC8
) : /* bc $disp8 */
344 #define FLD(f) abuf->fields.fmt_7_bc8.f
345 new_pc
= SEM_NEXT_PC (sem_arg
);
348 BRANCH_NEW_PC (current_cpu
, new_pc
, SEM_BRANCH_VIA_CACHE (sem_arg
, FLD (f_disp8
)));
355 CASE (sem
, INSN_BC24
) : /* bc $disp24 */
357 #define FLD(f) abuf->fields.fmt_8_bc24.f
358 new_pc
= SEM_NEXT_PC (sem_arg
);
361 BRANCH_NEW_PC (current_cpu
, new_pc
, SEM_BRANCH_VIA_CACHE (sem_arg
, FLD (f_disp24
)));
368 CASE (sem
, INSN_BEQ
) : /* beq $src1,$src2,$disp16 */
370 #define FLD(f) abuf->fields.fmt_9_beq.f
371 new_pc
= SEM_NEXT_PC (sem_arg
);
373 if (EQSI (* FLD (f_r1
), * FLD (f_r2
))) {
374 BRANCH_NEW_PC (current_cpu
, new_pc
, SEM_BRANCH_VIA_CACHE (sem_arg
, FLD (f_disp16
)));
381 CASE (sem
, INSN_BEQZ
) : /* beqz $src2,$disp16 */
383 #define FLD(f) abuf->fields.fmt_10_beqz.f
384 new_pc
= SEM_NEXT_PC (sem_arg
);
386 if (EQSI (* FLD (f_r2
), 0)) {
387 BRANCH_NEW_PC (current_cpu
, new_pc
, SEM_BRANCH_VIA_CACHE (sem_arg
, FLD (f_disp16
)));
394 CASE (sem
, INSN_BGEZ
) : /* bgez $src2,$disp16 */
396 #define FLD(f) abuf->fields.fmt_10_beqz.f
397 new_pc
= SEM_NEXT_PC (sem_arg
);
399 if (GESI (* FLD (f_r2
), 0)) {
400 BRANCH_NEW_PC (current_cpu
, new_pc
, SEM_BRANCH_VIA_CACHE (sem_arg
, FLD (f_disp16
)));
407 CASE (sem
, INSN_BGTZ
) : /* bgtz $src2,$disp16 */
409 #define FLD(f) abuf->fields.fmt_10_beqz.f
410 new_pc
= SEM_NEXT_PC (sem_arg
);
412 if (GTSI (* FLD (f_r2
), 0)) {
413 BRANCH_NEW_PC (current_cpu
, new_pc
, SEM_BRANCH_VIA_CACHE (sem_arg
, FLD (f_disp16
)));
420 CASE (sem
, INSN_BLEZ
) : /* blez $src2,$disp16 */
422 #define FLD(f) abuf->fields.fmt_10_beqz.f
423 new_pc
= SEM_NEXT_PC (sem_arg
);
425 if (LESI (* FLD (f_r2
), 0)) {
426 BRANCH_NEW_PC (current_cpu
, new_pc
, SEM_BRANCH_VIA_CACHE (sem_arg
, FLD (f_disp16
)));
433 CASE (sem
, INSN_BLTZ
) : /* bltz $src2,$disp16 */
435 #define FLD(f) abuf->fields.fmt_10_beqz.f
436 new_pc
= SEM_NEXT_PC (sem_arg
);
438 if (LTSI (* FLD (f_r2
), 0)) {
439 BRANCH_NEW_PC (current_cpu
, new_pc
, SEM_BRANCH_VIA_CACHE (sem_arg
, FLD (f_disp16
)));
446 CASE (sem
, INSN_BNEZ
) : /* bnez $src2,$disp16 */
448 #define FLD(f) abuf->fields.fmt_10_beqz.f
449 new_pc
= SEM_NEXT_PC (sem_arg
);
451 if (NESI (* FLD (f_r2
), 0)) {
452 BRANCH_NEW_PC (current_cpu
, new_pc
, SEM_BRANCH_VIA_CACHE (sem_arg
, FLD (f_disp16
)));
459 CASE (sem
, INSN_BL8
) : /* bl $disp8 */
461 #define FLD(f) abuf->fields.fmt_11_bl8.f
462 new_pc
= SEM_NEXT_PC (sem_arg
);
465 CPU (h_gr
[14]) = ADDSI (ANDSI (CPU (h_pc
), -4), 4);
466 TRACE_RESULT (current_cpu
, "h-gr-14", 'x', CPU (h_gr
[14]));
467 BRANCH_NEW_PC (current_cpu
, new_pc
, SEM_BRANCH_VIA_CACHE (sem_arg
, FLD (f_disp8
)));
474 CASE (sem
, INSN_BL24
) : /* bl $disp24 */
476 #define FLD(f) abuf->fields.fmt_12_bl24.f
477 new_pc
= SEM_NEXT_PC (sem_arg
);
480 CPU (h_gr
[14]) = ADDSI (CPU (h_pc
), 4);
481 TRACE_RESULT (current_cpu
, "h-gr-14", 'x', CPU (h_gr
[14]));
482 BRANCH_NEW_PC (current_cpu
, new_pc
, SEM_BRANCH_VIA_CACHE (sem_arg
, FLD (f_disp24
)));
489 CASE (sem
, INSN_BNC8
) : /* bnc $disp8 */
491 #define FLD(f) abuf->fields.fmt_7_bc8.f
492 new_pc
= SEM_NEXT_PC (sem_arg
);
494 if (NOTBI (CPU (h_cond
))) {
495 BRANCH_NEW_PC (current_cpu
, new_pc
, SEM_BRANCH_VIA_CACHE (sem_arg
, FLD (f_disp8
)));
502 CASE (sem
, INSN_BNC24
) : /* bnc $disp24 */
504 #define FLD(f) abuf->fields.fmt_8_bc24.f
505 new_pc
= SEM_NEXT_PC (sem_arg
);
507 if (NOTBI (CPU (h_cond
))) {
508 BRANCH_NEW_PC (current_cpu
, new_pc
, SEM_BRANCH_VIA_CACHE (sem_arg
, FLD (f_disp24
)));
515 CASE (sem
, INSN_BNE
) : /* bne $src1,$src2,$disp16 */
517 #define FLD(f) abuf->fields.fmt_9_beq.f
518 new_pc
= SEM_NEXT_PC (sem_arg
);
520 if (NESI (* FLD (f_r1
), * FLD (f_r2
))) {
521 BRANCH_NEW_PC (current_cpu
, new_pc
, SEM_BRANCH_VIA_CACHE (sem_arg
, FLD (f_disp16
)));
528 CASE (sem
, INSN_BRA8
) : /* bra $disp8 */
530 #define FLD(f) abuf->fields.fmt_13_bra8.f
531 new_pc
= SEM_NEXT_PC (sem_arg
);
533 BRANCH_NEW_PC (current_cpu
, new_pc
, SEM_BRANCH_VIA_CACHE (sem_arg
, FLD (f_disp8
)));
539 CASE (sem
, INSN_BRA24
) : /* bra $disp24 */
541 #define FLD(f) abuf->fields.fmt_14_bra24.f
542 new_pc
= SEM_NEXT_PC (sem_arg
);
544 BRANCH_NEW_PC (current_cpu
, new_pc
, SEM_BRANCH_VIA_CACHE (sem_arg
, FLD (f_disp24
)));
550 CASE (sem
, INSN_CMP
) : /* cmp $src1,$src2 */
552 #define FLD(f) abuf->fields.fmt_15_cmp.f
553 new_pc
= SEM_NEXT_PC (sem_arg
);
555 CPU (h_cond
) = LTSI (* FLD (f_r1
), * FLD (f_r2
));
556 TRACE_RESULT (current_cpu
, "condbit", 'x', CPU (h_cond
));
562 CASE (sem
, INSN_CMPI
) : /* cmpi $src2,#$simm16 */
564 #define FLD(f) abuf->fields.fmt_16_cmpi.f
565 new_pc
= SEM_NEXT_PC (sem_arg
);
567 CPU (h_cond
) = LTSI (* FLD (f_r2
), FLD (f_simm16
));
568 TRACE_RESULT (current_cpu
, "condbit", 'x', CPU (h_cond
));
574 CASE (sem
, INSN_CMPU
) : /* cmpu $src1,$src2 */
576 #define FLD(f) abuf->fields.fmt_15_cmp.f
577 new_pc
= SEM_NEXT_PC (sem_arg
);
579 CPU (h_cond
) = LTUSI (* FLD (f_r1
), * FLD (f_r2
));
580 TRACE_RESULT (current_cpu
, "condbit", 'x', CPU (h_cond
));
586 CASE (sem
, INSN_CMPUI
) : /* cmpui $src2,#$uimm16 */
588 #define FLD(f) abuf->fields.fmt_17_cmpui.f
589 new_pc
= SEM_NEXT_PC (sem_arg
);
591 CPU (h_cond
) = LTUSI (* FLD (f_r2
), FLD (f_uimm16
));
592 TRACE_RESULT (current_cpu
, "condbit", 'x', CPU (h_cond
));
598 CASE (sem
, INSN_DIV
) : /* div $dr,$sr */
600 #define FLD(f) abuf->fields.fmt_18_div.f
601 new_pc
= SEM_NEXT_PC (sem_arg
);
603 if (NESI (* FLD (f_r2
), 0)) {
604 * FLD (f_r1
) = DIVSI (* FLD (f_r1
), * FLD (f_r2
));
605 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
612 CASE (sem
, INSN_DIVU
) : /* divu $dr,$sr */
614 #define FLD(f) abuf->fields.fmt_18_div.f
615 new_pc
= SEM_NEXT_PC (sem_arg
);
617 if (NESI (* FLD (f_r2
), 0)) {
618 * FLD (f_r1
) = UDIVSI (* FLD (f_r1
), * FLD (f_r2
));
619 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
626 CASE (sem
, INSN_REM
) : /* rem $dr,$sr */
628 #define FLD(f) abuf->fields.fmt_18_div.f
629 new_pc
= SEM_NEXT_PC (sem_arg
);
631 if (NESI (* FLD (f_r2
), 0)) {
632 * FLD (f_r1
) = MODSI (* FLD (f_r1
), * FLD (f_r2
));
633 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
640 CASE (sem
, INSN_REMU
) : /* remu $dr,$sr */
642 #define FLD(f) abuf->fields.fmt_18_div.f
643 new_pc
= SEM_NEXT_PC (sem_arg
);
645 if (NESI (* FLD (f_r2
), 0)) {
646 * FLD (f_r1
) = UMODSI (* FLD (f_r1
), * FLD (f_r2
));
647 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
654 CASE (sem
, INSN_DIVH
) : /* divh $dr,$sr */
656 #define FLD(f) abuf->fields.fmt_18_div.f
657 new_pc
= SEM_NEXT_PC (sem_arg
);
659 if (NESI (* FLD (f_r2
), 0)) {
660 * FLD (f_r1
) = DIVSI (EXTHISI (TRUNCSIHI (* FLD (f_r1
))), * FLD (f_r2
));
661 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
668 CASE (sem
, INSN_JL
) : /* jl $sr */
670 #define FLD(f) abuf->fields.fmt_19_jl.f
671 new_pc
= SEM_NEXT_PC (sem_arg
);
675 temp0
= ADDSI (ANDSI (CPU (h_pc
), -4), 4);
676 temp1
= * FLD (f_r2
);
677 CPU (h_gr
[14]) = temp0
;
678 TRACE_RESULT (current_cpu
, "h-gr-14", 'x', CPU (h_gr
[14]));
679 BRANCH_NEW_PC (current_cpu
, new_pc
, SEM_BRANCH_VIA_ADDR (sem_arg
, temp1
));
686 CASE (sem
, INSN_JMP
) : /* jmp $sr */
688 #define FLD(f) abuf->fields.fmt_20_jmp.f
689 new_pc
= SEM_NEXT_PC (sem_arg
);
691 BRANCH_NEW_PC (current_cpu
, new_pc
, SEM_BRANCH_VIA_ADDR (sem_arg
, * FLD (f_r2
)));
697 CASE (sem
, INSN_LD
) : /* ld $dr,@$sr */
699 #define FLD(f) abuf->fields.fmt_21_ld.f
700 new_pc
= SEM_NEXT_PC (sem_arg
);
702 * FLD (f_r1
) = GETMEMSI (current_cpu
, * FLD (f_r2
));
703 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
709 CASE (sem
, INSN_LD_D
) : /* ld $dr,@($slo16,$sr) */
711 #define FLD(f) abuf->fields.fmt_22_ld_d.f
712 new_pc
= SEM_NEXT_PC (sem_arg
);
714 * FLD (f_r1
) = GETMEMSI (current_cpu
, ADDSI (* FLD (f_r2
), FLD (f_simm16
)));
715 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
721 CASE (sem
, INSN_LDB
) : /* ldb $dr,@$sr */
723 #define FLD(f) abuf->fields.fmt_23_ldb.f
724 new_pc
= SEM_NEXT_PC (sem_arg
);
726 * FLD (f_r1
) = EXTQISI (GETMEMQI (current_cpu
, * FLD (f_r2
)));
727 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
733 CASE (sem
, INSN_LDB_D
) : /* ldb $dr,@($slo16,$sr) */
735 #define FLD(f) abuf->fields.fmt_24_ldb_d.f
736 new_pc
= SEM_NEXT_PC (sem_arg
);
738 * FLD (f_r1
) = EXTQISI (GETMEMQI (current_cpu
, ADDSI (* FLD (f_r2
), FLD (f_simm16
))));
739 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
745 CASE (sem
, INSN_LDH
) : /* ldh $dr,@$sr */
747 #define FLD(f) abuf->fields.fmt_25_ldh.f
748 new_pc
= SEM_NEXT_PC (sem_arg
);
750 * FLD (f_r1
) = EXTHISI (GETMEMHI (current_cpu
, * FLD (f_r2
)));
751 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
757 CASE (sem
, INSN_LDH_D
) : /* ldh $dr,@($slo16,$sr) */
759 #define FLD(f) abuf->fields.fmt_26_ldh_d.f
760 new_pc
= SEM_NEXT_PC (sem_arg
);
762 * FLD (f_r1
) = EXTHISI (GETMEMHI (current_cpu
, ADDSI (* FLD (f_r2
), FLD (f_simm16
))));
763 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
769 CASE (sem
, INSN_LDUB
) : /* ldub $dr,@$sr */
771 #define FLD(f) abuf->fields.fmt_23_ldb.f
772 new_pc
= SEM_NEXT_PC (sem_arg
);
774 * FLD (f_r1
) = ZEXTQISI (GETMEMQI (current_cpu
, * FLD (f_r2
)));
775 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
781 CASE (sem
, INSN_LDUB_D
) : /* ldub $dr,@($slo16,$sr) */
783 #define FLD(f) abuf->fields.fmt_24_ldb_d.f
784 new_pc
= SEM_NEXT_PC (sem_arg
);
786 * FLD (f_r1
) = ZEXTQISI (GETMEMQI (current_cpu
, ADDSI (* FLD (f_r2
), FLD (f_simm16
))));
787 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
793 CASE (sem
, INSN_LDUH
) : /* lduh $dr,@$sr */
795 #define FLD(f) abuf->fields.fmt_25_ldh.f
796 new_pc
= SEM_NEXT_PC (sem_arg
);
798 * FLD (f_r1
) = ZEXTHISI (GETMEMHI (current_cpu
, * FLD (f_r2
)));
799 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
805 CASE (sem
, INSN_LDUH_D
) : /* lduh $dr,@($slo16,$sr) */
807 #define FLD(f) abuf->fields.fmt_26_ldh_d.f
808 new_pc
= SEM_NEXT_PC (sem_arg
);
810 * FLD (f_r1
) = ZEXTHISI (GETMEMHI (current_cpu
, ADDSI (* FLD (f_r2
), FLD (f_simm16
))));
811 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
817 CASE (sem
, INSN_LD_PLUS
) : /* ld $dr,@$sr+ */
819 #define FLD(f) abuf->fields.fmt_21_ld.f
820 new_pc
= SEM_NEXT_PC (sem_arg
);
824 temp0
= GETMEMSI (current_cpu
, * FLD (f_r2
));
825 temp1
= ADDSI (* FLD (f_r2
), 4);
826 * FLD (f_r1
) = temp0
;
827 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
828 * FLD (f_r2
) = temp1
;
829 TRACE_RESULT (current_cpu
, "sr", 'x', * FLD (f_r2
));
836 CASE (sem
, INSN_LD24
) : /* ld24 $dr,#$uimm24 */
838 #define FLD(f) abuf->fields.fmt_27_ld24.f
839 new_pc
= SEM_NEXT_PC (sem_arg
);
841 * FLD (f_r1
) = FLD (f_uimm24
);
842 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
848 CASE (sem
, INSN_LDI8
) : /* ldi $dr,#$simm8 */
850 #define FLD(f) abuf->fields.fmt_28_ldi8.f
851 new_pc
= SEM_NEXT_PC (sem_arg
);
853 * FLD (f_r1
) = FLD (f_simm8
);
854 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
860 CASE (sem
, INSN_LDI16
) : /* ldi $dr,$slo16 */
862 #define FLD(f) abuf->fields.fmt_29_ldi16.f
863 new_pc
= SEM_NEXT_PC (sem_arg
);
865 * FLD (f_r1
) = FLD (f_simm16
);
866 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
872 CASE (sem
, INSN_LOCK
) : /* lock $dr,@$sr */
874 #define FLD(f) abuf->fields.fmt_0_add.f
875 new_pc
= SEM_NEXT_PC (sem_arg
);
877 do_lock (current_cpu
, * FLD (f_r1
), * FLD (f_r2
));
883 CASE (sem
, INSN_MACHI
) : /* machi $src1,$src2 */
885 #define FLD(f) abuf->fields.fmt_30_machi.f
886 new_pc
= SEM_NEXT_PC (sem_arg
);
888 CPU (h_accum
) = SRADI (SLLDI (ADDDI (CPU (h_accum
), MULDI (EXTSIDI (ANDSI (* FLD (f_r1
), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (f_r2
), 16))))), 8), 8);
889 TRACE_RESULT (current_cpu
, "accum", 'D', CPU (h_accum
));
895 CASE (sem
, INSN_MACLO
) : /* maclo $src1,$src2 */
897 #define FLD(f) abuf->fields.fmt_30_machi.f
898 new_pc
= SEM_NEXT_PC (sem_arg
);
900 CPU (h_accum
) = SRADI (SLLDI (ADDDI (CPU (h_accum
), MULDI (EXTSIDI (SLLSI (* FLD (f_r1
), 16)), EXTHIDI (TRUNCSIHI (* FLD (f_r2
))))), 8), 8);
901 TRACE_RESULT (current_cpu
, "accum", 'D', CPU (h_accum
));
907 CASE (sem
, INSN_MACWHI
) : /* macwhi $src1,$src2 */
909 #define FLD(f) abuf->fields.fmt_30_machi.f
910 new_pc
= SEM_NEXT_PC (sem_arg
);
912 CPU (h_accum
) = SRADI (SLLDI (ADDDI (CPU (h_accum
), MULDI (EXTSIDI (* FLD (f_r1
)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (f_r2
), 16))))), 8), 8);
913 TRACE_RESULT (current_cpu
, "accum", 'D', CPU (h_accum
));
919 CASE (sem
, INSN_MACWLO
) : /* macwlo $src1,$src2 */
921 #define FLD(f) abuf->fields.fmt_30_machi.f
922 new_pc
= SEM_NEXT_PC (sem_arg
);
924 CPU (h_accum
) = SRADI (SLLDI (ADDDI (CPU (h_accum
), MULDI (EXTSIDI (* FLD (f_r1
)), EXTHIDI (TRUNCSIHI (* FLD (f_r2
))))), 8), 8);
925 TRACE_RESULT (current_cpu
, "accum", 'D', CPU (h_accum
));
931 CASE (sem
, INSN_MUL
) : /* mul $dr,$sr */
933 #define FLD(f) abuf->fields.fmt_0_add.f
934 new_pc
= SEM_NEXT_PC (sem_arg
);
936 * FLD (f_r1
) = MULSI (* FLD (f_r1
), * FLD (f_r2
));
937 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
943 CASE (sem
, INSN_MULHI
) : /* mulhi $src1,$src2 */
945 #define FLD(f) abuf->fields.fmt_15_cmp.f
946 new_pc
= SEM_NEXT_PC (sem_arg
);
948 CPU (h_accum
) = SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (* FLD (f_r1
), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (f_r2
), 16)))), 16), 16);
949 TRACE_RESULT (current_cpu
, "accum", 'D', CPU (h_accum
));
955 CASE (sem
, INSN_MULLO
) : /* mullo $src1,$src2 */
957 #define FLD(f) abuf->fields.fmt_15_cmp.f
958 new_pc
= SEM_NEXT_PC (sem_arg
);
960 CPU (h_accum
) = SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (* FLD (f_r1
), 16)), EXTHIDI (TRUNCSIHI (* FLD (f_r2
)))), 16), 16);
961 TRACE_RESULT (current_cpu
, "accum", 'D', CPU (h_accum
));
967 CASE (sem
, INSN_MULWHI
) : /* mulwhi $src1,$src2 */
969 #define FLD(f) abuf->fields.fmt_15_cmp.f
970 new_pc
= SEM_NEXT_PC (sem_arg
);
972 CPU (h_accum
) = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (f_r1
)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (f_r2
), 16)))), 8), 8);
973 TRACE_RESULT (current_cpu
, "accum", 'D', CPU (h_accum
));
979 CASE (sem
, INSN_MULWLO
) : /* mulwlo $src1,$src2 */
981 #define FLD(f) abuf->fields.fmt_15_cmp.f
982 new_pc
= SEM_NEXT_PC (sem_arg
);
984 CPU (h_accum
) = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (f_r1
)), EXTHIDI (TRUNCSIHI (* FLD (f_r2
)))), 8), 8);
985 TRACE_RESULT (current_cpu
, "accum", 'D', CPU (h_accum
));
991 CASE (sem
, INSN_MV
) : /* mv $dr,$sr */
993 #define FLD(f) abuf->fields.fmt_31_mv.f
994 new_pc
= SEM_NEXT_PC (sem_arg
);
996 * FLD (f_r1
) = * FLD (f_r2
);
997 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
1003 CASE (sem
, INSN_MVFACHI
) : /* mvfachi $dr */
1005 #define FLD(f) abuf->fields.fmt_32_mvfachi.f
1006 new_pc
= SEM_NEXT_PC (sem_arg
);
1008 * FLD (f_r1
) = TRUNCDISI (SRADI (CPU (h_accum
), 32));
1009 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
1015 CASE (sem
, INSN_MVFACLO
) : /* mvfaclo $dr */
1017 #define FLD(f) abuf->fields.fmt_32_mvfachi.f
1018 new_pc
= SEM_NEXT_PC (sem_arg
);
1020 * FLD (f_r1
) = TRUNCDISI (CPU (h_accum
));
1021 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
1027 CASE (sem
, INSN_MVFACMI
) : /* mvfacmi $dr */
1029 #define FLD(f) abuf->fields.fmt_32_mvfachi.f
1030 new_pc
= SEM_NEXT_PC (sem_arg
);
1032 * FLD (f_r1
) = TRUNCDISI (SRADI (CPU (h_accum
), 16));
1033 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
1039 CASE (sem
, INSN_MVFC
) : /* mvfc $dr,$scr */
1041 #define FLD(f) abuf->fields.fmt_33_mvfc.f
1042 new_pc
= SEM_NEXT_PC (sem_arg
);
1044 * FLD (f_r1
) = m32r_h_cr_get (current_cpu
, FLD (f_r2
));
1045 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
1051 CASE (sem
, INSN_MVTACHI
) : /* mvtachi $src1 */
1053 #define FLD(f) abuf->fields.fmt_34_mvtachi.f
1054 new_pc
= SEM_NEXT_PC (sem_arg
);
1056 CPU (h_accum
) = ORDI (ANDDI (CPU (h_accum
), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (* FLD (f_r1
)), 32));
1057 TRACE_RESULT (current_cpu
, "accum", 'D', CPU (h_accum
));
1063 CASE (sem
, INSN_MVTACLO
) : /* mvtaclo $src1 */
1065 #define FLD(f) abuf->fields.fmt_34_mvtachi.f
1066 new_pc
= SEM_NEXT_PC (sem_arg
);
1068 CPU (h_accum
) = ORDI (ANDDI (CPU (h_accum
), MAKEDI (0xffffffff, 0)), EXTSIDI (* FLD (f_r1
)));
1069 TRACE_RESULT (current_cpu
, "accum", 'D', CPU (h_accum
));
1075 CASE (sem
, INSN_MVTC
) : /* mvtc $sr,$dcr */
1077 #define FLD(f) abuf->fields.fmt_35_mvtc.f
1078 new_pc
= SEM_NEXT_PC (sem_arg
);
1080 m32r_h_cr_set (current_cpu
, FLD (f_r1
), * FLD (f_r2
));
1081 TRACE_RESULT (current_cpu
, "dcr", 'x', m32r_h_cr_get (current_cpu
, FLD (f_r1
)));
1087 CASE (sem
, INSN_NEG
) : /* neg $dr,$sr */
1089 #define FLD(f) abuf->fields.fmt_31_mv.f
1090 new_pc
= SEM_NEXT_PC (sem_arg
);
1092 * FLD (f_r1
) = NEGSI (* FLD (f_r2
));
1093 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
1099 CASE (sem
, INSN_NOP
) : /* nop */
1101 #define FLD(f) abuf->fields.fmt_36_nop.f
1102 new_pc
= SEM_NEXT_PC (sem_arg
);
1104 PROFILE_COUNT_FILLNOPS (current_cpu
, abuf
->addr
);
1110 CASE (sem
, INSN_NOT
) : /* not $dr,$sr */
1112 #define FLD(f) abuf->fields.fmt_31_mv.f
1113 new_pc
= SEM_NEXT_PC (sem_arg
);
1115 * FLD (f_r1
) = INVSI (* FLD (f_r2
));
1116 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
1122 CASE (sem
, INSN_RAC
) : /* rac */
1124 #define FLD(f) abuf->fields.fmt_37_rac.f
1125 new_pc
= SEM_NEXT_PC (sem_arg
);
1129 tmp_tmp1
= SLLDI (CPU (h_accum
), 1);
1130 tmp_tmp1
= ADDDI (tmp_tmp1
, MAKEDI (0, 32768));
1131 CPU (h_accum
) = (GTDI (tmp_tmp1
, MAKEDI (32767, 0xffff0000))) ? (MAKEDI (32767, 0xffff0000)) : (LTDI (tmp_tmp1
, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1
, MAKEDI (0xffffffff, 0xffff0000)));
1132 TRACE_RESULT (current_cpu
, "accum", 'D', CPU (h_accum
));
1139 CASE (sem
, INSN_RACH
) : /* rach */
1141 #define FLD(f) abuf->fields.fmt_37_rac.f
1142 new_pc
= SEM_NEXT_PC (sem_arg
);
1146 tmp_tmp1
= ANDDI (CPU (h_accum
), MAKEDI (16777215, 0xffffffff));
1147 if (ANDIFSI (GEDI (tmp_tmp1
, MAKEDI (16383, 0x80000000)), LEDI (tmp_tmp1
, MAKEDI (8388607, 0xffffffff)))) {
1148 tmp_tmp1
= MAKEDI (16383, 0x80000000);
1150 if (ANDIFSI (GEDI (tmp_tmp1
, MAKEDI (8388608, 0)), LEDI (tmp_tmp1
, MAKEDI (16760832, 0)))) {
1151 tmp_tmp1
= MAKEDI (16760832, 0);
1153 tmp_tmp1
= ANDDI (ADDDI (CPU (h_accum
), MAKEDI (0, 1073741824)), MAKEDI (0xffffffff, 0x80000000));
1156 tmp_tmp1
= SLLDI (tmp_tmp1
, 1);
1157 CPU (h_accum
) = SRADI (SLLDI (tmp_tmp1
, 7), 7);
1158 TRACE_RESULT (current_cpu
, "accum", 'D', CPU (h_accum
));
1165 CASE (sem
, INSN_RTE
) : /* rte */
1167 #define FLD(f) abuf->fields.fmt_38_rte.f
1168 new_pc
= SEM_NEXT_PC (sem_arg
);
1171 CPU (h_sm
) = CPU (h_bsm
);
1172 TRACE_RESULT (current_cpu
, "h-sm-0", 'x', CPU (h_sm
));
1173 CPU (h_ie
) = CPU (h_bie
);
1174 TRACE_RESULT (current_cpu
, "h-ie-0", 'x', CPU (h_ie
));
1175 CPU (h_cond
) = CPU (h_bcond
);
1176 TRACE_RESULT (current_cpu
, "condbit", 'x', CPU (h_cond
));
1177 BRANCH_NEW_PC (current_cpu
, new_pc
, SEM_BRANCH_VIA_ADDR (sem_arg
, CPU (h_bpc
)));
1178 TRACE_RESULT (current_cpu
, "pc", 'x', CPU (h_pc
));
1185 CASE (sem
, INSN_SETH
) : /* seth $dr,#$hi16 */
1187 #define FLD(f) abuf->fields.fmt_39_seth.f
1188 new_pc
= SEM_NEXT_PC (sem_arg
);
1190 * FLD (f_r1
) = SLLSI (FLD (f_hi16
), 16);
1191 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
1197 CASE (sem
, INSN_SLL
) : /* sll $dr,$sr */
1199 #define FLD(f) abuf->fields.fmt_0_add.f
1200 new_pc
= SEM_NEXT_PC (sem_arg
);
1202 * FLD (f_r1
) = SLLSI (* FLD (f_r1
), ANDSI (* FLD (f_r2
), 31));
1203 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
1209 CASE (sem
, INSN_SLL3
) : /* sll3 $dr,$sr,#$simm16 */
1211 #define FLD(f) abuf->fields.fmt_5_addv3.f
1212 new_pc
= SEM_NEXT_PC (sem_arg
);
1214 * FLD (f_r1
) = SLLSI (* FLD (f_r2
), ANDSI (FLD (f_simm16
), 31));
1215 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
1221 CASE (sem
, INSN_SLLI
) : /* slli $dr,#$uimm5 */
1223 #define FLD(f) abuf->fields.fmt_40_slli.f
1224 new_pc
= SEM_NEXT_PC (sem_arg
);
1226 * FLD (f_r1
) = SLLSI (* FLD (f_r1
), FLD (f_uimm5
));
1227 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
1233 CASE (sem
, INSN_SRA
) : /* sra $dr,$sr */
1235 #define FLD(f) abuf->fields.fmt_0_add.f
1236 new_pc
= SEM_NEXT_PC (sem_arg
);
1238 * FLD (f_r1
) = SRASI (* FLD (f_r1
), ANDSI (* FLD (f_r2
), 31));
1239 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
1245 CASE (sem
, INSN_SRA3
) : /* sra3 $dr,$sr,#$simm16 */
1247 #define FLD(f) abuf->fields.fmt_5_addv3.f
1248 new_pc
= SEM_NEXT_PC (sem_arg
);
1250 * FLD (f_r1
) = SRASI (* FLD (f_r2
), ANDSI (FLD (f_simm16
), 31));
1251 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
1257 CASE (sem
, INSN_SRAI
) : /* srai $dr,#$uimm5 */
1259 #define FLD(f) abuf->fields.fmt_40_slli.f
1260 new_pc
= SEM_NEXT_PC (sem_arg
);
1262 * FLD (f_r1
) = SRASI (* FLD (f_r1
), FLD (f_uimm5
));
1263 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
1269 CASE (sem
, INSN_SRL
) : /* srl $dr,$sr */
1271 #define FLD(f) abuf->fields.fmt_0_add.f
1272 new_pc
= SEM_NEXT_PC (sem_arg
);
1274 * FLD (f_r1
) = SRLSI (* FLD (f_r1
), ANDSI (* FLD (f_r2
), 31));
1275 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
1281 CASE (sem
, INSN_SRL3
) : /* srl3 $dr,$sr,#$simm16 */
1283 #define FLD(f) abuf->fields.fmt_5_addv3.f
1284 new_pc
= SEM_NEXT_PC (sem_arg
);
1286 * FLD (f_r1
) = SRLSI (* FLD (f_r2
), ANDSI (FLD (f_simm16
), 31));
1287 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
1293 CASE (sem
, INSN_SRLI
) : /* srli $dr,#$uimm5 */
1295 #define FLD(f) abuf->fields.fmt_40_slli.f
1296 new_pc
= SEM_NEXT_PC (sem_arg
);
1298 * FLD (f_r1
) = SRLSI (* FLD (f_r1
), FLD (f_uimm5
));
1299 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
1305 CASE (sem
, INSN_ST
) : /* st $src1,@$src2 */
1307 #define FLD(f) abuf->fields.fmt_15_cmp.f
1308 new_pc
= SEM_NEXT_PC (sem_arg
);
1310 SETMEMSI (current_cpu
, * FLD (f_r2
), * FLD (f_r1
));
1311 TRACE_RESULT (current_cpu
, "h-memory-src2", 'x', GETMEMSI (current_cpu
, * FLD (f_r2
)));
1317 CASE (sem
, INSN_ST_D
) : /* st $src1,@($slo16,$src2) */
1319 #define FLD(f) abuf->fields.fmt_41_st_d.f
1320 new_pc
= SEM_NEXT_PC (sem_arg
);
1322 SETMEMSI (current_cpu
, ADDSI (* FLD (f_r2
), FLD (f_simm16
)), * FLD (f_r1
));
1323 TRACE_RESULT (current_cpu
, "h-memory-add-WI-src2-slo16", 'x', GETMEMSI (current_cpu
, ADDSI (* FLD (f_r2
), FLD (f_simm16
))));
1329 CASE (sem
, INSN_STB
) : /* stb $src1,@$src2 */
1331 #define FLD(f) abuf->fields.fmt_15_cmp.f
1332 new_pc
= SEM_NEXT_PC (sem_arg
);
1334 SETMEMQI (current_cpu
, * FLD (f_r2
), * FLD (f_r1
));
1335 TRACE_RESULT (current_cpu
, "h-memory-src2", 'x', GETMEMQI (current_cpu
, * FLD (f_r2
)));
1341 CASE (sem
, INSN_STB_D
) : /* stb $src1,@($slo16,$src2) */
1343 #define FLD(f) abuf->fields.fmt_41_st_d.f
1344 new_pc
= SEM_NEXT_PC (sem_arg
);
1346 SETMEMQI (current_cpu
, ADDSI (* FLD (f_r2
), FLD (f_simm16
)), * FLD (f_r1
));
1347 TRACE_RESULT (current_cpu
, "h-memory-add-WI-src2-slo16", 'x', GETMEMQI (current_cpu
, ADDSI (* FLD (f_r2
), FLD (f_simm16
))));
1353 CASE (sem
, INSN_STH
) : /* sth $src1,@$src2 */
1355 #define FLD(f) abuf->fields.fmt_15_cmp.f
1356 new_pc
= SEM_NEXT_PC (sem_arg
);
1358 SETMEMHI (current_cpu
, * FLD (f_r2
), * FLD (f_r1
));
1359 TRACE_RESULT (current_cpu
, "h-memory-src2", 'x', GETMEMHI (current_cpu
, * FLD (f_r2
)));
1365 CASE (sem
, INSN_STH_D
) : /* sth $src1,@($slo16,$src2) */
1367 #define FLD(f) abuf->fields.fmt_41_st_d.f
1368 new_pc
= SEM_NEXT_PC (sem_arg
);
1370 SETMEMHI (current_cpu
, ADDSI (* FLD (f_r2
), FLD (f_simm16
)), * FLD (f_r1
));
1371 TRACE_RESULT (current_cpu
, "h-memory-add-WI-src2-slo16", 'x', GETMEMHI (current_cpu
, ADDSI (* FLD (f_r2
), FLD (f_simm16
))));
1377 CASE (sem
, INSN_ST_PLUS
) : /* st $src1,@+$src2 */
1379 #define FLD(f) abuf->fields.fmt_15_cmp.f
1380 new_pc
= SEM_NEXT_PC (sem_arg
);
1383 * FLD (f_r2
) = ADDSI (* FLD (f_r2
), 4);
1384 TRACE_RESULT (current_cpu
, "src2", 'x', * FLD (f_r2
));
1385 SETMEMSI (current_cpu
, * FLD (f_r2
), * FLD (f_r1
));
1386 TRACE_RESULT (current_cpu
, "h-memory-src2", 'x', GETMEMSI (current_cpu
, * FLD (f_r2
)));
1393 CASE (sem
, INSN_ST_MINUS
) : /* st $src1,@-$src2 */
1395 #define FLD(f) abuf->fields.fmt_15_cmp.f
1396 new_pc
= SEM_NEXT_PC (sem_arg
);
1399 * FLD (f_r2
) = SUBSI (* FLD (f_r2
), 4);
1400 TRACE_RESULT (current_cpu
, "src2", 'x', * FLD (f_r2
));
1401 SETMEMSI (current_cpu
, * FLD (f_r2
), * FLD (f_r1
));
1402 TRACE_RESULT (current_cpu
, "h-memory-src2", 'x', GETMEMSI (current_cpu
, * FLD (f_r2
)));
1409 CASE (sem
, INSN_SUB
) : /* sub $dr,$sr */
1411 #define FLD(f) abuf->fields.fmt_0_add.f
1412 new_pc
= SEM_NEXT_PC (sem_arg
);
1414 * FLD (f_r1
) = SUBSI (* FLD (f_r1
), * FLD (f_r2
));
1415 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
1421 CASE (sem
, INSN_SUBV
) : /* subv $dr,$sr */
1423 #define FLD(f) abuf->fields.fmt_0_add.f
1424 new_pc
= SEM_NEXT_PC (sem_arg
);
1428 temp0
= SUBSI (* FLD (f_r1
), * FLD (f_r2
));
1429 temp1
= SUBOFSI (* FLD (f_r1
), * FLD (f_r2
), 0);
1430 * FLD (f_r1
) = temp0
;
1431 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
1432 CPU (h_cond
) = temp1
;
1433 TRACE_RESULT (current_cpu
, "condbit", 'x', CPU (h_cond
));
1440 CASE (sem
, INSN_SUBX
) : /* subx $dr,$sr */
1442 #define FLD(f) abuf->fields.fmt_6_addx.f
1443 new_pc
= SEM_NEXT_PC (sem_arg
);
1447 temp0
= SUBCSI (* FLD (f_r1
), * FLD (f_r2
), CPU (h_cond
));
1448 temp1
= SUBCFSI (* FLD (f_r1
), * FLD (f_r2
), CPU (h_cond
));
1449 * FLD (f_r1
) = temp0
;
1450 TRACE_RESULT (current_cpu
, "dr", 'x', * FLD (f_r1
));
1451 CPU (h_cond
) = temp1
;
1452 TRACE_RESULT (current_cpu
, "condbit", 'x', CPU (h_cond
));
1459 CASE (sem
, INSN_TRAP
) : /* trap #$uimm4 */
1461 #define FLD(f) abuf->fields.fmt_42_trap.f
1462 new_pc
= SEM_NEXT_PC (sem_arg
);
1464 do_trap (current_cpu
, FLD (f_uimm4
));
1470 CASE (sem
, INSN_UNLOCK
) : /* unlock $src1,@$src2 */
1472 #define FLD(f) abuf->fields.fmt_15_cmp.f
1473 new_pc
= SEM_NEXT_PC (sem_arg
);
1475 do_unlock (current_cpu
, * FLD (f_r1
), * FLD (f_r2
));
1483 ENDSWITCH (sem
) /* End of semantic switch. */
1488 #endif /* DEFINE_SWITCH */
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