sim/m32r/semx-switch.c

   1 /* Simulator instruction semantics for m32rxf.
   2
   3 THIS FILE IS MACHINE GENERATED WITH CGEN.
   4
   5 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
   6
   7 This file is part of the GNU simulators.
   8
   9 This program is free software; you can redistribute it and/or modify
  10 it under the terms of the GNU General Public License as published by
  11 the Free Software Foundation; either version 3 of the License, or
  12 (at your option) any later version.
  13
  14 This program is distributed in the hope that it will be useful,
  15 but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17 GNU General Public License for more details.
  18
  19 You should have received a copy of the GNU General Public License
  20 along with this program.  If not, see <http://www.gnu.org/licenses/>.
  21
  22 */
  23
  24 #ifdef DEFINE_LABELS
  25
  26   /* The labels have the case they have because the enum of insn types
  27      is all uppercase and in the non-stdc case the insn symbol is built
  28      into the enum name.  */
  29
  30   static struct {
  31     int index;
  32     void *label;
  33   } labels[] = {
  34     { M32RXF_INSN_X_INVALID, && case_sem_INSN_X_INVALID },
  35     { M32RXF_INSN_X_AFTER, && case_sem_INSN_X_AFTER },
  36     { M32RXF_INSN_X_BEFORE, && case_sem_INSN_X_BEFORE },
  37     { M32RXF_INSN_X_CTI_CHAIN, && case_sem_INSN_X_CTI_CHAIN },
  38     { M32RXF_INSN_X_CHAIN, && case_sem_INSN_X_CHAIN },
  39     { M32RXF_INSN_X_BEGIN, && case_sem_INSN_X_BEGIN },
  40     { M32RXF_INSN_ADD, && case_sem_INSN_ADD },
  41     { M32RXF_INSN_ADD3, && case_sem_INSN_ADD3 },
  42     { M32RXF_INSN_AND, && case_sem_INSN_AND },
  43     { M32RXF_INSN_AND3, && case_sem_INSN_AND3 },
  44     { M32RXF_INSN_OR, && case_sem_INSN_OR },
  45     { M32RXF_INSN_OR3, && case_sem_INSN_OR3 },
  46     { M32RXF_INSN_XOR, && case_sem_INSN_XOR },
  47     { M32RXF_INSN_XOR3, && case_sem_INSN_XOR3 },
  48     { M32RXF_INSN_ADDI, && case_sem_INSN_ADDI },
  49     { M32RXF_INSN_ADDV, && case_sem_INSN_ADDV },
  50     { M32RXF_INSN_ADDV3, && case_sem_INSN_ADDV3 },
  51     { M32RXF_INSN_ADDX, && case_sem_INSN_ADDX },
  52     { M32RXF_INSN_BC8, && case_sem_INSN_BC8 },
  53     { M32RXF_INSN_BC24, && case_sem_INSN_BC24 },
  54     { M32RXF_INSN_BEQ, && case_sem_INSN_BEQ },
  55     { M32RXF_INSN_BEQZ, && case_sem_INSN_BEQZ },
  56     { M32RXF_INSN_BGEZ, && case_sem_INSN_BGEZ },
  57     { M32RXF_INSN_BGTZ, && case_sem_INSN_BGTZ },
  58     { M32RXF_INSN_BLEZ, && case_sem_INSN_BLEZ },
  59     { M32RXF_INSN_BLTZ, && case_sem_INSN_BLTZ },
  60     { M32RXF_INSN_BNEZ, && case_sem_INSN_BNEZ },
  61     { M32RXF_INSN_BL8, && case_sem_INSN_BL8 },
  62     { M32RXF_INSN_BL24, && case_sem_INSN_BL24 },
  63     { M32RXF_INSN_BCL8, && case_sem_INSN_BCL8 },
  64     { M32RXF_INSN_BCL24, && case_sem_INSN_BCL24 },
  65     { M32RXF_INSN_BNC8, && case_sem_INSN_BNC8 },
  66     { M32RXF_INSN_BNC24, && case_sem_INSN_BNC24 },
  67     { M32RXF_INSN_BNE, && case_sem_INSN_BNE },
  68     { M32RXF_INSN_BRA8, && case_sem_INSN_BRA8 },
  69     { M32RXF_INSN_BRA24, && case_sem_INSN_BRA24 },
  70     { M32RXF_INSN_BNCL8, && case_sem_INSN_BNCL8 },
  71     { M32RXF_INSN_BNCL24, && case_sem_INSN_BNCL24 },
  72     { M32RXF_INSN_CMP, && case_sem_INSN_CMP },
  73     { M32RXF_INSN_CMPI, && case_sem_INSN_CMPI },
  74     { M32RXF_INSN_CMPU, && case_sem_INSN_CMPU },
  75     { M32RXF_INSN_CMPUI, && case_sem_INSN_CMPUI },
  76     { M32RXF_INSN_CMPEQ, && case_sem_INSN_CMPEQ },
  77     { M32RXF_INSN_CMPZ, && case_sem_INSN_CMPZ },
  78     { M32RXF_INSN_DIV, && case_sem_INSN_DIV },
  79     { M32RXF_INSN_DIVU, && case_sem_INSN_DIVU },
  80     { M32RXF_INSN_REM, && case_sem_INSN_REM },
  81     { M32RXF_INSN_REMU, && case_sem_INSN_REMU },
  82     { M32RXF_INSN_DIVH, && case_sem_INSN_DIVH },
  83     { M32RXF_INSN_JC, && case_sem_INSN_JC },
  84     { M32RXF_INSN_JNC, && case_sem_INSN_JNC },
  85     { M32RXF_INSN_JL, && case_sem_INSN_JL },
  86     { M32RXF_INSN_JMP, && case_sem_INSN_JMP },
  87     { M32RXF_INSN_LD, && case_sem_INSN_LD },
  88     { M32RXF_INSN_LD_D, && case_sem_INSN_LD_D },
  89     { M32RXF_INSN_LDB, && case_sem_INSN_LDB },
  90     { M32RXF_INSN_LDB_D, && case_sem_INSN_LDB_D },
  91     { M32RXF_INSN_LDH, && case_sem_INSN_LDH },
  92     { M32RXF_INSN_LDH_D, && case_sem_INSN_LDH_D },
  93     { M32RXF_INSN_LDUB, && case_sem_INSN_LDUB },
  94     { M32RXF_INSN_LDUB_D, && case_sem_INSN_LDUB_D },
  95     { M32RXF_INSN_LDUH, && case_sem_INSN_LDUH },
  96     { M32RXF_INSN_LDUH_D, && case_sem_INSN_LDUH_D },
  97     { M32RXF_INSN_LD_PLUS, && case_sem_INSN_LD_PLUS },
  98     { M32RXF_INSN_LD24, && case_sem_INSN_LD24 },
  99     { M32RXF_INSN_LDI8, && case_sem_INSN_LDI8 },
 100     { M32RXF_INSN_LDI16, && case_sem_INSN_LDI16 },
 101     { M32RXF_INSN_LOCK, && case_sem_INSN_LOCK },
 102     { M32RXF_INSN_MACHI_A, && case_sem_INSN_MACHI_A },
 103     { M32RXF_INSN_MACLO_A, && case_sem_INSN_MACLO_A },
 104     { M32RXF_INSN_MACWHI_A, && case_sem_INSN_MACWHI_A },
 105     { M32RXF_INSN_MACWLO_A, && case_sem_INSN_MACWLO_A },
 106     { M32RXF_INSN_MUL, && case_sem_INSN_MUL },
 107     { M32RXF_INSN_MULHI_A, && case_sem_INSN_MULHI_A },
 108     { M32RXF_INSN_MULLO_A, && case_sem_INSN_MULLO_A },
 109     { M32RXF_INSN_MULWHI_A, && case_sem_INSN_MULWHI_A },
 110     { M32RXF_INSN_MULWLO_A, && case_sem_INSN_MULWLO_A },
 111     { M32RXF_INSN_MV, && case_sem_INSN_MV },
 112     { M32RXF_INSN_MVFACHI_A, && case_sem_INSN_MVFACHI_A },
 113     { M32RXF_INSN_MVFACLO_A, && case_sem_INSN_MVFACLO_A },
 114     { M32RXF_INSN_MVFACMI_A, && case_sem_INSN_MVFACMI_A },
 115     { M32RXF_INSN_MVFC, && case_sem_INSN_MVFC },
 116     { M32RXF_INSN_MVTACHI_A, && case_sem_INSN_MVTACHI_A },
 117     { M32RXF_INSN_MVTACLO_A, && case_sem_INSN_MVTACLO_A },
 118     { M32RXF_INSN_MVTC, && case_sem_INSN_MVTC },
 119     { M32RXF_INSN_NEG, && case_sem_INSN_NEG },
 120     { M32RXF_INSN_NOP, && case_sem_INSN_NOP },
 121     { M32RXF_INSN_NOT, && case_sem_INSN_NOT },
 122     { M32RXF_INSN_RAC_DSI, && case_sem_INSN_RAC_DSI },
 123     { M32RXF_INSN_RACH_DSI, && case_sem_INSN_RACH_DSI },
 124     { M32RXF_INSN_RTE, && case_sem_INSN_RTE },
 125     { M32RXF_INSN_SETH, && case_sem_INSN_SETH },
 126     { M32RXF_INSN_SLL, && case_sem_INSN_SLL },
 127     { M32RXF_INSN_SLL3, && case_sem_INSN_SLL3 },
 128     { M32RXF_INSN_SLLI, && case_sem_INSN_SLLI },
 129     { M32RXF_INSN_SRA, && case_sem_INSN_SRA },
 130     { M32RXF_INSN_SRA3, && case_sem_INSN_SRA3 },
 131     { M32RXF_INSN_SRAI, && case_sem_INSN_SRAI },
 132     { M32RXF_INSN_SRL, && case_sem_INSN_SRL },
 133     { M32RXF_INSN_SRL3, && case_sem_INSN_SRL3 },
 134     { M32RXF_INSN_SRLI, && case_sem_INSN_SRLI },
 135     { M32RXF_INSN_ST, && case_sem_INSN_ST },
 136     { M32RXF_INSN_ST_D, && case_sem_INSN_ST_D },
 137     { M32RXF_INSN_STB, && case_sem_INSN_STB },
 138     { M32RXF_INSN_STB_D, && case_sem_INSN_STB_D },
 139     { M32RXF_INSN_STH, && case_sem_INSN_STH },
 140     { M32RXF_INSN_STH_D, && case_sem_INSN_STH_D },
 141     { M32RXF_INSN_ST_PLUS, && case_sem_INSN_ST_PLUS },
 142     { M32RXF_INSN_STH_PLUS, && case_sem_INSN_STH_PLUS },
 143     { M32RXF_INSN_STB_PLUS, && case_sem_INSN_STB_PLUS },
 144     { M32RXF_INSN_ST_MINUS, && case_sem_INSN_ST_MINUS },
 145     { M32RXF_INSN_SUB, && case_sem_INSN_SUB },
 146     { M32RXF_INSN_SUBV, && case_sem_INSN_SUBV },
 147     { M32RXF_INSN_SUBX, && case_sem_INSN_SUBX },
 148     { M32RXF_INSN_TRAP, && case_sem_INSN_TRAP },
 149     { M32RXF_INSN_UNLOCK, && case_sem_INSN_UNLOCK },
 150     { M32RXF_INSN_SATB, && case_sem_INSN_SATB },
 151     { M32RXF_INSN_SATH, && case_sem_INSN_SATH },
 152     { M32RXF_INSN_SAT, && case_sem_INSN_SAT },
 153     { M32RXF_INSN_PCMPBZ, && case_sem_INSN_PCMPBZ },
 154     { M32RXF_INSN_SADD, && case_sem_INSN_SADD },
 155     { M32RXF_INSN_MACWU1, && case_sem_INSN_MACWU1 },
 156     { M32RXF_INSN_MSBLO, && case_sem_INSN_MSBLO },
 157     { M32RXF_INSN_MULWU1, && case_sem_INSN_MULWU1 },
 158     { M32RXF_INSN_MACLH1, && case_sem_INSN_MACLH1 },
 159     { M32RXF_INSN_SC, && case_sem_INSN_SC },
 160     { M32RXF_INSN_SNC, && case_sem_INSN_SNC },
 161     { M32RXF_INSN_CLRPSW, && case_sem_INSN_CLRPSW },
 162     { M32RXF_INSN_SETPSW, && case_sem_INSN_SETPSW },
 163     { M32RXF_INSN_BSET, && case_sem_INSN_BSET },
 164     { M32RXF_INSN_BCLR, && case_sem_INSN_BCLR },
 165     { M32RXF_INSN_BTST, && case_sem_INSN_BTST },
 166     { M32RXF_INSN_PAR_ADD, && case_sem_INSN_PAR_ADD },
 167     { M32RXF_INSN_WRITE_ADD, && case_sem_INSN_WRITE_ADD },
 168     { M32RXF_INSN_PAR_AND, && case_sem_INSN_PAR_AND },
 169     { M32RXF_INSN_WRITE_AND, && case_sem_INSN_WRITE_AND },
 170     { M32RXF_INSN_PAR_OR, && case_sem_INSN_PAR_OR },
 171     { M32RXF_INSN_WRITE_OR, && case_sem_INSN_WRITE_OR },
 172     { M32RXF_INSN_PAR_XOR, && case_sem_INSN_PAR_XOR },
 173     { M32RXF_INSN_WRITE_XOR, && case_sem_INSN_WRITE_XOR },
 174     { M32RXF_INSN_PAR_ADDI, && case_sem_INSN_PAR_ADDI },
 175     { M32RXF_INSN_WRITE_ADDI, && case_sem_INSN_WRITE_ADDI },
 176     { M32RXF_INSN_PAR_ADDV, && case_sem_INSN_PAR_ADDV },
 177     { M32RXF_INSN_WRITE_ADDV, && case_sem_INSN_WRITE_ADDV },
 178     { M32RXF_INSN_PAR_ADDX, && case_sem_INSN_PAR_ADDX },
 179     { M32RXF_INSN_WRITE_ADDX, && case_sem_INSN_WRITE_ADDX },
 180     { M32RXF_INSN_PAR_BC8, && case_sem_INSN_PAR_BC8 },
 181     { M32RXF_INSN_WRITE_BC8, && case_sem_INSN_WRITE_BC8 },
 182     { M32RXF_INSN_PAR_BL8, && case_sem_INSN_PAR_BL8 },
 183     { M32RXF_INSN_WRITE_BL8, && case_sem_INSN_WRITE_BL8 },
 184     { M32RXF_INSN_PAR_BCL8, && case_sem_INSN_PAR_BCL8 },
 185     { M32RXF_INSN_WRITE_BCL8, && case_sem_INSN_WRITE_BCL8 },
 186     { M32RXF_INSN_PAR_BNC8, && case_sem_INSN_PAR_BNC8 },
 187     { M32RXF_INSN_WRITE_BNC8, && case_sem_INSN_WRITE_BNC8 },
 188     { M32RXF_INSN_PAR_BRA8, && case_sem_INSN_PAR_BRA8 },
 189     { M32RXF_INSN_WRITE_BRA8, && case_sem_INSN_WRITE_BRA8 },
 190     { M32RXF_INSN_PAR_BNCL8, && case_sem_INSN_PAR_BNCL8 },
 191     { M32RXF_INSN_WRITE_BNCL8, && case_sem_INSN_WRITE_BNCL8 },
 192     { M32RXF_INSN_PAR_CMP, && case_sem_INSN_PAR_CMP },
 193     { M32RXF_INSN_WRITE_CMP, && case_sem_INSN_WRITE_CMP },
 194     { M32RXF_INSN_PAR_CMPU, && case_sem_INSN_PAR_CMPU },
 195     { M32RXF_INSN_WRITE_CMPU, && case_sem_INSN_WRITE_CMPU },
 196     { M32RXF_INSN_PAR_CMPEQ, && case_sem_INSN_PAR_CMPEQ },
 197     { M32RXF_INSN_WRITE_CMPEQ, && case_sem_INSN_WRITE_CMPEQ },
 198     { M32RXF_INSN_PAR_CMPZ, && case_sem_INSN_PAR_CMPZ },
 199     { M32RXF_INSN_WRITE_CMPZ, && case_sem_INSN_WRITE_CMPZ },
 200     { M32RXF_INSN_PAR_JC, && case_sem_INSN_PAR_JC },
 201     { M32RXF_INSN_WRITE_JC, && case_sem_INSN_WRITE_JC },
 202     { M32RXF_INSN_PAR_JNC, && case_sem_INSN_PAR_JNC },
 203     { M32RXF_INSN_WRITE_JNC, && case_sem_INSN_WRITE_JNC },
 204     { M32RXF_INSN_PAR_JL, && case_sem_INSN_PAR_JL },
 205     { M32RXF_INSN_WRITE_JL, && case_sem_INSN_WRITE_JL },
 206     { M32RXF_INSN_PAR_JMP, && case_sem_INSN_PAR_JMP },
 207     { M32RXF_INSN_WRITE_JMP, && case_sem_INSN_WRITE_JMP },
 208     { M32RXF_INSN_PAR_LD, && case_sem_INSN_PAR_LD },
 209     { M32RXF_INSN_WRITE_LD, && case_sem_INSN_WRITE_LD },
 210     { M32RXF_INSN_PAR_LDB, && case_sem_INSN_PAR_LDB },
 211     { M32RXF_INSN_WRITE_LDB, && case_sem_INSN_WRITE_LDB },
 212     { M32RXF_INSN_PAR_LDH, && case_sem_INSN_PAR_LDH },
 213     { M32RXF_INSN_WRITE_LDH, && case_sem_INSN_WRITE_LDH },
 214     { M32RXF_INSN_PAR_LDUB, && case_sem_INSN_PAR_LDUB },
 215     { M32RXF_INSN_WRITE_LDUB, && case_sem_INSN_WRITE_LDUB },
 216     { M32RXF_INSN_PAR_LDUH, && case_sem_INSN_PAR_LDUH },
 217     { M32RXF_INSN_WRITE_LDUH, && case_sem_INSN_WRITE_LDUH },
 218     { M32RXF_INSN_PAR_LD_PLUS, && case_sem_INSN_PAR_LD_PLUS },
 219     { M32RXF_INSN_WRITE_LD_PLUS, && case_sem_INSN_WRITE_LD_PLUS },
 220     { M32RXF_INSN_PAR_LDI8, && case_sem_INSN_PAR_LDI8 },
 221     { M32RXF_INSN_WRITE_LDI8, && case_sem_INSN_WRITE_LDI8 },
 222     { M32RXF_INSN_PAR_LOCK, && case_sem_INSN_PAR_LOCK },
 223     { M32RXF_INSN_WRITE_LOCK, && case_sem_INSN_WRITE_LOCK },
 224     { M32RXF_INSN_PAR_MACHI_A, && case_sem_INSN_PAR_MACHI_A },
 225     { M32RXF_INSN_WRITE_MACHI_A, && case_sem_INSN_WRITE_MACHI_A },
 226     { M32RXF_INSN_PAR_MACLO_A, && case_sem_INSN_PAR_MACLO_A },
 227     { M32RXF_INSN_WRITE_MACLO_A, && case_sem_INSN_WRITE_MACLO_A },
 228     { M32RXF_INSN_PAR_MACWHI_A, && case_sem_INSN_PAR_MACWHI_A },
 229     { M32RXF_INSN_WRITE_MACWHI_A, && case_sem_INSN_WRITE_MACWHI_A },
 230     { M32RXF_INSN_PAR_MACWLO_A, && case_sem_INSN_PAR_MACWLO_A },
 231     { M32RXF_INSN_WRITE_MACWLO_A, && case_sem_INSN_WRITE_MACWLO_A },
 232     { M32RXF_INSN_PAR_MUL, && case_sem_INSN_PAR_MUL },
 233     { M32RXF_INSN_WRITE_MUL, && case_sem_INSN_WRITE_MUL },
 234     { M32RXF_INSN_PAR_MULHI_A, && case_sem_INSN_PAR_MULHI_A },
 235     { M32RXF_INSN_WRITE_MULHI_A, && case_sem_INSN_WRITE_MULHI_A },
 236     { M32RXF_INSN_PAR_MULLO_A, && case_sem_INSN_PAR_MULLO_A },
 237     { M32RXF_INSN_WRITE_MULLO_A, && case_sem_INSN_WRITE_MULLO_A },
 238     { M32RXF_INSN_PAR_MULWHI_A, && case_sem_INSN_PAR_MULWHI_A },
 239     { M32RXF_INSN_WRITE_MULWHI_A, && case_sem_INSN_WRITE_MULWHI_A },
 240     { M32RXF_INSN_PAR_MULWLO_A, && case_sem_INSN_PAR_MULWLO_A },
 241     { M32RXF_INSN_WRITE_MULWLO_A, && case_sem_INSN_WRITE_MULWLO_A },
 242     { M32RXF_INSN_PAR_MV, && case_sem_INSN_PAR_MV },
 243     { M32RXF_INSN_WRITE_MV, && case_sem_INSN_WRITE_MV },
 244     { M32RXF_INSN_PAR_MVFACHI_A, && case_sem_INSN_PAR_MVFACHI_A },
 245     { M32RXF_INSN_WRITE_MVFACHI_A, && case_sem_INSN_WRITE_MVFACHI_A },
 246     { M32RXF_INSN_PAR_MVFACLO_A, && case_sem_INSN_PAR_MVFACLO_A },
 247     { M32RXF_INSN_WRITE_MVFACLO_A, && case_sem_INSN_WRITE_MVFACLO_A },
 248     { M32RXF_INSN_PAR_MVFACMI_A, && case_sem_INSN_PAR_MVFACMI_A },
 249     { M32RXF_INSN_WRITE_MVFACMI_A, && case_sem_INSN_WRITE_MVFACMI_A },
 250     { M32RXF_INSN_PAR_MVFC, && case_sem_INSN_PAR_MVFC },
 251     { M32RXF_INSN_WRITE_MVFC, && case_sem_INSN_WRITE_MVFC },
 252     { M32RXF_INSN_PAR_MVTACHI_A, && case_sem_INSN_PAR_MVTACHI_A },
 253     { M32RXF_INSN_WRITE_MVTACHI_A, && case_sem_INSN_WRITE_MVTACHI_A },
 254     { M32RXF_INSN_PAR_MVTACLO_A, && case_sem_INSN_PAR_MVTACLO_A },
 255     { M32RXF_INSN_WRITE_MVTACLO_A, && case_sem_INSN_WRITE_MVTACLO_A },
 256     { M32RXF_INSN_PAR_MVTC, && case_sem_INSN_PAR_MVTC },
 257     { M32RXF_INSN_WRITE_MVTC, && case_sem_INSN_WRITE_MVTC },
 258     { M32RXF_INSN_PAR_NEG, && case_sem_INSN_PAR_NEG },
 259     { M32RXF_INSN_WRITE_NEG, && case_sem_INSN_WRITE_NEG },
 260     { M32RXF_INSN_PAR_NOP, && case_sem_INSN_PAR_NOP },
 261     { M32RXF_INSN_WRITE_NOP, && case_sem_INSN_WRITE_NOP },
 262     { M32RXF_INSN_PAR_NOT, && case_sem_INSN_PAR_NOT },
 263     { M32RXF_INSN_WRITE_NOT, && case_sem_INSN_WRITE_NOT },
 264     { M32RXF_INSN_PAR_RAC_DSI, && case_sem_INSN_PAR_RAC_DSI },
 265     { M32RXF_INSN_WRITE_RAC_DSI, && case_sem_INSN_WRITE_RAC_DSI },
 266     { M32RXF_INSN_PAR_RACH_DSI, && case_sem_INSN_PAR_RACH_DSI },
 267     { M32RXF_INSN_WRITE_RACH_DSI, && case_sem_INSN_WRITE_RACH_DSI },
 268     { M32RXF_INSN_PAR_RTE, && case_sem_INSN_PAR_RTE },
 269     { M32RXF_INSN_WRITE_RTE, && case_sem_INSN_WRITE_RTE },
 270     { M32RXF_INSN_PAR_SLL, && case_sem_INSN_PAR_SLL },
 271     { M32RXF_INSN_WRITE_SLL, && case_sem_INSN_WRITE_SLL },
 272     { M32RXF_INSN_PAR_SLLI, && case_sem_INSN_PAR_SLLI },
 273     { M32RXF_INSN_WRITE_SLLI, && case_sem_INSN_WRITE_SLLI },
 274     { M32RXF_INSN_PAR_SRA, && case_sem_INSN_PAR_SRA },
 275     { M32RXF_INSN_WRITE_SRA, && case_sem_INSN_WRITE_SRA },
 276     { M32RXF_INSN_PAR_SRAI, && case_sem_INSN_PAR_SRAI },
 277     { M32RXF_INSN_WRITE_SRAI, && case_sem_INSN_WRITE_SRAI },
 278     { M32RXF_INSN_PAR_SRL, && case_sem_INSN_PAR_SRL },
 279     { M32RXF_INSN_WRITE_SRL, && case_sem_INSN_WRITE_SRL },
 280     { M32RXF_INSN_PAR_SRLI, && case_sem_INSN_PAR_SRLI },
 281     { M32RXF_INSN_WRITE_SRLI, && case_sem_INSN_WRITE_SRLI },
 282     { M32RXF_INSN_PAR_ST, && case_sem_INSN_PAR_ST },
 283     { M32RXF_INSN_WRITE_ST, && case_sem_INSN_WRITE_ST },
 284     { M32RXF_INSN_PAR_STB, && case_sem_INSN_PAR_STB },
 285     { M32RXF_INSN_WRITE_STB, && case_sem_INSN_WRITE_STB },
 286     { M32RXF_INSN_PAR_STH, && case_sem_INSN_PAR_STH },
 287     { M32RXF_INSN_WRITE_STH, && case_sem_INSN_WRITE_STH },
 288     { M32RXF_INSN_PAR_ST_PLUS, && case_sem_INSN_PAR_ST_PLUS },
 289     { M32RXF_INSN_WRITE_ST_PLUS, && case_sem_INSN_WRITE_ST_PLUS },
 290     { M32RXF_INSN_PAR_STH_PLUS, && case_sem_INSN_PAR_STH_PLUS },
 291     { M32RXF_INSN_WRITE_STH_PLUS, && case_sem_INSN_WRITE_STH_PLUS },
 292     { M32RXF_INSN_PAR_STB_PLUS, && case_sem_INSN_PAR_STB_PLUS },
 293     { M32RXF_INSN_WRITE_STB_PLUS, && case_sem_INSN_WRITE_STB_PLUS },
 294     { M32RXF_INSN_PAR_ST_MINUS, && case_sem_INSN_PAR_ST_MINUS },
 295     { M32RXF_INSN_WRITE_ST_MINUS, && case_sem_INSN_WRITE_ST_MINUS },
 296     { M32RXF_INSN_PAR_SUB, && case_sem_INSN_PAR_SUB },
 297     { M32RXF_INSN_WRITE_SUB, && case_sem_INSN_WRITE_SUB },
 298     { M32RXF_INSN_PAR_SUBV, && case_sem_INSN_PAR_SUBV },
 299     { M32RXF_INSN_WRITE_SUBV, && case_sem_INSN_WRITE_SUBV },
 300     { M32RXF_INSN_PAR_SUBX, && case_sem_INSN_PAR_SUBX },
 301     { M32RXF_INSN_WRITE_SUBX, && case_sem_INSN_WRITE_SUBX },
 302     { M32RXF_INSN_PAR_TRAP, && case_sem_INSN_PAR_TRAP },
 303     { M32RXF_INSN_WRITE_TRAP, && case_sem_INSN_WRITE_TRAP },
 304     { M32RXF_INSN_PAR_UNLOCK, && case_sem_INSN_PAR_UNLOCK },
 305     { M32RXF_INSN_WRITE_UNLOCK, && case_sem_INSN_WRITE_UNLOCK },
 306     { M32RXF_INSN_PAR_PCMPBZ, && case_sem_INSN_PAR_PCMPBZ },
 307     { M32RXF_INSN_WRITE_PCMPBZ, && case_sem_INSN_WRITE_PCMPBZ },
 308     { M32RXF_INSN_PAR_SADD, && case_sem_INSN_PAR_SADD },
 309     { M32RXF_INSN_WRITE_SADD, && case_sem_INSN_WRITE_SADD },
 310     { M32RXF_INSN_PAR_MACWU1, && case_sem_INSN_PAR_MACWU1 },
 311     { M32RXF_INSN_WRITE_MACWU1, && case_sem_INSN_WRITE_MACWU1 },
 312     { M32RXF_INSN_PAR_MSBLO, && case_sem_INSN_PAR_MSBLO },
 313     { M32RXF_INSN_WRITE_MSBLO, && case_sem_INSN_WRITE_MSBLO },
 314     { M32RXF_INSN_PAR_MULWU1, && case_sem_INSN_PAR_MULWU1 },
 315     { M32RXF_INSN_WRITE_MULWU1, && case_sem_INSN_WRITE_MULWU1 },
 316     { M32RXF_INSN_PAR_MACLH1, && case_sem_INSN_PAR_MACLH1 },
 317     { M32RXF_INSN_WRITE_MACLH1, && case_sem_INSN_WRITE_MACLH1 },
 318     { M32RXF_INSN_PAR_SC, && case_sem_INSN_PAR_SC },
 319     { M32RXF_INSN_WRITE_SC, && case_sem_INSN_WRITE_SC },
 320     { M32RXF_INSN_PAR_SNC, && case_sem_INSN_PAR_SNC },
 321     { M32RXF_INSN_WRITE_SNC, && case_sem_INSN_WRITE_SNC },
 322     { M32RXF_INSN_PAR_CLRPSW, && case_sem_INSN_PAR_CLRPSW },
 323     { M32RXF_INSN_WRITE_CLRPSW, && case_sem_INSN_WRITE_CLRPSW },
 324     { M32RXF_INSN_PAR_SETPSW, && case_sem_INSN_PAR_SETPSW },
 325     { M32RXF_INSN_WRITE_SETPSW, && case_sem_INSN_WRITE_SETPSW },
 326     { M32RXF_INSN_PAR_BTST, && case_sem_INSN_PAR_BTST },
 327     { M32RXF_INSN_WRITE_BTST, && case_sem_INSN_WRITE_BTST },
 328     { 0, 0 }
 329   };
 330   int i;
 331
 332   for (i = 0; labels[i].label != 0; ++i)
 333     {
 334 #if FAST_P
 335       CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label;
 336 #else
 337       CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label;
 338 #endif
 339     }
 340
 341 #undef DEFINE_LABELS
 342 #endif /* DEFINE_LABELS */
 343
 344 #ifdef DEFINE_SWITCH
 345
 346 /* If hyper-fast [well not unnecessarily slow] execution is selected, turn
 347    off frills like tracing and profiling.  */
 348 /* FIXME: A better way would be to have TRACE_RESULT check for something
 349    that can cause it to be optimized out.  Another way would be to emit
 350    special handlers into the instruction "stream".  */
 351
 352 #if FAST_P
 353 #undef TRACE_RESULT
 354 #define TRACE_RESULT(cpu, abuf, name, type, val)
 355 #endif
 356
 357 #undef GET_ATTR
 358 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 359 #define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr)
 360 #else
 361 #define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_/**/attr)
 362 #endif
 363
 364 {
 365
 366 #if WITH_SCACHE_PBB
 367
 368 /* Branch to next handler without going around main loop.  */
 369 #define NEXT(vpc) goto * SEM_ARGBUF (vpc) -> semantic.sem_case
 370 SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 371
 372 #else /* ! WITH_SCACHE_PBB */
 373
 374 #define NEXT(vpc) BREAK (sem)
 375 #ifdef __GNUC__
 376 #if FAST_P
 377   SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_fast_lab)
 378 #else
 379   SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_full_lab)
 380 #endif
 381 #else
 382   SWITCH (sem, SEM_ARGBUF (sc) -> idesc->num)
 383 #endif
 384
 385 #endif /* ! WITH_SCACHE_PBB */
 386
 387     {
 388
 389   CASE (sem, INSN_X_INVALID) : /* --invalid-- */
 390 {
 391   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 392   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 393 #define FLD(f) abuf->fields.fmt_empty.f
 394   int UNUSED written = 0;
 395   IADDR UNUSED pc = abuf->addr;
 396   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 397
 398   {
 399     /* Update the recorded pc in the cpu state struct.
 400        Only necessary for WITH_SCACHE case, but to avoid the
 401        conditional compilation ....  */
 402     SET_H_PC (pc);
 403     /* Virtual insns have zero size.  Overwrite vpc with address of next insn
 404        using the default-insn-bitsize spec.  When executing insns in parallel
 405        we may want to queue the fault and continue execution.  */
 406     vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 407     vpc = sim_engine_invalid_insn (current_cpu, pc, vpc);
 408   }
 409
 410 #undef FLD
 411 }
 412   NEXT (vpc);
 413
 414   CASE (sem, INSN_X_AFTER) : /* --after-- */
 415 {
 416   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 417   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 418 #define FLD(f) abuf->fields.fmt_empty.f
 419   int UNUSED written = 0;
 420   IADDR UNUSED pc = abuf->addr;
 421   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 422
 423   {
 424 #if WITH_SCACHE_PBB_M32RXF
 425     m32rxf_pbb_after (current_cpu, sem_arg);
 426 #endif
 427   }
 428
 429 #undef FLD
 430 }
 431   NEXT (vpc);
 432
 433   CASE (sem, INSN_X_BEFORE) : /* --before-- */
 434 {
 435   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 436   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 437 #define FLD(f) abuf->fields.fmt_empty.f
 438   int UNUSED written = 0;
 439   IADDR UNUSED pc = abuf->addr;
 440   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 441
 442   {
 443 #if WITH_SCACHE_PBB_M32RXF
 444     m32rxf_pbb_before (current_cpu, sem_arg);
 445 #endif
 446   }
 447
 448 #undef FLD
 449 }
 450   NEXT (vpc);
 451
 452   CASE (sem, INSN_X_CTI_CHAIN) : /* --cti-chain-- */
 453 {
 454   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 455   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 456 #define FLD(f) abuf->fields.fmt_empty.f
 457   int UNUSED written = 0;
 458   IADDR UNUSED pc = abuf->addr;
 459   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 460
 461   {
 462 #if WITH_SCACHE_PBB_M32RXF
 463 #ifdef DEFINE_SWITCH
 464     vpc = m32rxf_pbb_cti_chain (current_cpu, sem_arg,
 465                                pbb_br_type, pbb_br_npc);
 466     BREAK (sem);
 467 #else
 468     /* FIXME: Allow provision of explicit ifmt spec in insn spec.  */
 469     vpc = m32rxf_pbb_cti_chain (current_cpu, sem_arg,
 470                                CPU_PBB_BR_TYPE (current_cpu),
 471                                CPU_PBB_BR_NPC (current_cpu));
 472 #endif
 473 #endif
 474   }
 475
 476 #undef FLD
 477 }
 478   NEXT (vpc);
 479
 480   CASE (sem, INSN_X_CHAIN) : /* --chain-- */
 481 {
 482   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 483   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 484 #define FLD(f) abuf->fields.fmt_empty.f
 485   int UNUSED written = 0;
 486   IADDR UNUSED pc = abuf->addr;
 487   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 488
 489   {
 490 #if WITH_SCACHE_PBB_M32RXF
 491     vpc = m32rxf_pbb_chain (current_cpu, sem_arg);
 492 #ifdef DEFINE_SWITCH
 493     BREAK (sem);
 494 #endif
 495 #endif
 496   }
 497
 498 #undef FLD
 499 }
 500   NEXT (vpc);
 501
 502   CASE (sem, INSN_X_BEGIN) : /* --begin-- */
 503 {
 504   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 505   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 506 #define FLD(f) abuf->fields.fmt_empty.f
 507   int UNUSED written = 0;
 508   IADDR UNUSED pc = abuf->addr;
 509   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 510
 511   {
 512 #if WITH_SCACHE_PBB_M32RXF
 513 #if defined DEFINE_SWITCH || defined FAST_P
 514     /* In the switch case FAST_P is a constant, allowing several optimizations
 515        in any called inline functions.  */
 516     vpc = m32rxf_pbb_begin (current_cpu, FAST_P);
 517 #else
 518 #if 0 /* cgen engine can't handle dynamic fast/full switching yet.  */
 519     vpc = m32rxf_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu)));
 520 #else
 521     vpc = m32rxf_pbb_begin (current_cpu, 0);
 522 #endif
 523 #endif
 524 #endif
 525   }
 526
 527 #undef FLD
 528 }
 529   NEXT (vpc);
 530
 531   CASE (sem, INSN_ADD) : /* add $dr,$sr */
 532 {
 533   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 534   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 535 #define FLD(f) abuf->fields.sfmt_add.f
 536   int UNUSED written = 0;
 537   IADDR UNUSED pc = abuf->addr;
 538   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 539
 540   {
 541     SI opval = ADDSI (* FLD (i_dr), * FLD (i_sr));
 542     * FLD (i_dr) = opval;
 543     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 544   }
 545
 546 #undef FLD
 547 }
 548   NEXT (vpc);
 549
 550   CASE (sem, INSN_ADD3) : /* add3 $dr,$sr,$hash$slo16 */
 551 {
 552   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 553   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 554 #define FLD(f) abuf->fields.sfmt_add3.f
 555   int UNUSED written = 0;
 556   IADDR UNUSED pc = abuf->addr;
 557   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 558
 559   {
 560     SI opval = ADDSI (* FLD (i_sr), FLD (f_simm16));
 561     * FLD (i_dr) = opval;
 562     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 563   }
 564
 565 #undef FLD
 566 }
 567   NEXT (vpc);
 568
 569   CASE (sem, INSN_AND) : /* and $dr,$sr */
 570 {
 571   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 572   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 573 #define FLD(f) abuf->fields.sfmt_add.f
 574   int UNUSED written = 0;
 575   IADDR UNUSED pc = abuf->addr;
 576   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 577
 578   {
 579     SI opval = ANDSI (* FLD (i_dr), * FLD (i_sr));
 580     * FLD (i_dr) = opval;
 581     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 582   }
 583
 584 #undef FLD
 585 }
 586   NEXT (vpc);
 587
 588   CASE (sem, INSN_AND3) : /* and3 $dr,$sr,$uimm16 */
 589 {
 590   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 591   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 592 #define FLD(f) abuf->fields.sfmt_and3.f
 593   int UNUSED written = 0;
 594   IADDR UNUSED pc = abuf->addr;
 595   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 596
 597   {
 598     SI opval = ANDSI (* FLD (i_sr), FLD (f_uimm16));
 599     * FLD (i_dr) = opval;
 600     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 601   }
 602
 603 #undef FLD
 604 }
 605   NEXT (vpc);
 606
 607   CASE (sem, INSN_OR) : /* or $dr,$sr */
 608 {
 609   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 610   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 611 #define FLD(f) abuf->fields.sfmt_add.f
 612   int UNUSED written = 0;
 613   IADDR UNUSED pc = abuf->addr;
 614   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 615
 616   {
 617     SI opval = ORSI (* FLD (i_dr), * FLD (i_sr));
 618     * FLD (i_dr) = opval;
 619     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 620   }
 621
 622 #undef FLD
 623 }
 624   NEXT (vpc);
 625
 626   CASE (sem, INSN_OR3) : /* or3 $dr,$sr,$hash$ulo16 */
 627 {
 628   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 629   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 630 #define FLD(f) abuf->fields.sfmt_and3.f
 631   int UNUSED written = 0;
 632   IADDR UNUSED pc = abuf->addr;
 633   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 634
 635   {
 636     SI opval = ORSI (* FLD (i_sr), FLD (f_uimm16));
 637     * FLD (i_dr) = opval;
 638     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 639   }
 640
 641 #undef FLD
 642 }
 643   NEXT (vpc);
 644
 645   CASE (sem, INSN_XOR) : /* xor $dr,$sr */
 646 {
 647   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 648   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 649 #define FLD(f) abuf->fields.sfmt_add.f
 650   int UNUSED written = 0;
 651   IADDR UNUSED pc = abuf->addr;
 652   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 653
 654   {
 655     SI opval = XORSI (* FLD (i_dr), * FLD (i_sr));
 656     * FLD (i_dr) = opval;
 657     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 658   }
 659
 660 #undef FLD
 661 }
 662   NEXT (vpc);
 663
 664   CASE (sem, INSN_XOR3) : /* xor3 $dr,$sr,$uimm16 */
 665 {
 666   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 667   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 668 #define FLD(f) abuf->fields.sfmt_and3.f
 669   int UNUSED written = 0;
 670   IADDR UNUSED pc = abuf->addr;
 671   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 672
 673   {
 674     SI opval = XORSI (* FLD (i_sr), FLD (f_uimm16));
 675     * FLD (i_dr) = opval;
 676     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 677   }
 678
 679 #undef FLD
 680 }
 681   NEXT (vpc);
 682
 683   CASE (sem, INSN_ADDI) : /* addi $dr,$simm8 */
 684 {
 685   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 686   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 687 #define FLD(f) abuf->fields.sfmt_addi.f
 688   int UNUSED written = 0;
 689   IADDR UNUSED pc = abuf->addr;
 690   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 691
 692   {
 693     SI opval = ADDSI (* FLD (i_dr), FLD (f_simm8));
 694     * FLD (i_dr) = opval;
 695     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 696   }
 697
 698 #undef FLD
 699 }
 700   NEXT (vpc);
 701
 702   CASE (sem, INSN_ADDV) : /* addv $dr,$sr */
 703 {
 704   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 705   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 706 #define FLD(f) abuf->fields.sfmt_add.f
 707   int UNUSED written = 0;
 708   IADDR UNUSED pc = abuf->addr;
 709   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 710
 711 {
 712   SI temp0;BI temp1;
 713   temp0 = ADDSI (* FLD (i_dr), * FLD (i_sr));
 714   temp1 = ADDOFSI (* FLD (i_dr), * FLD (i_sr), 0);
 715   {
 716     SI opval = temp0;
 717     * FLD (i_dr) = opval;
 718     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 719   }
 720   {
 721     BI opval = temp1;
 722     CPU (h_cond) = opval;
 723     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
 724   }
 725 }
 726
 727 #undef FLD
 728 }
 729   NEXT (vpc);
 730
 731   CASE (sem, INSN_ADDV3) : /* addv3 $dr,$sr,$simm16 */
 732 {
 733   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 734   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 735 #define FLD(f) abuf->fields.sfmt_add3.f
 736   int UNUSED written = 0;
 737   IADDR UNUSED pc = abuf->addr;
 738   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 739
 740 {
 741   SI temp0;BI temp1;
 742   temp0 = ADDSI (* FLD (i_sr), FLD (f_simm16));
 743   temp1 = ADDOFSI (* FLD (i_sr), FLD (f_simm16), 0);
 744   {
 745     SI opval = temp0;
 746     * FLD (i_dr) = opval;
 747     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 748   }
 749   {
 750     BI opval = temp1;
 751     CPU (h_cond) = opval;
 752     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
 753   }
 754 }
 755
 756 #undef FLD
 757 }
 758   NEXT (vpc);
 759
 760   CASE (sem, INSN_ADDX) : /* addx $dr,$sr */
 761 {
 762   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 763   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 764 #define FLD(f) abuf->fields.sfmt_add.f
 765   int UNUSED written = 0;
 766   IADDR UNUSED pc = abuf->addr;
 767   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 768
 769 {
 770   SI temp0;BI temp1;
 771   temp0 = ADDCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
 772   temp1 = ADDCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
 773   {
 774     SI opval = temp0;
 775     * FLD (i_dr) = opval;
 776     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 777   }
 778   {
 779     BI opval = temp1;
 780     CPU (h_cond) = opval;
 781     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
 782   }
 783 }
 784
 785 #undef FLD
 786 }
 787   NEXT (vpc);
 788
 789   CASE (sem, INSN_BC8) : /* bc.s $disp8 */
 790 {
 791   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 792   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 793 #define FLD(f) abuf->fields.sfmt_bl8.f
 794   int UNUSED written = 0;
 795   IADDR UNUSED pc = abuf->addr;
 796   SEM_BRANCH_INIT
 797   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 798
 799 if (CPU (h_cond)) {
 800   {
 801     USI opval = FLD (i_disp8);
 802     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 803     written |= (1 << 2);
 804     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 805   }
 806 }
 807
 808   abuf->written = written;
 809   SEM_BRANCH_FINI (vpc);
 810 #undef FLD
 811 }
 812   NEXT (vpc);
 813
 814   CASE (sem, INSN_BC24) : /* bc.l $disp24 */
 815 {
 816   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 817   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 818 #define FLD(f) abuf->fields.sfmt_bl24.f
 819   int UNUSED written = 0;
 820   IADDR UNUSED pc = abuf->addr;
 821   SEM_BRANCH_INIT
 822   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 823
 824 if (CPU (h_cond)) {
 825   {
 826     USI opval = FLD (i_disp24);
 827     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 828     written |= (1 << 2);
 829     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 830   }
 831 }
 832
 833   abuf->written = written;
 834   SEM_BRANCH_FINI (vpc);
 835 #undef FLD
 836 }
 837   NEXT (vpc);
 838
 839   CASE (sem, INSN_BEQ) : /* beq $src1,$src2,$disp16 */
 840 {
 841   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 842   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 843 #define FLD(f) abuf->fields.sfmt_beq.f
 844   int UNUSED written = 0;
 845   IADDR UNUSED pc = abuf->addr;
 846   SEM_BRANCH_INIT
 847   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 848
 849 if (EQSI (* FLD (i_src1), * FLD (i_src2))) {
 850   {
 851     USI opval = FLD (i_disp16);
 852     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 853     written |= (1 << 3);
 854     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 855   }
 856 }
 857
 858   abuf->written = written;
 859   SEM_BRANCH_FINI (vpc);
 860 #undef FLD
 861 }
 862   NEXT (vpc);
 863
 864   CASE (sem, INSN_BEQZ) : /* beqz $src2,$disp16 */
 865 {
 866   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 867   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 868 #define FLD(f) abuf->fields.sfmt_beq.f
 869   int UNUSED written = 0;
 870   IADDR UNUSED pc = abuf->addr;
 871   SEM_BRANCH_INIT
 872   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 873
 874 if (EQSI (* FLD (i_src2), 0)) {
 875   {
 876     USI opval = FLD (i_disp16);
 877     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 878     written |= (1 << 2);
 879     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 880   }
 881 }
 882
 883   abuf->written = written;
 884   SEM_BRANCH_FINI (vpc);
 885 #undef FLD
 886 }
 887   NEXT (vpc);
 888
 889   CASE (sem, INSN_BGEZ) : /* bgez $src2,$disp16 */
 890 {
 891   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 892   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 893 #define FLD(f) abuf->fields.sfmt_beq.f
 894   int UNUSED written = 0;
 895   IADDR UNUSED pc = abuf->addr;
 896   SEM_BRANCH_INIT
 897   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 898
 899 if (GESI (* FLD (i_src2), 0)) {
 900   {
 901     USI opval = FLD (i_disp16);
 902     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 903     written |= (1 << 2);
 904     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 905   }
 906 }
 907
 908   abuf->written = written;
 909   SEM_BRANCH_FINI (vpc);
 910 #undef FLD
 911 }
 912   NEXT (vpc);
 913
 914   CASE (sem, INSN_BGTZ) : /* bgtz $src2,$disp16 */
 915 {
 916   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 917   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 918 #define FLD(f) abuf->fields.sfmt_beq.f
 919   int UNUSED written = 0;
 920   IADDR UNUSED pc = abuf->addr;
 921   SEM_BRANCH_INIT
 922   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 923
 924 if (GTSI (* FLD (i_src2), 0)) {
 925   {
 926     USI opval = FLD (i_disp16);
 927     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 928     written |= (1 << 2);
 929     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 930   }
 931 }
 932
 933   abuf->written = written;
 934   SEM_BRANCH_FINI (vpc);
 935 #undef FLD
 936 }
 937   NEXT (vpc);
 938
 939   CASE (sem, INSN_BLEZ) : /* blez $src2,$disp16 */
 940 {
 941   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 942   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 943 #define FLD(f) abuf->fields.sfmt_beq.f
 944   int UNUSED written = 0;
 945   IADDR UNUSED pc = abuf->addr;
 946   SEM_BRANCH_INIT
 947   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 948
 949 if (LESI (* FLD (i_src2), 0)) {
 950   {
 951     USI opval = FLD (i_disp16);
 952     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 953     written |= (1 << 2);
 954     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 955   }
 956 }
 957
 958   abuf->written = written;
 959   SEM_BRANCH_FINI (vpc);
 960 #undef FLD
 961 }
 962   NEXT (vpc);
 963
 964   CASE (sem, INSN_BLTZ) : /* bltz $src2,$disp16 */
 965 {
 966   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 967   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 968 #define FLD(f) abuf->fields.sfmt_beq.f
 969   int UNUSED written = 0;
 970   IADDR UNUSED pc = abuf->addr;
 971   SEM_BRANCH_INIT
 972   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 973
 974 if (LTSI (* FLD (i_src2), 0)) {
 975   {
 976     USI opval = FLD (i_disp16);
 977     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 978     written |= (1 << 2);
 979     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 980   }
 981 }
 982
 983   abuf->written = written;
 984   SEM_BRANCH_FINI (vpc);
 985 #undef FLD
 986 }
 987   NEXT (vpc);
 988
 989   CASE (sem, INSN_BNEZ) : /* bnez $src2,$disp16 */
 990 {
 991   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 992   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 993 #define FLD(f) abuf->fields.sfmt_beq.f
 994   int UNUSED written = 0;
 995   IADDR UNUSED pc = abuf->addr;
 996   SEM_BRANCH_INIT
 997   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 998
 999 if (NESI (* FLD (i_src2), 0)) {
1000   {
1001     USI opval = FLD (i_disp16);
1002     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1003     written |= (1 << 2);
1004     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1005   }
1006 }
1007
1008   abuf->written = written;
1009   SEM_BRANCH_FINI (vpc);
1010 #undef FLD
1011 }
1012   NEXT (vpc);
1013
1014   CASE (sem, INSN_BL8) : /* bl.s $disp8 */
1015 {
1016   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1017   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1018 #define FLD(f) abuf->fields.sfmt_bl8.f
1019   int UNUSED written = 0;
1020   IADDR UNUSED pc = abuf->addr;
1021   SEM_BRANCH_INIT
1022   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1023
1024 {
1025   {
1026     SI opval = ADDSI (ANDSI (pc, -4), 4);
1027     CPU (h_gr[((UINT) 14)]) = opval;
1028     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1029   }
1030   {
1031     USI opval = FLD (i_disp8);
1032     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1033     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1034   }
1035 }
1036
1037   SEM_BRANCH_FINI (vpc);
1038 #undef FLD
1039 }
1040   NEXT (vpc);
1041
1042   CASE (sem, INSN_BL24) : /* bl.l $disp24 */
1043 {
1044   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1045   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1046 #define FLD(f) abuf->fields.sfmt_bl24.f
1047   int UNUSED written = 0;
1048   IADDR UNUSED pc = abuf->addr;
1049   SEM_BRANCH_INIT
1050   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1051
1052 {
1053   {
1054     SI opval = ADDSI (pc, 4);
1055     CPU (h_gr[((UINT) 14)]) = opval;
1056     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1057   }
1058   {
1059     USI opval = FLD (i_disp24);
1060     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1061     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1062   }
1063 }
1064
1065   SEM_BRANCH_FINI (vpc);
1066 #undef FLD
1067 }
1068   NEXT (vpc);
1069
1070   CASE (sem, INSN_BCL8) : /* bcl.s $disp8 */
1071 {
1072   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1073   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1074 #define FLD(f) abuf->fields.sfmt_bl8.f
1075   int UNUSED written = 0;
1076   IADDR UNUSED pc = abuf->addr;
1077   SEM_BRANCH_INIT
1078   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1079
1080 if (CPU (h_cond)) {
1081 {
1082   {
1083     SI opval = ADDSI (ANDSI (pc, -4), 4);
1084     CPU (h_gr[((UINT) 14)]) = opval;
1085     written |= (1 << 3);
1086     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1087   }
1088   {
1089     USI opval = FLD (i_disp8);
1090     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1091     written |= (1 << 4);
1092     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1093   }
1094 }
1095 }
1096
1097   abuf->written = written;
1098   SEM_BRANCH_FINI (vpc);
1099 #undef FLD
1100 }
1101   NEXT (vpc);
1102
1103   CASE (sem, INSN_BCL24) : /* bcl.l $disp24 */
1104 {
1105   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1106   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1107 #define FLD(f) abuf->fields.sfmt_bl24.f
1108   int UNUSED written = 0;
1109   IADDR UNUSED pc = abuf->addr;
1110   SEM_BRANCH_INIT
1111   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1112
1113 if (CPU (h_cond)) {
1114 {
1115   {
1116     SI opval = ADDSI (pc, 4);
1117     CPU (h_gr[((UINT) 14)]) = opval;
1118     written |= (1 << 3);
1119     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1120   }
1121   {
1122     USI opval = FLD (i_disp24);
1123     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1124     written |= (1 << 4);
1125     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1126   }
1127 }
1128 }
1129
1130   abuf->written = written;
1131   SEM_BRANCH_FINI (vpc);
1132 #undef FLD
1133 }
1134   NEXT (vpc);
1135
1136   CASE (sem, INSN_BNC8) : /* bnc.s $disp8 */
1137 {
1138   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1139   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1140 #define FLD(f) abuf->fields.sfmt_bl8.f
1141   int UNUSED written = 0;
1142   IADDR UNUSED pc = abuf->addr;
1143   SEM_BRANCH_INIT
1144   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1145
1146 if (NOTBI (CPU (h_cond))) {
1147   {
1148     USI opval = FLD (i_disp8);
1149     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1150     written |= (1 << 2);
1151     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1152   }
1153 }
1154
1155   abuf->written = written;
1156   SEM_BRANCH_FINI (vpc);
1157 #undef FLD
1158 }
1159   NEXT (vpc);
1160
1161   CASE (sem, INSN_BNC24) : /* bnc.l $disp24 */
1162 {
1163   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1164   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1165 #define FLD(f) abuf->fields.sfmt_bl24.f
1166   int UNUSED written = 0;
1167   IADDR UNUSED pc = abuf->addr;
1168   SEM_BRANCH_INIT
1169   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1170
1171 if (NOTBI (CPU (h_cond))) {
1172   {
1173     USI opval = FLD (i_disp24);
1174     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1175     written |= (1 << 2);
1176     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1177   }
1178 }
1179
1180   abuf->written = written;
1181   SEM_BRANCH_FINI (vpc);
1182 #undef FLD
1183 }
1184   NEXT (vpc);
1185
1186   CASE (sem, INSN_BNE) : /* bne $src1,$src2,$disp16 */
1187 {
1188   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1189   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1190 #define FLD(f) abuf->fields.sfmt_beq.f
1191   int UNUSED written = 0;
1192   IADDR UNUSED pc = abuf->addr;
1193   SEM_BRANCH_INIT
1194   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1195
1196 if (NESI (* FLD (i_src1), * FLD (i_src2))) {
1197   {
1198     USI opval = FLD (i_disp16);
1199     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1200     written |= (1 << 3);
1201     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1202   }
1203 }
1204
1205   abuf->written = written;
1206   SEM_BRANCH_FINI (vpc);
1207 #undef FLD
1208 }
1209   NEXT (vpc);
1210
1211   CASE (sem, INSN_BRA8) : /* bra.s $disp8 */
1212 {
1213   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1214   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1215 #define FLD(f) abuf->fields.sfmt_bl8.f
1216   int UNUSED written = 0;
1217   IADDR UNUSED pc = abuf->addr;
1218   SEM_BRANCH_INIT
1219   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1220
1221   {
1222     USI opval = FLD (i_disp8);
1223     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1224     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1225   }
1226
1227   SEM_BRANCH_FINI (vpc);
1228 #undef FLD
1229 }
1230   NEXT (vpc);
1231
1232   CASE (sem, INSN_BRA24) : /* bra.l $disp24 */
1233 {
1234   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1235   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1236 #define FLD(f) abuf->fields.sfmt_bl24.f
1237   int UNUSED written = 0;
1238   IADDR UNUSED pc = abuf->addr;
1239   SEM_BRANCH_INIT
1240   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1241
1242   {
1243     USI opval = FLD (i_disp24);
1244     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1245     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1246   }
1247
1248   SEM_BRANCH_FINI (vpc);
1249 #undef FLD
1250 }
1251   NEXT (vpc);
1252
1253   CASE (sem, INSN_BNCL8) : /* bncl.s $disp8 */
1254 {
1255   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1256   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1257 #define FLD(f) abuf->fields.sfmt_bl8.f
1258   int UNUSED written = 0;
1259   IADDR UNUSED pc = abuf->addr;
1260   SEM_BRANCH_INIT
1261   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1262
1263 if (NOTBI (CPU (h_cond))) {
1264 {
1265   {
1266     SI opval = ADDSI (ANDSI (pc, -4), 4);
1267     CPU (h_gr[((UINT) 14)]) = opval;
1268     written |= (1 << 3);
1269     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1270   }
1271   {
1272     USI opval = FLD (i_disp8);
1273     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1274     written |= (1 << 4);
1275     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1276   }
1277 }
1278 }
1279
1280   abuf->written = written;
1281   SEM_BRANCH_FINI (vpc);
1282 #undef FLD
1283 }
1284   NEXT (vpc);
1285
1286   CASE (sem, INSN_BNCL24) : /* bncl.l $disp24 */
1287 {
1288   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1289   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1290 #define FLD(f) abuf->fields.sfmt_bl24.f
1291   int UNUSED written = 0;
1292   IADDR UNUSED pc = abuf->addr;
1293   SEM_BRANCH_INIT
1294   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1295
1296 if (NOTBI (CPU (h_cond))) {
1297 {
1298   {
1299     SI opval = ADDSI (pc, 4);
1300     CPU (h_gr[((UINT) 14)]) = opval;
1301     written |= (1 << 3);
1302     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1303   }
1304   {
1305     USI opval = FLD (i_disp24);
1306     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1307     written |= (1 << 4);
1308     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1309   }
1310 }
1311 }
1312
1313   abuf->written = written;
1314   SEM_BRANCH_FINI (vpc);
1315 #undef FLD
1316 }
1317   NEXT (vpc);
1318
1319   CASE (sem, INSN_CMP) : /* cmp $src1,$src2 */
1320 {
1321   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1322   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1323 #define FLD(f) abuf->fields.sfmt_st_plus.f
1324   int UNUSED written = 0;
1325   IADDR UNUSED pc = abuf->addr;
1326   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1327
1328   {
1329     BI opval = LTSI (* FLD (i_src1), * FLD (i_src2));
1330     CPU (h_cond) = opval;
1331     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
1332   }
1333
1334 #undef FLD
1335 }
1336   NEXT (vpc);
1337
1338   CASE (sem, INSN_CMPI) : /* cmpi $src2,$simm16 */
1339 {
1340   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1341   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1342 #define FLD(f) abuf->fields.sfmt_st_d.f
1343   int UNUSED written = 0;
1344   IADDR UNUSED pc = abuf->addr;
1345   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1346
1347   {
1348     BI opval = LTSI (* FLD (i_src2), FLD (f_simm16));
1349     CPU (h_cond) = opval;
1350     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
1351   }
1352
1353 #undef FLD
1354 }
1355   NEXT (vpc);
1356
1357   CASE (sem, INSN_CMPU) : /* cmpu $src1,$src2 */
1358 {
1359   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1360   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1361 #define FLD(f) abuf->fields.sfmt_st_plus.f
1362   int UNUSED written = 0;
1363   IADDR UNUSED pc = abuf->addr;
1364   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1365
1366   {
1367     BI opval = LTUSI (* FLD (i_src1), * FLD (i_src2));
1368     CPU (h_cond) = opval;
1369     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
1370   }
1371
1372 #undef FLD
1373 }
1374   NEXT (vpc);
1375
1376   CASE (sem, INSN_CMPUI) : /* cmpui $src2,$simm16 */
1377 {
1378   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1379   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1380 #define FLD(f) abuf->fields.sfmt_st_d.f
1381   int UNUSED written = 0;
1382   IADDR UNUSED pc = abuf->addr;
1383   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1384
1385   {
1386     BI opval = LTUSI (* FLD (i_src2), FLD (f_simm16));
1387     CPU (h_cond) = opval;
1388     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
1389   }
1390
1391 #undef FLD
1392 }
1393   NEXT (vpc);
1394
1395   CASE (sem, INSN_CMPEQ) : /* cmpeq $src1,$src2 */
1396 {
1397   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1398   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1399 #define FLD(f) abuf->fields.sfmt_st_plus.f
1400   int UNUSED written = 0;
1401   IADDR UNUSED pc = abuf->addr;
1402   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1403
1404   {
1405     BI opval = EQSI (* FLD (i_src1), * FLD (i_src2));
1406     CPU (h_cond) = opval;
1407     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
1408   }
1409
1410 #undef FLD
1411 }
1412   NEXT (vpc);
1413
1414   CASE (sem, INSN_CMPZ) : /* cmpz $src2 */
1415 {
1416   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1417   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1418 #define FLD(f) abuf->fields.sfmt_st_plus.f
1419   int UNUSED written = 0;
1420   IADDR UNUSED pc = abuf->addr;
1421   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1422
1423   {
1424     BI opval = EQSI (* FLD (i_src2), 0);
1425     CPU (h_cond) = opval;
1426     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
1427   }
1428
1429 #undef FLD
1430 }
1431   NEXT (vpc);
1432
1433   CASE (sem, INSN_DIV) : /* div $dr,$sr */
1434 {
1435   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1436   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1437 #define FLD(f) abuf->fields.sfmt_add.f
1438   int UNUSED written = 0;
1439   IADDR UNUSED pc = abuf->addr;
1440   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1441
1442 if (NESI (* FLD (i_sr), 0)) {
1443   {
1444     SI opval = DIVSI (* FLD (i_dr), * FLD (i_sr));
1445     * FLD (i_dr) = opval;
1446     written |= (1 << 2);
1447     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1448   }
1449 }
1450
1451   abuf->written = written;
1452 #undef FLD
1453 }
1454   NEXT (vpc);
1455
1456   CASE (sem, INSN_DIVU) : /* divu $dr,$sr */
1457 {
1458   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1459   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1460 #define FLD(f) abuf->fields.sfmt_add.f
1461   int UNUSED written = 0;
1462   IADDR UNUSED pc = abuf->addr;
1463   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1464
1465 if (NESI (* FLD (i_sr), 0)) {
1466   {
1467     SI opval = UDIVSI (* FLD (i_dr), * FLD (i_sr));
1468     * FLD (i_dr) = opval;
1469     written |= (1 << 2);
1470     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1471   }
1472 }
1473
1474   abuf->written = written;
1475 #undef FLD
1476 }
1477   NEXT (vpc);
1478
1479   CASE (sem, INSN_REM) : /* rem $dr,$sr */
1480 {
1481   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1482   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1483 #define FLD(f) abuf->fields.sfmt_add.f
1484   int UNUSED written = 0;
1485   IADDR UNUSED pc = abuf->addr;
1486   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1487
1488 if (NESI (* FLD (i_sr), 0)) {
1489   {
1490     SI opval = MODSI (* FLD (i_dr), * FLD (i_sr));
1491     * FLD (i_dr) = opval;
1492     written |= (1 << 2);
1493     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1494   }
1495 }
1496
1497   abuf->written = written;
1498 #undef FLD
1499 }
1500   NEXT (vpc);
1501
1502   CASE (sem, INSN_REMU) : /* remu $dr,$sr */
1503 {
1504   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1505   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1506 #define FLD(f) abuf->fields.sfmt_add.f
1507   int UNUSED written = 0;
1508   IADDR UNUSED pc = abuf->addr;
1509   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1510
1511 if (NESI (* FLD (i_sr), 0)) {
1512   {
1513     SI opval = UMODSI (* FLD (i_dr), * FLD (i_sr));
1514     * FLD (i_dr) = opval;
1515     written |= (1 << 2);
1516     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1517   }
1518 }
1519
1520   abuf->written = written;
1521 #undef FLD
1522 }
1523   NEXT (vpc);
1524
1525   CASE (sem, INSN_DIVH) : /* divh $dr,$sr */
1526 {
1527   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1528   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1529 #define FLD(f) abuf->fields.sfmt_add.f
1530   int UNUSED written = 0;
1531   IADDR UNUSED pc = abuf->addr;
1532   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1533
1534 if (NESI (* FLD (i_sr), 0)) {
1535   {
1536     SI opval = DIVSI (EXTHISI (TRUNCSIHI (* FLD (i_dr))), * FLD (i_sr));
1537     * FLD (i_dr) = opval;
1538     written |= (1 << 2);
1539     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1540   }
1541 }
1542
1543   abuf->written = written;
1544 #undef FLD
1545 }
1546   NEXT (vpc);
1547
1548   CASE (sem, INSN_JC) : /* jc $sr */
1549 {
1550   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1551   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1552 #define FLD(f) abuf->fields.sfmt_jl.f
1553   int UNUSED written = 0;
1554   IADDR UNUSED pc = abuf->addr;
1555   SEM_BRANCH_INIT
1556   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1557
1558 if (CPU (h_cond)) {
1559   {
1560     USI opval = ANDSI (* FLD (i_sr), -4);
1561     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1562     written |= (1 << 2);
1563     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1564   }
1565 }
1566
1567   abuf->written = written;
1568   SEM_BRANCH_FINI (vpc);
1569 #undef FLD
1570 }
1571   NEXT (vpc);
1572
1573   CASE (sem, INSN_JNC) : /* jnc $sr */
1574 {
1575   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1576   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1577 #define FLD(f) abuf->fields.sfmt_jl.f
1578   int UNUSED written = 0;
1579   IADDR UNUSED pc = abuf->addr;
1580   SEM_BRANCH_INIT
1581   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1582
1583 if (NOTBI (CPU (h_cond))) {
1584   {
1585     USI opval = ANDSI (* FLD (i_sr), -4);
1586     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1587     written |= (1 << 2);
1588     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1589   }
1590 }
1591
1592   abuf->written = written;
1593   SEM_BRANCH_FINI (vpc);
1594 #undef FLD
1595 }
1596   NEXT (vpc);
1597
1598   CASE (sem, INSN_JL) : /* jl $sr */
1599 {
1600   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1601   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1602 #define FLD(f) abuf->fields.sfmt_jl.f
1603   int UNUSED written = 0;
1604   IADDR UNUSED pc = abuf->addr;
1605   SEM_BRANCH_INIT
1606   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1607
1608 {
1609   SI temp0;USI temp1;
1610   temp0 = ADDSI (ANDSI (pc, -4), 4);
1611   temp1 = ANDSI (* FLD (i_sr), -4);
1612   {
1613     SI opval = temp0;
1614     CPU (h_gr[((UINT) 14)]) = opval;
1615     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1616   }
1617   {
1618     USI opval = temp1;
1619     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1620     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1621   }
1622 }
1623
1624   SEM_BRANCH_FINI (vpc);
1625 #undef FLD
1626 }
1627   NEXT (vpc);
1628
1629   CASE (sem, INSN_JMP) : /* jmp $sr */
1630 {
1631   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1632   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1633 #define FLD(f) abuf->fields.sfmt_jl.f
1634   int UNUSED written = 0;
1635   IADDR UNUSED pc = abuf->addr;
1636   SEM_BRANCH_INIT
1637   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1638
1639   {
1640     USI opval = ANDSI (* FLD (i_sr), -4);
1641     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1642     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1643   }
1644
1645   SEM_BRANCH_FINI (vpc);
1646 #undef FLD
1647 }
1648   NEXT (vpc);
1649
1650   CASE (sem, INSN_LD) : /* ld $dr,@$sr */
1651 {
1652   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1653   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1654 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1655   int UNUSED written = 0;
1656   IADDR UNUSED pc = abuf->addr;
1657   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1658
1659   {
1660     SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
1661     * FLD (i_dr) = opval;
1662     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1663   }
1664
1665 #undef FLD
1666 }
1667   NEXT (vpc);
1668
1669   CASE (sem, INSN_LD_D) : /* ld $dr,@($slo16,$sr) */
1670 {
1671   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1672   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1673 #define FLD(f) abuf->fields.sfmt_add3.f
1674   int UNUSED written = 0;
1675   IADDR UNUSED pc = abuf->addr;
1676   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1677
1678   {
1679     SI opval = GETMEMSI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)));
1680     * FLD (i_dr) = opval;
1681     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1682   }
1683
1684 #undef FLD
1685 }
1686   NEXT (vpc);
1687
1688   CASE (sem, INSN_LDB) : /* ldb $dr,@$sr */
1689 {
1690   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1691   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1692 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1693   int UNUSED written = 0;
1694   IADDR UNUSED pc = abuf->addr;
1695   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1696
1697   {
1698     SI opval = EXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
1699     * FLD (i_dr) = opval;
1700     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1701   }
1702
1703 #undef FLD
1704 }
1705   NEXT (vpc);
1706
1707   CASE (sem, INSN_LDB_D) : /* ldb $dr,@($slo16,$sr) */
1708 {
1709   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1710   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1711 #define FLD(f) abuf->fields.sfmt_add3.f
1712   int UNUSED written = 0;
1713   IADDR UNUSED pc = abuf->addr;
1714   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1715
1716   {
1717     SI opval = EXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1718     * FLD (i_dr) = opval;
1719     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1720   }
1721
1722 #undef FLD
1723 }
1724   NEXT (vpc);
1725
1726   CASE (sem, INSN_LDH) : /* ldh $dr,@$sr */
1727 {
1728   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1729   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1730 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1731   int UNUSED written = 0;
1732   IADDR UNUSED pc = abuf->addr;
1733   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1734
1735   {
1736     SI opval = EXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
1737     * FLD (i_dr) = opval;
1738     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1739   }
1740
1741 #undef FLD
1742 }
1743   NEXT (vpc);
1744
1745   CASE (sem, INSN_LDH_D) : /* ldh $dr,@($slo16,$sr) */
1746 {
1747   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1748   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1749 #define FLD(f) abuf->fields.sfmt_add3.f
1750   int UNUSED written = 0;
1751   IADDR UNUSED pc = abuf->addr;
1752   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1753
1754   {
1755     SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1756     * FLD (i_dr) = opval;
1757     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1758   }
1759
1760 #undef FLD
1761 }
1762   NEXT (vpc);
1763
1764   CASE (sem, INSN_LDUB) : /* ldub $dr,@$sr */
1765 {
1766   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1767   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1768 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1769   int UNUSED written = 0;
1770   IADDR UNUSED pc = abuf->addr;
1771   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1772
1773   {
1774     SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
1775     * FLD (i_dr) = opval;
1776     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1777   }
1778
1779 #undef FLD
1780 }
1781   NEXT (vpc);
1782
1783   CASE (sem, INSN_LDUB_D) : /* ldub $dr,@($slo16,$sr) */
1784 {
1785   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1786   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1787 #define FLD(f) abuf->fields.sfmt_add3.f
1788   int UNUSED written = 0;
1789   IADDR UNUSED pc = abuf->addr;
1790   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1791
1792   {
1793     SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1794     * FLD (i_dr) = opval;
1795     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1796   }
1797
1798 #undef FLD
1799 }
1800   NEXT (vpc);
1801
1802   CASE (sem, INSN_LDUH) : /* lduh $dr,@$sr */
1803 {
1804   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1805   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1806 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1807   int UNUSED written = 0;
1808   IADDR UNUSED pc = abuf->addr;
1809   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1810
1811   {
1812     SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
1813     * FLD (i_dr) = opval;
1814     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1815   }
1816
1817 #undef FLD
1818 }
1819   NEXT (vpc);
1820
1821   CASE (sem, INSN_LDUH_D) : /* lduh $dr,@($slo16,$sr) */
1822 {
1823   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1824   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1825 #define FLD(f) abuf->fields.sfmt_add3.f
1826   int UNUSED written = 0;
1827   IADDR UNUSED pc = abuf->addr;
1828   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1829
1830   {
1831     SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1832     * FLD (i_dr) = opval;
1833     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1834   }
1835
1836 #undef FLD
1837 }
1838   NEXT (vpc);
1839
1840   CASE (sem, INSN_LD_PLUS) : /* ld $dr,@$sr+ */
1841 {
1842   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1843   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1844 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1845   int UNUSED written = 0;
1846   IADDR UNUSED pc = abuf->addr;
1847   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1848
1849 {
1850   SI temp0;SI temp1;
1851   temp0 = GETMEMSI (current_cpu, pc, * FLD (i_sr));
1852   temp1 = ADDSI (* FLD (i_sr), 4);
1853   {
1854     SI opval = temp0;
1855     * FLD (i_dr) = opval;
1856     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1857   }
1858   {
1859     SI opval = temp1;
1860     * FLD (i_sr) = opval;
1861     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1862   }
1863 }
1864
1865 #undef FLD
1866 }
1867   NEXT (vpc);
1868
1869   CASE (sem, INSN_LD24) : /* ld24 $dr,$uimm24 */
1870 {
1871   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1872   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1873 #define FLD(f) abuf->fields.sfmt_ld24.f
1874   int UNUSED written = 0;
1875   IADDR UNUSED pc = abuf->addr;
1876   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1877
1878   {
1879     SI opval = FLD (i_uimm24);
1880     * FLD (i_dr) = opval;
1881     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1882   }
1883
1884 #undef FLD
1885 }
1886   NEXT (vpc);
1887
1888   CASE (sem, INSN_LDI8) : /* ldi8 $dr,$simm8 */
1889 {
1890   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1891   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1892 #define FLD(f) abuf->fields.sfmt_addi.f
1893   int UNUSED written = 0;
1894   IADDR UNUSED pc = abuf->addr;
1895   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1896
1897   {
1898     SI opval = FLD (f_simm8);
1899     * FLD (i_dr) = opval;
1900     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1901   }
1902
1903 #undef FLD
1904 }
1905   NEXT (vpc);
1906
1907   CASE (sem, INSN_LDI16) : /* ldi16 $dr,$hash$slo16 */
1908 {
1909   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1910   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1911 #define FLD(f) abuf->fields.sfmt_add3.f
1912   int UNUSED written = 0;
1913   IADDR UNUSED pc = abuf->addr;
1914   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1915
1916   {
1917     SI opval = FLD (f_simm16);
1918     * FLD (i_dr) = opval;
1919     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1920   }
1921
1922 #undef FLD
1923 }
1924   NEXT (vpc);
1925
1926   CASE (sem, INSN_LOCK) : /* lock $dr,@$sr */
1927 {
1928   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1929   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1930 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1931   int UNUSED written = 0;
1932   IADDR UNUSED pc = abuf->addr;
1933   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1934
1935 {
1936   {
1937     BI opval = 1;
1938     CPU (h_lock) = opval;
1939     TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
1940   }
1941   {
1942     SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
1943     * FLD (i_dr) = opval;
1944     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1945   }
1946 }
1947
1948 #undef FLD
1949 }
1950   NEXT (vpc);
1951
1952   CASE (sem, INSN_MACHI_A) : /* machi $src1,$src2,$acc */
1953 {
1954   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1955   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1956 #define FLD(f) abuf->fields.sfmt_machi_a.f
1957   int UNUSED written = 0;
1958   IADDR UNUSED pc = abuf->addr;
1959   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1960
1961   {
1962     DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8);
1963     SET_H_ACCUMS (FLD (f_acc), opval);
1964     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
1965   }
1966
1967 #undef FLD
1968 }
1969   NEXT (vpc);
1970
1971   CASE (sem, INSN_MACLO_A) : /* maclo $src1,$src2,$acc */
1972 {
1973   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1974   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1975 #define FLD(f) abuf->fields.sfmt_machi_a.f
1976   int UNUSED written = 0;
1977   IADDR UNUSED pc = abuf->addr;
1978   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1979
1980   {
1981     DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8);
1982     SET_H_ACCUMS (FLD (f_acc), opval);
1983     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
1984   }
1985
1986 #undef FLD
1987 }
1988   NEXT (vpc);
1989
1990   CASE (sem, INSN_MACWHI_A) : /* macwhi $src1,$src2,$acc */
1991 {
1992   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1993   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1994 #define FLD(f) abuf->fields.sfmt_machi_a.f
1995   int UNUSED written = 0;
1996   IADDR UNUSED pc = abuf->addr;
1997   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1998
1999   {
2000     DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))));
2001     SET_H_ACCUMS (FLD (f_acc), opval);
2002     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2003   }
2004
2005 #undef FLD
2006 }
2007   NEXT (vpc);
2008
2009   CASE (sem, INSN_MACWLO_A) : /* macwlo $src1,$src2,$acc */
2010 {
2011   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2012   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2013 #define FLD(f) abuf->fields.sfmt_machi_a.f
2014   int UNUSED written = 0;
2015   IADDR UNUSED pc = abuf->addr;
2016   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2017
2018   {
2019     DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))));
2020     SET_H_ACCUMS (FLD (f_acc), opval);
2021     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2022   }
2023
2024 #undef FLD
2025 }
2026   NEXT (vpc);
2027
2028   CASE (sem, INSN_MUL) : /* mul $dr,$sr */
2029 {
2030   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2031   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2032 #define FLD(f) abuf->fields.sfmt_add.f
2033   int UNUSED written = 0;
2034   IADDR UNUSED pc = abuf->addr;
2035   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2036
2037   {
2038     SI opval = MULSI (* FLD (i_dr), * FLD (i_sr));
2039     * FLD (i_dr) = opval;
2040     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2041   }
2042
2043 #undef FLD
2044 }
2045   NEXT (vpc);
2046
2047   CASE (sem, INSN_MULHI_A) : /* mulhi $src1,$src2,$acc */
2048 {
2049   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2050   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2051 #define FLD(f) abuf->fields.sfmt_machi_a.f
2052   int UNUSED written = 0;
2053   IADDR UNUSED pc = abuf->addr;
2054   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2055
2056   {
2057     DI opval = SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 16), 16);
2058     SET_H_ACCUMS (FLD (f_acc), opval);
2059     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2060   }
2061
2062 #undef FLD
2063 }
2064   NEXT (vpc);
2065
2066   CASE (sem, INSN_MULLO_A) : /* mullo $src1,$src2,$acc */
2067 {
2068   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2069   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2070 #define FLD(f) abuf->fields.sfmt_machi_a.f
2071   int UNUSED written = 0;
2072   IADDR UNUSED pc = abuf->addr;
2073   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2074
2075   {
2076     DI opval = SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 16), 16);
2077     SET_H_ACCUMS (FLD (f_acc), opval);
2078     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2079   }
2080
2081 #undef FLD
2082 }
2083   NEXT (vpc);
2084
2085   CASE (sem, INSN_MULWHI_A) : /* mulwhi $src1,$src2,$acc */
2086 {
2087   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2088   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2089 #define FLD(f) abuf->fields.sfmt_machi_a.f
2090   int UNUSED written = 0;
2091   IADDR UNUSED pc = abuf->addr;
2092   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2093
2094   {
2095     DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))));
2096     SET_H_ACCUMS (FLD (f_acc), opval);
2097     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2098   }
2099
2100 #undef FLD
2101 }
2102   NEXT (vpc);
2103
2104   CASE (sem, INSN_MULWLO_A) : /* mulwlo $src1,$src2,$acc */
2105 {
2106   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2107   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2108 #define FLD(f) abuf->fields.sfmt_machi_a.f
2109   int UNUSED written = 0;
2110   IADDR UNUSED pc = abuf->addr;
2111   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2112
2113   {
2114     DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))));
2115     SET_H_ACCUMS (FLD (f_acc), opval);
2116     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2117   }
2118
2119 #undef FLD
2120 }
2121   NEXT (vpc);
2122
2123   CASE (sem, INSN_MV) : /* mv $dr,$sr */
2124 {
2125   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2126   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2127 #define FLD(f) abuf->fields.sfmt_ld_plus.f
2128   int UNUSED written = 0;
2129   IADDR UNUSED pc = abuf->addr;
2130   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2131
2132   {
2133     SI opval = * FLD (i_sr);
2134     * FLD (i_dr) = opval;
2135     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2136   }
2137
2138 #undef FLD
2139 }
2140   NEXT (vpc);
2141
2142   CASE (sem, INSN_MVFACHI_A) : /* mvfachi $dr,$accs */
2143 {
2144   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2145   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2146 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
2147   int UNUSED written = 0;
2148   IADDR UNUSED pc = abuf->addr;
2149   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2150
2151   {
2152     SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 32));
2153     * FLD (i_dr) = opval;
2154     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2155   }
2156
2157 #undef FLD
2158 }
2159   NEXT (vpc);
2160
2161   CASE (sem, INSN_MVFACLO_A) : /* mvfaclo $dr,$accs */
2162 {
2163   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2164   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2165 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
2166   int UNUSED written = 0;
2167   IADDR UNUSED pc = abuf->addr;
2168   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2169
2170   {
2171     SI opval = TRUNCDISI (GET_H_ACCUMS (FLD (f_accs)));
2172     * FLD (i_dr) = opval;
2173     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2174   }
2175
2176 #undef FLD
2177 }
2178   NEXT (vpc);
2179
2180   CASE (sem, INSN_MVFACMI_A) : /* mvfacmi $dr,$accs */
2181 {
2182   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2183   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2184 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
2185   int UNUSED written = 0;
2186   IADDR UNUSED pc = abuf->addr;
2187   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2188
2189   {
2190     SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 16));
2191     * FLD (i_dr) = opval;
2192     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2193   }
2194
2195 #undef FLD
2196 }
2197   NEXT (vpc);
2198
2199   CASE (sem, INSN_MVFC) : /* mvfc $dr,$scr */
2200 {
2201   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2202   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2203 #define FLD(f) abuf->fields.sfmt_ld_plus.f
2204   int UNUSED written = 0;
2205   IADDR UNUSED pc = abuf->addr;
2206   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2207
2208   {
2209     SI opval = GET_H_CR (FLD (f_r2));
2210     * FLD (i_dr) = opval;
2211     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2212   }
2213
2214 #undef FLD
2215 }
2216   NEXT (vpc);
2217
2218   CASE (sem, INSN_MVTACHI_A) : /* mvtachi $src1,$accs */
2219 {
2220   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2221   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2222 #define FLD(f) abuf->fields.sfmt_mvtachi_a.f
2223   int UNUSED written = 0;
2224   IADDR UNUSED pc = abuf->addr;
2225   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2226
2227   {
2228     DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (* FLD (i_src1)), 32));
2229     SET_H_ACCUMS (FLD (f_accs), opval);
2230     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2231   }
2232
2233 #undef FLD
2234 }
2235   NEXT (vpc);
2236
2237   CASE (sem, INSN_MVTACLO_A) : /* mvtaclo $src1,$accs */
2238 {
2239   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2240   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2241 #define FLD(f) abuf->fields.sfmt_mvtachi_a.f
2242   int UNUSED written = 0;
2243   IADDR UNUSED pc = abuf->addr;
2244   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2245
2246   {
2247     DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0xffffffff, 0)), ZEXTSIDI (* FLD (i_src1)));
2248     SET_H_ACCUMS (FLD (f_accs), opval);
2249     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2250   }
2251
2252 #undef FLD
2253 }
2254   NEXT (vpc);
2255
2256   CASE (sem, INSN_MVTC) : /* mvtc $sr,$dcr */
2257 {
2258   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2259   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2260 #define FLD(f) abuf->fields.sfmt_ld_plus.f
2261   int UNUSED written = 0;
2262   IADDR UNUSED pc = abuf->addr;
2263   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2264
2265   {
2266     USI opval = * FLD (i_sr);
2267     SET_H_CR (FLD (f_r1), opval);
2268     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
2269   }
2270
2271 #undef FLD
2272 }
2273   NEXT (vpc);
2274
2275   CASE (sem, INSN_NEG) : /* neg $dr,$sr */
2276 {
2277   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2278   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2279 #define FLD(f) abuf->fields.sfmt_ld_plus.f
2280   int UNUSED written = 0;
2281   IADDR UNUSED pc = abuf->addr;
2282   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2283
2284   {
2285     SI opval = NEGSI (* FLD (i_sr));
2286     * FLD (i_dr) = opval;
2287     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2288   }
2289
2290 #undef FLD
2291 }
2292   NEXT (vpc);
2293
2294   CASE (sem, INSN_NOP) : /* nop */
2295 {
2296   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2297   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2298 #define FLD(f) abuf->fields.fmt_empty.f
2299   int UNUSED written = 0;
2300   IADDR UNUSED pc = abuf->addr;
2301   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2302
2303 PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr);
2304
2305 #undef FLD
2306 }
2307   NEXT (vpc);
2308
2309   CASE (sem, INSN_NOT) : /* not $dr,$sr */
2310 {
2311   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2312   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2313 #define FLD(f) abuf->fields.sfmt_ld_plus.f
2314   int UNUSED written = 0;
2315   IADDR UNUSED pc = abuf->addr;
2316   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2317
2318   {
2319     SI opval = INVSI (* FLD (i_sr));
2320     * FLD (i_dr) = opval;
2321     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2322   }
2323
2324 #undef FLD
2325 }
2326   NEXT (vpc);
2327
2328   CASE (sem, INSN_RAC_DSI) : /* rac $accd,$accs,$imm1 */
2329 {
2330   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2331   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2332 #define FLD(f) abuf->fields.sfmt_rac_dsi.f
2333   int UNUSED written = 0;
2334   IADDR UNUSED pc = abuf->addr;
2335   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2336
2337 {
2338   DI tmp_tmp1;
2339   tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1));
2340   tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 32768));
2341   {
2342     DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0xffff0000))) ? (MAKEDI (32767, 0xffff0000)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0xffff0000)));
2343     SET_H_ACCUMS (FLD (f_accd), opval);
2344     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2345   }
2346 }
2347
2348 #undef FLD
2349 }
2350   NEXT (vpc);
2351
2352   CASE (sem, INSN_RACH_DSI) : /* rach $accd,$accs,$imm1 */
2353 {
2354   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2355   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2356 #define FLD(f) abuf->fields.sfmt_rac_dsi.f
2357   int UNUSED written = 0;
2358   IADDR UNUSED pc = abuf->addr;
2359   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2360
2361 {
2362   DI tmp_tmp1;
2363   tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1));
2364   tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 0x80000000));
2365   {
2366     DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0))) ? (MAKEDI (32767, 0)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0)));
2367     SET_H_ACCUMS (FLD (f_accd), opval);
2368     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2369   }
2370 }
2371
2372 #undef FLD
2373 }
2374   NEXT (vpc);
2375
2376   CASE (sem, INSN_RTE) : /* rte */
2377 {
2378   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2379   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2380 #define FLD(f) abuf->fields.fmt_empty.f
2381   int UNUSED written = 0;
2382   IADDR UNUSED pc = abuf->addr;
2383   SEM_BRANCH_INIT
2384   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2385
2386 {
2387   {
2388     USI opval = ANDSI (GET_H_CR (((UINT) 6)), -4);
2389     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
2390     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
2391   }
2392   {
2393     USI opval = GET_H_CR (((UINT) 14));
2394     SET_H_CR (((UINT) 6), opval);
2395     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
2396   }
2397   {
2398     UQI opval = CPU (h_bpsw);
2399     SET_H_PSW (opval);
2400     TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
2401   }
2402   {
2403     UQI opval = CPU (h_bbpsw);
2404     CPU (h_bpsw) = opval;
2405     TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
2406   }
2407 }
2408
2409   SEM_BRANCH_FINI (vpc);
2410 #undef FLD
2411 }
2412   NEXT (vpc);
2413
2414   CASE (sem, INSN_SETH) : /* seth $dr,$hash$hi16 */
2415 {
2416   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2417   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2418 #define FLD(f) abuf->fields.sfmt_seth.f
2419   int UNUSED written = 0;
2420   IADDR UNUSED pc = abuf->addr;
2421   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2422
2423   {
2424     SI opval = SLLSI (FLD (f_hi16), 16);
2425     * FLD (i_dr) = opval;
2426     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2427   }
2428
2429 #undef FLD
2430 }
2431   NEXT (vpc);
2432
2433   CASE (sem, INSN_SLL) : /* sll $dr,$sr */
2434 {
2435   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2436   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2437 #define FLD(f) abuf->fields.sfmt_add.f
2438   int UNUSED written = 0;
2439   IADDR UNUSED pc = abuf->addr;
2440   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2441
2442   {
2443     SI opval = SLLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
2444     * FLD (i_dr) = opval;
2445     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2446   }
2447
2448 #undef FLD
2449 }
2450   NEXT (vpc);
2451
2452   CASE (sem, INSN_SLL3) : /* sll3 $dr,$sr,$simm16 */
2453 {
2454   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2455   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2456 #define FLD(f) abuf->fields.sfmt_add3.f
2457   int UNUSED written = 0;
2458   IADDR UNUSED pc = abuf->addr;
2459   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2460
2461   {
2462     SI opval = SLLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
2463     * FLD (i_dr) = opval;
2464     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2465   }
2466
2467 #undef FLD
2468 }
2469   NEXT (vpc);
2470
2471   CASE (sem, INSN_SLLI) : /* slli $dr,$uimm5 */
2472 {
2473   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2474   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2475 #define FLD(f) abuf->fields.sfmt_slli.f
2476   int UNUSED written = 0;
2477   IADDR UNUSED pc = abuf->addr;
2478   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2479
2480   {
2481     SI opval = SLLSI (* FLD (i_dr), FLD (f_uimm5));
2482     * FLD (i_dr) = opval;
2483     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2484   }
2485
2486 #undef FLD
2487 }
2488   NEXT (vpc);
2489
2490   CASE (sem, INSN_SRA) : /* sra $dr,$sr */
2491 {
2492   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2493   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2494 #define FLD(f) abuf->fields.sfmt_add.f
2495   int UNUSED written = 0;
2496   IADDR UNUSED pc = abuf->addr;
2497   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2498
2499   {
2500     SI opval = SRASI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
2501     * FLD (i_dr) = opval;
2502     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2503   }
2504
2505 #undef FLD
2506 }
2507   NEXT (vpc);
2508
2509   CASE (sem, INSN_SRA3) : /* sra3 $dr,$sr,$simm16 */
2510 {
2511   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2512   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2513 #define FLD(f) abuf->fields.sfmt_add3.f
2514   int UNUSED written = 0;
2515   IADDR UNUSED pc = abuf->addr;
2516   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2517
2518   {
2519     SI opval = SRASI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
2520     * FLD (i_dr) = opval;
2521     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2522   }
2523
2524 #undef FLD
2525 }
2526   NEXT (vpc);
2527
2528   CASE (sem, INSN_SRAI) : /* srai $dr,$uimm5 */
2529 {
2530   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2531   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2532 #define FLD(f) abuf->fields.sfmt_slli.f
2533   int UNUSED written = 0;
2534   IADDR UNUSED pc = abuf->addr;
2535   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2536
2537   {
2538     SI opval = SRASI (* FLD (i_dr), FLD (f_uimm5));
2539     * FLD (i_dr) = opval;
2540     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2541   }
2542
2543 #undef FLD
2544 }
2545   NEXT (vpc);
2546
2547   CASE (sem, INSN_SRL) : /* srl $dr,$sr */
2548 {
2549   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2550   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2551 #define FLD(f) abuf->fields.sfmt_add.f
2552   int UNUSED written = 0;
2553   IADDR UNUSED pc = abuf->addr;
2554   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2555
2556   {
2557     SI opval = SRLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
2558     * FLD (i_dr) = opval;
2559     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2560   }
2561
2562 #undef FLD
2563 }
2564   NEXT (vpc);
2565
2566   CASE (sem, INSN_SRL3) : /* srl3 $dr,$sr,$simm16 */
2567 {
2568   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2569   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2570 #define FLD(f) abuf->fields.sfmt_add3.f
2571   int UNUSED written = 0;
2572   IADDR UNUSED pc = abuf->addr;
2573   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2574
2575   {
2576     SI opval = SRLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
2577     * FLD (i_dr) = opval;
2578     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2579   }
2580
2581 #undef FLD
2582 }
2583   NEXT (vpc);
2584
2585   CASE (sem, INSN_SRLI) : /* srli $dr,$uimm5 */
2586 {
2587   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2588   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2589 #define FLD(f) abuf->fields.sfmt_slli.f
2590   int UNUSED written = 0;
2591   IADDR UNUSED pc = abuf->addr;
2592   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2593
2594   {
2595     SI opval = SRLSI (* FLD (i_dr), FLD (f_uimm5));
2596     * FLD (i_dr) = opval;
2597     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2598   }
2599
2600 #undef FLD
2601 }
2602   NEXT (vpc);
2603
2604   CASE (sem, INSN_ST) : /* st $src1,@$src2 */
2605 {
2606   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2607   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2608 #define FLD(f) abuf->fields.sfmt_st_plus.f
2609   int UNUSED written = 0;
2610   IADDR UNUSED pc = abuf->addr;
2611   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2612
2613   {
2614     SI opval = * FLD (i_src1);
2615     SETMEMSI (current_cpu, pc, * FLD (i_src2), opval);
2616     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2617   }
2618
2619 #undef FLD
2620 }
2621   NEXT (vpc);
2622
2623   CASE (sem, INSN_ST_D) : /* st $src1,@($slo16,$src2) */
2624 {
2625   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2626   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2627 #define FLD(f) abuf->fields.sfmt_st_d.f
2628   int UNUSED written = 0;
2629   IADDR UNUSED pc = abuf->addr;
2630   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2631
2632   {
2633     SI opval = * FLD (i_src1);
2634     SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
2635     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2636   }
2637
2638 #undef FLD
2639 }
2640   NEXT (vpc);
2641
2642   CASE (sem, INSN_STB) : /* stb $src1,@$src2 */
2643 {
2644   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2645   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2646 #define FLD(f) abuf->fields.sfmt_st_plus.f
2647   int UNUSED written = 0;
2648   IADDR UNUSED pc = abuf->addr;
2649   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2650
2651   {
2652     QI opval = * FLD (i_src1);
2653     SETMEMQI (current_cpu, pc, * FLD (i_src2), opval);
2654     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2655   }
2656
2657 #undef FLD
2658 }
2659   NEXT (vpc);
2660
2661   CASE (sem, INSN_STB_D) : /* stb $src1,@($slo16,$src2) */
2662 {
2663   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2664   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2665 #define FLD(f) abuf->fields.sfmt_st_d.f
2666   int UNUSED written = 0;
2667   IADDR UNUSED pc = abuf->addr;
2668   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2669
2670   {
2671     QI opval = * FLD (i_src1);
2672     SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
2673     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2674   }
2675
2676 #undef FLD
2677 }
2678   NEXT (vpc);
2679
2680   CASE (sem, INSN_STH) : /* sth $src1,@$src2 */
2681 {
2682   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2683   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2684 #define FLD(f) abuf->fields.sfmt_st_plus.f
2685   int UNUSED written = 0;
2686   IADDR UNUSED pc = abuf->addr;
2687   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2688
2689   {
2690     HI opval = * FLD (i_src1);
2691     SETMEMHI (current_cpu, pc, * FLD (i_src2), opval);
2692     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2693   }
2694
2695 #undef FLD
2696 }
2697   NEXT (vpc);
2698
2699   CASE (sem, INSN_STH_D) : /* sth $src1,@($slo16,$src2) */
2700 {
2701   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2702   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2703 #define FLD(f) abuf->fields.sfmt_st_d.f
2704   int UNUSED written = 0;
2705   IADDR UNUSED pc = abuf->addr;
2706   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2707
2708   {
2709     HI opval = * FLD (i_src1);
2710     SETMEMHI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
2711     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2712   }
2713
2714 #undef FLD
2715 }
2716   NEXT (vpc);
2717
2718   CASE (sem, INSN_ST_PLUS) : /* st $src1,@+$src2 */
2719 {
2720   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2721   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2722 #define FLD(f) abuf->fields.sfmt_st_plus.f
2723   int UNUSED written = 0;
2724   IADDR UNUSED pc = abuf->addr;
2725   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2726
2727 {
2728   SI tmp_new_src2;
2729   tmp_new_src2 = ADDSI (* FLD (i_src2), 4);
2730   {
2731     SI opval = * FLD (i_src1);
2732     SETMEMSI (current_cpu, pc, tmp_new_src2, opval);
2733     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2734   }
2735   {
2736     SI opval = tmp_new_src2;
2737     * FLD (i_src2) = opval;
2738     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2739   }
2740 }
2741
2742 #undef FLD
2743 }
2744   NEXT (vpc);
2745
2746   CASE (sem, INSN_STH_PLUS) : /* sth $src1,@$src2+ */
2747 {
2748   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2749   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2750 #define FLD(f) abuf->fields.sfmt_st_plus.f
2751   int UNUSED written = 0;
2752   IADDR UNUSED pc = abuf->addr;
2753   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2754
2755 {
2756   HI tmp_new_src2;
2757   {
2758     HI opval = * FLD (i_src1);
2759     SETMEMHI (current_cpu, pc, tmp_new_src2, opval);
2760     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2761   }
2762   tmp_new_src2 = ADDSI (* FLD (i_src2), 2);
2763   {
2764     SI opval = tmp_new_src2;
2765     * FLD (i_src2) = opval;
2766     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2767   }
2768 }
2769
2770 #undef FLD
2771 }
2772   NEXT (vpc);
2773
2774   CASE (sem, INSN_STB_PLUS) : /* stb $src1,@$src2+ */
2775 {
2776   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2777   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2778 #define FLD(f) abuf->fields.sfmt_st_plus.f
2779   int UNUSED written = 0;
2780   IADDR UNUSED pc = abuf->addr;
2781   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2782
2783 {
2784   QI tmp_new_src2;
2785   {
2786     QI opval = * FLD (i_src1);
2787     SETMEMQI (current_cpu, pc, tmp_new_src2, opval);
2788     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2789   }
2790   tmp_new_src2 = ADDSI (* FLD (i_src2), 1);
2791   {
2792     SI opval = tmp_new_src2;
2793     * FLD (i_src2) = opval;
2794     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2795   }
2796 }
2797
2798 #undef FLD
2799 }
2800   NEXT (vpc);
2801
2802   CASE (sem, INSN_ST_MINUS) : /* st $src1,@-$src2 */
2803 {
2804   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2805   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2806 #define FLD(f) abuf->fields.sfmt_st_plus.f
2807   int UNUSED written = 0;
2808   IADDR UNUSED pc = abuf->addr;
2809   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2810
2811 {
2812   SI tmp_new_src2;
2813   tmp_new_src2 = SUBSI (* FLD (i_src2), 4);
2814   {
2815     SI opval = * FLD (i_src1);
2816     SETMEMSI (current_cpu, pc, tmp_new_src2, opval);
2817     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2818   }
2819   {
2820     SI opval = tmp_new_src2;
2821     * FLD (i_src2) = opval;
2822     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2823   }
2824 }
2825
2826 #undef FLD
2827 }
2828   NEXT (vpc);
2829
2830   CASE (sem, INSN_SUB) : /* sub $dr,$sr */
2831 {
2832   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2833   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2834 #define FLD(f) abuf->fields.sfmt_add.f
2835   int UNUSED written = 0;
2836   IADDR UNUSED pc = abuf->addr;
2837   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2838
2839   {
2840     SI opval = SUBSI (* FLD (i_dr), * FLD (i_sr));
2841     * FLD (i_dr) = opval;
2842     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2843   }
2844
2845 #undef FLD
2846 }
2847   NEXT (vpc);
2848
2849   CASE (sem, INSN_SUBV) : /* subv $dr,$sr */
2850 {
2851   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2852   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2853 #define FLD(f) abuf->fields.sfmt_add.f
2854   int UNUSED written = 0;
2855   IADDR UNUSED pc = abuf->addr;
2856   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2857
2858 {
2859   SI temp0;BI temp1;
2860   temp0 = SUBSI (* FLD (i_dr), * FLD (i_sr));
2861   temp1 = SUBOFSI (* FLD (i_dr), * FLD (i_sr), 0);
2862   {
2863     SI opval = temp0;
2864     * FLD (i_dr) = opval;
2865     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2866   }
2867   {
2868     BI opval = temp1;
2869     CPU (h_cond) = opval;
2870     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
2871   }
2872 }
2873
2874 #undef FLD
2875 }
2876   NEXT (vpc);
2877
2878   CASE (sem, INSN_SUBX) : /* subx $dr,$sr */
2879 {
2880   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2881   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2882 #define FLD(f) abuf->fields.sfmt_add.f
2883   int UNUSED written = 0;
2884   IADDR UNUSED pc = abuf->addr;
2885   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2886
2887 {
2888   SI temp0;BI temp1;
2889   temp0 = SUBCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
2890   temp1 = SUBCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
2891   {
2892     SI opval = temp0;
2893     * FLD (i_dr) = opval;
2894     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2895   }
2896   {
2897     BI opval = temp1;
2898     CPU (h_cond) = opval;
2899     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
2900   }
2901 }
2902
2903 #undef FLD
2904 }
2905   NEXT (vpc);
2906
2907   CASE (sem, INSN_TRAP) : /* trap $uimm4 */
2908 {
2909   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2910   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2911 #define FLD(f) abuf->fields.sfmt_trap.f
2912   int UNUSED written = 0;
2913   IADDR UNUSED pc = abuf->addr;
2914   SEM_BRANCH_INIT
2915   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2916
2917 {
2918   {
2919     USI opval = GET_H_CR (((UINT) 6));
2920     SET_H_CR (((UINT) 14), opval);
2921     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
2922   }
2923   {
2924     USI opval = ADDSI (pc, 4);
2925     SET_H_CR (((UINT) 6), opval);
2926     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
2927   }
2928   {
2929     UQI opval = CPU (h_bpsw);
2930     CPU (h_bbpsw) = opval;
2931     TRACE_RESULT (current_cpu, abuf, "bbpsw", 'x', opval);
2932   }
2933   {
2934     UQI opval = GET_H_PSW ();
2935     CPU (h_bpsw) = opval;
2936     TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
2937   }
2938   {
2939     UQI opval = ANDQI (GET_H_PSW (), 128);
2940     SET_H_PSW (opval);
2941     TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
2942   }
2943   {
2944     SI opval = m32r_trap (current_cpu, pc, FLD (f_uimm4));
2945     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
2946     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
2947   }
2948 }
2949
2950   SEM_BRANCH_FINI (vpc);
2951 #undef FLD
2952 }
2953   NEXT (vpc);
2954
2955   CASE (sem, INSN_UNLOCK) : /* unlock $src1,@$src2 */
2956 {
2957   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2958   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2959 #define FLD(f) abuf->fields.sfmt_st_plus.f
2960   int UNUSED written = 0;
2961   IADDR UNUSED pc = abuf->addr;
2962   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2963
2964 {
2965 if (CPU (h_lock)) {
2966   {
2967     SI opval = * FLD (i_src1);
2968     SETMEMSI (current_cpu, pc, * FLD (i_src2), opval);
2969     written |= (1 << 4);
2970     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2971   }
2972 }
2973   {
2974     BI opval = 0;
2975     CPU (h_lock) = opval;
2976     TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
2977   }
2978 }
2979
2980   abuf->written = written;
2981 #undef FLD
2982 }
2983   NEXT (vpc);
2984
2985   CASE (sem, INSN_SATB) : /* satb $dr,$sr */
2986 {
2987   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2988   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2989 #define FLD(f) abuf->fields.sfmt_ld_plus.f
2990   int UNUSED written = 0;
2991   IADDR UNUSED pc = abuf->addr;
2992   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2993
2994   {
2995     SI opval = (GESI (* FLD (i_sr), 127)) ? (127) : (LESI (* FLD (i_sr), -128)) ? (-128) : (* FLD (i_sr));
2996     * FLD (i_dr) = opval;
2997     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2998   }
2999
3000 #undef FLD
3001 }
3002   NEXT (vpc);
3003
3004   CASE (sem, INSN_SATH) : /* sath $dr,$sr */
3005 {
3006   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3007   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3008 #define FLD(f) abuf->fields.sfmt_ld_plus.f
3009   int UNUSED written = 0;
3010   IADDR UNUSED pc = abuf->addr;
3011   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3012
3013   {
3014     SI opval = (GESI (* FLD (i_sr), 32767)) ? (32767) : (LESI (* FLD (i_sr), -32768)) ? (-32768) : (* FLD (i_sr));
3015     * FLD (i_dr) = opval;
3016     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3017   }
3018
3019 #undef FLD
3020 }
3021   NEXT (vpc);
3022
3023   CASE (sem, INSN_SAT) : /* sat $dr,$sr */
3024 {
3025   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3026   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3027 #define FLD(f) abuf->fields.sfmt_ld_plus.f
3028   int UNUSED written = 0;
3029   IADDR UNUSED pc = abuf->addr;
3030   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3031
3032   {
3033     SI opval = ((CPU (h_cond)) ? (((LTSI (* FLD (i_sr), 0)) ? (2147483647) : (0x80000000))) : (* FLD (i_sr)));
3034     * FLD (i_dr) = opval;
3035     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3036   }
3037
3038 #undef FLD
3039 }
3040   NEXT (vpc);
3041
3042   CASE (sem, INSN_PCMPBZ) : /* pcmpbz $src2 */
3043 {
3044   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3045   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3046 #define FLD(f) abuf->fields.sfmt_st_plus.f
3047   int UNUSED written = 0;
3048   IADDR UNUSED pc = abuf->addr;
3049   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3050
3051   {
3052     BI opval = (EQSI (ANDSI (* FLD (i_src2), 255), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 65280), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 16711680), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 0xff000000), 0)) ? (1) : (0);
3053     CPU (h_cond) = opval;
3054     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
3055   }
3056
3057 #undef FLD
3058 }
3059   NEXT (vpc);
3060
3061   CASE (sem, INSN_SADD) : /* sadd */
3062 {
3063   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3064   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3065 #define FLD(f) abuf->fields.fmt_empty.f
3066   int UNUSED written = 0;
3067   IADDR UNUSED pc = abuf->addr;
3068   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3069
3070   {
3071     DI opval = ADDDI (SRADI (GET_H_ACCUMS (((UINT) 1)), 16), GET_H_ACCUMS (((UINT) 0)));
3072     SET_H_ACCUMS (((UINT) 0), opval);
3073     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
3074   }
3075
3076 #undef FLD
3077 }
3078   NEXT (vpc);
3079
3080   CASE (sem, INSN_MACWU1) : /* macwu1 $src1,$src2 */
3081 {
3082   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3083   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3084 #define FLD(f) abuf->fields.sfmt_st_plus.f
3085   int UNUSED written = 0;
3086   IADDR UNUSED pc = abuf->addr;
3087   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3088
3089   {
3090     DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535)))), 8), 8);
3091     SET_H_ACCUMS (((UINT) 1), opval);
3092     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
3093   }
3094
3095 #undef FLD
3096 }
3097   NEXT (vpc);
3098
3099   CASE (sem, INSN_MSBLO) : /* msblo $src1,$src2 */
3100 {
3101   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3102   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3103 #define FLD(f) abuf->fields.sfmt_st_plus.f
3104   int UNUSED written = 0;
3105   IADDR UNUSED pc = abuf->addr;
3106   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3107
3108   {
3109     DI opval = SRADI (SLLDI (SUBDI (GET_H_ACCUM (), SRADI (SLLDI (MULDI (EXTHIDI (TRUNCSIHI (* FLD (i_src1))), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 32), 16)), 8), 8);
3110     SET_H_ACCUM (opval);
3111     TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
3112   }
3113
3114 #undef FLD
3115 }
3116   NEXT (vpc);
3117
3118   CASE (sem, INSN_MULWU1) : /* mulwu1 $src1,$src2 */
3119 {
3120   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3121   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3122 #define FLD(f) abuf->fields.sfmt_st_plus.f
3123   int UNUSED written = 0;
3124   IADDR UNUSED pc = abuf->addr;
3125   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3126
3127   {
3128     DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535))), 16), 16);
3129     SET_H_ACCUMS (((UINT) 1), opval);
3130     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
3131   }
3132
3133 #undef FLD
3134 }
3135   NEXT (vpc);
3136
3137   CASE (sem, INSN_MACLH1) : /* maclh1 $src1,$src2 */
3138 {
3139   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3140   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3141 #define FLD(f) abuf->fields.sfmt_st_plus.f
3142   int UNUSED written = 0;
3143   IADDR UNUSED pc = abuf->addr;
3144   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3145
3146   {
3147     DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), SLLDI (EXTSIDI (MULSI (EXTHISI (TRUNCSIHI (* FLD (i_src1))), SRASI (* FLD (i_src2), 16))), 16)), 8), 8);
3148     SET_H_ACCUMS (((UINT) 1), opval);
3149     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
3150   }
3151
3152 #undef FLD
3153 }
3154   NEXT (vpc);
3155
3156   CASE (sem, INSN_SC) : /* sc */
3157 {
3158   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3159   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3160 #define FLD(f) abuf->fields.fmt_empty.f
3161   int UNUSED written = 0;
3162   IADDR UNUSED pc = abuf->addr;
3163   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3164
3165 if (ZEXTBISI (CPU (h_cond)))
3166   SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
3167
3168 #undef FLD
3169 }
3170   NEXT (vpc);
3171
3172   CASE (sem, INSN_SNC) : /* snc */
3173 {
3174   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3175   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3176 #define FLD(f) abuf->fields.fmt_empty.f
3177   int UNUSED written = 0;
3178   IADDR UNUSED pc = abuf->addr;
3179   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3180
3181 if (ZEXTBISI (NOTBI (CPU (h_cond))))
3182   SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
3183
3184 #undef FLD
3185 }
3186   NEXT (vpc);
3187
3188   CASE (sem, INSN_CLRPSW) : /* clrpsw $uimm8 */
3189 {
3190   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3191   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3192 #define FLD(f) abuf->fields.sfmt_clrpsw.f
3193   int UNUSED written = 0;
3194   IADDR UNUSED pc = abuf->addr;
3195   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3196
3197   {
3198     SI opval = ANDSI (GET_H_CR (((UINT) 0)), ORSI (INVBI (FLD (f_uimm8)), 65280));
3199     SET_H_CR (((UINT) 0), opval);
3200     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
3201   }
3202
3203 #undef FLD
3204 }
3205   NEXT (vpc);
3206
3207   CASE (sem, INSN_SETPSW) : /* setpsw $uimm8 */
3208 {
3209   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3210   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3211 #define FLD(f) abuf->fields.sfmt_clrpsw.f
3212   int UNUSED written = 0;
3213   IADDR UNUSED pc = abuf->addr;
3214   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3215
3216   {
3217     SI opval = FLD (f_uimm8);
3218     SET_H_CR (((UINT) 0), opval);
3219     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
3220   }
3221
3222 #undef FLD
3223 }
3224   NEXT (vpc);
3225
3226   CASE (sem, INSN_BSET) : /* bset $uimm3,@($slo16,$sr) */
3227 {
3228   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3229   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3230 #define FLD(f) abuf->fields.sfmt_bset.f
3231   int UNUSED written = 0;
3232   IADDR UNUSED pc = abuf->addr;
3233   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3234
3235   {
3236     QI opval = ORQI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))), SLLSI (1, SUBSI (7, FLD (f_uimm3))));
3237     SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)), opval);
3238     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
3239   }
3240
3241 #undef FLD
3242 }
3243   NEXT (vpc);
3244
3245   CASE (sem, INSN_BCLR) : /* bclr $uimm3,@($slo16,$sr) */
3246 {
3247   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3248   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3249 #define FLD(f) abuf->fields.sfmt_bset.f
3250   int UNUSED written = 0;
3251   IADDR UNUSED pc = abuf->addr;
3252   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3253
3254   {
3255     QI opval = ANDQI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))), INVQI (SLLSI (1, SUBSI (7, FLD (f_uimm3)))));
3256     SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)), opval);
3257     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
3258   }
3259
3260 #undef FLD
3261 }
3262   NEXT (vpc);
3263
3264   CASE (sem, INSN_BTST) : /* btst $uimm3,$sr */
3265 {
3266   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3267   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3268 #define FLD(f) abuf->fields.sfmt_bset.f
3269   int UNUSED written = 0;
3270   IADDR UNUSED pc = abuf->addr;
3271   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3272
3273   {
3274     BI opval = ANDQI (SRLSI (* FLD (i_sr), SUBSI (7, FLD (f_uimm3))), 1);
3275     CPU (h_cond) = opval;
3276     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
3277   }
3278
3279 #undef FLD
3280 }
3281   NEXT (vpc);
3282
3283   CASE (sem, INSN_PAR_ADD) : /* add $dr,$sr */
3284 {
3285   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3286   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3287 #define FLD(f) abuf->fields.sfmt_add.f
3288 #define OPRND(f) par_exec->operands.sfmt_add.f
3289   int UNUSED written = 0;
3290   IADDR UNUSED pc = abuf->addr;
3291   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3292
3293   {
3294     SI opval = ADDSI (* FLD (i_dr), * FLD (i_sr));
3295     OPRND (dr) = opval;
3296     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3297   }
3298
3299 #undef OPRND
3300 #undef FLD
3301 }
3302   NEXT (vpc);
3303
3304 CASE (sem, INSN_WRITE_ADD) : /* add $dr,$sr */
3305   {
3306     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3307     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3308 #define FLD(f) abuf->fields.sfmt_add.f
3309 #define OPRND(f) par_exec->operands.sfmt_add.f
3310     int UNUSED written = abuf->written;
3311     IADDR UNUSED pc = abuf->addr;
3312     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3313
3314   * FLD (i_dr) = OPRND (dr);
3315
3316 #undef OPRND
3317 #undef FLD
3318   }
3319   NEXT (vpc);
3320
3321   CASE (sem, INSN_PAR_AND) : /* and $dr,$sr */
3322 {
3323   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3324   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3325 #define FLD(f) abuf->fields.sfmt_add.f
3326 #define OPRND(f) par_exec->operands.sfmt_add.f
3327   int UNUSED written = 0;
3328   IADDR UNUSED pc = abuf->addr;
3329   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3330
3331   {
3332     SI opval = ANDSI (* FLD (i_dr), * FLD (i_sr));
3333     OPRND (dr) = opval;
3334     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3335   }
3336
3337 #undef OPRND
3338 #undef FLD
3339 }
3340   NEXT (vpc);
3341
3342 CASE (sem, INSN_WRITE_AND) : /* and $dr,$sr */
3343   {
3344     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3345     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3346 #define FLD(f) abuf->fields.sfmt_add.f
3347 #define OPRND(f) par_exec->operands.sfmt_add.f
3348     int UNUSED written = abuf->written;
3349     IADDR UNUSED pc = abuf->addr;
3350     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3351
3352   * FLD (i_dr) = OPRND (dr);
3353
3354 #undef OPRND
3355 #undef FLD
3356   }
3357   NEXT (vpc);
3358
3359   CASE (sem, INSN_PAR_OR) : /* or $dr,$sr */
3360 {
3361   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3362   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3363 #define FLD(f) abuf->fields.sfmt_add.f
3364 #define OPRND(f) par_exec->operands.sfmt_add.f
3365   int UNUSED written = 0;
3366   IADDR UNUSED pc = abuf->addr;
3367   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3368
3369   {
3370     SI opval = ORSI (* FLD (i_dr), * FLD (i_sr));
3371     OPRND (dr) = opval;
3372     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3373   }
3374
3375 #undef OPRND
3376 #undef FLD
3377 }
3378   NEXT (vpc);
3379
3380 CASE (sem, INSN_WRITE_OR) : /* or $dr,$sr */
3381   {
3382     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3383     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3384 #define FLD(f) abuf->fields.sfmt_add.f
3385 #define OPRND(f) par_exec->operands.sfmt_add.f
3386     int UNUSED written = abuf->written;
3387     IADDR UNUSED pc = abuf->addr;
3388     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3389
3390   * FLD (i_dr) = OPRND (dr);
3391
3392 #undef OPRND
3393 #undef FLD
3394   }
3395   NEXT (vpc);
3396
3397   CASE (sem, INSN_PAR_XOR) : /* xor $dr,$sr */
3398 {
3399   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3400   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3401 #define FLD(f) abuf->fields.sfmt_add.f
3402 #define OPRND(f) par_exec->operands.sfmt_add.f
3403   int UNUSED written = 0;
3404   IADDR UNUSED pc = abuf->addr;
3405   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3406
3407   {
3408     SI opval = XORSI (* FLD (i_dr), * FLD (i_sr));
3409     OPRND (dr) = opval;
3410     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3411   }
3412
3413 #undef OPRND
3414 #undef FLD
3415 }
3416   NEXT (vpc);
3417
3418 CASE (sem, INSN_WRITE_XOR) : /* xor $dr,$sr */
3419   {
3420     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3421     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3422 #define FLD(f) abuf->fields.sfmt_add.f
3423 #define OPRND(f) par_exec->operands.sfmt_add.f
3424     int UNUSED written = abuf->written;
3425     IADDR UNUSED pc = abuf->addr;
3426     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3427
3428   * FLD (i_dr) = OPRND (dr);
3429
3430 #undef OPRND
3431 #undef FLD
3432   }
3433   NEXT (vpc);
3434
3435   CASE (sem, INSN_PAR_ADDI) : /* addi $dr,$simm8 */
3436 {
3437   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3438   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3439 #define FLD(f) abuf->fields.sfmt_addi.f
3440 #define OPRND(f) par_exec->operands.sfmt_addi.f
3441   int UNUSED written = 0;
3442   IADDR UNUSED pc = abuf->addr;
3443   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3444
3445   {
3446     SI opval = ADDSI (* FLD (i_dr), FLD (f_simm8));
3447     OPRND (dr) = opval;
3448     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3449   }
3450
3451 #undef OPRND
3452 #undef FLD
3453 }
3454   NEXT (vpc);
3455
3456 CASE (sem, INSN_WRITE_ADDI) : /* addi $dr,$simm8 */
3457   {
3458     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3459     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3460 #define FLD(f) abuf->fields.sfmt_addi.f
3461 #define OPRND(f) par_exec->operands.sfmt_addi.f
3462     int UNUSED written = abuf->written;
3463     IADDR UNUSED pc = abuf->addr;
3464     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3465
3466   * FLD (i_dr) = OPRND (dr);
3467
3468 #undef OPRND
3469 #undef FLD
3470   }
3471   NEXT (vpc);
3472
3473   CASE (sem, INSN_PAR_ADDV) : /* addv $dr,$sr */
3474 {
3475   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3476   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3477 #define FLD(f) abuf->fields.sfmt_add.f
3478 #define OPRND(f) par_exec->operands.sfmt_addv.f
3479   int UNUSED written = 0;
3480   IADDR UNUSED pc = abuf->addr;
3481   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3482
3483 {
3484   SI temp0;BI temp1;
3485   temp0 = ADDSI (* FLD (i_dr), * FLD (i_sr));
3486   temp1 = ADDOFSI (* FLD (i_dr), * FLD (i_sr), 0);
3487   {
3488     SI opval = temp0;
3489     OPRND (dr) = opval;
3490     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3491   }
3492   {
3493     BI opval = temp1;
3494     OPRND (condbit) = opval;
3495     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
3496   }
3497 }
3498
3499 #undef OPRND
3500 #undef FLD
3501 }
3502   NEXT (vpc);
3503
3504 CASE (sem, INSN_WRITE_ADDV) : /* addv $dr,$sr */
3505   {
3506     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3507     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3508 #define FLD(f) abuf->fields.sfmt_add.f
3509 #define OPRND(f) par_exec->operands.sfmt_addv.f
3510     int UNUSED written = abuf->written;
3511     IADDR UNUSED pc = abuf->addr;
3512     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3513
3514   CPU (h_cond) = OPRND (condbit);
3515   * FLD (i_dr) = OPRND (dr);
3516
3517 #undef OPRND
3518 #undef FLD
3519   }
3520   NEXT (vpc);
3521
3522   CASE (sem, INSN_PAR_ADDX) : /* addx $dr,$sr */
3523 {
3524   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3525   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3526 #define FLD(f) abuf->fields.sfmt_add.f
3527 #define OPRND(f) par_exec->operands.sfmt_addx.f
3528   int UNUSED written = 0;
3529   IADDR UNUSED pc = abuf->addr;
3530   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3531
3532 {
3533   SI temp0;BI temp1;
3534   temp0 = ADDCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
3535   temp1 = ADDCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
3536   {
3537     SI opval = temp0;
3538     OPRND (dr) = opval;
3539     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3540   }
3541   {
3542     BI opval = temp1;
3543     OPRND (condbit) = opval;
3544     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
3545   }
3546 }
3547
3548 #undef OPRND
3549 #undef FLD
3550 }
3551   NEXT (vpc);
3552
3553 CASE (sem, INSN_WRITE_ADDX) : /* addx $dr,$sr */
3554   {
3555     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3556     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3557 #define FLD(f) abuf->fields.sfmt_add.f
3558 #define OPRND(f) par_exec->operands.sfmt_addx.f
3559     int UNUSED written = abuf->written;
3560     IADDR UNUSED pc = abuf->addr;
3561     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3562
3563   CPU (h_cond) = OPRND (condbit);
3564   * FLD (i_dr) = OPRND (dr);
3565
3566 #undef OPRND
3567 #undef FLD
3568   }
3569   NEXT (vpc);
3570
3571   CASE (sem, INSN_PAR_BC8) : /* bc.s $disp8 */
3572 {
3573   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3574   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3575 #define FLD(f) abuf->fields.sfmt_bl8.f
3576 #define OPRND(f) par_exec->operands.sfmt_bc8.f
3577   int UNUSED written = 0;
3578   IADDR UNUSED pc = abuf->addr;
3579   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3580
3581 if (CPU (h_cond)) {
3582   {
3583     USI opval = FLD (i_disp8);
3584     OPRND (pc) = opval;
3585     written |= (1 << 2);
3586     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3587   }
3588 }
3589
3590   abuf->written = written;
3591 #undef OPRND
3592 #undef FLD
3593 }
3594   NEXT (vpc);
3595
3596 CASE (sem, INSN_WRITE_BC8) : /* bc.s $disp8 */
3597   {
3598     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3599     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3600 #define FLD(f) abuf->fields.sfmt_bl8.f
3601 #define OPRND(f) par_exec->operands.sfmt_bc8.f
3602     int UNUSED written = abuf->written;
3603     IADDR UNUSED pc = abuf->addr;
3604     SEM_BRANCH_INIT
3605     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3606
3607   if (written & (1 << 2))
3608     {
3609       SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3610     }
3611
3612   SEM_BRANCH_FINI (vpc);
3613 #undef OPRND
3614 #undef FLD
3615   }
3616   NEXT (vpc);
3617
3618   CASE (sem, INSN_PAR_BL8) : /* bl.s $disp8 */
3619 {
3620   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3621   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3622 #define FLD(f) abuf->fields.sfmt_bl8.f
3623 #define OPRND(f) par_exec->operands.sfmt_bl8.f
3624   int UNUSED written = 0;
3625   IADDR UNUSED pc = abuf->addr;
3626   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3627
3628 {
3629   {
3630     SI opval = ADDSI (ANDSI (pc, -4), 4);
3631     OPRND (h_gr_SI_14) = opval;
3632     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3633   }
3634   {
3635     USI opval = FLD (i_disp8);
3636     OPRND (pc) = opval;
3637     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3638   }
3639 }
3640
3641 #undef OPRND
3642 #undef FLD
3643 }
3644   NEXT (vpc);
3645
3646 CASE (sem, INSN_WRITE_BL8) : /* bl.s $disp8 */
3647   {
3648     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3649     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3650 #define FLD(f) abuf->fields.sfmt_bl8.f
3651 #define OPRND(f) par_exec->operands.sfmt_bl8.f
3652     int UNUSED written = abuf->written;
3653     IADDR UNUSED pc = abuf->addr;
3654     SEM_BRANCH_INIT
3655     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3656
3657   CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_SI_14);
3658   SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3659
3660   SEM_BRANCH_FINI (vpc);
3661 #undef OPRND
3662 #undef FLD
3663   }
3664   NEXT (vpc);
3665
3666   CASE (sem, INSN_PAR_BCL8) : /* bcl.s $disp8 */
3667 {
3668   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3669   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3670 #define FLD(f) abuf->fields.sfmt_bl8.f
3671 #define OPRND(f) par_exec->operands.sfmt_bcl8.f
3672   int UNUSED written = 0;
3673   IADDR UNUSED pc = abuf->addr;
3674   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3675
3676 if (CPU (h_cond)) {
3677 {
3678   {
3679     SI opval = ADDSI (ANDSI (pc, -4), 4);
3680     OPRND (h_gr_SI_14) = opval;
3681     written |= (1 << 3);
3682     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3683   }
3684   {
3685     USI opval = FLD (i_disp8);
3686     OPRND (pc) = opval;
3687     written |= (1 << 4);
3688     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3689   }
3690 }
3691 }
3692
3693   abuf->written = written;
3694 #undef OPRND
3695 #undef FLD
3696 }
3697   NEXT (vpc);
3698
3699 CASE (sem, INSN_WRITE_BCL8) : /* bcl.s $disp8 */
3700   {
3701     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3702     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3703 #define FLD(f) abuf->fields.sfmt_bl8.f
3704 #define OPRND(f) par_exec->operands.sfmt_bcl8.f
3705     int UNUSED written = abuf->written;
3706     IADDR UNUSED pc = abuf->addr;
3707     SEM_BRANCH_INIT
3708     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3709
3710   if (written & (1 << 3))
3711     {
3712       CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_SI_14);
3713     }
3714   if (written & (1 << 4))
3715     {
3716       SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3717     }
3718
3719   SEM_BRANCH_FINI (vpc);
3720 #undef OPRND
3721 #undef FLD
3722   }
3723   NEXT (vpc);
3724
3725   CASE (sem, INSN_PAR_BNC8) : /* bnc.s $disp8 */
3726 {
3727   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3728   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3729 #define FLD(f) abuf->fields.sfmt_bl8.f
3730 #define OPRND(f) par_exec->operands.sfmt_bc8.f
3731   int UNUSED written = 0;
3732   IADDR UNUSED pc = abuf->addr;
3733   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3734
3735 if (NOTBI (CPU (h_cond))) {
3736   {
3737     USI opval = FLD (i_disp8);
3738     OPRND (pc) = opval;
3739     written |= (1 << 2);
3740     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3741   }
3742 }
3743
3744   abuf->written = written;
3745 #undef OPRND
3746 #undef FLD
3747 }
3748   NEXT (vpc);
3749
3750 CASE (sem, INSN_WRITE_BNC8) : /* bnc.s $disp8 */
3751   {
3752     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3753     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3754 #define FLD(f) abuf->fields.sfmt_bl8.f
3755 #define OPRND(f) par_exec->operands.sfmt_bc8.f
3756     int UNUSED written = abuf->written;
3757     IADDR UNUSED pc = abuf->addr;
3758     SEM_BRANCH_INIT
3759     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3760
3761   if (written & (1 << 2))
3762     {
3763       SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3764     }
3765
3766   SEM_BRANCH_FINI (vpc);
3767 #undef OPRND
3768 #undef FLD
3769   }
3770   NEXT (vpc);
3771
3772   CASE (sem, INSN_PAR_BRA8) : /* bra.s $disp8 */
3773 {
3774   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3775   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3776 #define FLD(f) abuf->fields.sfmt_bl8.f
3777 #define OPRND(f) par_exec->operands.sfmt_bra8.f
3778   int UNUSED written = 0;
3779   IADDR UNUSED pc = abuf->addr;
3780   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3781
3782   {
3783     USI opval = FLD (i_disp8);
3784     OPRND (pc) = opval;
3785     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3786   }
3787
3788 #undef OPRND
3789 #undef FLD
3790 }
3791   NEXT (vpc);
3792
3793 CASE (sem, INSN_WRITE_BRA8) : /* bra.s $disp8 */
3794   {
3795     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3796     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3797 #define FLD(f) abuf->fields.sfmt_bl8.f
3798 #define OPRND(f) par_exec->operands.sfmt_bra8.f
3799     int UNUSED written = abuf->written;
3800     IADDR UNUSED pc = abuf->addr;
3801     SEM_BRANCH_INIT
3802     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3803
3804   SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3805
3806   SEM_BRANCH_FINI (vpc);
3807 #undef OPRND
3808 #undef FLD
3809   }
3810   NEXT (vpc);
3811
3812   CASE (sem, INSN_PAR_BNCL8) : /* bncl.s $disp8 */
3813 {
3814   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3815   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3816 #define FLD(f) abuf->fields.sfmt_bl8.f
3817 #define OPRND(f) par_exec->operands.sfmt_bcl8.f
3818   int UNUSED written = 0;
3819   IADDR UNUSED pc = abuf->addr;
3820   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3821
3822 if (NOTBI (CPU (h_cond))) {
3823 {
3824   {
3825     SI opval = ADDSI (ANDSI (pc, -4), 4);
3826     OPRND (h_gr_SI_14) = opval;
3827     written |= (1 << 3);
3828     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3829   }
3830   {
3831     USI opval = FLD (i_disp8);
3832     OPRND (pc) = opval;
3833     written |= (1 << 4);
3834     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3835   }
3836 }
3837 }
3838
3839   abuf->written = written;
3840 #undef OPRND
3841 #undef FLD
3842 }
3843   NEXT (vpc);
3844
3845 CASE (sem, INSN_WRITE_BNCL8) : /* bncl.s $disp8 */
3846   {
3847     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3848     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3849 #define FLD(f) abuf->fields.sfmt_bl8.f
3850 #define OPRND(f) par_exec->operands.sfmt_bcl8.f
3851     int UNUSED written = abuf->written;
3852     IADDR UNUSED pc = abuf->addr;
3853     SEM_BRANCH_INIT
3854     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3855
3856   if (written & (1 << 3))
3857     {
3858       CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_SI_14);
3859     }
3860   if (written & (1 << 4))
3861     {
3862       SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3863     }
3864
3865   SEM_BRANCH_FINI (vpc);
3866 #undef OPRND
3867 #undef FLD
3868   }
3869   NEXT (vpc);
3870
3871   CASE (sem, INSN_PAR_CMP) : /* cmp $src1,$src2 */
3872 {
3873   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3874   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3875 #define FLD(f) abuf->fields.sfmt_st_plus.f
3876 #define OPRND(f) par_exec->operands.sfmt_cmp.f
3877   int UNUSED written = 0;
3878   IADDR UNUSED pc = abuf->addr;
3879   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3880
3881   {
3882     BI opval = LTSI (* FLD (i_src1), * FLD (i_src2));
3883     OPRND (condbit) = opval;
3884     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
3885   }
3886
3887 #undef OPRND
3888 #undef FLD
3889 }
3890   NEXT (vpc);
3891
3892 CASE (sem, INSN_WRITE_CMP) : /* cmp $src1,$src2 */
3893   {
3894     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3895     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3896 #define FLD(f) abuf->fields.sfmt_st_plus.f
3897 #define OPRND(f) par_exec->operands.sfmt_cmp.f
3898     int UNUSED written = abuf->written;
3899     IADDR UNUSED pc = abuf->addr;
3900     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3901
3902   CPU (h_cond) = OPRND (condbit);
3903
3904 #undef OPRND
3905 #undef FLD
3906   }
3907   NEXT (vpc);
3908
3909   CASE (sem, INSN_PAR_CMPU) : /* cmpu $src1,$src2 */
3910 {
3911   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3912   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3913 #define FLD(f) abuf->fields.sfmt_st_plus.f
3914 #define OPRND(f) par_exec->operands.sfmt_cmp.f
3915   int UNUSED written = 0;
3916   IADDR UNUSED pc = abuf->addr;
3917   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3918
3919   {
3920     BI opval = LTUSI (* FLD (i_src1), * FLD (i_src2));
3921     OPRND (condbit) = opval;
3922     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
3923   }
3924
3925 #undef OPRND
3926 #undef FLD
3927 }
3928   NEXT (vpc);
3929
3930 CASE (sem, INSN_WRITE_CMPU) : /* cmpu $src1,$src2 */
3931   {
3932     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3933     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3934 #define FLD(f) abuf->fields.sfmt_st_plus.f
3935 #define OPRND(f) par_exec->operands.sfmt_cmp.f
3936     int UNUSED written = abuf->written;
3937     IADDR UNUSED pc = abuf->addr;
3938     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3939
3940   CPU (h_cond) = OPRND (condbit);
3941
3942 #undef OPRND
3943 #undef FLD
3944   }
3945   NEXT (vpc);
3946
3947   CASE (sem, INSN_PAR_CMPEQ) : /* cmpeq $src1,$src2 */
3948 {
3949   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3950   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3951 #define FLD(f) abuf->fields.sfmt_st_plus.f
3952 #define OPRND(f) par_exec->operands.sfmt_cmp.f
3953   int UNUSED written = 0;
3954   IADDR UNUSED pc = abuf->addr;
3955   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3956
3957   {
3958     BI opval = EQSI (* FLD (i_src1), * FLD (i_src2));
3959     OPRND (condbit) = opval;
3960     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
3961   }
3962
3963 #undef OPRND
3964 #undef FLD
3965 }
3966   NEXT (vpc);
3967
3968 CASE (sem, INSN_WRITE_CMPEQ) : /* cmpeq $src1,$src2 */
3969   {
3970     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3971     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3972 #define FLD(f) abuf->fields.sfmt_st_plus.f
3973 #define OPRND(f) par_exec->operands.sfmt_cmp.f
3974     int UNUSED written = abuf->written;
3975     IADDR UNUSED pc = abuf->addr;
3976     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3977
3978   CPU (h_cond) = OPRND (condbit);
3979
3980 #undef OPRND
3981 #undef FLD
3982   }
3983   NEXT (vpc);
3984
3985   CASE (sem, INSN_PAR_CMPZ) : /* cmpz $src2 */
3986 {
3987   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3988   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3989 #define FLD(f) abuf->fields.sfmt_st_plus.f
3990 #define OPRND(f) par_exec->operands.sfmt_cmpz.f
3991   int UNUSED written = 0;
3992   IADDR UNUSED pc = abuf->addr;
3993   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3994
3995   {
3996     BI opval = EQSI (* FLD (i_src2), 0);
3997     OPRND (condbit) = opval;
3998     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
3999   }
4000
4001 #undef OPRND
4002 #undef FLD
4003 }
4004   NEXT (vpc);
4005
4006 CASE (sem, INSN_WRITE_CMPZ) : /* cmpz $src2 */
4007   {
4008     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4009     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4010 #define FLD(f) abuf->fields.sfmt_st_plus.f
4011 #define OPRND(f) par_exec->operands.sfmt_cmpz.f
4012     int UNUSED written = abuf->written;
4013     IADDR UNUSED pc = abuf->addr;
4014     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4015
4016   CPU (h_cond) = OPRND (condbit);
4017
4018 #undef OPRND
4019 #undef FLD
4020   }
4021   NEXT (vpc);
4022
4023   CASE (sem, INSN_PAR_JC) : /* jc $sr */
4024 {
4025   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4026   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4027 #define FLD(f) abuf->fields.sfmt_jl.f
4028 #define OPRND(f) par_exec->operands.sfmt_jc.f
4029   int UNUSED written = 0;
4030   IADDR UNUSED pc = abuf->addr;
4031   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4032
4033 if (CPU (h_cond)) {
4034   {
4035     USI opval = ANDSI (* FLD (i_sr), -4);
4036     OPRND (pc) = opval;
4037     written |= (1 << 2);
4038     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4039   }
4040 }
4041
4042   abuf->written = written;
4043 #undef OPRND
4044 #undef FLD
4045 }
4046   NEXT (vpc);
4047
4048 CASE (sem, INSN_WRITE_JC) : /* jc $sr */
4049   {
4050     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4051     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4052 #define FLD(f) abuf->fields.sfmt_jl.f
4053 #define OPRND(f) par_exec->operands.sfmt_jc.f
4054     int UNUSED written = abuf->written;
4055     IADDR UNUSED pc = abuf->addr;
4056     SEM_BRANCH_INIT
4057     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4058
4059   if (written & (1 << 2))
4060     {
4061       SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
4062     }
4063
4064   SEM_BRANCH_FINI (vpc);
4065 #undef OPRND
4066 #undef FLD
4067   }
4068   NEXT (vpc);
4069
4070   CASE (sem, INSN_PAR_JNC) : /* jnc $sr */
4071 {
4072   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4073   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4074 #define FLD(f) abuf->fields.sfmt_jl.f
4075 #define OPRND(f) par_exec->operands.sfmt_jc.f
4076   int UNUSED written = 0;
4077   IADDR UNUSED pc = abuf->addr;
4078   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4079
4080 if (NOTBI (CPU (h_cond))) {
4081   {
4082     USI opval = ANDSI (* FLD (i_sr), -4);
4083     OPRND (pc) = opval;
4084     written |= (1 << 2);
4085     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4086   }
4087 }
4088
4089   abuf->written = written;
4090 #undef OPRND
4091 #undef FLD
4092 }
4093   NEXT (vpc);
4094
4095 CASE (sem, INSN_WRITE_JNC) : /* jnc $sr */
4096   {
4097     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4098     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4099 #define FLD(f) abuf->fields.sfmt_jl.f
4100 #define OPRND(f) par_exec->operands.sfmt_jc.f
4101     int UNUSED written = abuf->written;
4102     IADDR UNUSED pc = abuf->addr;
4103     SEM_BRANCH_INIT
4104     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4105
4106   if (written & (1 << 2))
4107     {
4108       SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
4109     }
4110
4111   SEM_BRANCH_FINI (vpc);
4112 #undef OPRND
4113 #undef FLD
4114   }
4115   NEXT (vpc);
4116
4117   CASE (sem, INSN_PAR_JL) : /* jl $sr */
4118 {
4119   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4120   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4121 #define FLD(f) abuf->fields.sfmt_jl.f
4122 #define OPRND(f) par_exec->operands.sfmt_jl.f
4123   int UNUSED written = 0;
4124   IADDR UNUSED pc = abuf->addr;
4125   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4126
4127 {
4128   SI temp0;USI temp1;
4129   temp0 = ADDSI (ANDSI (pc, -4), 4);
4130   temp1 = ANDSI (* FLD (i_sr), -4);
4131   {
4132     SI opval = temp0;
4133     OPRND (h_gr_SI_14) = opval;
4134     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4135   }
4136   {
4137     USI opval = temp1;
4138     OPRND (pc) = opval;
4139     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4140   }
4141 }
4142
4143 #undef OPRND
4144 #undef FLD
4145 }
4146   NEXT (vpc);
4147
4148 CASE (sem, INSN_WRITE_JL) : /* jl $sr */
4149   {
4150     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4151     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4152 #define FLD(f) abuf->fields.sfmt_jl.f
4153 #define OPRND(f) par_exec->operands.sfmt_jl.f
4154     int UNUSED written = abuf->written;
4155     IADDR UNUSED pc = abuf->addr;
4156     SEM_BRANCH_INIT
4157     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4158
4159   CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_SI_14);
4160   SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
4161
4162   SEM_BRANCH_FINI (vpc);
4163 #undef OPRND
4164 #undef FLD
4165   }
4166   NEXT (vpc);
4167
4168   CASE (sem, INSN_PAR_JMP) : /* jmp $sr */
4169 {
4170   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4171   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4172 #define FLD(f) abuf->fields.sfmt_jl.f
4173 #define OPRND(f) par_exec->operands.sfmt_jmp.f
4174   int UNUSED written = 0;
4175   IADDR UNUSED pc = abuf->addr;
4176   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4177
4178   {
4179     USI opval = ANDSI (* FLD (i_sr), -4);
4180     OPRND (pc) = opval;
4181     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4182   }
4183
4184 #undef OPRND
4185 #undef FLD
4186 }
4187   NEXT (vpc);
4188
4189 CASE (sem, INSN_WRITE_JMP) : /* jmp $sr */
4190   {
4191     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4192     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4193 #define FLD(f) abuf->fields.sfmt_jl.f
4194 #define OPRND(f) par_exec->operands.sfmt_jmp.f
4195     int UNUSED written = abuf->written;
4196     IADDR UNUSED pc = abuf->addr;
4197     SEM_BRANCH_INIT
4198     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4199
4200   SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
4201
4202   SEM_BRANCH_FINI (vpc);
4203 #undef OPRND
4204 #undef FLD
4205   }
4206   NEXT (vpc);
4207
4208   CASE (sem, INSN_PAR_LD) : /* ld $dr,@$sr */
4209 {
4210   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4211   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4212 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4213 #define OPRND(f) par_exec->operands.sfmt_ld.f
4214   int UNUSED written = 0;
4215   IADDR UNUSED pc = abuf->addr;
4216   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4217
4218   {
4219     SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
4220     OPRND (dr) = opval;
4221     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4222   }
4223
4224 #undef OPRND
4225 #undef FLD
4226 }
4227   NEXT (vpc);
4228
4229 CASE (sem, INSN_WRITE_LD) : /* ld $dr,@$sr */
4230   {
4231     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4232     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4233 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4234 #define OPRND(f) par_exec->operands.sfmt_ld.f
4235     int UNUSED written = abuf->written;
4236     IADDR UNUSED pc = abuf->addr;
4237     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4238
4239   * FLD (i_dr) = OPRND (dr);
4240
4241 #undef OPRND
4242 #undef FLD
4243   }
4244   NEXT (vpc);
4245
4246   CASE (sem, INSN_PAR_LDB) : /* ldb $dr,@$sr */
4247 {
4248   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4249   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4250 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4251 #define OPRND(f) par_exec->operands.sfmt_ldb.f
4252   int UNUSED written = 0;
4253   IADDR UNUSED pc = abuf->addr;
4254   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4255
4256   {
4257     SI opval = EXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
4258     OPRND (dr) = opval;
4259     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4260   }
4261
4262 #undef OPRND
4263 #undef FLD
4264 }
4265   NEXT (vpc);
4266
4267 CASE (sem, INSN_WRITE_LDB) : /* ldb $dr,@$sr */
4268   {
4269     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4270     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4271 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4272 #define OPRND(f) par_exec->operands.sfmt_ldb.f
4273     int UNUSED written = abuf->written;
4274     IADDR UNUSED pc = abuf->addr;
4275     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4276
4277   * FLD (i_dr) = OPRND (dr);
4278
4279 #undef OPRND
4280 #undef FLD
4281   }
4282   NEXT (vpc);
4283
4284   CASE (sem, INSN_PAR_LDH) : /* ldh $dr,@$sr */
4285 {
4286   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4287   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4288 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4289 #define OPRND(f) par_exec->operands.sfmt_ldh.f
4290   int UNUSED written = 0;
4291   IADDR UNUSED pc = abuf->addr;
4292   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4293
4294   {
4295     SI opval = EXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
4296     OPRND (dr) = opval;
4297     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4298   }
4299
4300 #undef OPRND
4301 #undef FLD
4302 }
4303   NEXT (vpc);
4304
4305 CASE (sem, INSN_WRITE_LDH) : /* ldh $dr,@$sr */
4306   {
4307     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4308     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4309 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4310 #define OPRND(f) par_exec->operands.sfmt_ldh.f
4311     int UNUSED written = abuf->written;
4312     IADDR UNUSED pc = abuf->addr;
4313     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4314
4315   * FLD (i_dr) = OPRND (dr);
4316
4317 #undef OPRND
4318 #undef FLD
4319   }
4320   NEXT (vpc);
4321
4322   CASE (sem, INSN_PAR_LDUB) : /* ldub $dr,@$sr */
4323 {
4324   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4325   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4326 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4327 #define OPRND(f) par_exec->operands.sfmt_ldb.f
4328   int UNUSED written = 0;
4329   IADDR UNUSED pc = abuf->addr;
4330   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4331
4332   {
4333     SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
4334     OPRND (dr) = opval;
4335     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4336   }
4337
4338 #undef OPRND
4339 #undef FLD
4340 }
4341   NEXT (vpc);
4342
4343 CASE (sem, INSN_WRITE_LDUB) : /* ldub $dr,@$sr */
4344   {
4345     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4346     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4347 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4348 #define OPRND(f) par_exec->operands.sfmt_ldb.f
4349     int UNUSED written = abuf->written;
4350     IADDR UNUSED pc = abuf->addr;
4351     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4352
4353   * FLD (i_dr) = OPRND (dr);
4354
4355 #undef OPRND
4356 #undef FLD
4357   }
4358   NEXT (vpc);
4359
4360   CASE (sem, INSN_PAR_LDUH) : /* lduh $dr,@$sr */
4361 {
4362   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4363   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4364 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4365 #define OPRND(f) par_exec->operands.sfmt_ldh.f
4366   int UNUSED written = 0;
4367   IADDR UNUSED pc = abuf->addr;
4368   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4369
4370   {
4371     SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
4372     OPRND (dr) = opval;
4373     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4374   }
4375
4376 #undef OPRND
4377 #undef FLD
4378 }
4379   NEXT (vpc);
4380
4381 CASE (sem, INSN_WRITE_LDUH) : /* lduh $dr,@$sr */
4382   {
4383     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4384     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4385 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4386 #define OPRND(f) par_exec->operands.sfmt_ldh.f
4387     int UNUSED written = abuf->written;
4388     IADDR UNUSED pc = abuf->addr;
4389     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4390
4391   * FLD (i_dr) = OPRND (dr);
4392
4393 #undef OPRND
4394 #undef FLD
4395   }
4396   NEXT (vpc);
4397
4398   CASE (sem, INSN_PAR_LD_PLUS) : /* ld $dr,@$sr+ */
4399 {
4400   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4401   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4402 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4403 #define OPRND(f) par_exec->operands.sfmt_ld_plus.f
4404   int UNUSED written = 0;
4405   IADDR UNUSED pc = abuf->addr;
4406   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4407
4408 {
4409   SI temp0;SI temp1;
4410   temp0 = GETMEMSI (current_cpu, pc, * FLD (i_sr));
4411   temp1 = ADDSI (* FLD (i_sr), 4);
4412   {
4413     SI opval = temp0;
4414     OPRND (dr) = opval;
4415     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4416   }
4417   {
4418     SI opval = temp1;
4419     OPRND (sr) = opval;
4420     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4421   }
4422 }
4423
4424 #undef OPRND
4425 #undef FLD
4426 }
4427   NEXT (vpc);
4428
4429 CASE (sem, INSN_WRITE_LD_PLUS) : /* ld $dr,@$sr+ */
4430   {
4431     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4432     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4433 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4434 #define OPRND(f) par_exec->operands.sfmt_ld_plus.f
4435     int UNUSED written = abuf->written;
4436     IADDR UNUSED pc = abuf->addr;
4437     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4438
4439   * FLD (i_dr) = OPRND (dr);
4440   * FLD (i_sr) = OPRND (sr);
4441
4442 #undef OPRND
4443 #undef FLD
4444   }
4445   NEXT (vpc);
4446
4447   CASE (sem, INSN_PAR_LDI8) : /* ldi8 $dr,$simm8 */
4448 {
4449   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4450   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4451 #define FLD(f) abuf->fields.sfmt_addi.f
4452 #define OPRND(f) par_exec->operands.sfmt_ldi8.f
4453   int UNUSED written = 0;
4454   IADDR UNUSED pc = abuf->addr;
4455   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4456
4457   {
4458     SI opval = FLD (f_simm8);
4459     OPRND (dr) = opval;
4460     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4461   }
4462
4463 #undef OPRND
4464 #undef FLD
4465 }
4466   NEXT (vpc);
4467
4468 CASE (sem, INSN_WRITE_LDI8) : /* ldi8 $dr,$simm8 */
4469   {
4470     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4471     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4472 #define FLD(f) abuf->fields.sfmt_addi.f
4473 #define OPRND(f) par_exec->operands.sfmt_ldi8.f
4474     int UNUSED written = abuf->written;
4475     IADDR UNUSED pc = abuf->addr;
4476     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4477
4478   * FLD (i_dr) = OPRND (dr);
4479
4480 #undef OPRND
4481 #undef FLD
4482   }
4483   NEXT (vpc);
4484
4485   CASE (sem, INSN_PAR_LOCK) : /* lock $dr,@$sr */
4486 {
4487   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4488   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4489 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4490 #define OPRND(f) par_exec->operands.sfmt_lock.f
4491   int UNUSED written = 0;
4492   IADDR UNUSED pc = abuf->addr;
4493   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4494
4495 {
4496   {
4497     BI opval = 1;
4498     OPRND (h_lock_BI) = opval;
4499     TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
4500   }
4501   {
4502     SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
4503     OPRND (dr) = opval;
4504     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4505   }
4506 }
4507
4508 #undef OPRND
4509 #undef FLD
4510 }
4511   NEXT (vpc);
4512
4513 CASE (sem, INSN_WRITE_LOCK) : /* lock $dr,@$sr */
4514   {
4515     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4516     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4517 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4518 #define OPRND(f) par_exec->operands.sfmt_lock.f
4519     int UNUSED written = abuf->written;
4520     IADDR UNUSED pc = abuf->addr;
4521     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4522
4523   * FLD (i_dr) = OPRND (dr);
4524   CPU (h_lock) = OPRND (h_lock_BI);
4525
4526 #undef OPRND
4527 #undef FLD
4528   }
4529   NEXT (vpc);
4530
4531   CASE (sem, INSN_PAR_MACHI_A) : /* machi $src1,$src2,$acc */
4532 {
4533   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4534   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4535 #define FLD(f) abuf->fields.sfmt_machi_a.f
4536 #define OPRND(f) par_exec->operands.sfmt_machi_a.f
4537   int UNUSED written = 0;
4538   IADDR UNUSED pc = abuf->addr;
4539   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4540
4541   {
4542     DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8);
4543     OPRND (acc) = opval;
4544     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4545   }
4546
4547 #undef OPRND
4548 #undef FLD
4549 }
4550   NEXT (vpc);
4551
4552 CASE (sem, INSN_WRITE_MACHI_A) : /* machi $src1,$src2,$acc */
4553   {
4554     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4555     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4556 #define FLD(f) abuf->fields.sfmt_machi_a.f
4557 #define OPRND(f) par_exec->operands.sfmt_machi_a.f
4558     int UNUSED written = abuf->written;
4559     IADDR UNUSED pc = abuf->addr;
4560     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4561
4562   SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4563
4564 #undef OPRND
4565 #undef FLD
4566   }
4567   NEXT (vpc);
4568
4569   CASE (sem, INSN_PAR_MACLO_A) : /* maclo $src1,$src2,$acc */
4570 {
4571   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4572   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4573 #define FLD(f) abuf->fields.sfmt_machi_a.f
4574 #define OPRND(f) par_exec->operands.sfmt_machi_a.f
4575   int UNUSED written = 0;
4576   IADDR UNUSED pc = abuf->addr;
4577   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4578
4579   {
4580     DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8);
4581     OPRND (acc) = opval;
4582     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4583   }
4584
4585 #undef OPRND
4586 #undef FLD
4587 }
4588   NEXT (vpc);
4589
4590 CASE (sem, INSN_WRITE_MACLO_A) : /* maclo $src1,$src2,$acc */
4591   {
4592     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4593     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4594 #define FLD(f) abuf->fields.sfmt_machi_a.f
4595 #define OPRND(f) par_exec->operands.sfmt_machi_a.f
4596     int UNUSED written = abuf->written;
4597     IADDR UNUSED pc = abuf->addr;
4598     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4599
4600   SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4601
4602 #undef OPRND
4603 #undef FLD
4604   }
4605   NEXT (vpc);
4606
4607   CASE (sem, INSN_PAR_MACWHI_A) : /* macwhi $src1,$src2,$acc */
4608 {
4609   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4610   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4611 #define FLD(f) abuf->fields.sfmt_machi_a.f
4612 #define OPRND(f) par_exec->operands.sfmt_machi_a.f
4613   int UNUSED written = 0;
4614   IADDR UNUSED pc = abuf->addr;
4615   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4616
4617   {
4618     DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))));
4619     OPRND (acc) = opval;
4620     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4621   }
4622
4623 #undef OPRND
4624 #undef FLD
4625 }
4626   NEXT (vpc);
4627
4628 CASE (sem, INSN_WRITE_MACWHI_A) : /* macwhi $src1,$src2,$acc */
4629   {
4630     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4631     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4632 #define FLD(f) abuf->fields.sfmt_machi_a.f
4633 #define OPRND(f) par_exec->operands.sfmt_machi_a.f
4634     int UNUSED written = abuf->written;
4635     IADDR UNUSED pc = abuf->addr;
4636     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4637
4638   SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4639
4640 #undef OPRND
4641 #undef FLD
4642   }
4643   NEXT (vpc);
4644
4645   CASE (sem, INSN_PAR_MACWLO_A) : /* macwlo $src1,$src2,$acc */
4646 {
4647   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4648   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4649 #define FLD(f) abuf->fields.sfmt_machi_a.f
4650 #define OPRND(f) par_exec->operands.sfmt_machi_a.f
4651   int UNUSED written = 0;
4652   IADDR UNUSED pc = abuf->addr;
4653   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4654
4655   {
4656     DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))));
4657     OPRND (acc) = opval;
4658     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4659   }
4660
4661 #undef OPRND
4662 #undef FLD
4663 }
4664   NEXT (vpc);
4665
4666 CASE (sem, INSN_WRITE_MACWLO_A) : /* macwlo $src1,$src2,$acc */
4667   {
4668     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4669     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4670 #define FLD(f) abuf->fields.sfmt_machi_a.f
4671 #define OPRND(f) par_exec->operands.sfmt_machi_a.f
4672     int UNUSED written = abuf->written;
4673     IADDR UNUSED pc = abuf->addr;
4674     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4675
4676   SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4677
4678 #undef OPRND
4679 #undef FLD
4680   }
4681   NEXT (vpc);
4682
4683   CASE (sem, INSN_PAR_MUL) : /* mul $dr,$sr */
4684 {
4685   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4686   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4687 #define FLD(f) abuf->fields.sfmt_add.f
4688 #define OPRND(f) par_exec->operands.sfmt_add.f
4689   int UNUSED written = 0;
4690   IADDR UNUSED pc = abuf->addr;
4691   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4692
4693   {
4694     SI opval = MULSI (* FLD (i_dr), * FLD (i_sr));
4695     OPRND (dr) = opval;
4696     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4697   }
4698
4699 #undef OPRND
4700 #undef FLD
4701 }
4702   NEXT (vpc);
4703
4704 CASE (sem, INSN_WRITE_MUL) : /* mul $dr,$sr */
4705   {
4706     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4707     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4708 #define FLD(f) abuf->fields.sfmt_add.f
4709 #define OPRND(f) par_exec->operands.sfmt_add.f
4710     int UNUSED written = abuf->written;
4711     IADDR UNUSED pc = abuf->addr;
4712     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4713
4714   * FLD (i_dr) = OPRND (dr);
4715
4716 #undef OPRND
4717 #undef FLD
4718   }
4719   NEXT (vpc);
4720
4721   CASE (sem, INSN_PAR_MULHI_A) : /* mulhi $src1,$src2,$acc */
4722 {
4723   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4724   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4725 #define FLD(f) abuf->fields.sfmt_machi_a.f
4726 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4727   int UNUSED written = 0;
4728   IADDR UNUSED pc = abuf->addr;
4729   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4730
4731   {
4732     DI opval = SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 16), 16);
4733     OPRND (acc) = opval;
4734     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4735   }
4736
4737 #undef OPRND
4738 #undef FLD
4739 }
4740   NEXT (vpc);
4741
4742 CASE (sem, INSN_WRITE_MULHI_A) : /* mulhi $src1,$src2,$acc */
4743   {
4744     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4745     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4746 #define FLD(f) abuf->fields.sfmt_machi_a.f
4747 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4748     int UNUSED written = abuf->written;
4749     IADDR UNUSED pc = abuf->addr;
4750     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4751
4752   SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4753
4754 #undef OPRND
4755 #undef FLD
4756   }
4757   NEXT (vpc);
4758
4759   CASE (sem, INSN_PAR_MULLO_A) : /* mullo $src1,$src2,$acc */
4760 {
4761   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4762   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4763 #define FLD(f) abuf->fields.sfmt_machi_a.f
4764 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4765   int UNUSED written = 0;
4766   IADDR UNUSED pc = abuf->addr;
4767   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4768
4769   {
4770     DI opval = SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 16), 16);
4771     OPRND (acc) = opval;
4772     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4773   }
4774
4775 #undef OPRND
4776 #undef FLD
4777 }
4778   NEXT (vpc);
4779
4780 CASE (sem, INSN_WRITE_MULLO_A) : /* mullo $src1,$src2,$acc */
4781   {
4782     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4783     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4784 #define FLD(f) abuf->fields.sfmt_machi_a.f
4785 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4786     int UNUSED written = abuf->written;
4787     IADDR UNUSED pc = abuf->addr;
4788     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4789
4790   SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4791
4792 #undef OPRND
4793 #undef FLD
4794   }
4795   NEXT (vpc);
4796
4797   CASE (sem, INSN_PAR_MULWHI_A) : /* mulwhi $src1,$src2,$acc */
4798 {
4799   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4800   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4801 #define FLD(f) abuf->fields.sfmt_machi_a.f
4802 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4803   int UNUSED written = 0;
4804   IADDR UNUSED pc = abuf->addr;
4805   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4806
4807   {
4808     DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))));
4809     OPRND (acc) = opval;
4810     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4811   }
4812
4813 #undef OPRND
4814 #undef FLD
4815 }
4816   NEXT (vpc);
4817
4818 CASE (sem, INSN_WRITE_MULWHI_A) : /* mulwhi $src1,$src2,$acc */
4819   {
4820     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4821     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4822 #define FLD(f) abuf->fields.sfmt_machi_a.f
4823 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4824     int UNUSED written = abuf->written;
4825     IADDR UNUSED pc = abuf->addr;
4826     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4827
4828   SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4829
4830 #undef OPRND
4831 #undef FLD
4832   }
4833   NEXT (vpc);
4834
4835   CASE (sem, INSN_PAR_MULWLO_A) : /* mulwlo $src1,$src2,$acc */
4836 {
4837   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4838   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4839 #define FLD(f) abuf->fields.sfmt_machi_a.f
4840 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4841   int UNUSED written = 0;
4842   IADDR UNUSED pc = abuf->addr;
4843   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4844
4845   {
4846     DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))));
4847     OPRND (acc) = opval;
4848     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4849   }
4850
4851 #undef OPRND
4852 #undef FLD
4853 }
4854   NEXT (vpc);
4855
4856 CASE (sem, INSN_WRITE_MULWLO_A) : /* mulwlo $src1,$src2,$acc */
4857   {
4858     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4859     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4860 #define FLD(f) abuf->fields.sfmt_machi_a.f
4861 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4862     int UNUSED written = abuf->written;
4863     IADDR UNUSED pc = abuf->addr;
4864     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4865
4866   SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4867
4868 #undef OPRND
4869 #undef FLD
4870   }
4871   NEXT (vpc);
4872
4873   CASE (sem, INSN_PAR_MV) : /* mv $dr,$sr */
4874 {
4875   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4876   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4877 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4878 #define OPRND(f) par_exec->operands.sfmt_mv.f
4879   int UNUSED written = 0;
4880   IADDR UNUSED pc = abuf->addr;
4881   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4882
4883   {
4884     SI opval = * FLD (i_sr);
4885     OPRND (dr) = opval;
4886     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4887   }
4888
4889 #undef OPRND
4890 #undef FLD
4891 }
4892   NEXT (vpc);
4893
4894 CASE (sem, INSN_WRITE_MV) : /* mv $dr,$sr */
4895   {
4896     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4897     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4898 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4899 #define OPRND(f) par_exec->operands.sfmt_mv.f
4900     int UNUSED written = abuf->written;
4901     IADDR UNUSED pc = abuf->addr;
4902     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4903
4904   * FLD (i_dr) = OPRND (dr);
4905
4906 #undef OPRND
4907 #undef FLD
4908   }
4909   NEXT (vpc);
4910
4911   CASE (sem, INSN_PAR_MVFACHI_A) : /* mvfachi $dr,$accs */
4912 {
4913   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4914   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4915 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
4916 #define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
4917   int UNUSED written = 0;
4918   IADDR UNUSED pc = abuf->addr;
4919   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4920
4921   {
4922     SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 32));
4923     OPRND (dr) = opval;
4924     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4925   }
4926
4927 #undef OPRND
4928 #undef FLD
4929 }
4930   NEXT (vpc);
4931
4932 CASE (sem, INSN_WRITE_MVFACHI_A) : /* mvfachi $dr,$accs */
4933   {
4934     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4935     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4936 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
4937 #define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
4938     int UNUSED written = abuf->written;
4939     IADDR UNUSED pc = abuf->addr;
4940     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4941
4942   * FLD (i_dr) = OPRND (dr);
4943
4944 #undef OPRND
4945 #undef FLD
4946   }
4947   NEXT (vpc);
4948
4949   CASE (sem, INSN_PAR_MVFACLO_A) : /* mvfaclo $dr,$accs */
4950 {
4951   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4952   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4953 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
4954 #define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
4955   int UNUSED written = 0;
4956   IADDR UNUSED pc = abuf->addr;
4957   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4958
4959   {
4960     SI opval = TRUNCDISI (GET_H_ACCUMS (FLD (f_accs)));
4961     OPRND (dr) = opval;
4962     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4963   }
4964
4965 #undef OPRND
4966 #undef FLD
4967 }
4968   NEXT (vpc);
4969
4970 CASE (sem, INSN_WRITE_MVFACLO_A) : /* mvfaclo $dr,$accs */
4971   {
4972     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4973     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4974 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
4975 #define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
4976     int UNUSED written = abuf->written;
4977     IADDR UNUSED pc = abuf->addr;
4978     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4979
4980   * FLD (i_dr) = OPRND (dr);
4981
4982 #undef OPRND
4983 #undef FLD
4984   }
4985   NEXT (vpc);
4986
4987   CASE (sem, INSN_PAR_MVFACMI_A) : /* mvfacmi $dr,$accs */
4988 {
4989   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4990   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4991 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
4992 #define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
4993   int UNUSED written = 0;
4994   IADDR UNUSED pc = abuf->addr;
4995   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4996
4997   {
4998     SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 16));
4999     OPRND (dr) = opval;
5000     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5001   }
5002
5003 #undef OPRND
5004 #undef FLD
5005 }
5006   NEXT (vpc);
5007
5008 CASE (sem, INSN_WRITE_MVFACMI_A) : /* mvfacmi $dr,$accs */
5009   {
5010     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5011     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5012 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
5013 #define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
5014     int UNUSED written = abuf->written;
5015     IADDR UNUSED pc = abuf->addr;
5016     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5017
5018   * FLD (i_dr) = OPRND (dr);
5019
5020 #undef OPRND
5021 #undef FLD
5022   }
5023   NEXT (vpc);
5024
5025   CASE (sem, INSN_PAR_MVFC) : /* mvfc $dr,$scr */
5026 {
5027   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5028   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5029 #define FLD(f) abuf->fields.sfmt_ld_plus.f
5030 #define OPRND(f) par_exec->operands.sfmt_mvfc.f
5031   int UNUSED written = 0;
5032   IADDR UNUSED pc = abuf->addr;
5033   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5034
5035   {
5036     SI opval = GET_H_CR (FLD (f_r2));
5037     OPRND (dr) = opval;
5038     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5039   }
5040
5041 #undef OPRND
5042 #undef FLD
5043 }
5044   NEXT (vpc);
5045
5046 CASE (sem, INSN_WRITE_MVFC) : /* mvfc $dr,$scr */
5047   {
5048     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5049     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5050 #define FLD(f) abuf->fields.sfmt_ld_plus.f
5051 #define OPRND(f) par_exec->operands.sfmt_mvfc.f
5052     int UNUSED written = abuf->written;
5053     IADDR UNUSED pc = abuf->addr;
5054     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5055
5056   * FLD (i_dr) = OPRND (dr);
5057
5058 #undef OPRND
5059 #undef FLD
5060   }
5061   NEXT (vpc);
5062
5063   CASE (sem, INSN_PAR_MVTACHI_A) : /* mvtachi $src1,$accs */
5064 {
5065   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5066   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5067 #define FLD(f) abuf->fields.sfmt_mvtachi_a.f
5068 #define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f
5069   int UNUSED written = 0;
5070   IADDR UNUSED pc = abuf->addr;
5071   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5072
5073   {
5074     DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (* FLD (i_src1)), 32));
5075     OPRND (accs) = opval;
5076     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
5077   }
5078
5079 #undef OPRND
5080 #undef FLD
5081 }
5082   NEXT (vpc);
5083
5084 CASE (sem, INSN_WRITE_MVTACHI_A) : /* mvtachi $src1,$accs */
5085   {
5086     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5087     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5088 #define FLD(f) abuf->fields.sfmt_mvtachi_a.f
5089 #define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f
5090     int UNUSED written = abuf->written;
5091     IADDR UNUSED pc = abuf->addr;
5092     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5093
5094   SET_H_ACCUMS (FLD (f_accs), OPRND (accs));
5095
5096 #undef OPRND
5097 #undef FLD
5098   }
5099   NEXT (vpc);
5100
5101   CASE (sem, INSN_PAR_MVTACLO_A) : /* mvtaclo $src1,$accs */
5102 {
5103   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5104   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5105 #define FLD(f) abuf->fields.sfmt_mvtachi_a.f
5106 #define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f
5107   int UNUSED written = 0;
5108   IADDR UNUSED pc = abuf->addr;
5109   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5110
5111   {
5112     DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0xffffffff, 0)), ZEXTSIDI (* FLD (i_src1)));
5113     OPRND (accs) = opval;
5114     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
5115   }
5116
5117 #undef OPRND
5118 #undef FLD
5119 }
5120   NEXT (vpc);
5121
5122 CASE (sem, INSN_WRITE_MVTACLO_A) : /* mvtaclo $src1,$accs */
5123   {
5124     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5125     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5126 #define FLD(f) abuf->fields.sfmt_mvtachi_a.f
5127 #define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f
5128     int UNUSED written = abuf->written;
5129     IADDR UNUSED pc = abuf->addr;
5130     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5131
5132   SET_H_ACCUMS (FLD (f_accs), OPRND (accs));
5133
5134 #undef OPRND
5135 #undef FLD
5136   }
5137   NEXT (vpc);
5138
5139   CASE (sem, INSN_PAR_MVTC) : /* mvtc $sr,$dcr */
5140 {
5141   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5142   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5143 #define FLD(f) abuf->fields.sfmt_ld_plus.f
5144 #define OPRND(f) par_exec->operands.sfmt_mvtc.f
5145   int UNUSED written = 0;
5146   IADDR UNUSED pc = abuf->addr;
5147   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5148
5149   {
5150     USI opval = * FLD (i_sr);
5151     OPRND (dcr) = opval;
5152     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
5153   }
5154
5155 #undef OPRND
5156 #undef FLD
5157 }
5158   NEXT (vpc);
5159
5160 CASE (sem, INSN_WRITE_MVTC) : /* mvtc $sr,$dcr */
5161   {
5162     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5163     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5164 #define FLD(f) abuf->fields.sfmt_ld_plus.f
5165 #define OPRND(f) par_exec->operands.sfmt_mvtc.f
5166     int UNUSED written = abuf->written;
5167     IADDR UNUSED pc = abuf->addr;
5168     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5169
5170   SET_H_CR (FLD (f_r1), OPRND (dcr));
5171
5172 #undef OPRND
5173 #undef FLD
5174   }
5175   NEXT (vpc);
5176
5177   CASE (sem, INSN_PAR_NEG) : /* neg $dr,$sr */
5178 {
5179   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5180   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5181 #define FLD(f) abuf->fields.sfmt_ld_plus.f
5182 #define OPRND(f) par_exec->operands.sfmt_mv.f
5183   int UNUSED written = 0;
5184   IADDR UNUSED pc = abuf->addr;
5185   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5186
5187   {
5188     SI opval = NEGSI (* FLD (i_sr));
5189     OPRND (dr) = opval;
5190     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5191   }
5192
5193 #undef OPRND
5194 #undef FLD
5195 }
5196   NEXT (vpc);
5197
5198 CASE (sem, INSN_WRITE_NEG) : /* neg $dr,$sr */
5199   {
5200     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5201     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5202 #define FLD(f) abuf->fields.sfmt_ld_plus.f
5203 #define OPRND(f) par_exec->operands.sfmt_mv.f
5204     int UNUSED written = abuf->written;
5205     IADDR UNUSED pc = abuf->addr;
5206     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5207
5208   * FLD (i_dr) = OPRND (dr);
5209
5210 #undef OPRND
5211 #undef FLD
5212   }
5213   NEXT (vpc);
5214
5215   CASE (sem, INSN_PAR_NOP) : /* nop */
5216 {
5217   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5218   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5219 #define FLD(f) abuf->fields.fmt_empty.f
5220 #define OPRND(f) par_exec->operands.sfmt_nop.f
5221   int UNUSED written = 0;
5222   IADDR UNUSED pc = abuf->addr;
5223   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5224
5225 PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr);
5226
5227 #undef OPRND
5228 #undef FLD
5229 }
5230   NEXT (vpc);
5231
5232 CASE (sem, INSN_WRITE_NOP) : /* nop */
5233   {
5234     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5235     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5236 #define FLD(f) abuf->fields.fmt_empty.f
5237 #define OPRND(f) par_exec->operands.sfmt_nop.f
5238     int UNUSED written = abuf->written;
5239     IADDR UNUSED pc = abuf->addr;
5240     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5241
5242
5243 #undef OPRND
5244 #undef FLD
5245   }
5246   NEXT (vpc);
5247
5248   CASE (sem, INSN_PAR_NOT) : /* not $dr,$sr */
5249 {
5250   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5251   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5252 #define FLD(f) abuf->fields.sfmt_ld_plus.f
5253 #define OPRND(f) par_exec->operands.sfmt_mv.f
5254   int UNUSED written = 0;
5255   IADDR UNUSED pc = abuf->addr;
5256   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5257
5258   {
5259     SI opval = INVSI (* FLD (i_sr));
5260     OPRND (dr) = opval;
5261     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5262   }
5263
5264 #undef OPRND
5265 #undef FLD
5266 }
5267   NEXT (vpc);
5268
5269 CASE (sem, INSN_WRITE_NOT) : /* not $dr,$sr */
5270   {
5271     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5272     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5273 #define FLD(f) abuf->fields.sfmt_ld_plus.f
5274 #define OPRND(f) par_exec->operands.sfmt_mv.f
5275     int UNUSED written = abuf->written;
5276     IADDR UNUSED pc = abuf->addr;
5277     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5278
5279   * FLD (i_dr) = OPRND (dr);
5280
5281 #undef OPRND
5282 #undef FLD
5283   }
5284   NEXT (vpc);
5285
5286   CASE (sem, INSN_PAR_RAC_DSI) : /* rac $accd,$accs,$imm1 */
5287 {
5288   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5289   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5290 #define FLD(f) abuf->fields.sfmt_rac_dsi.f
5291 #define OPRND(f) par_exec->operands.sfmt_rac_dsi.f
5292   int UNUSED written = 0;
5293   IADDR UNUSED pc = abuf->addr;
5294   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5295
5296 {
5297   DI tmp_tmp1;
5298   tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1));
5299   tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 32768));
5300   {
5301     DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0xffff0000))) ? (MAKEDI (32767, 0xffff0000)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0xffff0000)));
5302     OPRND (accd) = opval;
5303     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
5304   }
5305 }
5306
5307 #undef OPRND
5308 #undef FLD
5309 }
5310   NEXT (vpc);
5311
5312 CASE (sem, INSN_WRITE_RAC_DSI) : /* rac $accd,$accs,$imm1 */
5313   {
5314     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5315     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5316 #define FLD(f) abuf->fields.sfmt_rac_dsi.f
5317 #define OPRND(f) par_exec->operands.sfmt_rac_dsi.f
5318     int UNUSED written = abuf->written;
5319     IADDR UNUSED pc = abuf->addr;
5320     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5321
5322   SET_H_ACCUMS (FLD (f_accd), OPRND (accd));
5323
5324 #undef OPRND
5325 #undef FLD
5326   }
5327   NEXT (vpc);
5328
5329   CASE (sem, INSN_PAR_RACH_DSI) : /* rach $accd,$accs,$imm1 */
5330 {
5331   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5332   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5333 #define FLD(f) abuf->fields.sfmt_rac_dsi.f
5334 #define OPRND(f) par_exec->operands.sfmt_rac_dsi.f
5335   int UNUSED written = 0;
5336   IADDR UNUSED pc = abuf->addr;
5337   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5338
5339 {
5340   DI tmp_tmp1;
5341   tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1));
5342   tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 0x80000000));
5343   {
5344     DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0))) ? (MAKEDI (32767, 0)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0)));
5345     OPRND (accd) = opval;
5346     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
5347   }
5348 }
5349
5350 #undef OPRND
5351 #undef FLD
5352 }
5353   NEXT (vpc);
5354
5355 CASE (sem, INSN_WRITE_RACH_DSI) : /* rach $accd,$accs,$imm1 */
5356   {
5357     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5358     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5359 #define FLD(f) abuf->fields.sfmt_rac_dsi.f
5360 #define OPRND(f) par_exec->operands.sfmt_rac_dsi.f
5361     int UNUSED written = abuf->written;
5362     IADDR UNUSED pc = abuf->addr;
5363     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5364
5365   SET_H_ACCUMS (FLD (f_accd), OPRND (accd));
5366
5367 #undef OPRND
5368 #undef FLD
5369   }
5370   NEXT (vpc);
5371
5372   CASE (sem, INSN_PAR_RTE) : /* rte */
5373 {
5374   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5375   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5376 #define FLD(f) abuf->fields.fmt_empty.f
5377 #define OPRND(f) par_exec->operands.sfmt_rte.f
5378   int UNUSED written = 0;
5379   IADDR UNUSED pc = abuf->addr;
5380   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5381
5382 {
5383   {
5384     USI opval = ANDSI (GET_H_CR (((UINT) 6)), -4);
5385     OPRND (pc) = opval;
5386     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
5387   }
5388   {
5389     USI opval = GET_H_CR (((UINT) 14));
5390     OPRND (h_cr_USI_6) = opval;
5391     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
5392   }
5393   {
5394     UQI opval = CPU (h_bpsw);
5395     OPRND (h_psw_UQI) = opval;
5396     TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
5397   }
5398   {
5399     UQI opval = CPU (h_bbpsw);
5400     OPRND (h_bpsw_UQI) = opval;
5401     TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
5402   }
5403 }
5404
5405 #undef OPRND
5406 #undef FLD
5407 }
5408   NEXT (vpc);
5409
5410 CASE (sem, INSN_WRITE_RTE) : /* rte */
5411   {
5412     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5413     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5414 #define FLD(f) abuf->fields.fmt_empty.f
5415 #define OPRND(f) par_exec->operands.sfmt_rte.f
5416     int UNUSED written = abuf->written;
5417     IADDR UNUSED pc = abuf->addr;
5418     SEM_BRANCH_INIT
5419     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5420
5421   CPU (h_bpsw) = OPRND (h_bpsw_UQI);
5422   SET_H_CR (((UINT) 6), OPRND (h_cr_USI_6));
5423   SET_H_PSW (OPRND (h_psw_UQI));
5424   SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
5425
5426   SEM_BRANCH_FINI (vpc);
5427 #undef OPRND
5428 #undef FLD
5429   }
5430   NEXT (vpc);
5431
5432   CASE (sem, INSN_PAR_SLL) : /* sll $dr,$sr */
5433 {
5434   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5435   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5436 #define FLD(f) abuf->fields.sfmt_add.f
5437 #define OPRND(f) par_exec->operands.sfmt_add.f
5438   int UNUSED written = 0;
5439   IADDR UNUSED pc = abuf->addr;
5440   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5441
5442   {
5443     SI opval = SLLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
5444     OPRND (dr) = opval;
5445     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5446   }
5447
5448 #undef OPRND
5449 #undef FLD
5450 }
5451   NEXT (vpc);
5452
5453 CASE (sem, INSN_WRITE_SLL) : /* sll $dr,$sr */
5454   {
5455     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5456     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5457 #define FLD(f) abuf->fields.sfmt_add.f
5458 #define OPRND(f) par_exec->operands.sfmt_add.f
5459     int UNUSED written = abuf->written;
5460     IADDR UNUSED pc = abuf->addr;
5461     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5462
5463   * FLD (i_dr) = OPRND (dr);
5464
5465 #undef OPRND
5466 #undef FLD
5467   }
5468   NEXT (vpc);
5469
5470   CASE (sem, INSN_PAR_SLLI) : /* slli $dr,$uimm5 */
5471 {
5472   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5473   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5474 #define FLD(f) abuf->fields.sfmt_slli.f
5475 #define OPRND(f) par_exec->operands.sfmt_slli.f
5476   int UNUSED written = 0;
5477   IADDR UNUSED pc = abuf->addr;
5478   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5479
5480   {
5481     SI opval = SLLSI (* FLD (i_dr), FLD (f_uimm5));
5482     OPRND (dr) = opval;
5483     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5484   }
5485
5486 #undef OPRND
5487 #undef FLD
5488 }
5489   NEXT (vpc);
5490
5491 CASE (sem, INSN_WRITE_SLLI) : /* slli $dr,$uimm5 */
5492   {
5493     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5494     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5495 #define FLD(f) abuf->fields.sfmt_slli.f
5496 #define OPRND(f) par_exec->operands.sfmt_slli.f
5497     int UNUSED written = abuf->written;
5498     IADDR UNUSED pc = abuf->addr;
5499     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5500
5501   * FLD (i_dr) = OPRND (dr);
5502
5503 #undef OPRND
5504 #undef FLD
5505   }
5506   NEXT (vpc);
5507
5508   CASE (sem, INSN_PAR_SRA) : /* sra $dr,$sr */
5509 {
5510   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5511   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5512 #define FLD(f) abuf->fields.sfmt_add.f
5513 #define OPRND(f) par_exec->operands.sfmt_add.f
5514   int UNUSED written = 0;
5515   IADDR UNUSED pc = abuf->addr;
5516   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5517
5518   {
5519     SI opval = SRASI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
5520     OPRND (dr) = opval;
5521     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5522   }
5523
5524 #undef OPRND
5525 #undef FLD
5526 }
5527   NEXT (vpc);
5528
5529 CASE (sem, INSN_WRITE_SRA) : /* sra $dr,$sr */
5530   {
5531     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5532     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5533 #define FLD(f) abuf->fields.sfmt_add.f
5534 #define OPRND(f) par_exec->operands.sfmt_add.f
5535     int UNUSED written = abuf->written;
5536     IADDR UNUSED pc = abuf->addr;
5537     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5538
5539   * FLD (i_dr) = OPRND (dr);
5540
5541 #undef OPRND
5542 #undef FLD
5543   }
5544   NEXT (vpc);
5545
5546   CASE (sem, INSN_PAR_SRAI) : /* srai $dr,$uimm5 */
5547 {
5548   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5549   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5550 #define FLD(f) abuf->fields.sfmt_slli.f
5551 #define OPRND(f) par_exec->operands.sfmt_slli.f
5552   int UNUSED written = 0;
5553   IADDR UNUSED pc = abuf->addr;
5554   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5555
5556   {
5557     SI opval = SRASI (* FLD (i_dr), FLD (f_uimm5));
5558     OPRND (dr) = opval;
5559     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5560   }
5561
5562 #undef OPRND
5563 #undef FLD
5564 }
5565   NEXT (vpc);
5566
5567 CASE (sem, INSN_WRITE_SRAI) : /* srai $dr,$uimm5 */
5568   {
5569     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5570     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5571 #define FLD(f) abuf->fields.sfmt_slli.f
5572 #define OPRND(f) par_exec->operands.sfmt_slli.f
5573     int UNUSED written = abuf->written;
5574     IADDR UNUSED pc = abuf->addr;
5575     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5576
5577   * FLD (i_dr) = OPRND (dr);
5578
5579 #undef OPRND
5580 #undef FLD
5581   }
5582   NEXT (vpc);
5583
5584   CASE (sem, INSN_PAR_SRL) : /* srl $dr,$sr */
5585 {
5586   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5587   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5588 #define FLD(f) abuf->fields.sfmt_add.f
5589 #define OPRND(f) par_exec->operands.sfmt_add.f
5590   int UNUSED written = 0;
5591   IADDR UNUSED pc = abuf->addr;
5592   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5593
5594   {
5595     SI opval = SRLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
5596     OPRND (dr) = opval;
5597     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5598   }
5599
5600 #undef OPRND
5601 #undef FLD
5602 }
5603   NEXT (vpc);
5604
5605 CASE (sem, INSN_WRITE_SRL) : /* srl $dr,$sr */
5606   {
5607     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5608     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5609 #define FLD(f) abuf->fields.sfmt_add.f
5610 #define OPRND(f) par_exec->operands.sfmt_add.f
5611     int UNUSED written = abuf->written;
5612     IADDR UNUSED pc = abuf->addr;
5613     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5614
5615   * FLD (i_dr) = OPRND (dr);
5616
5617 #undef OPRND
5618 #undef FLD
5619   }
5620   NEXT (vpc);
5621
5622   CASE (sem, INSN_PAR_SRLI) : /* srli $dr,$uimm5 */
5623 {
5624   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5625   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5626 #define FLD(f) abuf->fields.sfmt_slli.f
5627 #define OPRND(f) par_exec->operands.sfmt_slli.f
5628   int UNUSED written = 0;
5629   IADDR UNUSED pc = abuf->addr;
5630   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5631
5632   {
5633     SI opval = SRLSI (* FLD (i_dr), FLD (f_uimm5));
5634     OPRND (dr) = opval;
5635     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5636   }
5637
5638 #undef OPRND
5639 #undef FLD
5640 }
5641   NEXT (vpc);
5642
5643 CASE (sem, INSN_WRITE_SRLI) : /* srli $dr,$uimm5 */
5644   {
5645     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5646     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5647 #define FLD(f) abuf->fields.sfmt_slli.f
5648 #define OPRND(f) par_exec->operands.sfmt_slli.f
5649     int UNUSED written = abuf->written;
5650     IADDR UNUSED pc = abuf->addr;
5651     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5652
5653   * FLD (i_dr) = OPRND (dr);
5654
5655 #undef OPRND
5656 #undef FLD
5657   }
5658   NEXT (vpc);
5659
5660   CASE (sem, INSN_PAR_ST) : /* st $src1,@$src2 */
5661 {
5662   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5663   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5664 #define FLD(f) abuf->fields.sfmt_st_plus.f
5665 #define OPRND(f) par_exec->operands.sfmt_st.f
5666   int UNUSED written = 0;
5667   IADDR UNUSED pc = abuf->addr;
5668   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5669
5670   {
5671     SI opval = * FLD (i_src1);
5672     OPRND (h_memory_SI_src2_idx) = * FLD (i_src2);
5673     OPRND (h_memory_SI_src2) = opval;
5674     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5675   }
5676
5677 #undef OPRND
5678 #undef FLD
5679 }
5680   NEXT (vpc);
5681
5682 CASE (sem, INSN_WRITE_ST) : /* st $src1,@$src2 */
5683   {
5684     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5685     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5686 #define FLD(f) abuf->fields.sfmt_st_plus.f
5687 #define OPRND(f) par_exec->operands.sfmt_st.f
5688     int UNUSED written = abuf->written;
5689     IADDR UNUSED pc = abuf->addr;
5690     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5691
5692   SETMEMSI (current_cpu, pc, OPRND (h_memory_SI_src2_idx), OPRND (h_memory_SI_src2));
5693
5694 #undef OPRND
5695 #undef FLD
5696   }
5697   NEXT (vpc);
5698
5699   CASE (sem, INSN_PAR_STB) : /* stb $src1,@$src2 */
5700 {
5701   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5702   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5703 #define FLD(f) abuf->fields.sfmt_st_plus.f
5704 #define OPRND(f) par_exec->operands.sfmt_stb.f
5705   int UNUSED written = 0;
5706   IADDR UNUSED pc = abuf->addr;
5707   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5708
5709   {
5710     QI opval = * FLD (i_src1);
5711     OPRND (h_memory_QI_src2_idx) = * FLD (i_src2);
5712     OPRND (h_memory_QI_src2) = opval;
5713     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5714   }
5715
5716 #undef OPRND
5717 #undef FLD
5718 }
5719   NEXT (vpc);
5720
5721 CASE (sem, INSN_WRITE_STB) : /* stb $src1,@$src2 */
5722   {
5723     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5724     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5725 #define FLD(f) abuf->fields.sfmt_st_plus.f
5726 #define OPRND(f) par_exec->operands.sfmt_stb.f
5727     int UNUSED written = abuf->written;
5728     IADDR UNUSED pc = abuf->addr;
5729     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5730
5731   SETMEMQI (current_cpu, pc, OPRND (h_memory_QI_src2_idx), OPRND (h_memory_QI_src2));
5732
5733 #undef OPRND
5734 #undef FLD
5735   }
5736   NEXT (vpc);
5737
5738   CASE (sem, INSN_PAR_STH) : /* sth $src1,@$src2 */
5739 {
5740   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5741   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5742 #define FLD(f) abuf->fields.sfmt_st_plus.f
5743 #define OPRND(f) par_exec->operands.sfmt_sth.f
5744   int UNUSED written = 0;
5745   IADDR UNUSED pc = abuf->addr;
5746   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5747
5748   {
5749     HI opval = * FLD (i_src1);
5750     OPRND (h_memory_HI_src2_idx) = * FLD (i_src2);
5751     OPRND (h_memory_HI_src2) = opval;
5752     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5753   }
5754
5755 #undef OPRND
5756 #undef FLD
5757 }
5758   NEXT (vpc);
5759
5760 CASE (sem, INSN_WRITE_STH) : /* sth $src1,@$src2 */
5761   {
5762     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5763     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5764 #define FLD(f) abuf->fields.sfmt_st_plus.f
5765 #define OPRND(f) par_exec->operands.sfmt_sth.f
5766     int UNUSED written = abuf->written;
5767     IADDR UNUSED pc = abuf->addr;
5768     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5769
5770   SETMEMHI (current_cpu, pc, OPRND (h_memory_HI_src2_idx), OPRND (h_memory_HI_src2));
5771
5772 #undef OPRND
5773 #undef FLD
5774   }
5775   NEXT (vpc);
5776
5777   CASE (sem, INSN_PAR_ST_PLUS) : /* st $src1,@+$src2 */
5778 {
5779   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5780   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5781 #define FLD(f) abuf->fields.sfmt_st_plus.f
5782 #define OPRND(f) par_exec->operands.sfmt_st_plus.f
5783   int UNUSED written = 0;
5784   IADDR UNUSED pc = abuf->addr;
5785   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5786
5787 {
5788   SI tmp_new_src2;
5789   tmp_new_src2 = ADDSI (* FLD (i_src2), 4);
5790   {
5791     SI opval = * FLD (i_src1);
5792     OPRND (h_memory_SI_new_src2_idx) = tmp_new_src2;
5793     OPRND (h_memory_SI_new_src2) = opval;
5794     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5795   }
5796   {
5797     SI opval = tmp_new_src2;
5798     OPRND (src2) = opval;
5799     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5800   }
5801 }
5802
5803 #undef OPRND
5804 #undef FLD
5805 }
5806   NEXT (vpc);
5807
5808 CASE (sem, INSN_WRITE_ST_PLUS) : /* st $src1,@+$src2 */
5809   {
5810     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5811     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5812 #define FLD(f) abuf->fields.sfmt_st_plus.f
5813 #define OPRND(f) par_exec->operands.sfmt_st_plus.f
5814     int UNUSED written = abuf->written;
5815     IADDR UNUSED pc = abuf->addr;
5816     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5817
5818   SETMEMSI (current_cpu, pc, OPRND (h_memory_SI_new_src2_idx), OPRND (h_memory_SI_new_src2));
5819   * FLD (i_src2) = OPRND (src2);
5820
5821 #undef OPRND
5822 #undef FLD
5823   }
5824   NEXT (vpc);
5825
5826   CASE (sem, INSN_PAR_STH_PLUS) : /* sth $src1,@$src2+ */
5827 {
5828   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5829   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5830 #define FLD(f) abuf->fields.sfmt_st_plus.f
5831 #define OPRND(f) par_exec->operands.sfmt_sth_plus.f
5832   int UNUSED written = 0;
5833   IADDR UNUSED pc = abuf->addr;
5834   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5835
5836 {
5837   HI tmp_new_src2;
5838   {
5839     HI opval = * FLD (i_src1);
5840     OPRND (h_memory_HI_new_src2_idx) = tmp_new_src2;
5841     OPRND (h_memory_HI_new_src2) = opval;
5842     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5843   }
5844   tmp_new_src2 = ADDSI (* FLD (i_src2), 2);
5845   {
5846     SI opval = tmp_new_src2;
5847     OPRND (src2) = opval;
5848     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5849   }
5850 }
5851
5852 #undef OPRND
5853 #undef FLD
5854 }
5855   NEXT (vpc);
5856
5857 CASE (sem, INSN_WRITE_STH_PLUS) : /* sth $src1,@$src2+ */
5858   {
5859     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5860     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5861 #define FLD(f) abuf->fields.sfmt_st_plus.f
5862 #define OPRND(f) par_exec->operands.sfmt_sth_plus.f
5863     int UNUSED written = abuf->written;
5864     IADDR UNUSED pc = abuf->addr;
5865     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5866
5867   SETMEMHI (current_cpu, pc, OPRND (h_memory_HI_new_src2_idx), OPRND (h_memory_HI_new_src2));
5868   * FLD (i_src2) = OPRND (src2);
5869
5870 #undef OPRND
5871 #undef FLD
5872   }
5873   NEXT (vpc);
5874
5875   CASE (sem, INSN_PAR_STB_PLUS) : /* stb $src1,@$src2+ */
5876 {
5877   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5878   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5879 #define FLD(f) abuf->fields.sfmt_st_plus.f
5880 #define OPRND(f) par_exec->operands.sfmt_stb_plus.f
5881   int UNUSED written = 0;
5882   IADDR UNUSED pc = abuf->addr;
5883   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5884
5885 {
5886   QI tmp_new_src2;
5887   {
5888     QI opval = * FLD (i_src1);
5889     OPRND (h_memory_QI_new_src2_idx) = tmp_new_src2;
5890     OPRND (h_memory_QI_new_src2) = opval;
5891     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5892   }
5893   tmp_new_src2 = ADDSI (* FLD (i_src2), 1);
5894   {
5895     SI opval = tmp_new_src2;
5896     OPRND (src2) = opval;
5897     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5898   }
5899 }
5900
5901 #undef OPRND
5902 #undef FLD
5903 }
5904   NEXT (vpc);
5905
5906 CASE (sem, INSN_WRITE_STB_PLUS) : /* stb $src1,@$src2+ */
5907   {
5908     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5909     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5910 #define FLD(f) abuf->fields.sfmt_st_plus.f
5911 #define OPRND(f) par_exec->operands.sfmt_stb_plus.f
5912     int UNUSED written = abuf->written;
5913     IADDR UNUSED pc = abuf->addr;
5914     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5915
5916   SETMEMQI (current_cpu, pc, OPRND (h_memory_QI_new_src2_idx), OPRND (h_memory_QI_new_src2));
5917   * FLD (i_src2) = OPRND (src2);
5918
5919 #undef OPRND
5920 #undef FLD
5921   }
5922   NEXT (vpc);
5923
5924   CASE (sem, INSN_PAR_ST_MINUS) : /* st $src1,@-$src2 */
5925 {
5926   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5927   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5928 #define FLD(f) abuf->fields.sfmt_st_plus.f
5929 #define OPRND(f) par_exec->operands.sfmt_st_plus.f
5930   int UNUSED written = 0;
5931   IADDR UNUSED pc = abuf->addr;
5932   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5933
5934 {
5935   SI tmp_new_src2;
5936   tmp_new_src2 = SUBSI (* FLD (i_src2), 4);
5937   {
5938     SI opval = * FLD (i_src1);
5939     OPRND (h_memory_SI_new_src2_idx) = tmp_new_src2;
5940     OPRND (h_memory_SI_new_src2) = opval;
5941     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5942   }
5943   {
5944     SI opval = tmp_new_src2;
5945     OPRND (src2) = opval;
5946     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5947   }
5948 }
5949
5950 #undef OPRND
5951 #undef FLD
5952 }
5953   NEXT (vpc);
5954
5955 CASE (sem, INSN_WRITE_ST_MINUS) : /* st $src1,@-$src2 */
5956   {
5957     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5958     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5959 #define FLD(f) abuf->fields.sfmt_st_plus.f
5960 #define OPRND(f) par_exec->operands.sfmt_st_plus.f
5961     int UNUSED written = abuf->written;
5962     IADDR UNUSED pc = abuf->addr;
5963     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5964
5965   SETMEMSI (current_cpu, pc, OPRND (h_memory_SI_new_src2_idx), OPRND (h_memory_SI_new_src2));
5966   * FLD (i_src2) = OPRND (src2);
5967
5968 #undef OPRND
5969 #undef FLD
5970   }
5971   NEXT (vpc);
5972
5973   CASE (sem, INSN_PAR_SUB) : /* sub $dr,$sr */
5974 {
5975   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5976   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5977 #define FLD(f) abuf->fields.sfmt_add.f
5978 #define OPRND(f) par_exec->operands.sfmt_add.f
5979   int UNUSED written = 0;
5980   IADDR UNUSED pc = abuf->addr;
5981   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5982
5983   {
5984     SI opval = SUBSI (* FLD (i_dr), * FLD (i_sr));
5985     OPRND (dr) = opval;
5986     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5987   }
5988
5989 #undef OPRND
5990 #undef FLD
5991 }
5992   NEXT (vpc);
5993
5994 CASE (sem, INSN_WRITE_SUB) : /* sub $dr,$sr */
5995   {
5996     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5997     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5998 #define FLD(f) abuf->fields.sfmt_add.f
5999 #define OPRND(f) par_exec->operands.sfmt_add.f
6000     int UNUSED written = abuf->written;
6001     IADDR UNUSED pc = abuf->addr;
6002     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6003
6004   * FLD (i_dr) = OPRND (dr);
6005
6006 #undef OPRND
6007 #undef FLD
6008   }
6009   NEXT (vpc);
6010
6011   CASE (sem, INSN_PAR_SUBV) : /* subv $dr,$sr */
6012 {
6013   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6014   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6015 #define FLD(f) abuf->fields.sfmt_add.f
6016 #define OPRND(f) par_exec->operands.sfmt_addv.f
6017   int UNUSED written = 0;
6018   IADDR UNUSED pc = abuf->addr;
6019   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6020
6021 {
6022   SI temp0;BI temp1;
6023   temp0 = SUBSI (* FLD (i_dr), * FLD (i_sr));
6024   temp1 = SUBOFSI (* FLD (i_dr), * FLD (i_sr), 0);
6025   {
6026     SI opval = temp0;
6027     OPRND (dr) = opval;
6028     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6029   }
6030   {
6031     BI opval = temp1;
6032     OPRND (condbit) = opval;
6033     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
6034   }
6035 }
6036
6037 #undef OPRND
6038 #undef FLD
6039 }
6040   NEXT (vpc);
6041
6042 CASE (sem, INSN_WRITE_SUBV) : /* subv $dr,$sr */
6043   {
6044     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6045     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6046 #define FLD(f) abuf->fields.sfmt_add.f
6047 #define OPRND(f) par_exec->operands.sfmt_addv.f
6048     int UNUSED written = abuf->written;
6049     IADDR UNUSED pc = abuf->addr;
6050     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6051
6052   CPU (h_cond) = OPRND (condbit);
6053   * FLD (i_dr) = OPRND (dr);
6054
6055 #undef OPRND
6056 #undef FLD
6057   }
6058   NEXT (vpc);
6059
6060   CASE (sem, INSN_PAR_SUBX) : /* subx $dr,$sr */
6061 {
6062   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6063   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6064 #define FLD(f) abuf->fields.sfmt_add.f
6065 #define OPRND(f) par_exec->operands.sfmt_addx.f
6066   int UNUSED written = 0;
6067   IADDR UNUSED pc = abuf->addr;
6068   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6069
6070 {
6071   SI temp0;BI temp1;
6072   temp0 = SUBCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
6073   temp1 = SUBCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
6074   {
6075     SI opval = temp0;
6076     OPRND (dr) = opval;
6077     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6078   }
6079   {
6080     BI opval = temp1;
6081     OPRND (condbit) = opval;
6082     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
6083   }
6084 }
6085
6086 #undef OPRND
6087 #undef FLD
6088 }
6089   NEXT (vpc);
6090
6091 CASE (sem, INSN_WRITE_SUBX) : /* subx $dr,$sr */
6092   {
6093     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6094     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6095 #define FLD(f) abuf->fields.sfmt_add.f
6096 #define OPRND(f) par_exec->operands.sfmt_addx.f
6097     int UNUSED written = abuf->written;
6098     IADDR UNUSED pc = abuf->addr;
6099     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6100
6101   CPU (h_cond) = OPRND (condbit);
6102   * FLD (i_dr) = OPRND (dr);
6103
6104 #undef OPRND
6105 #undef FLD
6106   }
6107   NEXT (vpc);
6108
6109   CASE (sem, INSN_PAR_TRAP) : /* trap $uimm4 */
6110 {
6111   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6112   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6113 #define FLD(f) abuf->fields.sfmt_trap.f
6114 #define OPRND(f) par_exec->operands.sfmt_trap.f
6115   int UNUSED written = 0;
6116   IADDR UNUSED pc = abuf->addr;
6117   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6118
6119 {
6120   {
6121     USI opval = GET_H_CR (((UINT) 6));
6122     OPRND (h_cr_USI_14) = opval;
6123     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
6124   }
6125   {
6126     USI opval = ADDSI (pc, 4);
6127     OPRND (h_cr_USI_6) = opval;
6128     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
6129   }
6130   {
6131     UQI opval = CPU (h_bpsw);
6132     OPRND (h_bbpsw_UQI) = opval;
6133     TRACE_RESULT (current_cpu, abuf, "bbpsw", 'x', opval);
6134   }
6135   {
6136     UQI opval = GET_H_PSW ();
6137     OPRND (h_bpsw_UQI) = opval;
6138     TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
6139   }
6140   {
6141     UQI opval = ANDQI (GET_H_PSW (), 128);
6142     OPRND (h_psw_UQI) = opval;
6143     TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
6144   }
6145   {
6146     SI opval = m32r_trap (current_cpu, pc, FLD (f_uimm4));
6147     OPRND (pc) = opval;
6148     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
6149   }
6150 }
6151
6152 #undef OPRND
6153 #undef FLD
6154 }
6155   NEXT (vpc);
6156
6157 CASE (sem, INSN_WRITE_TRAP) : /* trap $uimm4 */
6158   {
6159     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6160     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6161 #define FLD(f) abuf->fields.sfmt_trap.f
6162 #define OPRND(f) par_exec->operands.sfmt_trap.f
6163     int UNUSED written = abuf->written;
6164     IADDR UNUSED pc = abuf->addr;
6165     SEM_BRANCH_INIT
6166     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6167
6168   CPU (h_bbpsw) = OPRND (h_bbpsw_UQI);
6169   CPU (h_bpsw) = OPRND (h_bpsw_UQI);
6170   SET_H_CR (((UINT) 14), OPRND (h_cr_USI_14));
6171   SET_H_CR (((UINT) 6), OPRND (h_cr_USI_6));
6172   SET_H_PSW (OPRND (h_psw_UQI));
6173   SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
6174
6175   SEM_BRANCH_FINI (vpc);
6176 #undef OPRND
6177 #undef FLD
6178   }
6179   NEXT (vpc);
6180
6181   CASE (sem, INSN_PAR_UNLOCK) : /* unlock $src1,@$src2 */
6182 {
6183   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6184   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6185 #define FLD(f) abuf->fields.sfmt_st_plus.f
6186 #define OPRND(f) par_exec->operands.sfmt_unlock.f
6187   int UNUSED written = 0;
6188   IADDR UNUSED pc = abuf->addr;
6189   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6190
6191 {
6192 if (CPU (h_lock)) {
6193   {
6194     SI opval = * FLD (i_src1);
6195     OPRND (h_memory_SI_src2_idx) = * FLD (i_src2);
6196     OPRND (h_memory_SI_src2) = opval;
6197     written |= (1 << 4);
6198     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
6199   }
6200 }
6201   {
6202     BI opval = 0;
6203     OPRND (h_lock_BI) = opval;
6204     TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
6205   }
6206 }
6207
6208   abuf->written = written;
6209 #undef OPRND
6210 #undef FLD
6211 }
6212   NEXT (vpc);
6213
6214 CASE (sem, INSN_WRITE_UNLOCK) : /* unlock $src1,@$src2 */
6215   {
6216     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6217     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6218 #define FLD(f) abuf->fields.sfmt_st_plus.f
6219 #define OPRND(f) par_exec->operands.sfmt_unlock.f
6220     int UNUSED written = abuf->written;
6221     IADDR UNUSED pc = abuf->addr;
6222     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6223
6224   CPU (h_lock) = OPRND (h_lock_BI);
6225   if (written & (1 << 4))
6226     {
6227       SETMEMSI (current_cpu, pc, OPRND (h_memory_SI_src2_idx), OPRND (h_memory_SI_src2));
6228     }
6229
6230 #undef OPRND
6231 #undef FLD
6232   }
6233   NEXT (vpc);
6234
6235   CASE (sem, INSN_PAR_PCMPBZ) : /* pcmpbz $src2 */
6236 {
6237   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6238   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6239 #define FLD(f) abuf->fields.sfmt_st_plus.f
6240 #define OPRND(f) par_exec->operands.sfmt_cmpz.f
6241   int UNUSED written = 0;
6242   IADDR UNUSED pc = abuf->addr;
6243   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6244
6245   {
6246     BI opval = (EQSI (ANDSI (* FLD (i_src2), 255), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 65280), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 16711680), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 0xff000000), 0)) ? (1) : (0);
6247     OPRND (condbit) = opval;
6248     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
6249   }
6250
6251 #undef OPRND
6252 #undef FLD
6253 }
6254   NEXT (vpc);
6255
6256 CASE (sem, INSN_WRITE_PCMPBZ) : /* pcmpbz $src2 */
6257   {
6258     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6259     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6260 #define FLD(f) abuf->fields.sfmt_st_plus.f
6261 #define OPRND(f) par_exec->operands.sfmt_cmpz.f
6262     int UNUSED written = abuf->written;
6263     IADDR UNUSED pc = abuf->addr;
6264     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6265
6266   CPU (h_cond) = OPRND (condbit);
6267
6268 #undef OPRND
6269 #undef FLD
6270   }
6271   NEXT (vpc);
6272
6273   CASE (sem, INSN_PAR_SADD) : /* sadd */
6274 {
6275   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6276   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6277 #define FLD(f) abuf->fields.fmt_empty.f
6278 #define OPRND(f) par_exec->operands.sfmt_sadd.f
6279   int UNUSED written = 0;
6280   IADDR UNUSED pc = abuf->addr;
6281   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6282
6283   {
6284     DI opval = ADDDI (SRADI (GET_H_ACCUMS (((UINT) 1)), 16), GET_H_ACCUMS (((UINT) 0)));
6285     OPRND (h_accums_DI_0) = opval;
6286     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
6287   }
6288
6289 #undef OPRND
6290 #undef FLD
6291 }
6292   NEXT (vpc);
6293
6294 CASE (sem, INSN_WRITE_SADD) : /* sadd */
6295   {
6296     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6297     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6298 #define FLD(f) abuf->fields.fmt_empty.f
6299 #define OPRND(f) par_exec->operands.sfmt_sadd.f
6300     int UNUSED written = abuf->written;
6301     IADDR UNUSED pc = abuf->addr;
6302     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6303
6304   SET_H_ACCUMS (((UINT) 0), OPRND (h_accums_DI_0));
6305
6306 #undef OPRND
6307 #undef FLD
6308   }
6309   NEXT (vpc);
6310
6311   CASE (sem, INSN_PAR_MACWU1) : /* macwu1 $src1,$src2 */
6312 {
6313   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6314   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6315 #define FLD(f) abuf->fields.sfmt_st_plus.f
6316 #define OPRND(f) par_exec->operands.sfmt_macwu1.f
6317   int UNUSED written = 0;
6318   IADDR UNUSED pc = abuf->addr;
6319   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6320
6321   {
6322     DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535)))), 8), 8);
6323     OPRND (h_accums_DI_1) = opval;
6324     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
6325   }
6326
6327 #undef OPRND
6328 #undef FLD
6329 }
6330   NEXT (vpc);
6331
6332 CASE (sem, INSN_WRITE_MACWU1) : /* macwu1 $src1,$src2 */
6333   {
6334     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6335     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6336 #define FLD(f) abuf->fields.sfmt_st_plus.f
6337 #define OPRND(f) par_exec->operands.sfmt_macwu1.f
6338     int UNUSED written = abuf->written;
6339     IADDR UNUSED pc = abuf->addr;
6340     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6341
6342   SET_H_ACCUMS (((UINT) 1), OPRND (h_accums_DI_1));
6343
6344 #undef OPRND
6345 #undef FLD
6346   }
6347   NEXT (vpc);
6348
6349   CASE (sem, INSN_PAR_MSBLO) : /* msblo $src1,$src2 */
6350 {
6351   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6352   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6353 #define FLD(f) abuf->fields.sfmt_st_plus.f
6354 #define OPRND(f) par_exec->operands.sfmt_msblo.f
6355   int UNUSED written = 0;
6356   IADDR UNUSED pc = abuf->addr;
6357   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6358
6359   {
6360     DI opval = SRADI (SLLDI (SUBDI (GET_H_ACCUM (), SRADI (SLLDI (MULDI (EXTHIDI (TRUNCSIHI (* FLD (i_src1))), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 32), 16)), 8), 8);
6361     OPRND (accum) = opval;
6362     TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
6363   }
6364
6365 #undef OPRND
6366 #undef FLD
6367 }
6368   NEXT (vpc);
6369
6370 CASE (sem, INSN_WRITE_MSBLO) : /* msblo $src1,$src2 */
6371   {
6372     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6373     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6374 #define FLD(f) abuf->fields.sfmt_st_plus.f
6375 #define OPRND(f) par_exec->operands.sfmt_msblo.f
6376     int UNUSED written = abuf->written;
6377     IADDR UNUSED pc = abuf->addr;
6378     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6379
6380   SET_H_ACCUM (OPRND (accum));
6381
6382 #undef OPRND
6383 #undef FLD
6384   }
6385   NEXT (vpc);
6386
6387   CASE (sem, INSN_PAR_MULWU1) : /* mulwu1 $src1,$src2 */
6388 {
6389   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6390   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6391 #define FLD(f) abuf->fields.sfmt_st_plus.f
6392 #define OPRND(f) par_exec->operands.sfmt_mulwu1.f
6393   int UNUSED written = 0;
6394   IADDR UNUSED pc = abuf->addr;
6395   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6396
6397   {
6398     DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535))), 16), 16);
6399     OPRND (h_accums_DI_1) = opval;
6400     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
6401   }
6402
6403 #undef OPRND
6404 #undef FLD
6405 }
6406   NEXT (vpc);
6407
6408 CASE (sem, INSN_WRITE_MULWU1) : /* mulwu1 $src1,$src2 */
6409   {
6410     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6411     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6412 #define FLD(f) abuf->fields.sfmt_st_plus.f
6413 #define OPRND(f) par_exec->operands.sfmt_mulwu1.f
6414     int UNUSED written = abuf->written;
6415     IADDR UNUSED pc = abuf->addr;
6416     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6417
6418   SET_H_ACCUMS (((UINT) 1), OPRND (h_accums_DI_1));
6419
6420 #undef OPRND
6421 #undef FLD
6422   }
6423   NEXT (vpc);
6424
6425   CASE (sem, INSN_PAR_MACLH1) : /* maclh1 $src1,$src2 */
6426 {
6427   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6428   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6429 #define FLD(f) abuf->fields.sfmt_st_plus.f
6430 #define OPRND(f) par_exec->operands.sfmt_macwu1.f
6431   int UNUSED written = 0;
6432   IADDR UNUSED pc = abuf->addr;
6433   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6434
6435   {
6436     DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), SLLDI (EXTSIDI (MULSI (EXTHISI (TRUNCSIHI (* FLD (i_src1))), SRASI (* FLD (i_src2), 16))), 16)), 8), 8);
6437     OPRND (h_accums_DI_1) = opval;
6438     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
6439   }
6440
6441 #undef OPRND
6442 #undef FLD
6443 }
6444   NEXT (vpc);
6445
6446 CASE (sem, INSN_WRITE_MACLH1) : /* maclh1 $src1,$src2 */
6447   {
6448     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6449     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6450 #define FLD(f) abuf->fields.sfmt_st_plus.f
6451 #define OPRND(f) par_exec->operands.sfmt_macwu1.f
6452     int UNUSED written = abuf->written;
6453     IADDR UNUSED pc = abuf->addr;
6454     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6455
6456   SET_H_ACCUMS (((UINT) 1), OPRND (h_accums_DI_1));
6457
6458 #undef OPRND
6459 #undef FLD
6460   }
6461   NEXT (vpc);
6462
6463   CASE (sem, INSN_PAR_SC) : /* sc */
6464 {
6465   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6466   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6467 #define FLD(f) abuf->fields.fmt_empty.f
6468 #define OPRND(f) par_exec->operands.sfmt_sc.f
6469   int UNUSED written = 0;
6470   IADDR UNUSED pc = abuf->addr;
6471   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6472
6473 if (ZEXTBISI (CPU (h_cond)))
6474   SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
6475
6476 #undef OPRND
6477 #undef FLD
6478 }
6479   NEXT (vpc);
6480
6481 CASE (sem, INSN_WRITE_SC) : /* sc */
6482   {
6483     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6484     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6485 #define FLD(f) abuf->fields.fmt_empty.f
6486 #define OPRND(f) par_exec->operands.sfmt_sc.f
6487     int UNUSED written = abuf->written;
6488     IADDR UNUSED pc = abuf->addr;
6489     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6490
6491
6492 #undef OPRND
6493 #undef FLD
6494   }
6495   NEXT (vpc);
6496
6497   CASE (sem, INSN_PAR_SNC) : /* snc */
6498 {
6499   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6500   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6501 #define FLD(f) abuf->fields.fmt_empty.f
6502 #define OPRND(f) par_exec->operands.sfmt_sc.f
6503   int UNUSED written = 0;
6504   IADDR UNUSED pc = abuf->addr;
6505   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6506
6507 if (ZEXTBISI (NOTBI (CPU (h_cond))))
6508   SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
6509
6510 #undef OPRND
6511 #undef FLD
6512 }
6513   NEXT (vpc);
6514
6515 CASE (sem, INSN_WRITE_SNC) : /* snc */
6516   {
6517     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6518     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6519 #define FLD(f) abuf->fields.fmt_empty.f
6520 #define OPRND(f) par_exec->operands.sfmt_sc.f
6521     int UNUSED written = abuf->written;
6522     IADDR UNUSED pc = abuf->addr;
6523     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6524
6525
6526 #undef OPRND
6527 #undef FLD
6528   }
6529   NEXT (vpc);
6530
6531   CASE (sem, INSN_PAR_CLRPSW) : /* clrpsw $uimm8 */
6532 {
6533   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6534   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6535 #define FLD(f) abuf->fields.sfmt_clrpsw.f
6536 #define OPRND(f) par_exec->operands.sfmt_clrpsw.f
6537   int UNUSED written = 0;
6538   IADDR UNUSED pc = abuf->addr;
6539   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6540
6541   {
6542     SI opval = ANDSI (GET_H_CR (((UINT) 0)), ORSI (INVBI (FLD (f_uimm8)), 65280));
6543     OPRND (h_cr_USI_0) = opval;
6544     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
6545   }
6546
6547 #undef OPRND
6548 #undef FLD
6549 }
6550   NEXT (vpc);
6551
6552 CASE (sem, INSN_WRITE_CLRPSW) : /* clrpsw $uimm8 */
6553   {
6554     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6555     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6556 #define FLD(f) abuf->fields.sfmt_clrpsw.f
6557 #define OPRND(f) par_exec->operands.sfmt_clrpsw.f
6558     int UNUSED written = abuf->written;
6559     IADDR UNUSED pc = abuf->addr;
6560     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6561
6562   SET_H_CR (((UINT) 0), OPRND (h_cr_USI_0));
6563
6564 #undef OPRND
6565 #undef FLD
6566   }
6567   NEXT (vpc);
6568
6569   CASE (sem, INSN_PAR_SETPSW) : /* setpsw $uimm8 */
6570 {
6571   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6572   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6573 #define FLD(f) abuf->fields.sfmt_clrpsw.f
6574 #define OPRND(f) par_exec->operands.sfmt_setpsw.f
6575   int UNUSED written = 0;
6576   IADDR UNUSED pc = abuf->addr;
6577   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6578
6579   {
6580     SI opval = FLD (f_uimm8);
6581     OPRND (h_cr_USI_0) = opval;
6582     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
6583   }
6584
6585 #undef OPRND
6586 #undef FLD
6587 }
6588   NEXT (vpc);
6589
6590 CASE (sem, INSN_WRITE_SETPSW) : /* setpsw $uimm8 */
6591   {
6592     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6593     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6594 #define FLD(f) abuf->fields.sfmt_clrpsw.f
6595 #define OPRND(f) par_exec->operands.sfmt_setpsw.f
6596     int UNUSED written = abuf->written;
6597     IADDR UNUSED pc = abuf->addr;
6598     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6599
6600   SET_H_CR (((UINT) 0), OPRND (h_cr_USI_0));
6601
6602 #undef OPRND
6603 #undef FLD
6604   }
6605   NEXT (vpc);
6606
6607   CASE (sem, INSN_PAR_BTST) : /* btst $uimm3,$sr */
6608 {
6609   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6610   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6611 #define FLD(f) abuf->fields.sfmt_bset.f
6612 #define OPRND(f) par_exec->operands.sfmt_btst.f
6613   int UNUSED written = 0;
6614   IADDR UNUSED pc = abuf->addr;
6615   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6616
6617   {
6618     BI opval = ANDQI (SRLSI (* FLD (i_sr), SUBSI (7, FLD (f_uimm3))), 1);
6619     OPRND (condbit) = opval;
6620     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
6621   }
6622
6623 #undef OPRND
6624 #undef FLD
6625 }
6626   NEXT (vpc);
6627
6628 CASE (sem, INSN_WRITE_BTST) : /* btst $uimm3,$sr */
6629   {
6630     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6631     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6632 #define FLD(f) abuf->fields.sfmt_bset.f
6633 #define OPRND(f) par_exec->operands.sfmt_btst.f
6634     int UNUSED written = abuf->written;
6635     IADDR UNUSED pc = abuf->addr;
6636     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6637
6638   CPU (h_cond) = OPRND (condbit);
6639
6640 #undef OPRND
6641 #undef FLD
6642   }
6643   NEXT (vpc);
6644
6645
6646     }
6647   ENDSWITCH (sem) /* End of semantic switch.  */
6648
6649   /* At this point `vpc' contains the next insn to execute.  */
6650 }
6651
6652 #undef DEFINE_SWITCH
6653 #endif /* DEFINE_SWITCH */