sim/m32r/semx-switch.c

   1 /* Simulator instruction semantics for m32rxf.
   2
   3 THIS FILE IS MACHINE GENERATED WITH CGEN.
   4
   5 Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
   6
   7 This file is part of the GNU Simulators.
   8
   9 This program is free software; you can redistribute it and/or modify
  10 it under the terms of the GNU General Public License as published by
  11 the Free Software Foundation; either version 2, or (at your option)
  12 any later version.
  13
  14 This program is distributed in the hope that it will be useful,
  15 but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17 GNU General Public License for more details.
  18
  19 You should have received a copy of the GNU General Public License along
  20 with this program; if not, write to the Free Software Foundation, Inc.,
  21 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  22
  23 */
  24
  25 #ifdef DEFINE_LABELS
  26
  27   /* The labels have the case they have because the enum of insn types
  28      is all uppercase and in the non-stdc case the insn symbol is built
  29      into the enum name.  */
  30
  31   static struct {
  32     int index;
  33     void *label;
  34   } labels[] = {
  35     { M32RXF_INSN_X_INVALID, && case_sem_INSN_X_INVALID },
  36     { M32RXF_INSN_X_AFTER, && case_sem_INSN_X_AFTER },
  37     { M32RXF_INSN_X_BEFORE, && case_sem_INSN_X_BEFORE },
  38     { M32RXF_INSN_X_CTI_CHAIN, && case_sem_INSN_X_CTI_CHAIN },
  39     { M32RXF_INSN_X_CHAIN, && case_sem_INSN_X_CHAIN },
  40     { M32RXF_INSN_X_BEGIN, && case_sem_INSN_X_BEGIN },
  41     { M32RXF_INSN_ADD, && case_sem_INSN_ADD },
  42     { M32RXF_INSN_ADD3, && case_sem_INSN_ADD3 },
  43     { M32RXF_INSN_AND, && case_sem_INSN_AND },
  44     { M32RXF_INSN_AND3, && case_sem_INSN_AND3 },
  45     { M32RXF_INSN_OR, && case_sem_INSN_OR },
  46     { M32RXF_INSN_OR3, && case_sem_INSN_OR3 },
  47     { M32RXF_INSN_XOR, && case_sem_INSN_XOR },
  48     { M32RXF_INSN_XOR3, && case_sem_INSN_XOR3 },
  49     { M32RXF_INSN_ADDI, && case_sem_INSN_ADDI },
  50     { M32RXF_INSN_ADDV, && case_sem_INSN_ADDV },
  51     { M32RXF_INSN_ADDV3, && case_sem_INSN_ADDV3 },
  52     { M32RXF_INSN_ADDX, && case_sem_INSN_ADDX },
  53     { M32RXF_INSN_BC8, && case_sem_INSN_BC8 },
  54     { M32RXF_INSN_BC24, && case_sem_INSN_BC24 },
  55     { M32RXF_INSN_BEQ, && case_sem_INSN_BEQ },
  56     { M32RXF_INSN_BEQZ, && case_sem_INSN_BEQZ },
  57     { M32RXF_INSN_BGEZ, && case_sem_INSN_BGEZ },
  58     { M32RXF_INSN_BGTZ, && case_sem_INSN_BGTZ },
  59     { M32RXF_INSN_BLEZ, && case_sem_INSN_BLEZ },
  60     { M32RXF_INSN_BLTZ, && case_sem_INSN_BLTZ },
  61     { M32RXF_INSN_BNEZ, && case_sem_INSN_BNEZ },
  62     { M32RXF_INSN_BL8, && case_sem_INSN_BL8 },
  63     { M32RXF_INSN_BL24, && case_sem_INSN_BL24 },
  64     { M32RXF_INSN_BCL8, && case_sem_INSN_BCL8 },
  65     { M32RXF_INSN_BCL24, && case_sem_INSN_BCL24 },
  66     { M32RXF_INSN_BNC8, && case_sem_INSN_BNC8 },
  67     { M32RXF_INSN_BNC24, && case_sem_INSN_BNC24 },
  68     { M32RXF_INSN_BNE, && case_sem_INSN_BNE },
  69     { M32RXF_INSN_BRA8, && case_sem_INSN_BRA8 },
  70     { M32RXF_INSN_BRA24, && case_sem_INSN_BRA24 },
  71     { M32RXF_INSN_BNCL8, && case_sem_INSN_BNCL8 },
  72     { M32RXF_INSN_BNCL24, && case_sem_INSN_BNCL24 },
  73     { M32RXF_INSN_CMP, && case_sem_INSN_CMP },
  74     { M32RXF_INSN_CMPI, && case_sem_INSN_CMPI },
  75     { M32RXF_INSN_CMPU, && case_sem_INSN_CMPU },
  76     { M32RXF_INSN_CMPUI, && case_sem_INSN_CMPUI },
  77     { M32RXF_INSN_CMPEQ, && case_sem_INSN_CMPEQ },
  78     { M32RXF_INSN_CMPZ, && case_sem_INSN_CMPZ },
  79     { M32RXF_INSN_DIV, && case_sem_INSN_DIV },
  80     { M32RXF_INSN_DIVU, && case_sem_INSN_DIVU },
  81     { M32RXF_INSN_REM, && case_sem_INSN_REM },
  82     { M32RXF_INSN_REMU, && case_sem_INSN_REMU },
  83     { M32RXF_INSN_DIVH, && case_sem_INSN_DIVH },
  84     { M32RXF_INSN_JC, && case_sem_INSN_JC },
  85     { M32RXF_INSN_JNC, && case_sem_INSN_JNC },
  86     { M32RXF_INSN_JL, && case_sem_INSN_JL },
  87     { M32RXF_INSN_JMP, && case_sem_INSN_JMP },
  88     { M32RXF_INSN_LD, && case_sem_INSN_LD },
  89     { M32RXF_INSN_LD_D, && case_sem_INSN_LD_D },
  90     { M32RXF_INSN_LDB, && case_sem_INSN_LDB },
  91     { M32RXF_INSN_LDB_D, && case_sem_INSN_LDB_D },
  92     { M32RXF_INSN_LDH, && case_sem_INSN_LDH },
  93     { M32RXF_INSN_LDH_D, && case_sem_INSN_LDH_D },
  94     { M32RXF_INSN_LDUB, && case_sem_INSN_LDUB },
  95     { M32RXF_INSN_LDUB_D, && case_sem_INSN_LDUB_D },
  96     { M32RXF_INSN_LDUH, && case_sem_INSN_LDUH },
  97     { M32RXF_INSN_LDUH_D, && case_sem_INSN_LDUH_D },
  98     { M32RXF_INSN_LD_PLUS, && case_sem_INSN_LD_PLUS },
  99     { M32RXF_INSN_LD24, && case_sem_INSN_LD24 },
 100     { M32RXF_INSN_LDI8, && case_sem_INSN_LDI8 },
 101     { M32RXF_INSN_LDI16, && case_sem_INSN_LDI16 },
 102     { M32RXF_INSN_LOCK, && case_sem_INSN_LOCK },
 103     { M32RXF_INSN_MACHI_A, && case_sem_INSN_MACHI_A },
 104     { M32RXF_INSN_MACLO_A, && case_sem_INSN_MACLO_A },
 105     { M32RXF_INSN_MACWHI_A, && case_sem_INSN_MACWHI_A },
 106     { M32RXF_INSN_MACWLO_A, && case_sem_INSN_MACWLO_A },
 107     { M32RXF_INSN_MUL, && case_sem_INSN_MUL },
 108     { M32RXF_INSN_MULHI_A, && case_sem_INSN_MULHI_A },
 109     { M32RXF_INSN_MULLO_A, && case_sem_INSN_MULLO_A },
 110     { M32RXF_INSN_MULWHI_A, && case_sem_INSN_MULWHI_A },
 111     { M32RXF_INSN_MULWLO_A, && case_sem_INSN_MULWLO_A },
 112     { M32RXF_INSN_MV, && case_sem_INSN_MV },
 113     { M32RXF_INSN_MVFACHI_A, && case_sem_INSN_MVFACHI_A },
 114     { M32RXF_INSN_MVFACLO_A, && case_sem_INSN_MVFACLO_A },
 115     { M32RXF_INSN_MVFACMI_A, && case_sem_INSN_MVFACMI_A },
 116     { M32RXF_INSN_MVFC, && case_sem_INSN_MVFC },
 117     { M32RXF_INSN_MVTACHI_A, && case_sem_INSN_MVTACHI_A },
 118     { M32RXF_INSN_MVTACLO_A, && case_sem_INSN_MVTACLO_A },
 119     { M32RXF_INSN_MVTC, && case_sem_INSN_MVTC },
 120     { M32RXF_INSN_NEG, && case_sem_INSN_NEG },
 121     { M32RXF_INSN_NOP, && case_sem_INSN_NOP },
 122     { M32RXF_INSN_NOT, && case_sem_INSN_NOT },
 123     { M32RXF_INSN_RAC_DSI, && case_sem_INSN_RAC_DSI },
 124     { M32RXF_INSN_RACH_DSI, && case_sem_INSN_RACH_DSI },
 125     { M32RXF_INSN_RTE, && case_sem_INSN_RTE },
 126     { M32RXF_INSN_SETH, && case_sem_INSN_SETH },
 127     { M32RXF_INSN_SLL, && case_sem_INSN_SLL },
 128     { M32RXF_INSN_SLL3, && case_sem_INSN_SLL3 },
 129     { M32RXF_INSN_SLLI, && case_sem_INSN_SLLI },
 130     { M32RXF_INSN_SRA, && case_sem_INSN_SRA },
 131     { M32RXF_INSN_SRA3, && case_sem_INSN_SRA3 },
 132     { M32RXF_INSN_SRAI, && case_sem_INSN_SRAI },
 133     { M32RXF_INSN_SRL, && case_sem_INSN_SRL },
 134     { M32RXF_INSN_SRL3, && case_sem_INSN_SRL3 },
 135     { M32RXF_INSN_SRLI, && case_sem_INSN_SRLI },
 136     { M32RXF_INSN_ST, && case_sem_INSN_ST },
 137     { M32RXF_INSN_ST_D, && case_sem_INSN_ST_D },
 138     { M32RXF_INSN_STB, && case_sem_INSN_STB },
 139     { M32RXF_INSN_STB_D, && case_sem_INSN_STB_D },
 140     { M32RXF_INSN_STH, && case_sem_INSN_STH },
 141     { M32RXF_INSN_STH_D, && case_sem_INSN_STH_D },
 142     { M32RXF_INSN_ST_PLUS, && case_sem_INSN_ST_PLUS },
 143     { M32RXF_INSN_ST_MINUS, && case_sem_INSN_ST_MINUS },
 144     { M32RXF_INSN_SUB, && case_sem_INSN_SUB },
 145     { M32RXF_INSN_SUBV, && case_sem_INSN_SUBV },
 146     { M32RXF_INSN_SUBX, && case_sem_INSN_SUBX },
 147     { M32RXF_INSN_TRAP, && case_sem_INSN_TRAP },
 148     { M32RXF_INSN_UNLOCK, && case_sem_INSN_UNLOCK },
 149     { M32RXF_INSN_SATB, && case_sem_INSN_SATB },
 150     { M32RXF_INSN_SATH, && case_sem_INSN_SATH },
 151     { M32RXF_INSN_SAT, && case_sem_INSN_SAT },
 152     { M32RXF_INSN_PCMPBZ, && case_sem_INSN_PCMPBZ },
 153     { M32RXF_INSN_SADD, && case_sem_INSN_SADD },
 154     { M32RXF_INSN_MACWU1, && case_sem_INSN_MACWU1 },
 155     { M32RXF_INSN_MSBLO, && case_sem_INSN_MSBLO },
 156     { M32RXF_INSN_MULWU1, && case_sem_INSN_MULWU1 },
 157     { M32RXF_INSN_MACLH1, && case_sem_INSN_MACLH1 },
 158     { M32RXF_INSN_SC, && case_sem_INSN_SC },
 159     { M32RXF_INSN_SNC, && case_sem_INSN_SNC },
 160     { M32RXF_INSN_PAR_ADD, && case_sem_INSN_PAR_ADD },
 161     { M32RXF_INSN_WRITE_ADD, && case_sem_INSN_WRITE_ADD },
 162     { M32RXF_INSN_PAR_AND, && case_sem_INSN_PAR_AND },
 163     { M32RXF_INSN_WRITE_AND, && case_sem_INSN_WRITE_AND },
 164     { M32RXF_INSN_PAR_OR, && case_sem_INSN_PAR_OR },
 165     { M32RXF_INSN_WRITE_OR, && case_sem_INSN_WRITE_OR },
 166     { M32RXF_INSN_PAR_XOR, && case_sem_INSN_PAR_XOR },
 167     { M32RXF_INSN_WRITE_XOR, && case_sem_INSN_WRITE_XOR },
 168     { M32RXF_INSN_PAR_ADDI, && case_sem_INSN_PAR_ADDI },
 169     { M32RXF_INSN_WRITE_ADDI, && case_sem_INSN_WRITE_ADDI },
 170     { M32RXF_INSN_PAR_ADDV, && case_sem_INSN_PAR_ADDV },
 171     { M32RXF_INSN_WRITE_ADDV, && case_sem_INSN_WRITE_ADDV },
 172     { M32RXF_INSN_PAR_ADDX, && case_sem_INSN_PAR_ADDX },
 173     { M32RXF_INSN_WRITE_ADDX, && case_sem_INSN_WRITE_ADDX },
 174     { M32RXF_INSN_PAR_BC8, && case_sem_INSN_PAR_BC8 },
 175     { M32RXF_INSN_WRITE_BC8, && case_sem_INSN_WRITE_BC8 },
 176     { M32RXF_INSN_PAR_BL8, && case_sem_INSN_PAR_BL8 },
 177     { M32RXF_INSN_WRITE_BL8, && case_sem_INSN_WRITE_BL8 },
 178     { M32RXF_INSN_PAR_BCL8, && case_sem_INSN_PAR_BCL8 },
 179     { M32RXF_INSN_WRITE_BCL8, && case_sem_INSN_WRITE_BCL8 },
 180     { M32RXF_INSN_PAR_BNC8, && case_sem_INSN_PAR_BNC8 },
 181     { M32RXF_INSN_WRITE_BNC8, && case_sem_INSN_WRITE_BNC8 },
 182     { M32RXF_INSN_PAR_BRA8, && case_sem_INSN_PAR_BRA8 },
 183     { M32RXF_INSN_WRITE_BRA8, && case_sem_INSN_WRITE_BRA8 },
 184     { M32RXF_INSN_PAR_BNCL8, && case_sem_INSN_PAR_BNCL8 },
 185     { M32RXF_INSN_WRITE_BNCL8, && case_sem_INSN_WRITE_BNCL8 },
 186     { M32RXF_INSN_PAR_CMP, && case_sem_INSN_PAR_CMP },
 187     { M32RXF_INSN_WRITE_CMP, && case_sem_INSN_WRITE_CMP },
 188     { M32RXF_INSN_PAR_CMPU, && case_sem_INSN_PAR_CMPU },
 189     { M32RXF_INSN_WRITE_CMPU, && case_sem_INSN_WRITE_CMPU },
 190     { M32RXF_INSN_PAR_CMPEQ, && case_sem_INSN_PAR_CMPEQ },
 191     { M32RXF_INSN_WRITE_CMPEQ, && case_sem_INSN_WRITE_CMPEQ },
 192     { M32RXF_INSN_PAR_CMPZ, && case_sem_INSN_PAR_CMPZ },
 193     { M32RXF_INSN_WRITE_CMPZ, && case_sem_INSN_WRITE_CMPZ },
 194     { M32RXF_INSN_PAR_JC, && case_sem_INSN_PAR_JC },
 195     { M32RXF_INSN_WRITE_JC, && case_sem_INSN_WRITE_JC },
 196     { M32RXF_INSN_PAR_JNC, && case_sem_INSN_PAR_JNC },
 197     { M32RXF_INSN_WRITE_JNC, && case_sem_INSN_WRITE_JNC },
 198     { M32RXF_INSN_PAR_JL, && case_sem_INSN_PAR_JL },
 199     { M32RXF_INSN_WRITE_JL, && case_sem_INSN_WRITE_JL },
 200     { M32RXF_INSN_PAR_JMP, && case_sem_INSN_PAR_JMP },
 201     { M32RXF_INSN_WRITE_JMP, && case_sem_INSN_WRITE_JMP },
 202     { M32RXF_INSN_PAR_LD, && case_sem_INSN_PAR_LD },
 203     { M32RXF_INSN_WRITE_LD, && case_sem_INSN_WRITE_LD },
 204     { M32RXF_INSN_PAR_LDB, && case_sem_INSN_PAR_LDB },
 205     { M32RXF_INSN_WRITE_LDB, && case_sem_INSN_WRITE_LDB },
 206     { M32RXF_INSN_PAR_LDH, && case_sem_INSN_PAR_LDH },
 207     { M32RXF_INSN_WRITE_LDH, && case_sem_INSN_WRITE_LDH },
 208     { M32RXF_INSN_PAR_LDUB, && case_sem_INSN_PAR_LDUB },
 209     { M32RXF_INSN_WRITE_LDUB, && case_sem_INSN_WRITE_LDUB },
 210     { M32RXF_INSN_PAR_LDUH, && case_sem_INSN_PAR_LDUH },
 211     { M32RXF_INSN_WRITE_LDUH, && case_sem_INSN_WRITE_LDUH },
 212     { M32RXF_INSN_PAR_LD_PLUS, && case_sem_INSN_PAR_LD_PLUS },
 213     { M32RXF_INSN_WRITE_LD_PLUS, && case_sem_INSN_WRITE_LD_PLUS },
 214     { M32RXF_INSN_PAR_LDI8, && case_sem_INSN_PAR_LDI8 },
 215     { M32RXF_INSN_WRITE_LDI8, && case_sem_INSN_WRITE_LDI8 },
 216     { M32RXF_INSN_PAR_LOCK, && case_sem_INSN_PAR_LOCK },
 217     { M32RXF_INSN_WRITE_LOCK, && case_sem_INSN_WRITE_LOCK },
 218     { M32RXF_INSN_PAR_MACHI_A, && case_sem_INSN_PAR_MACHI_A },
 219     { M32RXF_INSN_WRITE_MACHI_A, && case_sem_INSN_WRITE_MACHI_A },
 220     { M32RXF_INSN_PAR_MACLO_A, && case_sem_INSN_PAR_MACLO_A },
 221     { M32RXF_INSN_WRITE_MACLO_A, && case_sem_INSN_WRITE_MACLO_A },
 222     { M32RXF_INSN_PAR_MACWHI_A, && case_sem_INSN_PAR_MACWHI_A },
 223     { M32RXF_INSN_WRITE_MACWHI_A, && case_sem_INSN_WRITE_MACWHI_A },
 224     { M32RXF_INSN_PAR_MACWLO_A, && case_sem_INSN_PAR_MACWLO_A },
 225     { M32RXF_INSN_WRITE_MACWLO_A, && case_sem_INSN_WRITE_MACWLO_A },
 226     { M32RXF_INSN_PAR_MUL, && case_sem_INSN_PAR_MUL },
 227     { M32RXF_INSN_WRITE_MUL, && case_sem_INSN_WRITE_MUL },
 228     { M32RXF_INSN_PAR_MULHI_A, && case_sem_INSN_PAR_MULHI_A },
 229     { M32RXF_INSN_WRITE_MULHI_A, && case_sem_INSN_WRITE_MULHI_A },
 230     { M32RXF_INSN_PAR_MULLO_A, && case_sem_INSN_PAR_MULLO_A },
 231     { M32RXF_INSN_WRITE_MULLO_A, && case_sem_INSN_WRITE_MULLO_A },
 232     { M32RXF_INSN_PAR_MULWHI_A, && case_sem_INSN_PAR_MULWHI_A },
 233     { M32RXF_INSN_WRITE_MULWHI_A, && case_sem_INSN_WRITE_MULWHI_A },
 234     { M32RXF_INSN_PAR_MULWLO_A, && case_sem_INSN_PAR_MULWLO_A },
 235     { M32RXF_INSN_WRITE_MULWLO_A, && case_sem_INSN_WRITE_MULWLO_A },
 236     { M32RXF_INSN_PAR_MV, && case_sem_INSN_PAR_MV },
 237     { M32RXF_INSN_WRITE_MV, && case_sem_INSN_WRITE_MV },
 238     { M32RXF_INSN_PAR_MVFACHI_A, && case_sem_INSN_PAR_MVFACHI_A },
 239     { M32RXF_INSN_WRITE_MVFACHI_A, && case_sem_INSN_WRITE_MVFACHI_A },
 240     { M32RXF_INSN_PAR_MVFACLO_A, && case_sem_INSN_PAR_MVFACLO_A },
 241     { M32RXF_INSN_WRITE_MVFACLO_A, && case_sem_INSN_WRITE_MVFACLO_A },
 242     { M32RXF_INSN_PAR_MVFACMI_A, && case_sem_INSN_PAR_MVFACMI_A },
 243     { M32RXF_INSN_WRITE_MVFACMI_A, && case_sem_INSN_WRITE_MVFACMI_A },
 244     { M32RXF_INSN_PAR_MVFC, && case_sem_INSN_PAR_MVFC },
 245     { M32RXF_INSN_WRITE_MVFC, && case_sem_INSN_WRITE_MVFC },
 246     { M32RXF_INSN_PAR_MVTACHI_A, && case_sem_INSN_PAR_MVTACHI_A },
 247     { M32RXF_INSN_WRITE_MVTACHI_A, && case_sem_INSN_WRITE_MVTACHI_A },
 248     { M32RXF_INSN_PAR_MVTACLO_A, && case_sem_INSN_PAR_MVTACLO_A },
 249     { M32RXF_INSN_WRITE_MVTACLO_A, && case_sem_INSN_WRITE_MVTACLO_A },
 250     { M32RXF_INSN_PAR_MVTC, && case_sem_INSN_PAR_MVTC },
 251     { M32RXF_INSN_WRITE_MVTC, && case_sem_INSN_WRITE_MVTC },
 252     { M32RXF_INSN_PAR_NEG, && case_sem_INSN_PAR_NEG },
 253     { M32RXF_INSN_WRITE_NEG, && case_sem_INSN_WRITE_NEG },
 254     { M32RXF_INSN_PAR_NOP, && case_sem_INSN_PAR_NOP },
 255     { M32RXF_INSN_WRITE_NOP, && case_sem_INSN_WRITE_NOP },
 256     { M32RXF_INSN_PAR_NOT, && case_sem_INSN_PAR_NOT },
 257     { M32RXF_INSN_WRITE_NOT, && case_sem_INSN_WRITE_NOT },
 258     { M32RXF_INSN_PAR_RAC_DSI, && case_sem_INSN_PAR_RAC_DSI },
 259     { M32RXF_INSN_WRITE_RAC_DSI, && case_sem_INSN_WRITE_RAC_DSI },
 260     { M32RXF_INSN_PAR_RACH_DSI, && case_sem_INSN_PAR_RACH_DSI },
 261     { M32RXF_INSN_WRITE_RACH_DSI, && case_sem_INSN_WRITE_RACH_DSI },
 262     { M32RXF_INSN_PAR_RTE, && case_sem_INSN_PAR_RTE },
 263     { M32RXF_INSN_WRITE_RTE, && case_sem_INSN_WRITE_RTE },
 264     { M32RXF_INSN_PAR_SLL, && case_sem_INSN_PAR_SLL },
 265     { M32RXF_INSN_WRITE_SLL, && case_sem_INSN_WRITE_SLL },
 266     { M32RXF_INSN_PAR_SLLI, && case_sem_INSN_PAR_SLLI },
 267     { M32RXF_INSN_WRITE_SLLI, && case_sem_INSN_WRITE_SLLI },
 268     { M32RXF_INSN_PAR_SRA, && case_sem_INSN_PAR_SRA },
 269     { M32RXF_INSN_WRITE_SRA, && case_sem_INSN_WRITE_SRA },
 270     { M32RXF_INSN_PAR_SRAI, && case_sem_INSN_PAR_SRAI },
 271     { M32RXF_INSN_WRITE_SRAI, && case_sem_INSN_WRITE_SRAI },
 272     { M32RXF_INSN_PAR_SRL, && case_sem_INSN_PAR_SRL },
 273     { M32RXF_INSN_WRITE_SRL, && case_sem_INSN_WRITE_SRL },
 274     { M32RXF_INSN_PAR_SRLI, && case_sem_INSN_PAR_SRLI },
 275     { M32RXF_INSN_WRITE_SRLI, && case_sem_INSN_WRITE_SRLI },
 276     { M32RXF_INSN_PAR_ST, && case_sem_INSN_PAR_ST },
 277     { M32RXF_INSN_WRITE_ST, && case_sem_INSN_WRITE_ST },
 278     { M32RXF_INSN_PAR_STB, && case_sem_INSN_PAR_STB },
 279     { M32RXF_INSN_WRITE_STB, && case_sem_INSN_WRITE_STB },
 280     { M32RXF_INSN_PAR_STH, && case_sem_INSN_PAR_STH },
 281     { M32RXF_INSN_WRITE_STH, && case_sem_INSN_WRITE_STH },
 282     { M32RXF_INSN_PAR_ST_PLUS, && case_sem_INSN_PAR_ST_PLUS },
 283     { M32RXF_INSN_WRITE_ST_PLUS, && case_sem_INSN_WRITE_ST_PLUS },
 284     { M32RXF_INSN_PAR_ST_MINUS, && case_sem_INSN_PAR_ST_MINUS },
 285     { M32RXF_INSN_WRITE_ST_MINUS, && case_sem_INSN_WRITE_ST_MINUS },
 286     { M32RXF_INSN_PAR_SUB, && case_sem_INSN_PAR_SUB },
 287     { M32RXF_INSN_WRITE_SUB, && case_sem_INSN_WRITE_SUB },
 288     { M32RXF_INSN_PAR_SUBV, && case_sem_INSN_PAR_SUBV },
 289     { M32RXF_INSN_WRITE_SUBV, && case_sem_INSN_WRITE_SUBV },
 290     { M32RXF_INSN_PAR_SUBX, && case_sem_INSN_PAR_SUBX },
 291     { M32RXF_INSN_WRITE_SUBX, && case_sem_INSN_WRITE_SUBX },
 292     { M32RXF_INSN_PAR_TRAP, && case_sem_INSN_PAR_TRAP },
 293     { M32RXF_INSN_WRITE_TRAP, && case_sem_INSN_WRITE_TRAP },
 294     { M32RXF_INSN_PAR_UNLOCK, && case_sem_INSN_PAR_UNLOCK },
 295     { M32RXF_INSN_WRITE_UNLOCK, && case_sem_INSN_WRITE_UNLOCK },
 296     { M32RXF_INSN_PAR_PCMPBZ, && case_sem_INSN_PAR_PCMPBZ },
 297     { M32RXF_INSN_WRITE_PCMPBZ, && case_sem_INSN_WRITE_PCMPBZ },
 298     { M32RXF_INSN_PAR_SADD, && case_sem_INSN_PAR_SADD },
 299     { M32RXF_INSN_WRITE_SADD, && case_sem_INSN_WRITE_SADD },
 300     { M32RXF_INSN_PAR_MACWU1, && case_sem_INSN_PAR_MACWU1 },
 301     { M32RXF_INSN_WRITE_MACWU1, && case_sem_INSN_WRITE_MACWU1 },
 302     { M32RXF_INSN_PAR_MSBLO, && case_sem_INSN_PAR_MSBLO },
 303     { M32RXF_INSN_WRITE_MSBLO, && case_sem_INSN_WRITE_MSBLO },
 304     { M32RXF_INSN_PAR_MULWU1, && case_sem_INSN_PAR_MULWU1 },
 305     { M32RXF_INSN_WRITE_MULWU1, && case_sem_INSN_WRITE_MULWU1 },
 306     { M32RXF_INSN_PAR_MACLH1, && case_sem_INSN_PAR_MACLH1 },
 307     { M32RXF_INSN_WRITE_MACLH1, && case_sem_INSN_WRITE_MACLH1 },
 308     { M32RXF_INSN_PAR_SC, && case_sem_INSN_PAR_SC },
 309     { M32RXF_INSN_WRITE_SC, && case_sem_INSN_WRITE_SC },
 310     { M32RXF_INSN_PAR_SNC, && case_sem_INSN_PAR_SNC },
 311     { M32RXF_INSN_WRITE_SNC, && case_sem_INSN_WRITE_SNC },
 312     { 0, 0 }
 313   };
 314   int i;
 315
 316   for (i = 0; labels[i].label != 0; ++i)
 317 #if FAST_P
 318     CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label;
 319 #else
 320     CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label;
 321 #endif
 322
 323 #undef DEFINE_LABELS
 324 #endif /* DEFINE_LABELS */
 325
 326 #ifdef DEFINE_SWITCH
 327
 328 /* If hyper-fast [well not unnecessarily slow] execution is selected, turn
 329    off frills like tracing and profiling.  */
 330 /* FIXME: A better way would be to have TRACE_RESULT check for something
 331    that can cause it to be optimized out.  Another way would be to emit
 332    special handlers into the instruction "stream".  */
 333
 334 #if FAST_P
 335 #undef TRACE_RESULT
 336 #define TRACE_RESULT(cpu, abuf, name, type, val)
 337 #endif
 338
 339 #undef GET_ATTR
 340 #define GET_ATTR(cpu, num, attr) CGEN_INSN_ATTR (abuf->idesc->opcode, CGEN_INSN_##attr)
 341
 342 {
 343
 344 #if WITH_SCACHE_PBB
 345
 346 /* Branch to next handler without going around main loop.  */
 347 #define NEXT(vpc) goto * SEM_ARGBUF (vpc) -> semantic.sem_case
 348 SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 349
 350 #else /* ! WITH_SCACHE_PBB */
 351
 352 #define NEXT(vpc) BREAK (sem)
 353 #ifdef __GNUC__
 354 #if FAST_P
 355   SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_fast_lab)
 356 #else
 357   SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_full_lab)
 358 #endif
 359 #else
 360   SWITCH (sem, SEM_ARGBUF (sc) -> idesc->num)
 361 #endif
 362
 363 #endif /* ! WITH_SCACHE_PBB */
 364
 365     {
 366
 367   CASE (sem, INSN_X_INVALID) : /* --invalid-- */
 368 {
 369   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 370   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 371 #define FLD(f) abuf->fields.fmt_empty.f
 372   int UNUSED written = 0;
 373   PCADDR UNUSED pc = abuf->addr;
 374   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 375
 376   {
 377 #if WITH_SCACHE
 378     /* Update the recorded pc in the cpu state struct.  */
 379     SET_H_PC (pc);
 380 #endif
 381     sim_engine_invalid_insn (current_cpu, pc);
 382     sim_io_error (CPU_STATE (current_cpu), "invalid insn not handled\n");
 383     /* NOTREACHED */
 384   }
 385
 386 #undef FLD
 387 }
 388   NEXT (vpc);
 389
 390   CASE (sem, INSN_X_AFTER) : /* --after-- */
 391 {
 392   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 393   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 394 #define FLD(f) abuf->fields.fmt_empty.f
 395   int UNUSED written = 0;
 396   PCADDR UNUSED pc = abuf->addr;
 397   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 398
 399   {
 400 #if WITH_SCACHE_PBB_M32RXF
 401     m32rxf_pbb_after (current_cpu, sem_arg);
 402 #endif
 403   }
 404
 405 #undef FLD
 406 }
 407   NEXT (vpc);
 408
 409   CASE (sem, INSN_X_BEFORE) : /* --before-- */
 410 {
 411   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 412   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 413 #define FLD(f) abuf->fields.fmt_empty.f
 414   int UNUSED written = 0;
 415   PCADDR UNUSED pc = abuf->addr;
 416   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 417
 418   {
 419 #if WITH_SCACHE_PBB_M32RXF
 420     m32rxf_pbb_before (current_cpu, sem_arg);
 421 #endif
 422   }
 423
 424 #undef FLD
 425 }
 426   NEXT (vpc);
 427
 428   CASE (sem, INSN_X_CTI_CHAIN) : /* --cti-chain-- */
 429 {
 430   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 431   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 432 #define FLD(f) abuf->fields.fmt_empty.f
 433   int UNUSED written = 0;
 434   PCADDR UNUSED pc = abuf->addr;
 435   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 436
 437   {
 438 #if WITH_SCACHE_PBB_M32RXF
 439 #ifdef DEFINE_SWITCH
 440     vpc = m32rxf_pbb_cti_chain (current_cpu, sem_arg,
 441                                pbb_br_npc_ptr, pbb_br_npc);
 442     BREAK (sem);
 443 #else
 444     /* FIXME: Allow provision of explicit ifmt spec in insn spec.  */
 445     vpc = m32rxf_pbb_cti_chain (current_cpu, sem_arg,
 446                                CPU_PBB_BR_NPC_PTR (current_cpu),
 447                                CPU_PBB_BR_NPC (current_cpu));
 448 #endif
 449 #endif
 450   }
 451
 452 #undef FLD
 453 }
 454   NEXT (vpc);
 455
 456   CASE (sem, INSN_X_CHAIN) : /* --chain-- */
 457 {
 458   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 459   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 460 #define FLD(f) abuf->fields.fmt_empty.f
 461   int UNUSED written = 0;
 462   PCADDR UNUSED pc = abuf->addr;
 463   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 464
 465   {
 466 #if WITH_SCACHE_PBB_M32RXF
 467     vpc = m32rxf_pbb_chain (current_cpu, sem_arg);
 468 #ifdef DEFINE_SWITCH
 469     BREAK (sem);
 470 #endif
 471 #endif
 472   }
 473
 474 #undef FLD
 475 }
 476   NEXT (vpc);
 477
 478   CASE (sem, INSN_X_BEGIN) : /* --begin-- */
 479 {
 480   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 481   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 482 #define FLD(f) abuf->fields.fmt_empty.f
 483   int UNUSED written = 0;
 484   PCADDR UNUSED pc = abuf->addr;
 485   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 486
 487   {
 488 #if WITH_SCACHE_PBB_M32RXF
 489 #ifdef DEFINE_SWITCH
 490     /* In the switch case FAST_P is a constant, allowing several optimizations
 491        in any called inline functions.  */
 492     vpc = m32rxf_pbb_begin (current_cpu, FAST_P);
 493 #else
 494     vpc = m32rxf_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu)));
 495 #endif
 496 #endif
 497   }
 498
 499 #undef FLD
 500 }
 501   NEXT (vpc);
 502
 503   CASE (sem, INSN_ADD) : /* add $dr,$sr */
 504 {
 505   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 506   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 507 #define FLD(f) abuf->fields.fmt_add.f
 508   int UNUSED written = 0;
 509   PCADDR UNUSED pc = abuf->addr;
 510   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 511
 512   {
 513     SI opval = ADDSI (* FLD (i_dr), * FLD (i_sr));
 514     * FLD (i_dr) = opval;
 515     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
 516   }
 517
 518 #undef FLD
 519 }
 520   NEXT (vpc);
 521
 522   CASE (sem, INSN_ADD3) : /* add3 $dr,$sr,$hash$slo16 */
 523 {
 524   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 525   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 526 #define FLD(f) abuf->fields.fmt_add3.f
 527   int UNUSED written = 0;
 528   PCADDR UNUSED pc = abuf->addr;
 529   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 530
 531   {
 532     SI opval = ADDSI (* FLD (i_sr), FLD (f_simm16));
 533     * FLD (i_dr) = opval;
 534     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
 535   }
 536
 537 #undef FLD
 538 }
 539   NEXT (vpc);
 540
 541   CASE (sem, INSN_AND) : /* and $dr,$sr */
 542 {
 543   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 544   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 545 #define FLD(f) abuf->fields.fmt_add.f
 546   int UNUSED written = 0;
 547   PCADDR UNUSED pc = abuf->addr;
 548   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 549
 550   {
 551     SI opval = ANDSI (* FLD (i_dr), * FLD (i_sr));
 552     * FLD (i_dr) = opval;
 553     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
 554   }
 555
 556 #undef FLD
 557 }
 558   NEXT (vpc);
 559
 560   CASE (sem, INSN_AND3) : /* and3 $dr,$sr,$uimm16 */
 561 {
 562   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 563   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 564 #define FLD(f) abuf->fields.fmt_and3.f
 565   int UNUSED written = 0;
 566   PCADDR UNUSED pc = abuf->addr;
 567   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 568
 569   {
 570     SI opval = ANDSI (* FLD (i_sr), FLD (f_uimm16));
 571     * FLD (i_dr) = opval;
 572     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
 573   }
 574
 575 #undef FLD
 576 }
 577   NEXT (vpc);
 578
 579   CASE (sem, INSN_OR) : /* or $dr,$sr */
 580 {
 581   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 582   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 583 #define FLD(f) abuf->fields.fmt_add.f
 584   int UNUSED written = 0;
 585   PCADDR UNUSED pc = abuf->addr;
 586   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 587
 588   {
 589     SI opval = ORSI (* FLD (i_dr), * FLD (i_sr));
 590     * FLD (i_dr) = opval;
 591     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
 592   }
 593
 594 #undef FLD
 595 }
 596   NEXT (vpc);
 597
 598   CASE (sem, INSN_OR3) : /* or3 $dr,$sr,$hash$ulo16 */
 599 {
 600   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 601   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 602 #define FLD(f) abuf->fields.fmt_or3.f
 603   int UNUSED written = 0;
 604   PCADDR UNUSED pc = abuf->addr;
 605   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 606
 607   {
 608     SI opval = ORSI (* FLD (i_sr), FLD (f_uimm16));
 609     * FLD (i_dr) = opval;
 610     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
 611   }
 612
 613 #undef FLD
 614 }
 615   NEXT (vpc);
 616
 617   CASE (sem, INSN_XOR) : /* xor $dr,$sr */
 618 {
 619   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 620   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 621 #define FLD(f) abuf->fields.fmt_add.f
 622   int UNUSED written = 0;
 623   PCADDR UNUSED pc = abuf->addr;
 624   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 625
 626   {
 627     SI opval = XORSI (* FLD (i_dr), * FLD (i_sr));
 628     * FLD (i_dr) = opval;
 629     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
 630   }
 631
 632 #undef FLD
 633 }
 634   NEXT (vpc);
 635
 636   CASE (sem, INSN_XOR3) : /* xor3 $dr,$sr,$uimm16 */
 637 {
 638   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 639   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 640 #define FLD(f) abuf->fields.fmt_and3.f
 641   int UNUSED written = 0;
 642   PCADDR UNUSED pc = abuf->addr;
 643   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 644
 645   {
 646     SI opval = XORSI (* FLD (i_sr), FLD (f_uimm16));
 647     * FLD (i_dr) = opval;
 648     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
 649   }
 650
 651 #undef FLD
 652 }
 653   NEXT (vpc);
 654
 655   CASE (sem, INSN_ADDI) : /* addi $dr,$simm8 */
 656 {
 657   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 658   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 659 #define FLD(f) abuf->fields.fmt_addi.f
 660   int UNUSED written = 0;
 661   PCADDR UNUSED pc = abuf->addr;
 662   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 663
 664   {
 665     SI opval = ADDSI (* FLD (i_dr), FLD (f_simm8));
 666     * FLD (i_dr) = opval;
 667     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
 668   }
 669
 670 #undef FLD
 671 }
 672   NEXT (vpc);
 673
 674   CASE (sem, INSN_ADDV) : /* addv $dr,$sr */
 675 {
 676   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 677   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 678 #define FLD(f) abuf->fields.fmt_addv.f
 679   int UNUSED written = 0;
 680   PCADDR UNUSED pc = abuf->addr;
 681   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 682
 683 do {
 684   BI temp1;SI temp0;
 685   temp0 = ADDSI (* FLD (i_dr), * FLD (i_sr));
 686   temp1 = ADDOFSI (* FLD (i_dr), * FLD (i_sr), 0);
 687   {
 688     SI opval = temp0;
 689     * FLD (i_dr) = opval;
 690     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
 691   }
 692   {
 693     BI opval = temp1;
 694     CPU (h_cond) = opval;
 695     TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
 696   }
 697 } while (0);
 698
 699 #undef FLD
 700 }
 701   NEXT (vpc);
 702
 703   CASE (sem, INSN_ADDV3) : /* addv3 $dr,$sr,$simm16 */
 704 {
 705   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 706   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 707 #define FLD(f) abuf->fields.fmt_addv3.f
 708   int UNUSED written = 0;
 709   PCADDR UNUSED pc = abuf->addr;
 710   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 711
 712 do {
 713   BI temp1;SI temp0;
 714   temp0 = ADDSI (* FLD (i_sr), FLD (f_simm16));
 715   temp1 = ADDOFSI (* FLD (i_sr), FLD (f_simm16), 0);
 716   {
 717     SI opval = temp0;
 718     * FLD (i_dr) = opval;
 719     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
 720   }
 721   {
 722     BI opval = temp1;
 723     CPU (h_cond) = opval;
 724     TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
 725   }
 726 } while (0);
 727
 728 #undef FLD
 729 }
 730   NEXT (vpc);
 731
 732   CASE (sem, INSN_ADDX) : /* addx $dr,$sr */
 733 {
 734   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 735   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 736 #define FLD(f) abuf->fields.fmt_addx.f
 737   int UNUSED written = 0;
 738   PCADDR UNUSED pc = abuf->addr;
 739   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 740
 741 do {
 742   BI temp1;SI temp0;
 743   temp0 = ADDCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
 744   temp1 = ADDCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
 745   {
 746     SI opval = temp0;
 747     * FLD (i_dr) = opval;
 748     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
 749   }
 750   {
 751     BI opval = temp1;
 752     CPU (h_cond) = opval;
 753     TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
 754   }
 755 } while (0);
 756
 757 #undef FLD
 758 }
 759   NEXT (vpc);
 760
 761   CASE (sem, INSN_BC8) : /* bc.s $disp8 */
 762 {
 763   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 764   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 765 #define FLD(f) abuf->fields.cti.fields.fmt_bc8.f
 766   int UNUSED written = 0;
 767   PCADDR UNUSED pc = abuf->addr;
 768   SEM_BRANCH_INIT
 769   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 770
 771 if (CPU (h_cond)) {
 772   {
 773     USI opval = FLD (i_disp8);
 774     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
 775     written |= (1 << 2);
 776     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 777   }
 778 }
 779
 780   abuf->written = written;
 781   SEM_BRANCH_FINI (vpc);
 782 #undef FLD
 783 }
 784   NEXT (vpc);
 785
 786   CASE (sem, INSN_BC24) : /* bc.l $disp24 */
 787 {
 788   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 789   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 790 #define FLD(f) abuf->fields.cti.fields.fmt_bc24.f
 791   int UNUSED written = 0;
 792   PCADDR UNUSED pc = abuf->addr;
 793   SEM_BRANCH_INIT
 794   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 795
 796 if (CPU (h_cond)) {
 797   {
 798     USI opval = FLD (i_disp24);
 799     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
 800     written |= (1 << 2);
 801     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 802   }
 803 }
 804
 805   abuf->written = written;
 806   SEM_BRANCH_FINI (vpc);
 807 #undef FLD
 808 }
 809   NEXT (vpc);
 810
 811   CASE (sem, INSN_BEQ) : /* beq $src1,$src2,$disp16 */
 812 {
 813   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 814   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 815 #define FLD(f) abuf->fields.cti.fields.fmt_beq.f
 816   int UNUSED written = 0;
 817   PCADDR UNUSED pc = abuf->addr;
 818   SEM_BRANCH_INIT
 819   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 820
 821 if (EQSI (* FLD (i_src1), * FLD (i_src2))) {
 822   {
 823     USI opval = FLD (i_disp16);
 824     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
 825     written |= (1 << 3);
 826     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 827   }
 828 }
 829
 830   abuf->written = written;
 831   SEM_BRANCH_FINI (vpc);
 832 #undef FLD
 833 }
 834   NEXT (vpc);
 835
 836   CASE (sem, INSN_BEQZ) : /* beqz $src2,$disp16 */
 837 {
 838   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 839   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 840 #define FLD(f) abuf->fields.cti.fields.fmt_beqz.f
 841   int UNUSED written = 0;
 842   PCADDR UNUSED pc = abuf->addr;
 843   SEM_BRANCH_INIT
 844   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 845
 846 if (EQSI (* FLD (i_src2), 0)) {
 847   {
 848     USI opval = FLD (i_disp16);
 849     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
 850     written |= (1 << 2);
 851     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 852   }
 853 }
 854
 855   abuf->written = written;
 856   SEM_BRANCH_FINI (vpc);
 857 #undef FLD
 858 }
 859   NEXT (vpc);
 860
 861   CASE (sem, INSN_BGEZ) : /* bgez $src2,$disp16 */
 862 {
 863   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 864   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 865 #define FLD(f) abuf->fields.cti.fields.fmt_beqz.f
 866   int UNUSED written = 0;
 867   PCADDR UNUSED pc = abuf->addr;
 868   SEM_BRANCH_INIT
 869   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 870
 871 if (GESI (* FLD (i_src2), 0)) {
 872   {
 873     USI opval = FLD (i_disp16);
 874     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
 875     written |= (1 << 2);
 876     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 877   }
 878 }
 879
 880   abuf->written = written;
 881   SEM_BRANCH_FINI (vpc);
 882 #undef FLD
 883 }
 884   NEXT (vpc);
 885
 886   CASE (sem, INSN_BGTZ) : /* bgtz $src2,$disp16 */
 887 {
 888   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 889   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 890 #define FLD(f) abuf->fields.cti.fields.fmt_beqz.f
 891   int UNUSED written = 0;
 892   PCADDR UNUSED pc = abuf->addr;
 893   SEM_BRANCH_INIT
 894   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 895
 896 if (GTSI (* FLD (i_src2), 0)) {
 897   {
 898     USI opval = FLD (i_disp16);
 899     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
 900     written |= (1 << 2);
 901     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 902   }
 903 }
 904
 905   abuf->written = written;
 906   SEM_BRANCH_FINI (vpc);
 907 #undef FLD
 908 }
 909   NEXT (vpc);
 910
 911   CASE (sem, INSN_BLEZ) : /* blez $src2,$disp16 */
 912 {
 913   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 914   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 915 #define FLD(f) abuf->fields.cti.fields.fmt_beqz.f
 916   int UNUSED written = 0;
 917   PCADDR UNUSED pc = abuf->addr;
 918   SEM_BRANCH_INIT
 919   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 920
 921 if (LESI (* FLD (i_src2), 0)) {
 922   {
 923     USI opval = FLD (i_disp16);
 924     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
 925     written |= (1 << 2);
 926     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 927   }
 928 }
 929
 930   abuf->written = written;
 931   SEM_BRANCH_FINI (vpc);
 932 #undef FLD
 933 }
 934   NEXT (vpc);
 935
 936   CASE (sem, INSN_BLTZ) : /* bltz $src2,$disp16 */
 937 {
 938   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 939   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 940 #define FLD(f) abuf->fields.cti.fields.fmt_beqz.f
 941   int UNUSED written = 0;
 942   PCADDR UNUSED pc = abuf->addr;
 943   SEM_BRANCH_INIT
 944   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 945
 946 if (LTSI (* FLD (i_src2), 0)) {
 947   {
 948     USI opval = FLD (i_disp16);
 949     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
 950     written |= (1 << 2);
 951     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 952   }
 953 }
 954
 955   abuf->written = written;
 956   SEM_BRANCH_FINI (vpc);
 957 #undef FLD
 958 }
 959   NEXT (vpc);
 960
 961   CASE (sem, INSN_BNEZ) : /* bnez $src2,$disp16 */
 962 {
 963   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 964   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 965 #define FLD(f) abuf->fields.cti.fields.fmt_beqz.f
 966   int UNUSED written = 0;
 967   PCADDR UNUSED pc = abuf->addr;
 968   SEM_BRANCH_INIT
 969   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 970
 971 if (NESI (* FLD (i_src2), 0)) {
 972   {
 973     USI opval = FLD (i_disp16);
 974     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
 975     written |= (1 << 2);
 976     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 977   }
 978 }
 979
 980   abuf->written = written;
 981   SEM_BRANCH_FINI (vpc);
 982 #undef FLD
 983 }
 984   NEXT (vpc);
 985
 986   CASE (sem, INSN_BL8) : /* bl.s $disp8 */
 987 {
 988   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 989   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 990 #define FLD(f) abuf->fields.cti.fields.fmt_bl8.f
 991   int UNUSED written = 0;
 992   PCADDR UNUSED pc = abuf->addr;
 993   SEM_BRANCH_INIT
 994   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 995
 996 do {
 997   {
 998     SI opval = ADDSI (ANDSI (pc, -4), 4);
 999     CPU (h_gr[((UINT) 14)]) = opval;
1000     TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
1001   }
1002   {
1003     USI opval = FLD (i_disp8);
1004     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
1005     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1006   }
1007 } while (0);
1008
1009   SEM_BRANCH_FINI (vpc);
1010 #undef FLD
1011 }
1012   NEXT (vpc);
1013
1014   CASE (sem, INSN_BL24) : /* bl.l $disp24 */
1015 {
1016   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1017   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1018 #define FLD(f) abuf->fields.cti.fields.fmt_bl24.f
1019   int UNUSED written = 0;
1020   PCADDR UNUSED pc = abuf->addr;
1021   SEM_BRANCH_INIT
1022   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1023
1024 do {
1025   {
1026     SI opval = ADDSI (pc, 4);
1027     CPU (h_gr[((UINT) 14)]) = opval;
1028     TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
1029   }
1030   {
1031     USI opval = FLD (i_disp24);
1032     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
1033     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1034   }
1035 } while (0);
1036
1037   SEM_BRANCH_FINI (vpc);
1038 #undef FLD
1039 }
1040   NEXT (vpc);
1041
1042   CASE (sem, INSN_BCL8) : /* bcl.s $disp8 */
1043 {
1044   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1045   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1046 #define FLD(f) abuf->fields.cti.fields.fmt_bcl8.f
1047   int UNUSED written = 0;
1048   PCADDR UNUSED pc = abuf->addr;
1049   SEM_BRANCH_INIT
1050   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1051
1052 if (CPU (h_cond)) {
1053 do {
1054   {
1055     SI opval = ADDSI (ANDSI (pc, -4), 4);
1056     CPU (h_gr[((UINT) 14)]) = opval;
1057     written |= (1 << 3);
1058     TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
1059   }
1060   {
1061     USI opval = FLD (i_disp8);
1062     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
1063     written |= (1 << 4);
1064     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1065   }
1066 } while (0);
1067 }
1068
1069   abuf->written = written;
1070   SEM_BRANCH_FINI (vpc);
1071 #undef FLD
1072 }
1073   NEXT (vpc);
1074
1075   CASE (sem, INSN_BCL24) : /* bcl.l $disp24 */
1076 {
1077   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1078   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1079 #define FLD(f) abuf->fields.cti.fields.fmt_bcl24.f
1080   int UNUSED written = 0;
1081   PCADDR UNUSED pc = abuf->addr;
1082   SEM_BRANCH_INIT
1083   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1084
1085 if (CPU (h_cond)) {
1086 do {
1087   {
1088     SI opval = ADDSI (pc, 4);
1089     CPU (h_gr[((UINT) 14)]) = opval;
1090     written |= (1 << 3);
1091     TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
1092   }
1093   {
1094     USI opval = FLD (i_disp24);
1095     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
1096     written |= (1 << 4);
1097     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1098   }
1099 } while (0);
1100 }
1101
1102   abuf->written = written;
1103   SEM_BRANCH_FINI (vpc);
1104 #undef FLD
1105 }
1106   NEXT (vpc);
1107
1108   CASE (sem, INSN_BNC8) : /* bnc.s $disp8 */
1109 {
1110   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1111   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1112 #define FLD(f) abuf->fields.cti.fields.fmt_bc8.f
1113   int UNUSED written = 0;
1114   PCADDR UNUSED pc = abuf->addr;
1115   SEM_BRANCH_INIT
1116   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1117
1118 if (NOTBI (CPU (h_cond))) {
1119   {
1120     USI opval = FLD (i_disp8);
1121     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
1122     written |= (1 << 2);
1123     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1124   }
1125 }
1126
1127   abuf->written = written;
1128   SEM_BRANCH_FINI (vpc);
1129 #undef FLD
1130 }
1131   NEXT (vpc);
1132
1133   CASE (sem, INSN_BNC24) : /* bnc.l $disp24 */
1134 {
1135   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1136   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1137 #define FLD(f) abuf->fields.cti.fields.fmt_bc24.f
1138   int UNUSED written = 0;
1139   PCADDR UNUSED pc = abuf->addr;
1140   SEM_BRANCH_INIT
1141   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1142
1143 if (NOTBI (CPU (h_cond))) {
1144   {
1145     USI opval = FLD (i_disp24);
1146     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
1147     written |= (1 << 2);
1148     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1149   }
1150 }
1151
1152   abuf->written = written;
1153   SEM_BRANCH_FINI (vpc);
1154 #undef FLD
1155 }
1156   NEXT (vpc);
1157
1158   CASE (sem, INSN_BNE) : /* bne $src1,$src2,$disp16 */
1159 {
1160   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1161   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1162 #define FLD(f) abuf->fields.cti.fields.fmt_beq.f
1163   int UNUSED written = 0;
1164   PCADDR UNUSED pc = abuf->addr;
1165   SEM_BRANCH_INIT
1166   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1167
1168 if (NESI (* FLD (i_src1), * FLD (i_src2))) {
1169   {
1170     USI opval = FLD (i_disp16);
1171     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
1172     written |= (1 << 3);
1173     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1174   }
1175 }
1176
1177   abuf->written = written;
1178   SEM_BRANCH_FINI (vpc);
1179 #undef FLD
1180 }
1181   NEXT (vpc);
1182
1183   CASE (sem, INSN_BRA8) : /* bra.s $disp8 */
1184 {
1185   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1186   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1187 #define FLD(f) abuf->fields.cti.fields.fmt_bra8.f
1188   int UNUSED written = 0;
1189   PCADDR UNUSED pc = abuf->addr;
1190   SEM_BRANCH_INIT
1191   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1192
1193   {
1194     USI opval = FLD (i_disp8);
1195     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
1196     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1197   }
1198
1199   SEM_BRANCH_FINI (vpc);
1200 #undef FLD
1201 }
1202   NEXT (vpc);
1203
1204   CASE (sem, INSN_BRA24) : /* bra.l $disp24 */
1205 {
1206   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1207   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1208 #define FLD(f) abuf->fields.cti.fields.fmt_bra24.f
1209   int UNUSED written = 0;
1210   PCADDR UNUSED pc = abuf->addr;
1211   SEM_BRANCH_INIT
1212   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1213
1214   {
1215     USI opval = FLD (i_disp24);
1216     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
1217     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1218   }
1219
1220   SEM_BRANCH_FINI (vpc);
1221 #undef FLD
1222 }
1223   NEXT (vpc);
1224
1225   CASE (sem, INSN_BNCL8) : /* bncl.s $disp8 */
1226 {
1227   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1228   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1229 #define FLD(f) abuf->fields.cti.fields.fmt_bcl8.f
1230   int UNUSED written = 0;
1231   PCADDR UNUSED pc = abuf->addr;
1232   SEM_BRANCH_INIT
1233   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1234
1235 if (NOTBI (CPU (h_cond))) {
1236 do {
1237   {
1238     SI opval = ADDSI (ANDSI (pc, -4), 4);
1239     CPU (h_gr[((UINT) 14)]) = opval;
1240     written |= (1 << 3);
1241     TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
1242   }
1243   {
1244     USI opval = FLD (i_disp8);
1245     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
1246     written |= (1 << 4);
1247     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1248   }
1249 } while (0);
1250 }
1251
1252   abuf->written = written;
1253   SEM_BRANCH_FINI (vpc);
1254 #undef FLD
1255 }
1256   NEXT (vpc);
1257
1258   CASE (sem, INSN_BNCL24) : /* bncl.l $disp24 */
1259 {
1260   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1261   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1262 #define FLD(f) abuf->fields.cti.fields.fmt_bcl24.f
1263   int UNUSED written = 0;
1264   PCADDR UNUSED pc = abuf->addr;
1265   SEM_BRANCH_INIT
1266   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1267
1268 if (NOTBI (CPU (h_cond))) {
1269 do {
1270   {
1271     SI opval = ADDSI (pc, 4);
1272     CPU (h_gr[((UINT) 14)]) = opval;
1273     written |= (1 << 3);
1274     TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
1275   }
1276   {
1277     USI opval = FLD (i_disp24);
1278     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
1279     written |= (1 << 4);
1280     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1281   }
1282 } while (0);
1283 }
1284
1285   abuf->written = written;
1286   SEM_BRANCH_FINI (vpc);
1287 #undef FLD
1288 }
1289   NEXT (vpc);
1290
1291   CASE (sem, INSN_CMP) : /* cmp $src1,$src2 */
1292 {
1293   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1294   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1295 #define FLD(f) abuf->fields.fmt_cmp.f
1296   int UNUSED written = 0;
1297   PCADDR UNUSED pc = abuf->addr;
1298   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1299
1300   {
1301     BI opval = LTSI (* FLD (i_src1), * FLD (i_src2));
1302     CPU (h_cond) = opval;
1303     TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
1304   }
1305
1306 #undef FLD
1307 }
1308   NEXT (vpc);
1309
1310   CASE (sem, INSN_CMPI) : /* cmpi $src2,$simm16 */
1311 {
1312   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1313   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1314 #define FLD(f) abuf->fields.fmt_cmpi.f
1315   int UNUSED written = 0;
1316   PCADDR UNUSED pc = abuf->addr;
1317   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1318
1319   {
1320     BI opval = LTSI (* FLD (i_src2), FLD (f_simm16));
1321     CPU (h_cond) = opval;
1322     TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
1323   }
1324
1325 #undef FLD
1326 }
1327   NEXT (vpc);
1328
1329   CASE (sem, INSN_CMPU) : /* cmpu $src1,$src2 */
1330 {
1331   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1332   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1333 #define FLD(f) abuf->fields.fmt_cmp.f
1334   int UNUSED written = 0;
1335   PCADDR UNUSED pc = abuf->addr;
1336   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1337
1338   {
1339     BI opval = LTUSI (* FLD (i_src1), * FLD (i_src2));
1340     CPU (h_cond) = opval;
1341     TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
1342   }
1343
1344 #undef FLD
1345 }
1346   NEXT (vpc);
1347
1348   CASE (sem, INSN_CMPUI) : /* cmpui $src2,$simm16 */
1349 {
1350   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1351   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1352 #define FLD(f) abuf->fields.fmt_cmpi.f
1353   int UNUSED written = 0;
1354   PCADDR UNUSED pc = abuf->addr;
1355   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1356
1357   {
1358     BI opval = LTUSI (* FLD (i_src2), FLD (f_simm16));
1359     CPU (h_cond) = opval;
1360     TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
1361   }
1362
1363 #undef FLD
1364 }
1365   NEXT (vpc);
1366
1367   CASE (sem, INSN_CMPEQ) : /* cmpeq $src1,$src2 */
1368 {
1369   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1370   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1371 #define FLD(f) abuf->fields.fmt_cmp.f
1372   int UNUSED written = 0;
1373   PCADDR UNUSED pc = abuf->addr;
1374   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1375
1376   {
1377     BI opval = EQSI (* FLD (i_src1), * FLD (i_src2));
1378     CPU (h_cond) = opval;
1379     TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
1380   }
1381
1382 #undef FLD
1383 }
1384   NEXT (vpc);
1385
1386   CASE (sem, INSN_CMPZ) : /* cmpz $src2 */
1387 {
1388   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1389   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1390 #define FLD(f) abuf->fields.fmt_cmpz.f
1391   int UNUSED written = 0;
1392   PCADDR UNUSED pc = abuf->addr;
1393   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1394
1395   {
1396     BI opval = EQSI (* FLD (i_src2), 0);
1397     CPU (h_cond) = opval;
1398     TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
1399   }
1400
1401 #undef FLD
1402 }
1403   NEXT (vpc);
1404
1405   CASE (sem, INSN_DIV) : /* div $dr,$sr */
1406 {
1407   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1408   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1409 #define FLD(f) abuf->fields.fmt_div.f
1410   int UNUSED written = 0;
1411   PCADDR UNUSED pc = abuf->addr;
1412   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1413
1414 if (NESI (* FLD (i_sr), 0)) {
1415   {
1416     SI opval = DIVSI (* FLD (i_dr), * FLD (i_sr));
1417     * FLD (i_dr) = opval;
1418     written |= (1 << 2);
1419     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1420   }
1421 }
1422
1423   abuf->written = written;
1424 #undef FLD
1425 }
1426   NEXT (vpc);
1427
1428   CASE (sem, INSN_DIVU) : /* divu $dr,$sr */
1429 {
1430   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1431   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1432 #define FLD(f) abuf->fields.fmt_div.f
1433   int UNUSED written = 0;
1434   PCADDR UNUSED pc = abuf->addr;
1435   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1436
1437 if (NESI (* FLD (i_sr), 0)) {
1438   {
1439     SI opval = UDIVSI (* FLD (i_dr), * FLD (i_sr));
1440     * FLD (i_dr) = opval;
1441     written |= (1 << 2);
1442     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1443   }
1444 }
1445
1446   abuf->written = written;
1447 #undef FLD
1448 }
1449   NEXT (vpc);
1450
1451   CASE (sem, INSN_REM) : /* rem $dr,$sr */
1452 {
1453   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1454   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1455 #define FLD(f) abuf->fields.fmt_div.f
1456   int UNUSED written = 0;
1457   PCADDR UNUSED pc = abuf->addr;
1458   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1459
1460 if (NESI (* FLD (i_sr), 0)) {
1461   {
1462     SI opval = MODSI (* FLD (i_dr), * FLD (i_sr));
1463     * FLD (i_dr) = opval;
1464     written |= (1 << 2);
1465     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1466   }
1467 }
1468
1469   abuf->written = written;
1470 #undef FLD
1471 }
1472   NEXT (vpc);
1473
1474   CASE (sem, INSN_REMU) : /* remu $dr,$sr */
1475 {
1476   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1477   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1478 #define FLD(f) abuf->fields.fmt_div.f
1479   int UNUSED written = 0;
1480   PCADDR UNUSED pc = abuf->addr;
1481   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1482
1483 if (NESI (* FLD (i_sr), 0)) {
1484   {
1485     SI opval = UMODSI (* FLD (i_dr), * FLD (i_sr));
1486     * FLD (i_dr) = opval;
1487     written |= (1 << 2);
1488     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1489   }
1490 }
1491
1492   abuf->written = written;
1493 #undef FLD
1494 }
1495   NEXT (vpc);
1496
1497   CASE (sem, INSN_DIVH) : /* divh $dr,$sr */
1498 {
1499   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1500   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1501 #define FLD(f) abuf->fields.fmt_div.f
1502   int UNUSED written = 0;
1503   PCADDR UNUSED pc = abuf->addr;
1504   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1505
1506 if (NESI (* FLD (i_sr), 0)) {
1507   {
1508     SI opval = DIVSI (EXTHISI (TRUNCSIHI (* FLD (i_dr))), * FLD (i_sr));
1509     * FLD (i_dr) = opval;
1510     written |= (1 << 2);
1511     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1512   }
1513 }
1514
1515   abuf->written = written;
1516 #undef FLD
1517 }
1518   NEXT (vpc);
1519
1520   CASE (sem, INSN_JC) : /* jc $sr */
1521 {
1522   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1523   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1524 #define FLD(f) abuf->fields.cti.fields.fmt_jc.f
1525   int UNUSED written = 0;
1526   PCADDR UNUSED pc = abuf->addr;
1527   SEM_BRANCH_INIT
1528   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1529
1530 if (CPU (h_cond)) {
1531   {
1532     USI opval = ANDSI (* FLD (i_sr), -4);
1533     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1534     written |= (1 << 2);
1535     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1536   }
1537 }
1538
1539   abuf->written = written;
1540   SEM_BRANCH_FINI (vpc);
1541 #undef FLD
1542 }
1543   NEXT (vpc);
1544
1545   CASE (sem, INSN_JNC) : /* jnc $sr */
1546 {
1547   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1548   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1549 #define FLD(f) abuf->fields.cti.fields.fmt_jc.f
1550   int UNUSED written = 0;
1551   PCADDR UNUSED pc = abuf->addr;
1552   SEM_BRANCH_INIT
1553   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1554
1555 if (NOTBI (CPU (h_cond))) {
1556   {
1557     USI opval = ANDSI (* FLD (i_sr), -4);
1558     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1559     written |= (1 << 2);
1560     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1561   }
1562 }
1563
1564   abuf->written = written;
1565   SEM_BRANCH_FINI (vpc);
1566 #undef FLD
1567 }
1568   NEXT (vpc);
1569
1570   CASE (sem, INSN_JL) : /* jl $sr */
1571 {
1572   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1573   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1574 #define FLD(f) abuf->fields.cti.fields.fmt_jl.f
1575   int UNUSED written = 0;
1576   PCADDR UNUSED pc = abuf->addr;
1577   SEM_BRANCH_INIT
1578   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1579
1580 do {
1581   USI temp1;SI temp0;
1582   temp0 = ADDSI (ANDSI (pc, -4), 4);
1583   temp1 = ANDSI (* FLD (i_sr), -4);
1584   {
1585     SI opval = temp0;
1586     CPU (h_gr[((UINT) 14)]) = opval;
1587     TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
1588   }
1589   {
1590     USI opval = temp1;
1591     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1592     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1593   }
1594 } while (0);
1595
1596   SEM_BRANCH_FINI (vpc);
1597 #undef FLD
1598 }
1599   NEXT (vpc);
1600
1601   CASE (sem, INSN_JMP) : /* jmp $sr */
1602 {
1603   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1604   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1605 #define FLD(f) abuf->fields.cti.fields.fmt_jmp.f
1606   int UNUSED written = 0;
1607   PCADDR UNUSED pc = abuf->addr;
1608   SEM_BRANCH_INIT
1609   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1610
1611   {
1612     USI opval = ANDSI (* FLD (i_sr), -4);
1613     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1614     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1615   }
1616
1617   SEM_BRANCH_FINI (vpc);
1618 #undef FLD
1619 }
1620   NEXT (vpc);
1621
1622   CASE (sem, INSN_LD) : /* ld $dr,@$sr */
1623 {
1624   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1625   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1626 #define FLD(f) abuf->fields.fmt_ld.f
1627   int UNUSED written = 0;
1628   PCADDR UNUSED pc = abuf->addr;
1629   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1630
1631   {
1632     SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
1633     * FLD (i_dr) = opval;
1634     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1635   }
1636
1637 #undef FLD
1638 }
1639   NEXT (vpc);
1640
1641   CASE (sem, INSN_LD_D) : /* ld $dr,@($slo16,$sr) */
1642 {
1643   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1644   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1645 #define FLD(f) abuf->fields.fmt_ld_d.f
1646   int UNUSED written = 0;
1647   PCADDR UNUSED pc = abuf->addr;
1648   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1649
1650   {
1651     SI opval = GETMEMSI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)));
1652     * FLD (i_dr) = opval;
1653     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1654   }
1655
1656 #undef FLD
1657 }
1658   NEXT (vpc);
1659
1660   CASE (sem, INSN_LDB) : /* ldb $dr,@$sr */
1661 {
1662   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1663   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1664 #define FLD(f) abuf->fields.fmt_ldb.f
1665   int UNUSED written = 0;
1666   PCADDR UNUSED pc = abuf->addr;
1667   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1668
1669   {
1670     SI opval = EXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
1671     * FLD (i_dr) = opval;
1672     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1673   }
1674
1675 #undef FLD
1676 }
1677   NEXT (vpc);
1678
1679   CASE (sem, INSN_LDB_D) : /* ldb $dr,@($slo16,$sr) */
1680 {
1681   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1682   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1683 #define FLD(f) abuf->fields.fmt_ldb_d.f
1684   int UNUSED written = 0;
1685   PCADDR UNUSED pc = abuf->addr;
1686   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1687
1688   {
1689     SI opval = EXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1690     * FLD (i_dr) = opval;
1691     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1692   }
1693
1694 #undef FLD
1695 }
1696   NEXT (vpc);
1697
1698   CASE (sem, INSN_LDH) : /* ldh $dr,@$sr */
1699 {
1700   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1701   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1702 #define FLD(f) abuf->fields.fmt_ldh.f
1703   int UNUSED written = 0;
1704   PCADDR UNUSED pc = abuf->addr;
1705   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1706
1707   {
1708     SI opval = EXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
1709     * FLD (i_dr) = opval;
1710     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1711   }
1712
1713 #undef FLD
1714 }
1715   NEXT (vpc);
1716
1717   CASE (sem, INSN_LDH_D) : /* ldh $dr,@($slo16,$sr) */
1718 {
1719   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1720   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1721 #define FLD(f) abuf->fields.fmt_ldh_d.f
1722   int UNUSED written = 0;
1723   PCADDR UNUSED pc = abuf->addr;
1724   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1725
1726   {
1727     SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1728     * FLD (i_dr) = opval;
1729     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1730   }
1731
1732 #undef FLD
1733 }
1734   NEXT (vpc);
1735
1736   CASE (sem, INSN_LDUB) : /* ldub $dr,@$sr */
1737 {
1738   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1739   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1740 #define FLD(f) abuf->fields.fmt_ldb.f
1741   int UNUSED written = 0;
1742   PCADDR UNUSED pc = abuf->addr;
1743   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1744
1745   {
1746     SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
1747     * FLD (i_dr) = opval;
1748     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1749   }
1750
1751 #undef FLD
1752 }
1753   NEXT (vpc);
1754
1755   CASE (sem, INSN_LDUB_D) : /* ldub $dr,@($slo16,$sr) */
1756 {
1757   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1758   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1759 #define FLD(f) abuf->fields.fmt_ldb_d.f
1760   int UNUSED written = 0;
1761   PCADDR UNUSED pc = abuf->addr;
1762   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1763
1764   {
1765     SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1766     * FLD (i_dr) = opval;
1767     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1768   }
1769
1770 #undef FLD
1771 }
1772   NEXT (vpc);
1773
1774   CASE (sem, INSN_LDUH) : /* lduh $dr,@$sr */
1775 {
1776   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1777   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1778 #define FLD(f) abuf->fields.fmt_ldh.f
1779   int UNUSED written = 0;
1780   PCADDR UNUSED pc = abuf->addr;
1781   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1782
1783   {
1784     SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
1785     * FLD (i_dr) = opval;
1786     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1787   }
1788
1789 #undef FLD
1790 }
1791   NEXT (vpc);
1792
1793   CASE (sem, INSN_LDUH_D) : /* lduh $dr,@($slo16,$sr) */
1794 {
1795   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1796   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1797 #define FLD(f) abuf->fields.fmt_ldh_d.f
1798   int UNUSED written = 0;
1799   PCADDR UNUSED pc = abuf->addr;
1800   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1801
1802   {
1803     SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1804     * FLD (i_dr) = opval;
1805     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1806   }
1807
1808 #undef FLD
1809 }
1810   NEXT (vpc);
1811
1812   CASE (sem, INSN_LD_PLUS) : /* ld $dr,@$sr+ */
1813 {
1814   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1815   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1816 #define FLD(f) abuf->fields.fmt_ld_plus.f
1817   int UNUSED written = 0;
1818   PCADDR UNUSED pc = abuf->addr;
1819   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1820
1821 do {
1822   SI temp1;SI temp0;
1823   temp0 = GETMEMSI (current_cpu, pc, * FLD (i_sr));
1824   temp1 = ADDSI (* FLD (i_sr), 4);
1825   {
1826     SI opval = temp0;
1827     * FLD (i_dr) = opval;
1828     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1829   }
1830   {
1831     SI opval = temp1;
1832     * FLD (i_sr) = opval;
1833     TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
1834   }
1835 } while (0);
1836
1837 #undef FLD
1838 }
1839   NEXT (vpc);
1840
1841   CASE (sem, INSN_LD24) : /* ld24 $dr,$uimm24 */
1842 {
1843   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1844   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1845 #define FLD(f) abuf->fields.fmt_ld24.f
1846   int UNUSED written = 0;
1847   PCADDR UNUSED pc = abuf->addr;
1848   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1849
1850   {
1851     SI opval = FLD (i_uimm24);
1852     * FLD (i_dr) = opval;
1853     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1854   }
1855
1856 #undef FLD
1857 }
1858   NEXT (vpc);
1859
1860   CASE (sem, INSN_LDI8) : /* ldi8 $dr,$simm8 */
1861 {
1862   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1863   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1864 #define FLD(f) abuf->fields.fmt_ldi8.f
1865   int UNUSED written = 0;
1866   PCADDR UNUSED pc = abuf->addr;
1867   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1868
1869   {
1870     SI opval = FLD (f_simm8);
1871     * FLD (i_dr) = opval;
1872     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1873   }
1874
1875 #undef FLD
1876 }
1877   NEXT (vpc);
1878
1879   CASE (sem, INSN_LDI16) : /* ldi16 $dr,$hash$slo16 */
1880 {
1881   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1882   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1883 #define FLD(f) abuf->fields.fmt_ldi16.f
1884   int UNUSED written = 0;
1885   PCADDR UNUSED pc = abuf->addr;
1886   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1887
1888   {
1889     SI opval = FLD (f_simm16);
1890     * FLD (i_dr) = opval;
1891     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1892   }
1893
1894 #undef FLD
1895 }
1896   NEXT (vpc);
1897
1898   CASE (sem, INSN_LOCK) : /* lock $dr,@$sr */
1899 {
1900   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1901   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1902 #define FLD(f) abuf->fields.fmt_lock.f
1903   int UNUSED written = 0;
1904   PCADDR UNUSED pc = abuf->addr;
1905   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1906
1907 do {
1908   {
1909     BI opval = 1;
1910     CPU (h_lock) = opval;
1911     TRACE_RESULT (current_cpu, abuf, "lock-0", 'x', opval);
1912   }
1913   {
1914     SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
1915     * FLD (i_dr) = opval;
1916     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1917   }
1918 } while (0);
1919
1920 #undef FLD
1921 }
1922   NEXT (vpc);
1923
1924   CASE (sem, INSN_MACHI_A) : /* machi $src1,$src2,$acc */
1925 {
1926   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1927   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1928 #define FLD(f) abuf->fields.fmt_machi_a.f
1929   int UNUSED written = 0;
1930   PCADDR UNUSED pc = abuf->addr;
1931   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1932
1933   {
1934     DI opval = SRADI (SLLDI (ADDDI (m32rxf_h_accums_get (current_cpu, FLD (f_acc)), MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8);
1935     m32rxf_h_accums_set (current_cpu, FLD (f_acc), opval);
1936     TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
1937   }
1938
1939 #undef FLD
1940 }
1941   NEXT (vpc);
1942
1943   CASE (sem, INSN_MACLO_A) : /* maclo $src1,$src2,$acc */
1944 {
1945   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1946   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1947 #define FLD(f) abuf->fields.fmt_machi_a.f
1948   int UNUSED written = 0;
1949   PCADDR UNUSED pc = abuf->addr;
1950   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1951
1952   {
1953     DI opval = SRADI (SLLDI (ADDDI (m32rxf_h_accums_get (current_cpu, FLD (f_acc)), MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8);
1954     m32rxf_h_accums_set (current_cpu, FLD (f_acc), opval);
1955     TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
1956   }
1957
1958 #undef FLD
1959 }
1960   NEXT (vpc);
1961
1962   CASE (sem, INSN_MACWHI_A) : /* macwhi $src1,$src2,$acc */
1963 {
1964   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1965   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1966 #define FLD(f) abuf->fields.fmt_machi_a.f
1967   int UNUSED written = 0;
1968   PCADDR UNUSED pc = abuf->addr;
1969   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1970
1971   {
1972     DI opval = ADDDI (m32rxf_h_accums_get (current_cpu, FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))));
1973     m32rxf_h_accums_set (current_cpu, FLD (f_acc), opval);
1974     TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
1975   }
1976
1977 #undef FLD
1978 }
1979   NEXT (vpc);
1980
1981   CASE (sem, INSN_MACWLO_A) : /* macwlo $src1,$src2,$acc */
1982 {
1983   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1984   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1985 #define FLD(f) abuf->fields.fmt_machi_a.f
1986   int UNUSED written = 0;
1987   PCADDR UNUSED pc = abuf->addr;
1988   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1989
1990   {
1991     DI opval = ADDDI (m32rxf_h_accums_get (current_cpu, FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))));
1992     m32rxf_h_accums_set (current_cpu, FLD (f_acc), opval);
1993     TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
1994   }
1995
1996 #undef FLD
1997 }
1998   NEXT (vpc);
1999
2000   CASE (sem, INSN_MUL) : /* mul $dr,$sr */
2001 {
2002   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2003   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2004 #define FLD(f) abuf->fields.fmt_add.f
2005   int UNUSED written = 0;
2006   PCADDR UNUSED pc = abuf->addr;
2007   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2008
2009   {
2010     SI opval = MULSI (* FLD (i_dr), * FLD (i_sr));
2011     * FLD (i_dr) = opval;
2012     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2013   }
2014
2015 #undef FLD
2016 }
2017   NEXT (vpc);
2018
2019   CASE (sem, INSN_MULHI_A) : /* mulhi $src1,$src2,$acc */
2020 {
2021   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2022   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2023 #define FLD(f) abuf->fields.fmt_mulhi_a.f
2024   int UNUSED written = 0;
2025   PCADDR UNUSED pc = abuf->addr;
2026   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2027
2028   {
2029     DI opval = SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 16), 16);
2030     m32rxf_h_accums_set (current_cpu, FLD (f_acc), opval);
2031     TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
2032   }
2033
2034 #undef FLD
2035 }
2036   NEXT (vpc);
2037
2038   CASE (sem, INSN_MULLO_A) : /* mullo $src1,$src2,$acc */
2039 {
2040   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2041   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2042 #define FLD(f) abuf->fields.fmt_mulhi_a.f
2043   int UNUSED written = 0;
2044   PCADDR UNUSED pc = abuf->addr;
2045   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2046
2047   {
2048     DI opval = SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 16), 16);
2049     m32rxf_h_accums_set (current_cpu, FLD (f_acc), opval);
2050     TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
2051   }
2052
2053 #undef FLD
2054 }
2055   NEXT (vpc);
2056
2057   CASE (sem, INSN_MULWHI_A) : /* mulwhi $src1,$src2,$acc */
2058 {
2059   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2060   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2061 #define FLD(f) abuf->fields.fmt_mulhi_a.f
2062   int UNUSED written = 0;
2063   PCADDR UNUSED pc = abuf->addr;
2064   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2065
2066   {
2067     DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))));
2068     m32rxf_h_accums_set (current_cpu, FLD (f_acc), opval);
2069     TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
2070   }
2071
2072 #undef FLD
2073 }
2074   NEXT (vpc);
2075
2076   CASE (sem, INSN_MULWLO_A) : /* mulwlo $src1,$src2,$acc */
2077 {
2078   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2079   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2080 #define FLD(f) abuf->fields.fmt_mulhi_a.f
2081   int UNUSED written = 0;
2082   PCADDR UNUSED pc = abuf->addr;
2083   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2084
2085   {
2086     DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))));
2087     m32rxf_h_accums_set (current_cpu, FLD (f_acc), opval);
2088     TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
2089   }
2090
2091 #undef FLD
2092 }
2093   NEXT (vpc);
2094
2095   CASE (sem, INSN_MV) : /* mv $dr,$sr */
2096 {
2097   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2098   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2099 #define FLD(f) abuf->fields.fmt_mv.f
2100   int UNUSED written = 0;
2101   PCADDR UNUSED pc = abuf->addr;
2102   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2103
2104   {
2105     SI opval = * FLD (i_sr);
2106     * FLD (i_dr) = opval;
2107     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2108   }
2109
2110 #undef FLD
2111 }
2112   NEXT (vpc);
2113
2114   CASE (sem, INSN_MVFACHI_A) : /* mvfachi $dr,$accs */
2115 {
2116   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2117   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2118 #define FLD(f) abuf->fields.fmt_mvfachi_a.f
2119   int UNUSED written = 0;
2120   PCADDR UNUSED pc = abuf->addr;
2121   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2122
2123   {
2124     SI opval = TRUNCDISI (SRADI (m32rxf_h_accums_get (current_cpu, FLD (f_accs)), 32));
2125     * FLD (i_dr) = opval;
2126     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2127   }
2128
2129 #undef FLD
2130 }
2131   NEXT (vpc);
2132
2133   CASE (sem, INSN_MVFACLO_A) : /* mvfaclo $dr,$accs */
2134 {
2135   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2136   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2137 #define FLD(f) abuf->fields.fmt_mvfachi_a.f
2138   int UNUSED written = 0;
2139   PCADDR UNUSED pc = abuf->addr;
2140   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2141
2142   {
2143     SI opval = TRUNCDISI (m32rxf_h_accums_get (current_cpu, FLD (f_accs)));
2144     * FLD (i_dr) = opval;
2145     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2146   }
2147
2148 #undef FLD
2149 }
2150   NEXT (vpc);
2151
2152   CASE (sem, INSN_MVFACMI_A) : /* mvfacmi $dr,$accs */
2153 {
2154   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2155   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2156 #define FLD(f) abuf->fields.fmt_mvfachi_a.f
2157   int UNUSED written = 0;
2158   PCADDR UNUSED pc = abuf->addr;
2159   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2160
2161   {
2162     SI opval = TRUNCDISI (SRADI (m32rxf_h_accums_get (current_cpu, FLD (f_accs)), 16));
2163     * FLD (i_dr) = opval;
2164     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2165   }
2166
2167 #undef FLD
2168 }
2169   NEXT (vpc);
2170
2171   CASE (sem, INSN_MVFC) : /* mvfc $dr,$scr */
2172 {
2173   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2174   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2175 #define FLD(f) abuf->fields.fmt_mvfc.f
2176   int UNUSED written = 0;
2177   PCADDR UNUSED pc = abuf->addr;
2178   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2179
2180   {
2181     SI opval = m32rxf_h_cr_get (current_cpu, FLD (f_r2));
2182     * FLD (i_dr) = opval;
2183     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2184   }
2185
2186 #undef FLD
2187 }
2188   NEXT (vpc);
2189
2190   CASE (sem, INSN_MVTACHI_A) : /* mvtachi $src1,$accs */
2191 {
2192   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2193   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2194 #define FLD(f) abuf->fields.fmt_mvtachi_a.f
2195   int UNUSED written = 0;
2196   PCADDR UNUSED pc = abuf->addr;
2197   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2198
2199   {
2200     DI opval = ORDI (ANDDI (m32rxf_h_accums_get (current_cpu, FLD (f_accs)), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (* FLD (i_src1)), 32));
2201     m32rxf_h_accums_set (current_cpu, FLD (f_accs), opval);
2202     TRACE_RESULT (current_cpu, abuf, "accs", 'D', opval);
2203   }
2204
2205 #undef FLD
2206 }
2207   NEXT (vpc);
2208
2209   CASE (sem, INSN_MVTACLO_A) : /* mvtaclo $src1,$accs */
2210 {
2211   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2212   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2213 #define FLD(f) abuf->fields.fmt_mvtachi_a.f
2214   int UNUSED written = 0;
2215   PCADDR UNUSED pc = abuf->addr;
2216   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2217
2218   {
2219     DI opval = ORDI (ANDDI (m32rxf_h_accums_get (current_cpu, FLD (f_accs)), MAKEDI (0xffffffff, 0)), ZEXTSIDI (* FLD (i_src1)));
2220     m32rxf_h_accums_set (current_cpu, FLD (f_accs), opval);
2221     TRACE_RESULT (current_cpu, abuf, "accs", 'D', opval);
2222   }
2223
2224 #undef FLD
2225 }
2226   NEXT (vpc);
2227
2228   CASE (sem, INSN_MVTC) : /* mvtc $sr,$dcr */
2229 {
2230   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2231   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2232 #define FLD(f) abuf->fields.fmt_mvtc.f
2233   int UNUSED written = 0;
2234   PCADDR UNUSED pc = abuf->addr;
2235   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2236
2237   {
2238     USI opval = * FLD (i_sr);
2239     m32rxf_h_cr_set (current_cpu, FLD (f_r1), opval);
2240     TRACE_RESULT (current_cpu, abuf, "dcr", 'x', opval);
2241   }
2242
2243 #undef FLD
2244 }
2245   NEXT (vpc);
2246
2247   CASE (sem, INSN_NEG) : /* neg $dr,$sr */
2248 {
2249   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2250   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2251 #define FLD(f) abuf->fields.fmt_mv.f
2252   int UNUSED written = 0;
2253   PCADDR UNUSED pc = abuf->addr;
2254   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2255
2256   {
2257     SI opval = NEGSI (* FLD (i_sr));
2258     * FLD (i_dr) = opval;
2259     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2260   }
2261
2262 #undef FLD
2263 }
2264   NEXT (vpc);
2265
2266   CASE (sem, INSN_NOP) : /* nop */
2267 {
2268   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2269   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2270 #define FLD(f) abuf->fields.fmt_nop.f
2271   int UNUSED written = 0;
2272   PCADDR UNUSED pc = abuf->addr;
2273   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2274
2275 PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr);
2276
2277 #undef FLD
2278 }
2279   NEXT (vpc);
2280
2281   CASE (sem, INSN_NOT) : /* not $dr,$sr */
2282 {
2283   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2284   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2285 #define FLD(f) abuf->fields.fmt_mv.f
2286   int UNUSED written = 0;
2287   PCADDR UNUSED pc = abuf->addr;
2288   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2289
2290   {
2291     SI opval = INVSI (* FLD (i_sr));
2292     * FLD (i_dr) = opval;
2293     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2294   }
2295
2296 #undef FLD
2297 }
2298   NEXT (vpc);
2299
2300   CASE (sem, INSN_RAC_DSI) : /* rac $accd,$accs,$imm1 */
2301 {
2302   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2303   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2304 #define FLD(f) abuf->fields.fmt_rac_dsi.f
2305   int UNUSED written = 0;
2306   PCADDR UNUSED pc = abuf->addr;
2307   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2308
2309 do {
2310   DI tmp_tmp1;
2311   tmp_tmp1 = SLLDI (m32rxf_h_accums_get (current_cpu, FLD (f_accs)), FLD (f_imm1));
2312   tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 32768));
2313   {
2314     DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0xffff0000))) ? (MAKEDI (32767, 0xffff0000)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0xffff0000)));
2315     m32rxf_h_accums_set (current_cpu, FLD (f_accd), opval);
2316     TRACE_RESULT (current_cpu, abuf, "accd", 'D', opval);
2317   }
2318 } while (0);
2319
2320 #undef FLD
2321 }
2322   NEXT (vpc);
2323
2324   CASE (sem, INSN_RACH_DSI) : /* rach $accd,$accs,$imm1 */
2325 {
2326   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2327   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2328 #define FLD(f) abuf->fields.fmt_rac_dsi.f
2329   int UNUSED written = 0;
2330   PCADDR UNUSED pc = abuf->addr;
2331   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2332
2333 do {
2334   DI tmp_tmp1;
2335   tmp_tmp1 = SLLDI (m32rxf_h_accums_get (current_cpu, FLD (f_accs)), FLD (f_imm1));
2336   tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 0x80000000));
2337   {
2338     DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0))) ? (MAKEDI (32767, 0)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0)));
2339     m32rxf_h_accums_set (current_cpu, FLD (f_accd), opval);
2340     TRACE_RESULT (current_cpu, abuf, "accd", 'D', opval);
2341   }
2342 } while (0);
2343
2344 #undef FLD
2345 }
2346   NEXT (vpc);
2347
2348   CASE (sem, INSN_RTE) : /* rte */
2349 {
2350   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2351   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2352 #define FLD(f) abuf->fields.cti.fields.fmt_rte.f
2353   int UNUSED written = 0;
2354   PCADDR UNUSED pc = abuf->addr;
2355   SEM_BRANCH_INIT
2356   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2357
2358 do {
2359   {
2360     USI opval = ANDSI (m32rxf_h_cr_get (current_cpu, ((UINT) 6)), -4);
2361     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
2362     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
2363   }
2364   {
2365     USI opval = m32rxf_h_cr_get (current_cpu, ((UINT) 14));
2366     m32rxf_h_cr_set (current_cpu, ((UINT) 6), opval);
2367     TRACE_RESULT (current_cpu, abuf, "cr-6", 'x', opval);
2368   }
2369   {
2370     UQI opval = CPU (h_bpsw);
2371     m32rxf_h_psw_set (current_cpu, opval);
2372     TRACE_RESULT (current_cpu, abuf, "psw-0", 'x', opval);
2373   }
2374   {
2375     UQI opval = CPU (h_bbpsw);
2376     CPU (h_bpsw) = opval;
2377     TRACE_RESULT (current_cpu, abuf, "bpsw-0", 'x', opval);
2378   }
2379 } while (0);
2380
2381   SEM_BRANCH_FINI (vpc);
2382 #undef FLD
2383 }
2384   NEXT (vpc);
2385
2386   CASE (sem, INSN_SETH) : /* seth $dr,$hash$hi16 */
2387 {
2388   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2389   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2390 #define FLD(f) abuf->fields.fmt_seth.f
2391   int UNUSED written = 0;
2392   PCADDR UNUSED pc = abuf->addr;
2393   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2394
2395   {
2396     SI opval = SLLSI (FLD (f_hi16), 16);
2397     * FLD (i_dr) = opval;
2398     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2399   }
2400
2401 #undef FLD
2402 }
2403   NEXT (vpc);
2404
2405   CASE (sem, INSN_SLL) : /* sll $dr,$sr */
2406 {
2407   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2408   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2409 #define FLD(f) abuf->fields.fmt_add.f
2410   int UNUSED written = 0;
2411   PCADDR UNUSED pc = abuf->addr;
2412   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2413
2414   {
2415     SI opval = SLLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
2416     * FLD (i_dr) = opval;
2417     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2418   }
2419
2420 #undef FLD
2421 }
2422   NEXT (vpc);
2423
2424   CASE (sem, INSN_SLL3) : /* sll3 $dr,$sr,$simm16 */
2425 {
2426   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2427   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2428 #define FLD(f) abuf->fields.fmt_sll3.f
2429   int UNUSED written = 0;
2430   PCADDR UNUSED pc = abuf->addr;
2431   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2432
2433   {
2434     SI opval = SLLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
2435     * FLD (i_dr) = opval;
2436     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2437   }
2438
2439 #undef FLD
2440 }
2441   NEXT (vpc);
2442
2443   CASE (sem, INSN_SLLI) : /* slli $dr,$uimm5 */
2444 {
2445   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2446   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2447 #define FLD(f) abuf->fields.fmt_slli.f
2448   int UNUSED written = 0;
2449   PCADDR UNUSED pc = abuf->addr;
2450   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2451
2452   {
2453     SI opval = SLLSI (* FLD (i_dr), FLD (f_uimm5));
2454     * FLD (i_dr) = opval;
2455     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2456   }
2457
2458 #undef FLD
2459 }
2460   NEXT (vpc);
2461
2462   CASE (sem, INSN_SRA) : /* sra $dr,$sr */
2463 {
2464   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2465   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2466 #define FLD(f) abuf->fields.fmt_add.f
2467   int UNUSED written = 0;
2468   PCADDR UNUSED pc = abuf->addr;
2469   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2470
2471   {
2472     SI opval = SRASI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
2473     * FLD (i_dr) = opval;
2474     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2475   }
2476
2477 #undef FLD
2478 }
2479   NEXT (vpc);
2480
2481   CASE (sem, INSN_SRA3) : /* sra3 $dr,$sr,$simm16 */
2482 {
2483   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2484   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2485 #define FLD(f) abuf->fields.fmt_sll3.f
2486   int UNUSED written = 0;
2487   PCADDR UNUSED pc = abuf->addr;
2488   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2489
2490   {
2491     SI opval = SRASI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
2492     * FLD (i_dr) = opval;
2493     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2494   }
2495
2496 #undef FLD
2497 }
2498   NEXT (vpc);
2499
2500   CASE (sem, INSN_SRAI) : /* srai $dr,$uimm5 */
2501 {
2502   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2503   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2504 #define FLD(f) abuf->fields.fmt_slli.f
2505   int UNUSED written = 0;
2506   PCADDR UNUSED pc = abuf->addr;
2507   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2508
2509   {
2510     SI opval = SRASI (* FLD (i_dr), FLD (f_uimm5));
2511     * FLD (i_dr) = opval;
2512     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2513   }
2514
2515 #undef FLD
2516 }
2517   NEXT (vpc);
2518
2519   CASE (sem, INSN_SRL) : /* srl $dr,$sr */
2520 {
2521   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2522   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2523 #define FLD(f) abuf->fields.fmt_add.f
2524   int UNUSED written = 0;
2525   PCADDR UNUSED pc = abuf->addr;
2526   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2527
2528   {
2529     SI opval = SRLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
2530     * FLD (i_dr) = opval;
2531     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2532   }
2533
2534 #undef FLD
2535 }
2536   NEXT (vpc);
2537
2538   CASE (sem, INSN_SRL3) : /* srl3 $dr,$sr,$simm16 */
2539 {
2540   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2541   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2542 #define FLD(f) abuf->fields.fmt_sll3.f
2543   int UNUSED written = 0;
2544   PCADDR UNUSED pc = abuf->addr;
2545   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2546
2547   {
2548     SI opval = SRLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
2549     * FLD (i_dr) = opval;
2550     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2551   }
2552
2553 #undef FLD
2554 }
2555   NEXT (vpc);
2556
2557   CASE (sem, INSN_SRLI) : /* srli $dr,$uimm5 */
2558 {
2559   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2560   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2561 #define FLD(f) abuf->fields.fmt_slli.f
2562   int UNUSED written = 0;
2563   PCADDR UNUSED pc = abuf->addr;
2564   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2565
2566   {
2567     SI opval = SRLSI (* FLD (i_dr), FLD (f_uimm5));
2568     * FLD (i_dr) = opval;
2569     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2570   }
2571
2572 #undef FLD
2573 }
2574   NEXT (vpc);
2575
2576   CASE (sem, INSN_ST) : /* st $src1,@$src2 */
2577 {
2578   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2579   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2580 #define FLD(f) abuf->fields.fmt_st.f
2581   int UNUSED written = 0;
2582   PCADDR UNUSED pc = abuf->addr;
2583   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2584
2585   {
2586     SI opval = * FLD (i_src1);
2587     SETMEMSI (current_cpu, pc, * FLD (i_src2), opval);
2588     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2589   }
2590
2591 #undef FLD
2592 }
2593   NEXT (vpc);
2594
2595   CASE (sem, INSN_ST_D) : /* st $src1,@($slo16,$src2) */
2596 {
2597   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2598   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2599 #define FLD(f) abuf->fields.fmt_st_d.f
2600   int UNUSED written = 0;
2601   PCADDR UNUSED pc = abuf->addr;
2602   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2603
2604   {
2605     SI opval = * FLD (i_src1);
2606     SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
2607     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2608   }
2609
2610 #undef FLD
2611 }
2612   NEXT (vpc);
2613
2614   CASE (sem, INSN_STB) : /* stb $src1,@$src2 */
2615 {
2616   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2617   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2618 #define FLD(f) abuf->fields.fmt_stb.f
2619   int UNUSED written = 0;
2620   PCADDR UNUSED pc = abuf->addr;
2621   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2622
2623   {
2624     QI opval = * FLD (i_src1);
2625     SETMEMQI (current_cpu, pc, * FLD (i_src2), opval);
2626     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2627   }
2628
2629 #undef FLD
2630 }
2631   NEXT (vpc);
2632
2633   CASE (sem, INSN_STB_D) : /* stb $src1,@($slo16,$src2) */
2634 {
2635   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2636   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2637 #define FLD(f) abuf->fields.fmt_stb_d.f
2638   int UNUSED written = 0;
2639   PCADDR UNUSED pc = abuf->addr;
2640   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2641
2642   {
2643     QI opval = * FLD (i_src1);
2644     SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
2645     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2646   }
2647
2648 #undef FLD
2649 }
2650   NEXT (vpc);
2651
2652   CASE (sem, INSN_STH) : /* sth $src1,@$src2 */
2653 {
2654   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2655   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2656 #define FLD(f) abuf->fields.fmt_sth.f
2657   int UNUSED written = 0;
2658   PCADDR UNUSED pc = abuf->addr;
2659   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2660
2661   {
2662     HI opval = * FLD (i_src1);
2663     SETMEMHI (current_cpu, pc, * FLD (i_src2), opval);
2664     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2665   }
2666
2667 #undef FLD
2668 }
2669   NEXT (vpc);
2670
2671   CASE (sem, INSN_STH_D) : /* sth $src1,@($slo16,$src2) */
2672 {
2673   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2674   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2675 #define FLD(f) abuf->fields.fmt_sth_d.f
2676   int UNUSED written = 0;
2677   PCADDR UNUSED pc = abuf->addr;
2678   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2679
2680   {
2681     HI opval = * FLD (i_src1);
2682     SETMEMHI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
2683     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2684   }
2685
2686 #undef FLD
2687 }
2688   NEXT (vpc);
2689
2690   CASE (sem, INSN_ST_PLUS) : /* st $src1,@+$src2 */
2691 {
2692   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2693   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2694 #define FLD(f) abuf->fields.fmt_st_plus.f
2695   int UNUSED written = 0;
2696   PCADDR UNUSED pc = abuf->addr;
2697   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2698
2699 do {
2700   SI tmp_new_src2;
2701   tmp_new_src2 = ADDSI (* FLD (i_src2), 4);
2702   {
2703     SI opval = * FLD (i_src1);
2704     SETMEMSI (current_cpu, pc, tmp_new_src2, opval);
2705     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2706   }
2707   {
2708     SI opval = tmp_new_src2;
2709     * FLD (i_src2) = opval;
2710     TRACE_RESULT (current_cpu, abuf, "src2", 'x', opval);
2711   }
2712 } while (0);
2713
2714 #undef FLD
2715 }
2716   NEXT (vpc);
2717
2718   CASE (sem, INSN_ST_MINUS) : /* st $src1,@-$src2 */
2719 {
2720   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2721   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2722 #define FLD(f) abuf->fields.fmt_st_plus.f
2723   int UNUSED written = 0;
2724   PCADDR UNUSED pc = abuf->addr;
2725   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2726
2727 do {
2728   SI tmp_new_src2;
2729   tmp_new_src2 = SUBSI (* FLD (i_src2), 4);
2730   {
2731     SI opval = * FLD (i_src1);
2732     SETMEMSI (current_cpu, pc, tmp_new_src2, opval);
2733     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2734   }
2735   {
2736     SI opval = tmp_new_src2;
2737     * FLD (i_src2) = opval;
2738     TRACE_RESULT (current_cpu, abuf, "src2", 'x', opval);
2739   }
2740 } while (0);
2741
2742 #undef FLD
2743 }
2744   NEXT (vpc);
2745
2746   CASE (sem, INSN_SUB) : /* sub $dr,$sr */
2747 {
2748   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2749   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2750 #define FLD(f) abuf->fields.fmt_add.f
2751   int UNUSED written = 0;
2752   PCADDR UNUSED pc = abuf->addr;
2753   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2754
2755   {
2756     SI opval = SUBSI (* FLD (i_dr), * FLD (i_sr));
2757     * FLD (i_dr) = opval;
2758     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2759   }
2760
2761 #undef FLD
2762 }
2763   NEXT (vpc);
2764
2765   CASE (sem, INSN_SUBV) : /* subv $dr,$sr */
2766 {
2767   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2768   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2769 #define FLD(f) abuf->fields.fmt_addv.f
2770   int UNUSED written = 0;
2771   PCADDR UNUSED pc = abuf->addr;
2772   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2773
2774 do {
2775   BI temp1;SI temp0;
2776   temp0 = SUBSI (* FLD (i_dr), * FLD (i_sr));
2777   temp1 = SUBOFSI (* FLD (i_dr), * FLD (i_sr), 0);
2778   {
2779     SI opval = temp0;
2780     * FLD (i_dr) = opval;
2781     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2782   }
2783   {
2784     BI opval = temp1;
2785     CPU (h_cond) = opval;
2786     TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
2787   }
2788 } while (0);
2789
2790 #undef FLD
2791 }
2792   NEXT (vpc);
2793
2794   CASE (sem, INSN_SUBX) : /* subx $dr,$sr */
2795 {
2796   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2797   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2798 #define FLD(f) abuf->fields.fmt_addx.f
2799   int UNUSED written = 0;
2800   PCADDR UNUSED pc = abuf->addr;
2801   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2802
2803 do {
2804   BI temp1;SI temp0;
2805   temp0 = SUBCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
2806   temp1 = SUBCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
2807   {
2808     SI opval = temp0;
2809     * FLD (i_dr) = opval;
2810     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2811   }
2812   {
2813     BI opval = temp1;
2814     CPU (h_cond) = opval;
2815     TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
2816   }
2817 } while (0);
2818
2819 #undef FLD
2820 }
2821   NEXT (vpc);
2822
2823   CASE (sem, INSN_TRAP) : /* trap $uimm4 */
2824 {
2825   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2826   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2827 #define FLD(f) abuf->fields.cti.fields.fmt_trap.f
2828   int UNUSED written = 0;
2829   PCADDR UNUSED pc = abuf->addr;
2830   SEM_BRANCH_INIT
2831   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2832
2833 do {
2834   {
2835     USI opval = m32rxf_h_cr_get (current_cpu, ((UINT) 6));
2836     m32rxf_h_cr_set (current_cpu, ((UINT) 14), opval);
2837     TRACE_RESULT (current_cpu, abuf, "cr-14", 'x', opval);
2838   }
2839   {
2840     USI opval = ADDSI (pc, 4);
2841     m32rxf_h_cr_set (current_cpu, ((UINT) 6), opval);
2842     TRACE_RESULT (current_cpu, abuf, "cr-6", 'x', opval);
2843   }
2844   {
2845     UQI opval = CPU (h_bpsw);
2846     CPU (h_bbpsw) = opval;
2847     TRACE_RESULT (current_cpu, abuf, "bbpsw-0", 'x', opval);
2848   }
2849   {
2850     UQI opval = m32rxf_h_psw_get (current_cpu);
2851     CPU (h_bpsw) = opval;
2852     TRACE_RESULT (current_cpu, abuf, "bpsw-0", 'x', opval);
2853   }
2854   {
2855     UQI opval = ANDQI (m32rxf_h_psw_get (current_cpu), 128);
2856     m32rxf_h_psw_set (current_cpu, opval);
2857     TRACE_RESULT (current_cpu, abuf, "psw-0", 'x', opval);
2858   }
2859   {
2860     SI opval = m32r_trap (current_cpu, pc, FLD (f_uimm4));
2861     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
2862     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
2863   }
2864 } while (0);
2865
2866   SEM_BRANCH_FINI (vpc);
2867 #undef FLD
2868 }
2869   NEXT (vpc);
2870
2871   CASE (sem, INSN_UNLOCK) : /* unlock $src1,@$src2 */
2872 {
2873   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2874   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2875 #define FLD(f) abuf->fields.fmt_unlock.f
2876   int UNUSED written = 0;
2877   PCADDR UNUSED pc = abuf->addr;
2878   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2879
2880 do {
2881 if (CPU (h_lock)) {
2882   {
2883     SI opval = * FLD (i_src1);
2884     SETMEMSI (current_cpu, pc, * FLD (i_src2), opval);
2885     written |= (1 << 3);
2886     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2887   }
2888 }
2889   {
2890     BI opval = 0;
2891     CPU (h_lock) = opval;
2892     TRACE_RESULT (current_cpu, abuf, "lock-0", 'x', opval);
2893   }
2894 } while (0);
2895
2896   abuf->written = written;
2897 #undef FLD
2898 }
2899   NEXT (vpc);
2900
2901   CASE (sem, INSN_SATB) : /* satb $dr,$sr */
2902 {
2903   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2904   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2905 #define FLD(f) abuf->fields.fmt_satb.f
2906   int UNUSED written = 0;
2907   PCADDR UNUSED pc = abuf->addr;
2908   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2909
2910   {
2911     SI opval = (GESI (* FLD (i_sr), 127)) ? (127) : (LESI (* FLD (i_sr), -128)) ? (-128) : (* FLD (i_sr));
2912     * FLD (i_dr) = opval;
2913     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2914   }
2915
2916 #undef FLD
2917 }
2918   NEXT (vpc);
2919
2920   CASE (sem, INSN_SATH) : /* sath $dr,$sr */
2921 {
2922   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2923   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2924 #define FLD(f) abuf->fields.fmt_satb.f
2925   int UNUSED written = 0;
2926   PCADDR UNUSED pc = abuf->addr;
2927   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2928
2929   {
2930     SI opval = (GESI (* FLD (i_sr), 32767)) ? (32767) : (LESI (* FLD (i_sr), -32768)) ? (-32768) : (* FLD (i_sr));
2931     * FLD (i_dr) = opval;
2932     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2933   }
2934
2935 #undef FLD
2936 }
2937   NEXT (vpc);
2938
2939   CASE (sem, INSN_SAT) : /* sat $dr,$sr */
2940 {
2941   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2942   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2943 #define FLD(f) abuf->fields.fmt_sat.f
2944   int UNUSED written = 0;
2945   PCADDR UNUSED pc = abuf->addr;
2946   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2947
2948   {
2949     SI opval = ((CPU (h_cond)) ? (((LTSI (* FLD (i_sr), 0)) ? (2147483647) : (0x80000000))) : (* FLD (i_sr)));
2950     * FLD (i_dr) = opval;
2951     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2952   }
2953
2954 #undef FLD
2955 }
2956   NEXT (vpc);
2957
2958   CASE (sem, INSN_PCMPBZ) : /* pcmpbz $src2 */
2959 {
2960   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2961   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2962 #define FLD(f) abuf->fields.fmt_cmpz.f
2963   int UNUSED written = 0;
2964   PCADDR UNUSED pc = abuf->addr;
2965   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2966
2967   {
2968     BI opval = (EQSI (ANDSI (* FLD (i_src2), 255), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 65280), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 16711680), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 0xff000000), 0)) ? (1) : (0);
2969     CPU (h_cond) = opval;
2970     TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
2971   }
2972
2973 #undef FLD
2974 }
2975   NEXT (vpc);
2976
2977   CASE (sem, INSN_SADD) : /* sadd */
2978 {
2979   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2980   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2981 #define FLD(f) abuf->fields.fmt_sadd.f
2982   int UNUSED written = 0;
2983   PCADDR UNUSED pc = abuf->addr;
2984   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2985
2986   {
2987     DI opval = ADDDI (SRADI (m32rxf_h_accums_get (current_cpu, ((UINT) 1)), 16), m32rxf_h_accums_get (current_cpu, ((UINT) 0)));
2988     m32rxf_h_accums_set (current_cpu, ((UINT) 0), opval);
2989     TRACE_RESULT (current_cpu, abuf, "accums-0", 'D', opval);
2990   }
2991
2992 #undef FLD
2993 }
2994   NEXT (vpc);
2995
2996   CASE (sem, INSN_MACWU1) : /* macwu1 $src1,$src2 */
2997 {
2998   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2999   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3000 #define FLD(f) abuf->fields.fmt_macwu1.f
3001   int UNUSED written = 0;
3002   PCADDR UNUSED pc = abuf->addr;
3003   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3004
3005   {
3006     DI opval = SRADI (SLLDI (ADDDI (m32rxf_h_accums_get (current_cpu, ((UINT) 1)), MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535)))), 8), 8);
3007     m32rxf_h_accums_set (current_cpu, ((UINT) 1), opval);
3008     TRACE_RESULT (current_cpu, abuf, "accums-1", 'D', opval);
3009   }
3010
3011 #undef FLD
3012 }
3013   NEXT (vpc);
3014
3015   CASE (sem, INSN_MSBLO) : /* msblo $src1,$src2 */
3016 {
3017   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3018   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3019 #define FLD(f) abuf->fields.fmt_msblo.f
3020   int UNUSED written = 0;
3021   PCADDR UNUSED pc = abuf->addr;
3022   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3023
3024   {
3025     DI opval = SRADI (SLLDI (SUBDI (m32rxf_h_accum_get (current_cpu), SRADI (SLLDI (MULDI (EXTHIDI (TRUNCSIHI (* FLD (i_src1))), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 32), 16)), 8), 8);
3026     m32rxf_h_accum_set (current_cpu, opval);
3027     TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
3028   }
3029
3030 #undef FLD
3031 }
3032   NEXT (vpc);
3033
3034   CASE (sem, INSN_MULWU1) : /* mulwu1 $src1,$src2 */
3035 {
3036   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3037   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3038 #define FLD(f) abuf->fields.fmt_mulwu1.f
3039   int UNUSED written = 0;
3040   PCADDR UNUSED pc = abuf->addr;
3041   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3042
3043   {
3044     DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535))), 16), 16);
3045     m32rxf_h_accums_set (current_cpu, ((UINT) 1), opval);
3046     TRACE_RESULT (current_cpu, abuf, "accums-1", 'D', opval);
3047   }
3048
3049 #undef FLD
3050 }
3051   NEXT (vpc);
3052
3053   CASE (sem, INSN_MACLH1) : /* maclh1 $src1,$src2 */
3054 {
3055   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3056   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3057 #define FLD(f) abuf->fields.fmt_macwu1.f
3058   int UNUSED written = 0;
3059   PCADDR UNUSED pc = abuf->addr;
3060   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3061
3062   {
3063     DI opval = SRADI (SLLDI (ADDDI (m32rxf_h_accums_get (current_cpu, ((UINT) 1)), SLLDI (EXTSIDI (MULSI (EXTHISI (TRUNCSIHI (* FLD (i_src1))), SRASI (* FLD (i_src2), 16))), 16)), 8), 8);
3064     m32rxf_h_accums_set (current_cpu, ((UINT) 1), opval);
3065     TRACE_RESULT (current_cpu, abuf, "accums-1", 'D', opval);
3066   }
3067
3068 #undef FLD
3069 }
3070   NEXT (vpc);
3071
3072   CASE (sem, INSN_SC) : /* sc */
3073 {
3074   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3075   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3076 #define FLD(f) abuf->fields.cti.fields.fmt_sc.f
3077   int UNUSED written = 0;
3078   PCADDR UNUSED pc = abuf->addr;
3079   SEM_BRANCH_INIT
3080   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3081
3082 if (CPU (h_cond)) {
3083 SEM_SKIP_INSN (current_cpu, 1);
3084 }
3085
3086   SEM_BRANCH_FINI (vpc);
3087 #undef FLD
3088 }
3089   NEXT (vpc);
3090
3091   CASE (sem, INSN_SNC) : /* snc */
3092 {
3093   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3094   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3095 #define FLD(f) abuf->fields.cti.fields.fmt_sc.f
3096   int UNUSED written = 0;
3097   PCADDR UNUSED pc = abuf->addr;
3098   SEM_BRANCH_INIT
3099   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3100
3101 if (NOTBI (CPU (h_cond))) {
3102 SEM_SKIP_INSN (current_cpu, 1);
3103 }
3104
3105   SEM_BRANCH_FINI (vpc);
3106 #undef FLD
3107 }
3108   NEXT (vpc);
3109
3110   CASE (sem, INSN_PAR_ADD) : /* add $dr,$sr */
3111 {
3112   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3113   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3114 #define FLD(f) abuf->fields.fmt_add.f
3115 #define OPRND(f) par_exec->operands.fmt_add.f
3116   int UNUSED written = 0;
3117   PCADDR UNUSED pc = abuf->addr;
3118   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3119
3120   {
3121     SI opval = ADDSI (* FLD (i_dr), * FLD (i_sr));
3122     OPRND (dr) = opval;
3123     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
3124   }
3125
3126 #undef OPRND
3127 #undef FLD
3128 }
3129   NEXT (vpc);
3130
3131   CASE (sem, INSN_WRITE_ADD) : /* add $dr,$sr */
3132 {
3133   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3134   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3135 #define FLD(f) abuf->fields.fmt_add.f
3136 #define OPRND(f) par_exec->operands.fmt_add.f
3137   int UNUSED written = abuf->written;
3138   PCADDR UNUSED pc = abuf->addr;
3139   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3140
3141   * FLD (i_dr) = OPRND (dr);
3142
3143 #undef OPRND
3144 #undef FLD
3145 }
3146   NEXT (vpc);
3147
3148   CASE (sem, INSN_PAR_AND) : /* and $dr,$sr */
3149 {
3150   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3151   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3152 #define FLD(f) abuf->fields.fmt_add.f
3153 #define OPRND(f) par_exec->operands.fmt_add.f
3154   int UNUSED written = 0;
3155   PCADDR UNUSED pc = abuf->addr;
3156   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3157
3158   {
3159     SI opval = ANDSI (* FLD (i_dr), * FLD (i_sr));
3160     OPRND (dr) = opval;
3161     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
3162   }
3163
3164 #undef OPRND
3165 #undef FLD
3166 }
3167   NEXT (vpc);
3168
3169   CASE (sem, INSN_WRITE_AND) : /* and $dr,$sr */
3170 {
3171   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3172   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3173 #define FLD(f) abuf->fields.fmt_add.f
3174 #define OPRND(f) par_exec->operands.fmt_add.f
3175   int UNUSED written = abuf->written;
3176   PCADDR UNUSED pc = abuf->addr;
3177   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3178
3179   * FLD (i_dr) = OPRND (dr);
3180
3181 #undef OPRND
3182 #undef FLD
3183 }
3184   NEXT (vpc);
3185
3186   CASE (sem, INSN_PAR_OR) : /* or $dr,$sr */
3187 {
3188   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3189   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3190 #define FLD(f) abuf->fields.fmt_add.f
3191 #define OPRND(f) par_exec->operands.fmt_add.f
3192   int UNUSED written = 0;
3193   PCADDR UNUSED pc = abuf->addr;
3194   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3195
3196   {
3197     SI opval = ORSI (* FLD (i_dr), * FLD (i_sr));
3198     OPRND (dr) = opval;
3199     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
3200   }
3201
3202 #undef OPRND
3203 #undef FLD
3204 }
3205   NEXT (vpc);
3206
3207   CASE (sem, INSN_WRITE_OR) : /* or $dr,$sr */
3208 {
3209   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3210   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3211 #define FLD(f) abuf->fields.fmt_add.f
3212 #define OPRND(f) par_exec->operands.fmt_add.f
3213   int UNUSED written = abuf->written;
3214   PCADDR UNUSED pc = abuf->addr;
3215   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3216
3217   * FLD (i_dr) = OPRND (dr);
3218
3219 #undef OPRND
3220 #undef FLD
3221 }
3222   NEXT (vpc);
3223
3224   CASE (sem, INSN_PAR_XOR) : /* xor $dr,$sr */
3225 {
3226   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3227   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3228 #define FLD(f) abuf->fields.fmt_add.f
3229 #define OPRND(f) par_exec->operands.fmt_add.f
3230   int UNUSED written = 0;
3231   PCADDR UNUSED pc = abuf->addr;
3232   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3233
3234   {
3235     SI opval = XORSI (* FLD (i_dr), * FLD (i_sr));
3236     OPRND (dr) = opval;
3237     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
3238   }
3239
3240 #undef OPRND
3241 #undef FLD
3242 }
3243   NEXT (vpc);
3244
3245   CASE (sem, INSN_WRITE_XOR) : /* xor $dr,$sr */
3246 {
3247   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3248   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3249 #define FLD(f) abuf->fields.fmt_add.f
3250 #define OPRND(f) par_exec->operands.fmt_add.f
3251   int UNUSED written = abuf->written;
3252   PCADDR UNUSED pc = abuf->addr;
3253   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3254
3255   * FLD (i_dr) = OPRND (dr);
3256
3257 #undef OPRND
3258 #undef FLD
3259 }
3260   NEXT (vpc);
3261
3262   CASE (sem, INSN_PAR_ADDI) : /* addi $dr,$simm8 */
3263 {
3264   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3265   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3266 #define FLD(f) abuf->fields.fmt_addi.f
3267 #define OPRND(f) par_exec->operands.fmt_addi.f
3268   int UNUSED written = 0;
3269   PCADDR UNUSED pc = abuf->addr;
3270   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3271
3272   {
3273     SI opval = ADDSI (* FLD (i_dr), FLD (f_simm8));
3274     OPRND (dr) = opval;
3275     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
3276   }
3277
3278 #undef OPRND
3279 #undef FLD
3280 }
3281   NEXT (vpc);
3282
3283   CASE (sem, INSN_WRITE_ADDI) : /* addi $dr,$simm8 */
3284 {
3285   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3286   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3287 #define FLD(f) abuf->fields.fmt_addi.f
3288 #define OPRND(f) par_exec->operands.fmt_addi.f
3289   int UNUSED written = abuf->written;
3290   PCADDR UNUSED pc = abuf->addr;
3291   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3292
3293   * FLD (i_dr) = OPRND (dr);
3294
3295 #undef OPRND
3296 #undef FLD
3297 }
3298   NEXT (vpc);
3299
3300   CASE (sem, INSN_PAR_ADDV) : /* addv $dr,$sr */
3301 {
3302   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3303   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3304 #define FLD(f) abuf->fields.fmt_addv.f
3305 #define OPRND(f) par_exec->operands.fmt_addv.f
3306   int UNUSED written = 0;
3307   PCADDR UNUSED pc = abuf->addr;
3308   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3309
3310 do {
3311   BI temp1;SI temp0;
3312   temp0 = ADDSI (* FLD (i_dr), * FLD (i_sr));
3313   temp1 = ADDOFSI (* FLD (i_dr), * FLD (i_sr), 0);
3314   {
3315     SI opval = temp0;
3316     OPRND (dr) = opval;
3317     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
3318   }
3319   {
3320     BI opval = temp1;
3321     OPRND (condbit) = opval;
3322     TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
3323   }
3324 } while (0);
3325
3326 #undef OPRND
3327 #undef FLD
3328 }
3329   NEXT (vpc);
3330
3331   CASE (sem, INSN_WRITE_ADDV) : /* addv $dr,$sr */
3332 {
3333   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3334   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3335 #define FLD(f) abuf->fields.fmt_addv.f
3336 #define OPRND(f) par_exec->operands.fmt_addv.f
3337   int UNUSED written = abuf->written;
3338   PCADDR UNUSED pc = abuf->addr;
3339   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3340
3341   * FLD (i_dr) = OPRND (dr);
3342   CPU (h_cond) = OPRND (condbit);
3343
3344 #undef OPRND
3345 #undef FLD
3346 }
3347   NEXT (vpc);
3348
3349   CASE (sem, INSN_PAR_ADDX) : /* addx $dr,$sr */
3350 {
3351   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3352   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3353 #define FLD(f) abuf->fields.fmt_addx.f
3354 #define OPRND(f) par_exec->operands.fmt_addx.f
3355   int UNUSED written = 0;
3356   PCADDR UNUSED pc = abuf->addr;
3357   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3358
3359 do {
3360   BI temp1;SI temp0;
3361   temp0 = ADDCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
3362   temp1 = ADDCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
3363   {
3364     SI opval = temp0;
3365     OPRND (dr) = opval;
3366     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
3367   }
3368   {
3369     BI opval = temp1;
3370     OPRND (condbit) = opval;
3371     TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
3372   }
3373 } while (0);
3374
3375 #undef OPRND
3376 #undef FLD
3377 }
3378   NEXT (vpc);
3379
3380   CASE (sem, INSN_WRITE_ADDX) : /* addx $dr,$sr */
3381 {
3382   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3383   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3384 #define FLD(f) abuf->fields.fmt_addx.f
3385 #define OPRND(f) par_exec->operands.fmt_addx.f
3386   int UNUSED written = abuf->written;
3387   PCADDR UNUSED pc = abuf->addr;
3388   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3389
3390   * FLD (i_dr) = OPRND (dr);
3391   CPU (h_cond) = OPRND (condbit);
3392
3393 #undef OPRND
3394 #undef FLD
3395 }
3396   NEXT (vpc);
3397
3398   CASE (sem, INSN_PAR_BC8) : /* bc.s $disp8 */
3399 {
3400   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3401   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3402 #define FLD(f) abuf->fields.cti.fields.fmt_bc8.f
3403 #define OPRND(f) par_exec->operands.fmt_bc8.f
3404   int UNUSED written = 0;
3405   PCADDR UNUSED pc = abuf->addr;
3406   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3407
3408 if (CPU (h_cond)) {
3409   {
3410     USI opval = FLD (i_disp8);
3411     OPRND (pc) = opval;
3412     written |= (1 << 2);
3413     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3414   }
3415 }
3416
3417   abuf->written = written;
3418 #undef OPRND
3419 #undef FLD
3420 }
3421   NEXT (vpc);
3422
3423   CASE (sem, INSN_WRITE_BC8) : /* bc.s $disp8 */
3424 {
3425   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3426   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3427 #define FLD(f) abuf->fields.cti.fields.fmt_bc8.f
3428 #define OPRND(f) par_exec->operands.fmt_bc8.f
3429   int UNUSED written = abuf->written;
3430   PCADDR UNUSED pc = abuf->addr;
3431   SEM_BRANCH_INIT
3432   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3433
3434   if (written & (1 << 2))
3435     {
3436       SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3437     }
3438
3439   SEM_BRANCH_FINI (vpc);
3440 #undef OPRND
3441 #undef FLD
3442 }
3443   NEXT (vpc);
3444
3445   CASE (sem, INSN_PAR_BL8) : /* bl.s $disp8 */
3446 {
3447   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3448   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3449 #define FLD(f) abuf->fields.cti.fields.fmt_bl8.f
3450 #define OPRND(f) par_exec->operands.fmt_bl8.f
3451   int UNUSED written = 0;
3452   PCADDR UNUSED pc = abuf->addr;
3453   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3454
3455 do {
3456   {
3457     SI opval = ADDSI (ANDSI (pc, -4), 4);
3458     OPRND (h_gr_14) = opval;
3459     TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
3460   }
3461   {
3462     USI opval = FLD (i_disp8);
3463     OPRND (pc) = opval;
3464     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3465   }
3466 } while (0);
3467
3468 #undef OPRND
3469 #undef FLD
3470 }
3471   NEXT (vpc);
3472
3473   CASE (sem, INSN_WRITE_BL8) : /* bl.s $disp8 */
3474 {
3475   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3476   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3477 #define FLD(f) abuf->fields.cti.fields.fmt_bl8.f
3478 #define OPRND(f) par_exec->operands.fmt_bl8.f
3479   int UNUSED written = abuf->written;
3480   PCADDR UNUSED pc = abuf->addr;
3481   SEM_BRANCH_INIT
3482   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3483
3484   CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_14);
3485   SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3486
3487   SEM_BRANCH_FINI (vpc);
3488 #undef OPRND
3489 #undef FLD
3490 }
3491   NEXT (vpc);
3492
3493   CASE (sem, INSN_PAR_BCL8) : /* bcl.s $disp8 */
3494 {
3495   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3496   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3497 #define FLD(f) abuf->fields.cti.fields.fmt_bcl8.f
3498 #define OPRND(f) par_exec->operands.fmt_bcl8.f
3499   int UNUSED written = 0;
3500   PCADDR UNUSED pc = abuf->addr;
3501   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3502
3503 if (CPU (h_cond)) {
3504 do {
3505   {
3506     SI opval = ADDSI (ANDSI (pc, -4), 4);
3507     OPRND (h_gr_14) = opval;
3508     written |= (1 << 3);
3509     TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
3510   }
3511   {
3512     USI opval = FLD (i_disp8);
3513     OPRND (pc) = opval;
3514     written |= (1 << 4);
3515     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3516   }
3517 } while (0);
3518 }
3519
3520   abuf->written = written;
3521 #undef OPRND
3522 #undef FLD
3523 }
3524   NEXT (vpc);
3525
3526   CASE (sem, INSN_WRITE_BCL8) : /* bcl.s $disp8 */
3527 {
3528   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3529   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3530 #define FLD(f) abuf->fields.cti.fields.fmt_bcl8.f
3531 #define OPRND(f) par_exec->operands.fmt_bcl8.f
3532   int UNUSED written = abuf->written;
3533   PCADDR UNUSED pc = abuf->addr;
3534   SEM_BRANCH_INIT
3535   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3536
3537   if (written & (1 << 3))
3538     {
3539       CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_14);
3540     }
3541   if (written & (1 << 4))
3542     {
3543       SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3544     }
3545
3546   SEM_BRANCH_FINI (vpc);
3547 #undef OPRND
3548 #undef FLD
3549 }
3550   NEXT (vpc);
3551
3552   CASE (sem, INSN_PAR_BNC8) : /* bnc.s $disp8 */
3553 {
3554   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3555   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3556 #define FLD(f) abuf->fields.cti.fields.fmt_bc8.f
3557 #define OPRND(f) par_exec->operands.fmt_bc8.f
3558   int UNUSED written = 0;
3559   PCADDR UNUSED pc = abuf->addr;
3560   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3561
3562 if (NOTBI (CPU (h_cond))) {
3563   {
3564     USI opval = FLD (i_disp8);
3565     OPRND (pc) = opval;
3566     written |= (1 << 2);
3567     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3568   }
3569 }
3570
3571   abuf->written = written;
3572 #undef OPRND
3573 #undef FLD
3574 }
3575   NEXT (vpc);
3576
3577   CASE (sem, INSN_WRITE_BNC8) : /* bnc.s $disp8 */
3578 {
3579   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3580   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3581 #define FLD(f) abuf->fields.cti.fields.fmt_bc8.f
3582 #define OPRND(f) par_exec->operands.fmt_bc8.f
3583   int UNUSED written = abuf->written;
3584   PCADDR UNUSED pc = abuf->addr;
3585   SEM_BRANCH_INIT
3586   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3587
3588   if (written & (1 << 2))
3589     {
3590       SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3591     }
3592
3593   SEM_BRANCH_FINI (vpc);
3594 #undef OPRND
3595 #undef FLD
3596 }
3597   NEXT (vpc);
3598
3599   CASE (sem, INSN_PAR_BRA8) : /* bra.s $disp8 */
3600 {
3601   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3602   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3603 #define FLD(f) abuf->fields.cti.fields.fmt_bra8.f
3604 #define OPRND(f) par_exec->operands.fmt_bra8.f
3605   int UNUSED written = 0;
3606   PCADDR UNUSED pc = abuf->addr;
3607   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3608
3609   {
3610     USI opval = FLD (i_disp8);
3611     OPRND (pc) = opval;
3612     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3613   }
3614
3615 #undef OPRND
3616 #undef FLD
3617 }
3618   NEXT (vpc);
3619
3620   CASE (sem, INSN_WRITE_BRA8) : /* bra.s $disp8 */
3621 {
3622   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3623   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3624 #define FLD(f) abuf->fields.cti.fields.fmt_bra8.f
3625 #define OPRND(f) par_exec->operands.fmt_bra8.f
3626   int UNUSED written = abuf->written;
3627   PCADDR UNUSED pc = abuf->addr;
3628   SEM_BRANCH_INIT
3629   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3630
3631   SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3632
3633   SEM_BRANCH_FINI (vpc);
3634 #undef OPRND
3635 #undef FLD
3636 }
3637   NEXT (vpc);
3638
3639   CASE (sem, INSN_PAR_BNCL8) : /* bncl.s $disp8 */
3640 {
3641   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3642   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3643 #define FLD(f) abuf->fields.cti.fields.fmt_bcl8.f
3644 #define OPRND(f) par_exec->operands.fmt_bcl8.f
3645   int UNUSED written = 0;
3646   PCADDR UNUSED pc = abuf->addr;
3647   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3648
3649 if (NOTBI (CPU (h_cond))) {
3650 do {
3651   {
3652     SI opval = ADDSI (ANDSI (pc, -4), 4);
3653     OPRND (h_gr_14) = opval;
3654     written |= (1 << 3);
3655     TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
3656   }
3657   {
3658     USI opval = FLD (i_disp8);
3659     OPRND (pc) = opval;
3660     written |= (1 << 4);
3661     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3662   }
3663 } while (0);
3664 }
3665
3666   abuf->written = written;
3667 #undef OPRND
3668 #undef FLD
3669 }
3670   NEXT (vpc);
3671
3672   CASE (sem, INSN_WRITE_BNCL8) : /* bncl.s $disp8 */
3673 {
3674   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3675   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3676 #define FLD(f) abuf->fields.cti.fields.fmt_bcl8.f
3677 #define OPRND(f) par_exec->operands.fmt_bcl8.f
3678   int UNUSED written = abuf->written;
3679   PCADDR UNUSED pc = abuf->addr;
3680   SEM_BRANCH_INIT
3681   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3682
3683   if (written & (1 << 3))
3684     {
3685       CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_14);
3686     }
3687   if (written & (1 << 4))
3688     {
3689       SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3690     }
3691
3692   SEM_BRANCH_FINI (vpc);
3693 #undef OPRND
3694 #undef FLD
3695 }
3696   NEXT (vpc);
3697
3698   CASE (sem, INSN_PAR_CMP) : /* cmp $src1,$src2 */
3699 {
3700   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3701   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3702 #define FLD(f) abuf->fields.fmt_cmp.f
3703 #define OPRND(f) par_exec->operands.fmt_cmp.f
3704   int UNUSED written = 0;
3705   PCADDR UNUSED pc = abuf->addr;
3706   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3707
3708   {
3709     BI opval = LTSI (* FLD (i_src1), * FLD (i_src2));
3710     OPRND (condbit) = opval;
3711     TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
3712   }
3713
3714 #undef OPRND
3715 #undef FLD
3716 }
3717   NEXT (vpc);
3718
3719   CASE (sem, INSN_WRITE_CMP) : /* cmp $src1,$src2 */
3720 {
3721   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3722   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3723 #define FLD(f) abuf->fields.fmt_cmp.f
3724 #define OPRND(f) par_exec->operands.fmt_cmp.f
3725   int UNUSED written = abuf->written;
3726   PCADDR UNUSED pc = abuf->addr;
3727   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3728
3729   CPU (h_cond) = OPRND (condbit);
3730
3731 #undef OPRND
3732 #undef FLD
3733 }
3734   NEXT (vpc);
3735
3736   CASE (sem, INSN_PAR_CMPU) : /* cmpu $src1,$src2 */
3737 {
3738   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3739   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3740 #define FLD(f) abuf->fields.fmt_cmp.f
3741 #define OPRND(f) par_exec->operands.fmt_cmp.f
3742   int UNUSED written = 0;
3743   PCADDR UNUSED pc = abuf->addr;
3744   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3745
3746   {
3747     BI opval = LTUSI (* FLD (i_src1), * FLD (i_src2));
3748     OPRND (condbit) = opval;
3749     TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
3750   }
3751
3752 #undef OPRND
3753 #undef FLD
3754 }
3755   NEXT (vpc);
3756
3757   CASE (sem, INSN_WRITE_CMPU) : /* cmpu $src1,$src2 */
3758 {
3759   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3760   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3761 #define FLD(f) abuf->fields.fmt_cmp.f
3762 #define OPRND(f) par_exec->operands.fmt_cmp.f
3763   int UNUSED written = abuf->written;
3764   PCADDR UNUSED pc = abuf->addr;
3765   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3766
3767   CPU (h_cond) = OPRND (condbit);
3768
3769 #undef OPRND
3770 #undef FLD
3771 }
3772   NEXT (vpc);
3773
3774   CASE (sem, INSN_PAR_CMPEQ) : /* cmpeq $src1,$src2 */
3775 {
3776   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3777   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3778 #define FLD(f) abuf->fields.fmt_cmp.f
3779 #define OPRND(f) par_exec->operands.fmt_cmp.f
3780   int UNUSED written = 0;
3781   PCADDR UNUSED pc = abuf->addr;
3782   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3783
3784   {
3785     BI opval = EQSI (* FLD (i_src1), * FLD (i_src2));
3786     OPRND (condbit) = opval;
3787     TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
3788   }
3789
3790 #undef OPRND
3791 #undef FLD
3792 }
3793   NEXT (vpc);
3794
3795   CASE (sem, INSN_WRITE_CMPEQ) : /* cmpeq $src1,$src2 */
3796 {
3797   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3798   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3799 #define FLD(f) abuf->fields.fmt_cmp.f
3800 #define OPRND(f) par_exec->operands.fmt_cmp.f
3801   int UNUSED written = abuf->written;
3802   PCADDR UNUSED pc = abuf->addr;
3803   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3804
3805   CPU (h_cond) = OPRND (condbit);
3806
3807 #undef OPRND
3808 #undef FLD
3809 }
3810   NEXT (vpc);
3811
3812   CASE (sem, INSN_PAR_CMPZ) : /* cmpz $src2 */
3813 {
3814   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3815   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3816 #define FLD(f) abuf->fields.fmt_cmpz.f
3817 #define OPRND(f) par_exec->operands.fmt_cmpz.f
3818   int UNUSED written = 0;
3819   PCADDR UNUSED pc = abuf->addr;
3820   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3821
3822   {
3823     BI opval = EQSI (* FLD (i_src2), 0);
3824     OPRND (condbit) = opval;
3825     TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
3826   }
3827
3828 #undef OPRND
3829 #undef FLD
3830 }
3831   NEXT (vpc);
3832
3833   CASE (sem, INSN_WRITE_CMPZ) : /* cmpz $src2 */
3834 {
3835   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3836   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3837 #define FLD(f) abuf->fields.fmt_cmpz.f
3838 #define OPRND(f) par_exec->operands.fmt_cmpz.f
3839   int UNUSED written = abuf->written;
3840   PCADDR UNUSED pc = abuf->addr;
3841   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3842
3843   CPU (h_cond) = OPRND (condbit);
3844
3845 #undef OPRND
3846 #undef FLD
3847 }
3848   NEXT (vpc);
3849
3850   CASE (sem, INSN_PAR_JC) : /* jc $sr */
3851 {
3852   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3853   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3854 #define FLD(f) abuf->fields.cti.fields.fmt_jc.f
3855 #define OPRND(f) par_exec->operands.fmt_jc.f
3856   int UNUSED written = 0;
3857   PCADDR UNUSED pc = abuf->addr;
3858   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3859
3860 if (CPU (h_cond)) {
3861   {
3862     USI opval = ANDSI (* FLD (i_sr), -4);
3863     OPRND (pc) = opval;
3864     written |= (1 << 2);
3865     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3866   }
3867 }
3868
3869   abuf->written = written;
3870 #undef OPRND
3871 #undef FLD
3872 }
3873   NEXT (vpc);
3874
3875   CASE (sem, INSN_WRITE_JC) : /* jc $sr */
3876 {
3877   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3878   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3879 #define FLD(f) abuf->fields.cti.fields.fmt_jc.f
3880 #define OPRND(f) par_exec->operands.fmt_jc.f
3881   int UNUSED written = abuf->written;
3882   PCADDR UNUSED pc = abuf->addr;
3883   SEM_BRANCH_INIT
3884   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3885
3886   if (written & (1 << 2))
3887     {
3888       SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3889     }
3890
3891   SEM_BRANCH_FINI (vpc);
3892 #undef OPRND
3893 #undef FLD
3894 }
3895   NEXT (vpc);
3896
3897   CASE (sem, INSN_PAR_JNC) : /* jnc $sr */
3898 {
3899   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3900   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3901 #define FLD(f) abuf->fields.cti.fields.fmt_jc.f
3902 #define OPRND(f) par_exec->operands.fmt_jc.f
3903   int UNUSED written = 0;
3904   PCADDR UNUSED pc = abuf->addr;
3905   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3906
3907 if (NOTBI (CPU (h_cond))) {
3908   {
3909     USI opval = ANDSI (* FLD (i_sr), -4);
3910     OPRND (pc) = opval;
3911     written |= (1 << 2);
3912     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3913   }
3914 }
3915
3916   abuf->written = written;
3917 #undef OPRND
3918 #undef FLD
3919 }
3920   NEXT (vpc);
3921
3922   CASE (sem, INSN_WRITE_JNC) : /* jnc $sr */
3923 {
3924   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3925   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3926 #define FLD(f) abuf->fields.cti.fields.fmt_jc.f
3927 #define OPRND(f) par_exec->operands.fmt_jc.f
3928   int UNUSED written = abuf->written;
3929   PCADDR UNUSED pc = abuf->addr;
3930   SEM_BRANCH_INIT
3931   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3932
3933   if (written & (1 << 2))
3934     {
3935       SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3936     }
3937
3938   SEM_BRANCH_FINI (vpc);
3939 #undef OPRND
3940 #undef FLD
3941 }
3942   NEXT (vpc);
3943
3944   CASE (sem, INSN_PAR_JL) : /* jl $sr */
3945 {
3946   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3947   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3948 #define FLD(f) abuf->fields.cti.fields.fmt_jl.f
3949 #define OPRND(f) par_exec->operands.fmt_jl.f
3950   int UNUSED written = 0;
3951   PCADDR UNUSED pc = abuf->addr;
3952   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3953
3954 do {
3955   USI temp1;SI temp0;
3956   temp0 = ADDSI (ANDSI (pc, -4), 4);
3957   temp1 = ANDSI (* FLD (i_sr), -4);
3958   {
3959     SI opval = temp0;
3960     OPRND (h_gr_14) = opval;
3961     TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
3962   }
3963   {
3964     USI opval = temp1;
3965     OPRND (pc) = opval;
3966     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3967   }
3968 } while (0);
3969
3970 #undef OPRND
3971 #undef FLD
3972 }
3973   NEXT (vpc);
3974
3975   CASE (sem, INSN_WRITE_JL) : /* jl $sr */
3976 {
3977   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3978   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3979 #define FLD(f) abuf->fields.cti.fields.fmt_jl.f
3980 #define OPRND(f) par_exec->operands.fmt_jl.f
3981   int UNUSED written = abuf->written;
3982   PCADDR UNUSED pc = abuf->addr;
3983   SEM_BRANCH_INIT
3984   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3985
3986   CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_14);
3987   SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3988
3989   SEM_BRANCH_FINI (vpc);
3990 #undef OPRND
3991 #undef FLD
3992 }
3993   NEXT (vpc);
3994
3995   CASE (sem, INSN_PAR_JMP) : /* jmp $sr */
3996 {
3997   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3998   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3999 #define FLD(f) abuf->fields.cti.fields.fmt_jmp.f
4000 #define OPRND(f) par_exec->operands.fmt_jmp.f
4001   int UNUSED written = 0;
4002   PCADDR UNUSED pc = abuf->addr;
4003   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4004
4005   {
4006     USI opval = ANDSI (* FLD (i_sr), -4);
4007     OPRND (pc) = opval;
4008     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4009   }
4010
4011 #undef OPRND
4012 #undef FLD
4013 }
4014   NEXT (vpc);
4015
4016   CASE (sem, INSN_WRITE_JMP) : /* jmp $sr */
4017 {
4018   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4019   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4020 #define FLD(f) abuf->fields.cti.fields.fmt_jmp.f
4021 #define OPRND(f) par_exec->operands.fmt_jmp.f
4022   int UNUSED written = abuf->written;
4023   PCADDR UNUSED pc = abuf->addr;
4024   SEM_BRANCH_INIT
4025   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4026
4027   SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
4028
4029   SEM_BRANCH_FINI (vpc);
4030 #undef OPRND
4031 #undef FLD
4032 }
4033   NEXT (vpc);
4034
4035   CASE (sem, INSN_PAR_LD) : /* ld $dr,@$sr */
4036 {
4037   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4038   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4039 #define FLD(f) abuf->fields.fmt_ld.f
4040 #define OPRND(f) par_exec->operands.fmt_ld.f
4041   int UNUSED written = 0;
4042   PCADDR UNUSED pc = abuf->addr;
4043   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4044
4045   {
4046     SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
4047     OPRND (dr) = opval;
4048     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
4049   }
4050
4051 #undef OPRND
4052 #undef FLD
4053 }
4054   NEXT (vpc);
4055
4056   CASE (sem, INSN_WRITE_LD) : /* ld $dr,@$sr */
4057 {
4058   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4059   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4060 #define FLD(f) abuf->fields.fmt_ld.f
4061 #define OPRND(f) par_exec->operands.fmt_ld.f
4062   int UNUSED written = abuf->written;
4063   PCADDR UNUSED pc = abuf->addr;
4064   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4065
4066   * FLD (i_dr) = OPRND (dr);
4067
4068 #undef OPRND
4069 #undef FLD
4070 }
4071   NEXT (vpc);
4072
4073   CASE (sem, INSN_PAR_LDB) : /* ldb $dr,@$sr */
4074 {
4075   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4076   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4077 #define FLD(f) abuf->fields.fmt_ldb.f
4078 #define OPRND(f) par_exec->operands.fmt_ldb.f
4079   int UNUSED written = 0;
4080   PCADDR UNUSED pc = abuf->addr;
4081   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4082
4083   {
4084     SI opval = EXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
4085     OPRND (dr) = opval;
4086     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
4087   }
4088
4089 #undef OPRND
4090 #undef FLD
4091 }
4092   NEXT (vpc);
4093
4094   CASE (sem, INSN_WRITE_LDB) : /* ldb $dr,@$sr */
4095 {
4096   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4097   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4098 #define FLD(f) abuf->fields.fmt_ldb.f
4099 #define OPRND(f) par_exec->operands.fmt_ldb.f
4100   int UNUSED written = abuf->written;
4101   PCADDR UNUSED pc = abuf->addr;
4102   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4103
4104   * FLD (i_dr) = OPRND (dr);
4105
4106 #undef OPRND
4107 #undef FLD
4108 }
4109   NEXT (vpc);
4110
4111   CASE (sem, INSN_PAR_LDH) : /* ldh $dr,@$sr */
4112 {
4113   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4114   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4115 #define FLD(f) abuf->fields.fmt_ldh.f
4116 #define OPRND(f) par_exec->operands.fmt_ldh.f
4117   int UNUSED written = 0;
4118   PCADDR UNUSED pc = abuf->addr;
4119   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4120
4121   {
4122     SI opval = EXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
4123     OPRND (dr) = opval;
4124     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
4125   }
4126
4127 #undef OPRND
4128 #undef FLD
4129 }
4130   NEXT (vpc);
4131
4132   CASE (sem, INSN_WRITE_LDH) : /* ldh $dr,@$sr */
4133 {
4134   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4135   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4136 #define FLD(f) abuf->fields.fmt_ldh.f
4137 #define OPRND(f) par_exec->operands.fmt_ldh.f
4138   int UNUSED written = abuf->written;
4139   PCADDR UNUSED pc = abuf->addr;
4140   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4141
4142   * FLD (i_dr) = OPRND (dr);
4143
4144 #undef OPRND
4145 #undef FLD
4146 }
4147   NEXT (vpc);
4148
4149   CASE (sem, INSN_PAR_LDUB) : /* ldub $dr,@$sr */
4150 {
4151   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4152   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4153 #define FLD(f) abuf->fields.fmt_ldb.f
4154 #define OPRND(f) par_exec->operands.fmt_ldb.f
4155   int UNUSED written = 0;
4156   PCADDR UNUSED pc = abuf->addr;
4157   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4158
4159   {
4160     SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
4161     OPRND (dr) = opval;
4162     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
4163   }
4164
4165 #undef OPRND
4166 #undef FLD
4167 }
4168   NEXT (vpc);
4169
4170   CASE (sem, INSN_WRITE_LDUB) : /* ldub $dr,@$sr */
4171 {
4172   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4173   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4174 #define FLD(f) abuf->fields.fmt_ldb.f
4175 #define OPRND(f) par_exec->operands.fmt_ldb.f
4176   int UNUSED written = abuf->written;
4177   PCADDR UNUSED pc = abuf->addr;
4178   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4179
4180   * FLD (i_dr) = OPRND (dr);
4181
4182 #undef OPRND
4183 #undef FLD
4184 }
4185   NEXT (vpc);
4186
4187   CASE (sem, INSN_PAR_LDUH) : /* lduh $dr,@$sr */
4188 {
4189   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4190   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4191 #define FLD(f) abuf->fields.fmt_ldh.f
4192 #define OPRND(f) par_exec->operands.fmt_ldh.f
4193   int UNUSED written = 0;
4194   PCADDR UNUSED pc = abuf->addr;
4195   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4196
4197   {
4198     SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
4199     OPRND (dr) = opval;
4200     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
4201   }
4202
4203 #undef OPRND
4204 #undef FLD
4205 }
4206   NEXT (vpc);
4207
4208   CASE (sem, INSN_WRITE_LDUH) : /* lduh $dr,@$sr */
4209 {
4210   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4211   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4212 #define FLD(f) abuf->fields.fmt_ldh.f
4213 #define OPRND(f) par_exec->operands.fmt_ldh.f
4214   int UNUSED written = abuf->written;
4215   PCADDR UNUSED pc = abuf->addr;
4216   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4217
4218   * FLD (i_dr) = OPRND (dr);
4219
4220 #undef OPRND
4221 #undef FLD
4222 }
4223   NEXT (vpc);
4224
4225   CASE (sem, INSN_PAR_LD_PLUS) : /* ld $dr,@$sr+ */
4226 {
4227   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4228   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4229 #define FLD(f) abuf->fields.fmt_ld_plus.f
4230 #define OPRND(f) par_exec->operands.fmt_ld_plus.f
4231   int UNUSED written = 0;
4232   PCADDR UNUSED pc = abuf->addr;
4233   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4234
4235 do {
4236   SI temp1;SI temp0;
4237   temp0 = GETMEMSI (current_cpu, pc, * FLD (i_sr));
4238   temp1 = ADDSI (* FLD (i_sr), 4);
4239   {
4240     SI opval = temp0;
4241     OPRND (dr) = opval;
4242     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
4243   }
4244   {
4245     SI opval = temp1;
4246     OPRND (sr) = opval;
4247     TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
4248   }
4249 } while (0);
4250
4251 #undef OPRND
4252 #undef FLD
4253 }
4254   NEXT (vpc);
4255
4256   CASE (sem, INSN_WRITE_LD_PLUS) : /* ld $dr,@$sr+ */
4257 {
4258   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4259   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4260 #define FLD(f) abuf->fields.fmt_ld_plus.f
4261 #define OPRND(f) par_exec->operands.fmt_ld_plus.f
4262   int UNUSED written = abuf->written;
4263   PCADDR UNUSED pc = abuf->addr;
4264   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4265
4266   * FLD (i_dr) = OPRND (dr);
4267   * FLD (i_sr) = OPRND (sr);
4268
4269 #undef OPRND
4270 #undef FLD
4271 }
4272   NEXT (vpc);
4273
4274   CASE (sem, INSN_PAR_LDI8) : /* ldi8 $dr,$simm8 */
4275 {
4276   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4277   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4278 #define FLD(f) abuf->fields.fmt_ldi8.f
4279 #define OPRND(f) par_exec->operands.fmt_ldi8.f
4280   int UNUSED written = 0;
4281   PCADDR UNUSED pc = abuf->addr;
4282   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4283
4284   {
4285     SI opval = FLD (f_simm8);
4286     OPRND (dr) = opval;
4287     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
4288   }
4289
4290 #undef OPRND
4291 #undef FLD
4292 }
4293   NEXT (vpc);
4294
4295   CASE (sem, INSN_WRITE_LDI8) : /* ldi8 $dr,$simm8 */
4296 {
4297   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4298   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4299 #define FLD(f) abuf->fields.fmt_ldi8.f
4300 #define OPRND(f) par_exec->operands.fmt_ldi8.f
4301   int UNUSED written = abuf->written;
4302   PCADDR UNUSED pc = abuf->addr;
4303   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4304
4305   * FLD (i_dr) = OPRND (dr);
4306
4307 #undef OPRND
4308 #undef FLD
4309 }
4310   NEXT (vpc);
4311
4312   CASE (sem, INSN_PAR_LOCK) : /* lock $dr,@$sr */
4313 {
4314   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4315   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4316 #define FLD(f) abuf->fields.fmt_lock.f
4317 #define OPRND(f) par_exec->operands.fmt_lock.f
4318   int UNUSED written = 0;
4319   PCADDR UNUSED pc = abuf->addr;
4320   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4321
4322 do {
4323   {
4324     BI opval = 1;
4325     OPRND (h_lock_0) = opval;
4326     TRACE_RESULT (current_cpu, abuf, "lock-0", 'x', opval);
4327   }
4328   {
4329     SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
4330     OPRND (dr) = opval;
4331     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
4332   }
4333 } while (0);
4334
4335 #undef OPRND
4336 #undef FLD
4337 }
4338   NEXT (vpc);
4339
4340   CASE (sem, INSN_WRITE_LOCK) : /* lock $dr,@$sr */
4341 {
4342   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4343   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4344 #define FLD(f) abuf->fields.fmt_lock.f
4345 #define OPRND(f) par_exec->operands.fmt_lock.f
4346   int UNUSED written = abuf->written;
4347   PCADDR UNUSED pc = abuf->addr;
4348   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4349
4350   CPU (h_lock) = OPRND (h_lock_0);
4351   * FLD (i_dr) = OPRND (dr);
4352
4353 #undef OPRND
4354 #undef FLD
4355 }
4356   NEXT (vpc);
4357
4358   CASE (sem, INSN_PAR_MACHI_A) : /* machi $src1,$src2,$acc */
4359 {
4360   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4361   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4362 #define FLD(f) abuf->fields.fmt_machi_a.f
4363 #define OPRND(f) par_exec->operands.fmt_machi_a.f
4364   int UNUSED written = 0;
4365   PCADDR UNUSED pc = abuf->addr;
4366   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4367
4368   {
4369     DI opval = SRADI (SLLDI (ADDDI (m32rxf_h_accums_get (current_cpu, FLD (f_acc)), MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8);
4370     OPRND (acc) = opval;
4371     TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
4372   }
4373
4374 #undef OPRND
4375 #undef FLD
4376 }
4377   NEXT (vpc);
4378
4379   CASE (sem, INSN_WRITE_MACHI_A) : /* machi $src1,$src2,$acc */
4380 {
4381   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4382   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4383 #define FLD(f) abuf->fields.fmt_machi_a.f
4384 #define OPRND(f) par_exec->operands.fmt_machi_a.f
4385   int UNUSED written = abuf->written;
4386   PCADDR UNUSED pc = abuf->addr;
4387   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4388
4389   m32rxf_h_accums_set (current_cpu, FLD (f_acc), OPRND (acc));
4390
4391 #undef OPRND
4392 #undef FLD
4393 }
4394   NEXT (vpc);
4395
4396   CASE (sem, INSN_PAR_MACLO_A) : /* maclo $src1,$src2,$acc */
4397 {
4398   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4399   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4400 #define FLD(f) abuf->fields.fmt_machi_a.f
4401 #define OPRND(f) par_exec->operands.fmt_machi_a.f
4402   int UNUSED written = 0;
4403   PCADDR UNUSED pc = abuf->addr;
4404   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4405
4406   {
4407     DI opval = SRADI (SLLDI (ADDDI (m32rxf_h_accums_get (current_cpu, FLD (f_acc)), MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8);
4408     OPRND (acc) = opval;
4409     TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
4410   }
4411
4412 #undef OPRND
4413 #undef FLD
4414 }
4415   NEXT (vpc);
4416
4417   CASE (sem, INSN_WRITE_MACLO_A) : /* maclo $src1,$src2,$acc */
4418 {
4419   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4420   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4421 #define FLD(f) abuf->fields.fmt_machi_a.f
4422 #define OPRND(f) par_exec->operands.fmt_machi_a.f
4423   int UNUSED written = abuf->written;
4424   PCADDR UNUSED pc = abuf->addr;
4425   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4426
4427   m32rxf_h_accums_set (current_cpu, FLD (f_acc), OPRND (acc));
4428
4429 #undef OPRND
4430 #undef FLD
4431 }
4432   NEXT (vpc);
4433
4434   CASE (sem, INSN_PAR_MACWHI_A) : /* macwhi $src1,$src2,$acc */
4435 {
4436   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4437   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4438 #define FLD(f) abuf->fields.fmt_machi_a.f
4439 #define OPRND(f) par_exec->operands.fmt_machi_a.f
4440   int UNUSED written = 0;
4441   PCADDR UNUSED pc = abuf->addr;
4442   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4443
4444   {
4445     DI opval = ADDDI (m32rxf_h_accums_get (current_cpu, FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))));
4446     OPRND (acc) = opval;
4447     TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
4448   }
4449
4450 #undef OPRND
4451 #undef FLD
4452 }
4453   NEXT (vpc);
4454
4455   CASE (sem, INSN_WRITE_MACWHI_A) : /* macwhi $src1,$src2,$acc */
4456 {
4457   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4458   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4459 #define FLD(f) abuf->fields.fmt_machi_a.f
4460 #define OPRND(f) par_exec->operands.fmt_machi_a.f
4461   int UNUSED written = abuf->written;
4462   PCADDR UNUSED pc = abuf->addr;
4463   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4464
4465   m32rxf_h_accums_set (current_cpu, FLD (f_acc), OPRND (acc));
4466
4467 #undef OPRND
4468 #undef FLD
4469 }
4470   NEXT (vpc);
4471
4472   CASE (sem, INSN_PAR_MACWLO_A) : /* macwlo $src1,$src2,$acc */
4473 {
4474   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4475   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4476 #define FLD(f) abuf->fields.fmt_machi_a.f
4477 #define OPRND(f) par_exec->operands.fmt_machi_a.f
4478   int UNUSED written = 0;
4479   PCADDR UNUSED pc = abuf->addr;
4480   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4481
4482   {
4483     DI opval = ADDDI (m32rxf_h_accums_get (current_cpu, FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))));
4484     OPRND (acc) = opval;
4485     TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
4486   }
4487
4488 #undef OPRND
4489 #undef FLD
4490 }
4491   NEXT (vpc);
4492
4493   CASE (sem, INSN_WRITE_MACWLO_A) : /* macwlo $src1,$src2,$acc */
4494 {
4495   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4496   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4497 #define FLD(f) abuf->fields.fmt_machi_a.f
4498 #define OPRND(f) par_exec->operands.fmt_machi_a.f
4499   int UNUSED written = abuf->written;
4500   PCADDR UNUSED pc = abuf->addr;
4501   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4502
4503   m32rxf_h_accums_set (current_cpu, FLD (f_acc), OPRND (acc));
4504
4505 #undef OPRND
4506 #undef FLD
4507 }
4508   NEXT (vpc);
4509
4510   CASE (sem, INSN_PAR_MUL) : /* mul $dr,$sr */
4511 {
4512   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4513   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4514 #define FLD(f) abuf->fields.fmt_add.f
4515 #define OPRND(f) par_exec->operands.fmt_add.f
4516   int UNUSED written = 0;
4517   PCADDR UNUSED pc = abuf->addr;
4518   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4519
4520   {
4521     SI opval = MULSI (* FLD (i_dr), * FLD (i_sr));
4522     OPRND (dr) = opval;
4523     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
4524   }
4525
4526 #undef OPRND
4527 #undef FLD
4528 }
4529   NEXT (vpc);
4530
4531   CASE (sem, INSN_WRITE_MUL) : /* mul $dr,$sr */
4532 {
4533   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4534   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4535 #define FLD(f) abuf->fields.fmt_add.f
4536 #define OPRND(f) par_exec->operands.fmt_add.f
4537   int UNUSED written = abuf->written;
4538   PCADDR UNUSED pc = abuf->addr;
4539   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4540
4541   * FLD (i_dr) = OPRND (dr);
4542
4543 #undef OPRND
4544 #undef FLD
4545 }
4546   NEXT (vpc);
4547
4548   CASE (sem, INSN_PAR_MULHI_A) : /* mulhi $src1,$src2,$acc */
4549 {
4550   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4551   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4552 #define FLD(f) abuf->fields.fmt_mulhi_a.f
4553 #define OPRND(f) par_exec->operands.fmt_mulhi_a.f
4554   int UNUSED written = 0;
4555   PCADDR UNUSED pc = abuf->addr;
4556   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4557
4558   {
4559     DI opval = SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 16), 16);
4560     OPRND (acc) = opval;
4561     TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
4562   }
4563
4564 #undef OPRND
4565 #undef FLD
4566 }
4567   NEXT (vpc);
4568
4569   CASE (sem, INSN_WRITE_MULHI_A) : /* mulhi $src1,$src2,$acc */
4570 {
4571   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4572   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4573 #define FLD(f) abuf->fields.fmt_mulhi_a.f
4574 #define OPRND(f) par_exec->operands.fmt_mulhi_a.f
4575   int UNUSED written = abuf->written;
4576   PCADDR UNUSED pc = abuf->addr;
4577   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4578
4579   m32rxf_h_accums_set (current_cpu, FLD (f_acc), OPRND (acc));
4580
4581 #undef OPRND
4582 #undef FLD
4583 }
4584   NEXT (vpc);
4585
4586   CASE (sem, INSN_PAR_MULLO_A) : /* mullo $src1,$src2,$acc */
4587 {
4588   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4589   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4590 #define FLD(f) abuf->fields.fmt_mulhi_a.f
4591 #define OPRND(f) par_exec->operands.fmt_mulhi_a.f
4592   int UNUSED written = 0;
4593   PCADDR UNUSED pc = abuf->addr;
4594   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4595
4596   {
4597     DI opval = SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 16), 16);
4598     OPRND (acc) = opval;
4599     TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
4600   }
4601
4602 #undef OPRND
4603 #undef FLD
4604 }
4605   NEXT (vpc);
4606
4607   CASE (sem, INSN_WRITE_MULLO_A) : /* mullo $src1,$src2,$acc */
4608 {
4609   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4610   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4611 #define FLD(f) abuf->fields.fmt_mulhi_a.f
4612 #define OPRND(f) par_exec->operands.fmt_mulhi_a.f
4613   int UNUSED written = abuf->written;
4614   PCADDR UNUSED pc = abuf->addr;
4615   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4616
4617   m32rxf_h_accums_set (current_cpu, FLD (f_acc), OPRND (acc));
4618
4619 #undef OPRND
4620 #undef FLD
4621 }
4622   NEXT (vpc);
4623
4624   CASE (sem, INSN_PAR_MULWHI_A) : /* mulwhi $src1,$src2,$acc */
4625 {
4626   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4627   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4628 #define FLD(f) abuf->fields.fmt_mulhi_a.f
4629 #define OPRND(f) par_exec->operands.fmt_mulhi_a.f
4630   int UNUSED written = 0;
4631   PCADDR UNUSED pc = abuf->addr;
4632   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4633
4634   {
4635     DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))));
4636     OPRND (acc) = opval;
4637     TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
4638   }
4639
4640 #undef OPRND
4641 #undef FLD
4642 }
4643   NEXT (vpc);
4644
4645   CASE (sem, INSN_WRITE_MULWHI_A) : /* mulwhi $src1,$src2,$acc */
4646 {
4647   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4648   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4649 #define FLD(f) abuf->fields.fmt_mulhi_a.f
4650 #define OPRND(f) par_exec->operands.fmt_mulhi_a.f
4651   int UNUSED written = abuf->written;
4652   PCADDR UNUSED pc = abuf->addr;
4653   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4654
4655   m32rxf_h_accums_set (current_cpu, FLD (f_acc), OPRND (acc));
4656
4657 #undef OPRND
4658 #undef FLD
4659 }
4660   NEXT (vpc);
4661
4662   CASE (sem, INSN_PAR_MULWLO_A) : /* mulwlo $src1,$src2,$acc */
4663 {
4664   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4665   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4666 #define FLD(f) abuf->fields.fmt_mulhi_a.f
4667 #define OPRND(f) par_exec->operands.fmt_mulhi_a.f
4668   int UNUSED written = 0;
4669   PCADDR UNUSED pc = abuf->addr;
4670   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4671
4672   {
4673     DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))));
4674     OPRND (acc) = opval;
4675     TRACE_RESULT (current_cpu, abuf, "acc", 'D', opval);
4676   }
4677
4678 #undef OPRND
4679 #undef FLD
4680 }
4681   NEXT (vpc);
4682
4683   CASE (sem, INSN_WRITE_MULWLO_A) : /* mulwlo $src1,$src2,$acc */
4684 {
4685   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4686   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4687 #define FLD(f) abuf->fields.fmt_mulhi_a.f
4688 #define OPRND(f) par_exec->operands.fmt_mulhi_a.f
4689   int UNUSED written = abuf->written;
4690   PCADDR UNUSED pc = abuf->addr;
4691   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4692
4693   m32rxf_h_accums_set (current_cpu, FLD (f_acc), OPRND (acc));
4694
4695 #undef OPRND
4696 #undef FLD
4697 }
4698   NEXT (vpc);
4699
4700   CASE (sem, INSN_PAR_MV) : /* mv $dr,$sr */
4701 {
4702   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4703   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4704 #define FLD(f) abuf->fields.fmt_mv.f
4705 #define OPRND(f) par_exec->operands.fmt_mv.f
4706   int UNUSED written = 0;
4707   PCADDR UNUSED pc = abuf->addr;
4708   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4709
4710   {
4711     SI opval = * FLD (i_sr);
4712     OPRND (dr) = opval;
4713     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
4714   }
4715
4716 #undef OPRND
4717 #undef FLD
4718 }
4719   NEXT (vpc);
4720
4721   CASE (sem, INSN_WRITE_MV) : /* mv $dr,$sr */
4722 {
4723   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4724   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4725 #define FLD(f) abuf->fields.fmt_mv.f
4726 #define OPRND(f) par_exec->operands.fmt_mv.f
4727   int UNUSED written = abuf->written;
4728   PCADDR UNUSED pc = abuf->addr;
4729   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4730
4731   * FLD (i_dr) = OPRND (dr);
4732
4733 #undef OPRND
4734 #undef FLD
4735 }
4736   NEXT (vpc);
4737
4738   CASE (sem, INSN_PAR_MVFACHI_A) : /* mvfachi $dr,$accs */
4739 {
4740   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4741   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4742 #define FLD(f) abuf->fields.fmt_mvfachi_a.f
4743 #define OPRND(f) par_exec->operands.fmt_mvfachi_a.f
4744   int UNUSED written = 0;
4745   PCADDR UNUSED pc = abuf->addr;
4746   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4747
4748   {
4749     SI opval = TRUNCDISI (SRADI (m32rxf_h_accums_get (current_cpu, FLD (f_accs)), 32));
4750     OPRND (dr) = opval;
4751     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
4752   }
4753
4754 #undef OPRND
4755 #undef FLD
4756 }
4757   NEXT (vpc);
4758
4759   CASE (sem, INSN_WRITE_MVFACHI_A) : /* mvfachi $dr,$accs */
4760 {
4761   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4762   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4763 #define FLD(f) abuf->fields.fmt_mvfachi_a.f
4764 #define OPRND(f) par_exec->operands.fmt_mvfachi_a.f
4765   int UNUSED written = abuf->written;
4766   PCADDR UNUSED pc = abuf->addr;
4767   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4768
4769   * FLD (i_dr) = OPRND (dr);
4770
4771 #undef OPRND
4772 #undef FLD
4773 }
4774   NEXT (vpc);
4775
4776   CASE (sem, INSN_PAR_MVFACLO_A) : /* mvfaclo $dr,$accs */
4777 {
4778   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4779   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4780 #define FLD(f) abuf->fields.fmt_mvfachi_a.f
4781 #define OPRND(f) par_exec->operands.fmt_mvfachi_a.f
4782   int UNUSED written = 0;
4783   PCADDR UNUSED pc = abuf->addr;
4784   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4785
4786   {
4787     SI opval = TRUNCDISI (m32rxf_h_accums_get (current_cpu, FLD (f_accs)));
4788     OPRND (dr) = opval;
4789     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
4790   }
4791
4792 #undef OPRND
4793 #undef FLD
4794 }
4795   NEXT (vpc);
4796
4797   CASE (sem, INSN_WRITE_MVFACLO_A) : /* mvfaclo $dr,$accs */
4798 {
4799   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4800   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4801 #define FLD(f) abuf->fields.fmt_mvfachi_a.f
4802 #define OPRND(f) par_exec->operands.fmt_mvfachi_a.f
4803   int UNUSED written = abuf->written;
4804   PCADDR UNUSED pc = abuf->addr;
4805   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4806
4807   * FLD (i_dr) = OPRND (dr);
4808
4809 #undef OPRND
4810 #undef FLD
4811 }
4812   NEXT (vpc);
4813
4814   CASE (sem, INSN_PAR_MVFACMI_A) : /* mvfacmi $dr,$accs */
4815 {
4816   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4817   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4818 #define FLD(f) abuf->fields.fmt_mvfachi_a.f
4819 #define OPRND(f) par_exec->operands.fmt_mvfachi_a.f
4820   int UNUSED written = 0;
4821   PCADDR UNUSED pc = abuf->addr;
4822   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4823
4824   {
4825     SI opval = TRUNCDISI (SRADI (m32rxf_h_accums_get (current_cpu, FLD (f_accs)), 16));
4826     OPRND (dr) = opval;
4827     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
4828   }
4829
4830 #undef OPRND
4831 #undef FLD
4832 }
4833   NEXT (vpc);
4834
4835   CASE (sem, INSN_WRITE_MVFACMI_A) : /* mvfacmi $dr,$accs */
4836 {
4837   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4838   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4839 #define FLD(f) abuf->fields.fmt_mvfachi_a.f
4840 #define OPRND(f) par_exec->operands.fmt_mvfachi_a.f
4841   int UNUSED written = abuf->written;
4842   PCADDR UNUSED pc = abuf->addr;
4843   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4844
4845   * FLD (i_dr) = OPRND (dr);
4846
4847 #undef OPRND
4848 #undef FLD
4849 }
4850   NEXT (vpc);
4851
4852   CASE (sem, INSN_PAR_MVFC) : /* mvfc $dr,$scr */
4853 {
4854   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4855   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4856 #define FLD(f) abuf->fields.fmt_mvfc.f
4857 #define OPRND(f) par_exec->operands.fmt_mvfc.f
4858   int UNUSED written = 0;
4859   PCADDR UNUSED pc = abuf->addr;
4860   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4861
4862   {
4863     SI opval = m32rxf_h_cr_get (current_cpu, FLD (f_r2));
4864     OPRND (dr) = opval;
4865     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
4866   }
4867
4868 #undef OPRND
4869 #undef FLD
4870 }
4871   NEXT (vpc);
4872
4873   CASE (sem, INSN_WRITE_MVFC) : /* mvfc $dr,$scr */
4874 {
4875   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4876   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4877 #define FLD(f) abuf->fields.fmt_mvfc.f
4878 #define OPRND(f) par_exec->operands.fmt_mvfc.f
4879   int UNUSED written = abuf->written;
4880   PCADDR UNUSED pc = abuf->addr;
4881   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4882
4883   * FLD (i_dr) = OPRND (dr);
4884
4885 #undef OPRND
4886 #undef FLD
4887 }
4888   NEXT (vpc);
4889
4890   CASE (sem, INSN_PAR_MVTACHI_A) : /* mvtachi $src1,$accs */
4891 {
4892   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4893   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4894 #define FLD(f) abuf->fields.fmt_mvtachi_a.f
4895 #define OPRND(f) par_exec->operands.fmt_mvtachi_a.f
4896   int UNUSED written = 0;
4897   PCADDR UNUSED pc = abuf->addr;
4898   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4899
4900   {
4901     DI opval = ORDI (ANDDI (m32rxf_h_accums_get (current_cpu, FLD (f_accs)), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (* FLD (i_src1)), 32));
4902     OPRND (accs) = opval;
4903     TRACE_RESULT (current_cpu, abuf, "accs", 'D', opval);
4904   }
4905
4906 #undef OPRND
4907 #undef FLD
4908 }
4909   NEXT (vpc);
4910
4911   CASE (sem, INSN_WRITE_MVTACHI_A) : /* mvtachi $src1,$accs */
4912 {
4913   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4914   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4915 #define FLD(f) abuf->fields.fmt_mvtachi_a.f
4916 #define OPRND(f) par_exec->operands.fmt_mvtachi_a.f
4917   int UNUSED written = abuf->written;
4918   PCADDR UNUSED pc = abuf->addr;
4919   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4920
4921   m32rxf_h_accums_set (current_cpu, FLD (f_accs), OPRND (accs));
4922
4923 #undef OPRND
4924 #undef FLD
4925 }
4926   NEXT (vpc);
4927
4928   CASE (sem, INSN_PAR_MVTACLO_A) : /* mvtaclo $src1,$accs */
4929 {
4930   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4931   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4932 #define FLD(f) abuf->fields.fmt_mvtachi_a.f
4933 #define OPRND(f) par_exec->operands.fmt_mvtachi_a.f
4934   int UNUSED written = 0;
4935   PCADDR UNUSED pc = abuf->addr;
4936   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4937
4938   {
4939     DI opval = ORDI (ANDDI (m32rxf_h_accums_get (current_cpu, FLD (f_accs)), MAKEDI (0xffffffff, 0)), ZEXTSIDI (* FLD (i_src1)));
4940     OPRND (accs) = opval;
4941     TRACE_RESULT (current_cpu, abuf, "accs", 'D', opval);
4942   }
4943
4944 #undef OPRND
4945 #undef FLD
4946 }
4947   NEXT (vpc);
4948
4949   CASE (sem, INSN_WRITE_MVTACLO_A) : /* mvtaclo $src1,$accs */
4950 {
4951   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4952   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4953 #define FLD(f) abuf->fields.fmt_mvtachi_a.f
4954 #define OPRND(f) par_exec->operands.fmt_mvtachi_a.f
4955   int UNUSED written = abuf->written;
4956   PCADDR UNUSED pc = abuf->addr;
4957   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4958
4959   m32rxf_h_accums_set (current_cpu, FLD (f_accs), OPRND (accs));
4960
4961 #undef OPRND
4962 #undef FLD
4963 }
4964   NEXT (vpc);
4965
4966   CASE (sem, INSN_PAR_MVTC) : /* mvtc $sr,$dcr */
4967 {
4968   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4969   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4970 #define FLD(f) abuf->fields.fmt_mvtc.f
4971 #define OPRND(f) par_exec->operands.fmt_mvtc.f
4972   int UNUSED written = 0;
4973   PCADDR UNUSED pc = abuf->addr;
4974   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4975
4976   {
4977     USI opval = * FLD (i_sr);
4978     OPRND (dcr) = opval;
4979     TRACE_RESULT (current_cpu, abuf, "dcr", 'x', opval);
4980   }
4981
4982 #undef OPRND
4983 #undef FLD
4984 }
4985   NEXT (vpc);
4986
4987   CASE (sem, INSN_WRITE_MVTC) : /* mvtc $sr,$dcr */
4988 {
4989   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4990   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4991 #define FLD(f) abuf->fields.fmt_mvtc.f
4992 #define OPRND(f) par_exec->operands.fmt_mvtc.f
4993   int UNUSED written = abuf->written;
4994   PCADDR UNUSED pc = abuf->addr;
4995   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4996
4997   m32rxf_h_cr_set (current_cpu, FLD (f_r1), OPRND (dcr));
4998
4999 #undef OPRND
5000 #undef FLD
5001 }
5002   NEXT (vpc);
5003
5004   CASE (sem, INSN_PAR_NEG) : /* neg $dr,$sr */
5005 {
5006   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5007   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5008 #define FLD(f) abuf->fields.fmt_mv.f
5009 #define OPRND(f) par_exec->operands.fmt_mv.f
5010   int UNUSED written = 0;
5011   PCADDR UNUSED pc = abuf->addr;
5012   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5013
5014   {
5015     SI opval = NEGSI (* FLD (i_sr));
5016     OPRND (dr) = opval;
5017     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
5018   }
5019
5020 #undef OPRND
5021 #undef FLD
5022 }
5023   NEXT (vpc);
5024
5025   CASE (sem, INSN_WRITE_NEG) : /* neg $dr,$sr */
5026 {
5027   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5028   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5029 #define FLD(f) abuf->fields.fmt_mv.f
5030 #define OPRND(f) par_exec->operands.fmt_mv.f
5031   int UNUSED written = abuf->written;
5032   PCADDR UNUSED pc = abuf->addr;
5033   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5034
5035   * FLD (i_dr) = OPRND (dr);
5036
5037 #undef OPRND
5038 #undef FLD
5039 }
5040   NEXT (vpc);
5041
5042   CASE (sem, INSN_PAR_NOP) : /* nop */
5043 {
5044   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5045   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5046 #define FLD(f) abuf->fields.fmt_nop.f
5047 #define OPRND(f) par_exec->operands.fmt_nop.f
5048   int UNUSED written = 0;
5049   PCADDR UNUSED pc = abuf->addr;
5050   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5051
5052 PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr);
5053
5054 #undef OPRND
5055 #undef FLD
5056 }
5057   NEXT (vpc);
5058
5059   CASE (sem, INSN_WRITE_NOP) : /* nop */
5060 {
5061   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5062   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5063 #define FLD(f) abuf->fields.fmt_nop.f
5064 #define OPRND(f) par_exec->operands.fmt_nop.f
5065   int UNUSED written = abuf->written;
5066   PCADDR UNUSED pc = abuf->addr;
5067   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5068
5069
5070 #undef OPRND
5071 #undef FLD
5072 }
5073   NEXT (vpc);
5074
5075   CASE (sem, INSN_PAR_NOT) : /* not $dr,$sr */
5076 {
5077   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5078   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5079 #define FLD(f) abuf->fields.fmt_mv.f
5080 #define OPRND(f) par_exec->operands.fmt_mv.f
5081   int UNUSED written = 0;
5082   PCADDR UNUSED pc = abuf->addr;
5083   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5084
5085   {
5086     SI opval = INVSI (* FLD (i_sr));
5087     OPRND (dr) = opval;
5088     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
5089   }
5090
5091 #undef OPRND
5092 #undef FLD
5093 }
5094   NEXT (vpc);
5095
5096   CASE (sem, INSN_WRITE_NOT) : /* not $dr,$sr */
5097 {
5098   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5099   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5100 #define FLD(f) abuf->fields.fmt_mv.f
5101 #define OPRND(f) par_exec->operands.fmt_mv.f
5102   int UNUSED written = abuf->written;
5103   PCADDR UNUSED pc = abuf->addr;
5104   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5105
5106   * FLD (i_dr) = OPRND (dr);
5107
5108 #undef OPRND
5109 #undef FLD
5110 }
5111   NEXT (vpc);
5112
5113   CASE (sem, INSN_PAR_RAC_DSI) : /* rac $accd,$accs,$imm1 */
5114 {
5115   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5116   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5117 #define FLD(f) abuf->fields.fmt_rac_dsi.f
5118 #define OPRND(f) par_exec->operands.fmt_rac_dsi.f
5119   int UNUSED written = 0;
5120   PCADDR UNUSED pc = abuf->addr;
5121   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5122
5123 do {
5124   DI tmp_tmp1;
5125   tmp_tmp1 = SLLDI (m32rxf_h_accums_get (current_cpu, FLD (f_accs)), FLD (f_imm1));
5126   tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 32768));
5127   {
5128     DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0xffff0000))) ? (MAKEDI (32767, 0xffff0000)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0xffff0000)));
5129     OPRND (accd) = opval;
5130     TRACE_RESULT (current_cpu, abuf, "accd", 'D', opval);
5131   }
5132 } while (0);
5133
5134 #undef OPRND
5135 #undef FLD
5136 }
5137   NEXT (vpc);
5138
5139   CASE (sem, INSN_WRITE_RAC_DSI) : /* rac $accd,$accs,$imm1 */
5140 {
5141   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5142   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5143 #define FLD(f) abuf->fields.fmt_rac_dsi.f
5144 #define OPRND(f) par_exec->operands.fmt_rac_dsi.f
5145   int UNUSED written = abuf->written;
5146   PCADDR UNUSED pc = abuf->addr;
5147   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5148
5149   m32rxf_h_accums_set (current_cpu, FLD (f_accd), OPRND (accd));
5150
5151 #undef OPRND
5152 #undef FLD
5153 }
5154   NEXT (vpc);
5155
5156   CASE (sem, INSN_PAR_RACH_DSI) : /* rach $accd,$accs,$imm1 */
5157 {
5158   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5159   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5160 #define FLD(f) abuf->fields.fmt_rac_dsi.f
5161 #define OPRND(f) par_exec->operands.fmt_rac_dsi.f
5162   int UNUSED written = 0;
5163   PCADDR UNUSED pc = abuf->addr;
5164   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5165
5166 do {
5167   DI tmp_tmp1;
5168   tmp_tmp1 = SLLDI (m32rxf_h_accums_get (current_cpu, FLD (f_accs)), FLD (f_imm1));
5169   tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 0x80000000));
5170   {
5171     DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0))) ? (MAKEDI (32767, 0)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0)));
5172     OPRND (accd) = opval;
5173     TRACE_RESULT (current_cpu, abuf, "accd", 'D', opval);
5174   }
5175 } while (0);
5176
5177 #undef OPRND
5178 #undef FLD
5179 }
5180   NEXT (vpc);
5181
5182   CASE (sem, INSN_WRITE_RACH_DSI) : /* rach $accd,$accs,$imm1 */
5183 {
5184   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5185   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5186 #define FLD(f) abuf->fields.fmt_rac_dsi.f
5187 #define OPRND(f) par_exec->operands.fmt_rac_dsi.f
5188   int UNUSED written = abuf->written;
5189   PCADDR UNUSED pc = abuf->addr;
5190   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5191
5192   m32rxf_h_accums_set (current_cpu, FLD (f_accd), OPRND (accd));
5193
5194 #undef OPRND
5195 #undef FLD
5196 }
5197   NEXT (vpc);
5198
5199   CASE (sem, INSN_PAR_RTE) : /* rte */
5200 {
5201   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5202   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5203 #define FLD(f) abuf->fields.cti.fields.fmt_rte.f
5204 #define OPRND(f) par_exec->operands.fmt_rte.f
5205   int UNUSED written = 0;
5206   PCADDR UNUSED pc = abuf->addr;
5207   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5208
5209 do {
5210   {
5211     USI opval = ANDSI (m32rxf_h_cr_get (current_cpu, ((UINT) 6)), -4);
5212     OPRND (pc) = opval;
5213     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
5214   }
5215   {
5216     USI opval = m32rxf_h_cr_get (current_cpu, ((UINT) 14));
5217     OPRND (h_cr_6) = opval;
5218     TRACE_RESULT (current_cpu, abuf, "cr-6", 'x', opval);
5219   }
5220   {
5221     UQI opval = CPU (h_bpsw);
5222     OPRND (h_psw_0) = opval;
5223     TRACE_RESULT (current_cpu, abuf, "psw-0", 'x', opval);
5224   }
5225   {
5226     UQI opval = CPU (h_bbpsw);
5227     OPRND (h_bpsw_0) = opval;
5228     TRACE_RESULT (current_cpu, abuf, "bpsw-0", 'x', opval);
5229   }
5230 } while (0);
5231
5232 #undef OPRND
5233 #undef FLD
5234 }
5235   NEXT (vpc);
5236
5237   CASE (sem, INSN_WRITE_RTE) : /* rte */
5238 {
5239   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5240   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5241 #define FLD(f) abuf->fields.cti.fields.fmt_rte.f
5242 #define OPRND(f) par_exec->operands.fmt_rte.f
5243   int UNUSED written = abuf->written;
5244   PCADDR UNUSED pc = abuf->addr;
5245   SEM_BRANCH_INIT
5246   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5247
5248   SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
5249   m32rxf_h_cr_set (current_cpu, ((UINT) 6), OPRND (h_cr_6));
5250   m32rxf_h_psw_set (current_cpu, OPRND (h_psw_0));
5251   CPU (h_bpsw) = OPRND (h_bpsw_0);
5252
5253   SEM_BRANCH_FINI (vpc);
5254 #undef OPRND
5255 #undef FLD
5256 }
5257   NEXT (vpc);
5258
5259   CASE (sem, INSN_PAR_SLL) : /* sll $dr,$sr */
5260 {
5261   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5262   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5263 #define FLD(f) abuf->fields.fmt_add.f
5264 #define OPRND(f) par_exec->operands.fmt_add.f
5265   int UNUSED written = 0;
5266   PCADDR UNUSED pc = abuf->addr;
5267   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5268
5269   {
5270     SI opval = SLLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
5271     OPRND (dr) = opval;
5272     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
5273   }
5274
5275 #undef OPRND
5276 #undef FLD
5277 }
5278   NEXT (vpc);
5279
5280   CASE (sem, INSN_WRITE_SLL) : /* sll $dr,$sr */
5281 {
5282   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5283   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5284 #define FLD(f) abuf->fields.fmt_add.f
5285 #define OPRND(f) par_exec->operands.fmt_add.f
5286   int UNUSED written = abuf->written;
5287   PCADDR UNUSED pc = abuf->addr;
5288   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5289
5290   * FLD (i_dr) = OPRND (dr);
5291
5292 #undef OPRND
5293 #undef FLD
5294 }
5295   NEXT (vpc);
5296
5297   CASE (sem, INSN_PAR_SLLI) : /* slli $dr,$uimm5 */
5298 {
5299   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5300   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5301 #define FLD(f) abuf->fields.fmt_slli.f
5302 #define OPRND(f) par_exec->operands.fmt_slli.f
5303   int UNUSED written = 0;
5304   PCADDR UNUSED pc = abuf->addr;
5305   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5306
5307   {
5308     SI opval = SLLSI (* FLD (i_dr), FLD (f_uimm5));
5309     OPRND (dr) = opval;
5310     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
5311   }
5312
5313 #undef OPRND
5314 #undef FLD
5315 }
5316   NEXT (vpc);
5317
5318   CASE (sem, INSN_WRITE_SLLI) : /* slli $dr,$uimm5 */
5319 {
5320   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5321   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5322 #define FLD(f) abuf->fields.fmt_slli.f
5323 #define OPRND(f) par_exec->operands.fmt_slli.f
5324   int UNUSED written = abuf->written;
5325   PCADDR UNUSED pc = abuf->addr;
5326   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5327
5328   * FLD (i_dr) = OPRND (dr);
5329
5330 #undef OPRND
5331 #undef FLD
5332 }
5333   NEXT (vpc);
5334
5335   CASE (sem, INSN_PAR_SRA) : /* sra $dr,$sr */
5336 {
5337   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5338   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5339 #define FLD(f) abuf->fields.fmt_add.f
5340 #define OPRND(f) par_exec->operands.fmt_add.f
5341   int UNUSED written = 0;
5342   PCADDR UNUSED pc = abuf->addr;
5343   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5344
5345   {
5346     SI opval = SRASI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
5347     OPRND (dr) = opval;
5348     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
5349   }
5350
5351 #undef OPRND
5352 #undef FLD
5353 }
5354   NEXT (vpc);
5355
5356   CASE (sem, INSN_WRITE_SRA) : /* sra $dr,$sr */
5357 {
5358   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5359   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5360 #define FLD(f) abuf->fields.fmt_add.f
5361 #define OPRND(f) par_exec->operands.fmt_add.f
5362   int UNUSED written = abuf->written;
5363   PCADDR UNUSED pc = abuf->addr;
5364   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5365
5366   * FLD (i_dr) = OPRND (dr);
5367
5368 #undef OPRND
5369 #undef FLD
5370 }
5371   NEXT (vpc);
5372
5373   CASE (sem, INSN_PAR_SRAI) : /* srai $dr,$uimm5 */
5374 {
5375   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5376   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5377 #define FLD(f) abuf->fields.fmt_slli.f
5378 #define OPRND(f) par_exec->operands.fmt_slli.f
5379   int UNUSED written = 0;
5380   PCADDR UNUSED pc = abuf->addr;
5381   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5382
5383   {
5384     SI opval = SRASI (* FLD (i_dr), FLD (f_uimm5));
5385     OPRND (dr) = opval;
5386     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
5387   }
5388
5389 #undef OPRND
5390 #undef FLD
5391 }
5392   NEXT (vpc);
5393
5394   CASE (sem, INSN_WRITE_SRAI) : /* srai $dr,$uimm5 */
5395 {
5396   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5397   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5398 #define FLD(f) abuf->fields.fmt_slli.f
5399 #define OPRND(f) par_exec->operands.fmt_slli.f
5400   int UNUSED written = abuf->written;
5401   PCADDR UNUSED pc = abuf->addr;
5402   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5403
5404   * FLD (i_dr) = OPRND (dr);
5405
5406 #undef OPRND
5407 #undef FLD
5408 }
5409   NEXT (vpc);
5410
5411   CASE (sem, INSN_PAR_SRL) : /* srl $dr,$sr */
5412 {
5413   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5414   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5415 #define FLD(f) abuf->fields.fmt_add.f
5416 #define OPRND(f) par_exec->operands.fmt_add.f
5417   int UNUSED written = 0;
5418   PCADDR UNUSED pc = abuf->addr;
5419   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5420
5421   {
5422     SI opval = SRLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
5423     OPRND (dr) = opval;
5424     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
5425   }
5426
5427 #undef OPRND
5428 #undef FLD
5429 }
5430   NEXT (vpc);
5431
5432   CASE (sem, INSN_WRITE_SRL) : /* srl $dr,$sr */
5433 {
5434   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5435   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5436 #define FLD(f) abuf->fields.fmt_add.f
5437 #define OPRND(f) par_exec->operands.fmt_add.f
5438   int UNUSED written = abuf->written;
5439   PCADDR UNUSED pc = abuf->addr;
5440   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5441
5442   * FLD (i_dr) = OPRND (dr);
5443
5444 #undef OPRND
5445 #undef FLD
5446 }
5447   NEXT (vpc);
5448
5449   CASE (sem, INSN_PAR_SRLI) : /* srli $dr,$uimm5 */
5450 {
5451   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5452   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5453 #define FLD(f) abuf->fields.fmt_slli.f
5454 #define OPRND(f) par_exec->operands.fmt_slli.f
5455   int UNUSED written = 0;
5456   PCADDR UNUSED pc = abuf->addr;
5457   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5458
5459   {
5460     SI opval = SRLSI (* FLD (i_dr), FLD (f_uimm5));
5461     OPRND (dr) = opval;
5462     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
5463   }
5464
5465 #undef OPRND
5466 #undef FLD
5467 }
5468   NEXT (vpc);
5469
5470   CASE (sem, INSN_WRITE_SRLI) : /* srli $dr,$uimm5 */
5471 {
5472   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5473   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5474 #define FLD(f) abuf->fields.fmt_slli.f
5475 #define OPRND(f) par_exec->operands.fmt_slli.f
5476   int UNUSED written = abuf->written;
5477   PCADDR UNUSED pc = abuf->addr;
5478   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5479
5480   * FLD (i_dr) = OPRND (dr);
5481
5482 #undef OPRND
5483 #undef FLD
5484 }
5485   NEXT (vpc);
5486
5487   CASE (sem, INSN_PAR_ST) : /* st $src1,@$src2 */
5488 {
5489   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5490   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5491 #define FLD(f) abuf->fields.fmt_st.f
5492 #define OPRND(f) par_exec->operands.fmt_st.f
5493   int UNUSED written = 0;
5494   PCADDR UNUSED pc = abuf->addr;
5495   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5496
5497   {
5498     SI opval = * FLD (i_src1);
5499     OPRND (h_memory_src2_idx) = * FLD (i_src2);
5500     OPRND (h_memory_src2) = opval;
5501     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5502   }
5503
5504 #undef OPRND
5505 #undef FLD
5506 }
5507   NEXT (vpc);
5508
5509   CASE (sem, INSN_WRITE_ST) : /* st $src1,@$src2 */
5510 {
5511   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5512   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5513 #define FLD(f) abuf->fields.fmt_st.f
5514 #define OPRND(f) par_exec->operands.fmt_st.f
5515   int UNUSED written = abuf->written;
5516   PCADDR UNUSED pc = abuf->addr;
5517   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5518
5519   SETMEMSI (current_cpu, pc, OPRND (h_memory_src2_idx), OPRND (h_memory_src2));
5520
5521 #undef OPRND
5522 #undef FLD
5523 }
5524   NEXT (vpc);
5525
5526   CASE (sem, INSN_PAR_STB) : /* stb $src1,@$src2 */
5527 {
5528   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5529   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5530 #define FLD(f) abuf->fields.fmt_stb.f
5531 #define OPRND(f) par_exec->operands.fmt_stb.f
5532   int UNUSED written = 0;
5533   PCADDR UNUSED pc = abuf->addr;
5534   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5535
5536   {
5537     QI opval = * FLD (i_src1);
5538     OPRND (h_memory_src2_idx) = * FLD (i_src2);
5539     OPRND (h_memory_src2) = opval;
5540     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5541   }
5542
5543 #undef OPRND
5544 #undef FLD
5545 }
5546   NEXT (vpc);
5547
5548   CASE (sem, INSN_WRITE_STB) : /* stb $src1,@$src2 */
5549 {
5550   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5551   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5552 #define FLD(f) abuf->fields.fmt_stb.f
5553 #define OPRND(f) par_exec->operands.fmt_stb.f
5554   int UNUSED written = abuf->written;
5555   PCADDR UNUSED pc = abuf->addr;
5556   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5557
5558   SETMEMQI (current_cpu, pc, OPRND (h_memory_src2_idx), OPRND (h_memory_src2));
5559
5560 #undef OPRND
5561 #undef FLD
5562 }
5563   NEXT (vpc);
5564
5565   CASE (sem, INSN_PAR_STH) : /* sth $src1,@$src2 */
5566 {
5567   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5568   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5569 #define FLD(f) abuf->fields.fmt_sth.f
5570 #define OPRND(f) par_exec->operands.fmt_sth.f
5571   int UNUSED written = 0;
5572   PCADDR UNUSED pc = abuf->addr;
5573   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5574
5575   {
5576     HI opval = * FLD (i_src1);
5577     OPRND (h_memory_src2_idx) = * FLD (i_src2);
5578     OPRND (h_memory_src2) = opval;
5579     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5580   }
5581
5582 #undef OPRND
5583 #undef FLD
5584 }
5585   NEXT (vpc);
5586
5587   CASE (sem, INSN_WRITE_STH) : /* sth $src1,@$src2 */
5588 {
5589   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5590   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5591 #define FLD(f) abuf->fields.fmt_sth.f
5592 #define OPRND(f) par_exec->operands.fmt_sth.f
5593   int UNUSED written = abuf->written;
5594   PCADDR UNUSED pc = abuf->addr;
5595   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5596
5597   SETMEMHI (current_cpu, pc, OPRND (h_memory_src2_idx), OPRND (h_memory_src2));
5598
5599 #undef OPRND
5600 #undef FLD
5601 }
5602   NEXT (vpc);
5603
5604   CASE (sem, INSN_PAR_ST_PLUS) : /* st $src1,@+$src2 */
5605 {
5606   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5607   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5608 #define FLD(f) abuf->fields.fmt_st_plus.f
5609 #define OPRND(f) par_exec->operands.fmt_st_plus.f
5610   int UNUSED written = 0;
5611   PCADDR UNUSED pc = abuf->addr;
5612   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5613
5614 do {
5615   SI tmp_new_src2;
5616   tmp_new_src2 = ADDSI (* FLD (i_src2), 4);
5617   {
5618     SI opval = * FLD (i_src1);
5619     OPRND (h_memory_new_src2_idx) = tmp_new_src2;
5620     OPRND (h_memory_new_src2) = opval;
5621     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5622   }
5623   {
5624     SI opval = tmp_new_src2;
5625     OPRND (src2) = opval;
5626     TRACE_RESULT (current_cpu, abuf, "src2", 'x', opval);
5627   }
5628 } while (0);
5629
5630 #undef OPRND
5631 #undef FLD
5632 }
5633   NEXT (vpc);
5634
5635   CASE (sem, INSN_WRITE_ST_PLUS) : /* st $src1,@+$src2 */
5636 {
5637   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5638   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5639 #define FLD(f) abuf->fields.fmt_st_plus.f
5640 #define OPRND(f) par_exec->operands.fmt_st_plus.f
5641   int UNUSED written = abuf->written;
5642   PCADDR UNUSED pc = abuf->addr;
5643   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5644
5645   SETMEMSI (current_cpu, pc, OPRND (h_memory_new_src2_idx), OPRND (h_memory_new_src2));
5646   * FLD (i_src2) = OPRND (src2);
5647
5648 #undef OPRND
5649 #undef FLD
5650 }
5651   NEXT (vpc);
5652
5653   CASE (sem, INSN_PAR_ST_MINUS) : /* st $src1,@-$src2 */
5654 {
5655   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5656   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5657 #define FLD(f) abuf->fields.fmt_st_plus.f
5658 #define OPRND(f) par_exec->operands.fmt_st_plus.f
5659   int UNUSED written = 0;
5660   PCADDR UNUSED pc = abuf->addr;
5661   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5662
5663 do {
5664   SI tmp_new_src2;
5665   tmp_new_src2 = SUBSI (* FLD (i_src2), 4);
5666   {
5667     SI opval = * FLD (i_src1);
5668     OPRND (h_memory_new_src2_idx) = tmp_new_src2;
5669     OPRND (h_memory_new_src2) = opval;
5670     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5671   }
5672   {
5673     SI opval = tmp_new_src2;
5674     OPRND (src2) = opval;
5675     TRACE_RESULT (current_cpu, abuf, "src2", 'x', opval);
5676   }
5677 } while (0);
5678
5679 #undef OPRND
5680 #undef FLD
5681 }
5682   NEXT (vpc);
5683
5684   CASE (sem, INSN_WRITE_ST_MINUS) : /* st $src1,@-$src2 */
5685 {
5686   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5687   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5688 #define FLD(f) abuf->fields.fmt_st_plus.f
5689 #define OPRND(f) par_exec->operands.fmt_st_plus.f
5690   int UNUSED written = abuf->written;
5691   PCADDR UNUSED pc = abuf->addr;
5692   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5693
5694   SETMEMSI (current_cpu, pc, OPRND (h_memory_new_src2_idx), OPRND (h_memory_new_src2));
5695   * FLD (i_src2) = OPRND (src2);
5696
5697 #undef OPRND
5698 #undef FLD
5699 }
5700   NEXT (vpc);
5701
5702   CASE (sem, INSN_PAR_SUB) : /* sub $dr,$sr */
5703 {
5704   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5705   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5706 #define FLD(f) abuf->fields.fmt_add.f
5707 #define OPRND(f) par_exec->operands.fmt_add.f
5708   int UNUSED written = 0;
5709   PCADDR UNUSED pc = abuf->addr;
5710   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5711
5712   {
5713     SI opval = SUBSI (* FLD (i_dr), * FLD (i_sr));
5714     OPRND (dr) = opval;
5715     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
5716   }
5717
5718 #undef OPRND
5719 #undef FLD
5720 }
5721   NEXT (vpc);
5722
5723   CASE (sem, INSN_WRITE_SUB) : /* sub $dr,$sr */
5724 {
5725   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5726   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5727 #define FLD(f) abuf->fields.fmt_add.f
5728 #define OPRND(f) par_exec->operands.fmt_add.f
5729   int UNUSED written = abuf->written;
5730   PCADDR UNUSED pc = abuf->addr;
5731   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5732
5733   * FLD (i_dr) = OPRND (dr);
5734
5735 #undef OPRND
5736 #undef FLD
5737 }
5738   NEXT (vpc);
5739
5740   CASE (sem, INSN_PAR_SUBV) : /* subv $dr,$sr */
5741 {
5742   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5743   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5744 #define FLD(f) abuf->fields.fmt_addv.f
5745 #define OPRND(f) par_exec->operands.fmt_addv.f
5746   int UNUSED written = 0;
5747   PCADDR UNUSED pc = abuf->addr;
5748   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5749
5750 do {
5751   BI temp1;SI temp0;
5752   temp0 = SUBSI (* FLD (i_dr), * FLD (i_sr));
5753   temp1 = SUBOFSI (* FLD (i_dr), * FLD (i_sr), 0);
5754   {
5755     SI opval = temp0;
5756     OPRND (dr) = opval;
5757     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
5758   }
5759   {
5760     BI opval = temp1;
5761     OPRND (condbit) = opval;
5762     TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
5763   }
5764 } while (0);
5765
5766 #undef OPRND
5767 #undef FLD
5768 }
5769   NEXT (vpc);
5770
5771   CASE (sem, INSN_WRITE_SUBV) : /* subv $dr,$sr */
5772 {
5773   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5774   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5775 #define FLD(f) abuf->fields.fmt_addv.f
5776 #define OPRND(f) par_exec->operands.fmt_addv.f
5777   int UNUSED written = abuf->written;
5778   PCADDR UNUSED pc = abuf->addr;
5779   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5780
5781   * FLD (i_dr) = OPRND (dr);
5782   CPU (h_cond) = OPRND (condbit);
5783
5784 #undef OPRND
5785 #undef FLD
5786 }
5787   NEXT (vpc);
5788
5789   CASE (sem, INSN_PAR_SUBX) : /* subx $dr,$sr */
5790 {
5791   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5792   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5793 #define FLD(f) abuf->fields.fmt_addx.f
5794 #define OPRND(f) par_exec->operands.fmt_addx.f
5795   int UNUSED written = 0;
5796   PCADDR UNUSED pc = abuf->addr;
5797   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5798
5799 do {
5800   BI temp1;SI temp0;
5801   temp0 = SUBCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
5802   temp1 = SUBCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
5803   {
5804     SI opval = temp0;
5805     OPRND (dr) = opval;
5806     TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
5807   }
5808   {
5809     BI opval = temp1;
5810     OPRND (condbit) = opval;
5811     TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
5812   }
5813 } while (0);
5814
5815 #undef OPRND
5816 #undef FLD
5817 }
5818   NEXT (vpc);
5819
5820   CASE (sem, INSN_WRITE_SUBX) : /* subx $dr,$sr */
5821 {
5822   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5823   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5824 #define FLD(f) abuf->fields.fmt_addx.f
5825 #define OPRND(f) par_exec->operands.fmt_addx.f
5826   int UNUSED written = abuf->written;
5827   PCADDR UNUSED pc = abuf->addr;
5828   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5829
5830   * FLD (i_dr) = OPRND (dr);
5831   CPU (h_cond) = OPRND (condbit);
5832
5833 #undef OPRND
5834 #undef FLD
5835 }
5836   NEXT (vpc);
5837
5838   CASE (sem, INSN_PAR_TRAP) : /* trap $uimm4 */
5839 {
5840   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5841   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5842 #define FLD(f) abuf->fields.cti.fields.fmt_trap.f
5843 #define OPRND(f) par_exec->operands.fmt_trap.f
5844   int UNUSED written = 0;
5845   PCADDR UNUSED pc = abuf->addr;
5846   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5847
5848 do {
5849   {
5850     USI opval = m32rxf_h_cr_get (current_cpu, ((UINT) 6));
5851     OPRND (h_cr_14) = opval;
5852     TRACE_RESULT (current_cpu, abuf, "cr-14", 'x', opval);
5853   }
5854   {
5855     USI opval = ADDSI (pc, 4);
5856     OPRND (h_cr_6) = opval;
5857     TRACE_RESULT (current_cpu, abuf, "cr-6", 'x', opval);
5858   }
5859   {
5860     UQI opval = CPU (h_bpsw);
5861     OPRND (h_bbpsw_0) = opval;
5862     TRACE_RESULT (current_cpu, abuf, "bbpsw-0", 'x', opval);
5863   }
5864   {
5865     UQI opval = m32rxf_h_psw_get (current_cpu);
5866     OPRND (h_bpsw_0) = opval;
5867     TRACE_RESULT (current_cpu, abuf, "bpsw-0", 'x', opval);
5868   }
5869   {
5870     UQI opval = ANDQI (m32rxf_h_psw_get (current_cpu), 128);
5871     OPRND (h_psw_0) = opval;
5872     TRACE_RESULT (current_cpu, abuf, "psw-0", 'x', opval);
5873   }
5874   {
5875     SI opval = m32r_trap (current_cpu, pc, FLD (f_uimm4));
5876     OPRND (pc) = opval;
5877     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
5878   }
5879 } while (0);
5880
5881 #undef OPRND
5882 #undef FLD
5883 }
5884   NEXT (vpc);
5885
5886   CASE (sem, INSN_WRITE_TRAP) : /* trap $uimm4 */
5887 {
5888   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5889   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5890 #define FLD(f) abuf->fields.cti.fields.fmt_trap.f
5891 #define OPRND(f) par_exec->operands.fmt_trap.f
5892   int UNUSED written = abuf->written;
5893   PCADDR UNUSED pc = abuf->addr;
5894   SEM_BRANCH_INIT
5895   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5896
5897   m32rxf_h_cr_set (current_cpu, ((UINT) 14), OPRND (h_cr_14));
5898   m32rxf_h_cr_set (current_cpu, ((UINT) 6), OPRND (h_cr_6));
5899   CPU (h_bbpsw) = OPRND (h_bbpsw_0);
5900   CPU (h_bpsw) = OPRND (h_bpsw_0);
5901   m32rxf_h_psw_set (current_cpu, OPRND (h_psw_0));
5902   SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
5903
5904   SEM_BRANCH_FINI (vpc);
5905 #undef OPRND
5906 #undef FLD
5907 }
5908   NEXT (vpc);
5909
5910   CASE (sem, INSN_PAR_UNLOCK) : /* unlock $src1,@$src2 */
5911 {
5912   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5913   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5914 #define FLD(f) abuf->fields.fmt_unlock.f
5915 #define OPRND(f) par_exec->operands.fmt_unlock.f
5916   int UNUSED written = 0;
5917   PCADDR UNUSED pc = abuf->addr;
5918   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5919
5920 do {
5921 if (CPU (h_lock)) {
5922   {
5923     SI opval = * FLD (i_src1);
5924     OPRND (h_memory_src2_idx) = * FLD (i_src2);
5925     OPRND (h_memory_src2) = opval;
5926     written |= (1 << 3);
5927     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5928   }
5929 }
5930   {
5931     BI opval = 0;
5932     OPRND (h_lock_0) = opval;
5933     TRACE_RESULT (current_cpu, abuf, "lock-0", 'x', opval);
5934   }
5935 } while (0);
5936
5937   abuf->written = written;
5938 #undef OPRND
5939 #undef FLD
5940 }
5941   NEXT (vpc);
5942
5943   CASE (sem, INSN_WRITE_UNLOCK) : /* unlock $src1,@$src2 */
5944 {
5945   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5946   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5947 #define FLD(f) abuf->fields.fmt_unlock.f
5948 #define OPRND(f) par_exec->operands.fmt_unlock.f
5949   int UNUSED written = abuf->written;
5950   PCADDR UNUSED pc = abuf->addr;
5951   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5952
5953   if (written & (1 << 3))
5954     {
5955       SETMEMSI (current_cpu, pc, OPRND (h_memory_src2_idx), OPRND (h_memory_src2));
5956     }
5957   CPU (h_lock) = OPRND (h_lock_0);
5958
5959 #undef OPRND
5960 #undef FLD
5961 }
5962   NEXT (vpc);
5963
5964   CASE (sem, INSN_PAR_PCMPBZ) : /* pcmpbz $src2 */
5965 {
5966   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5967   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5968 #define FLD(f) abuf->fields.fmt_cmpz.f
5969 #define OPRND(f) par_exec->operands.fmt_cmpz.f
5970   int UNUSED written = 0;
5971   PCADDR UNUSED pc = abuf->addr;
5972   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5973
5974   {
5975     BI opval = (EQSI (ANDSI (* FLD (i_src2), 255), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 65280), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 16711680), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 0xff000000), 0)) ? (1) : (0);
5976     OPRND (condbit) = opval;
5977     TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
5978   }
5979
5980 #undef OPRND
5981 #undef FLD
5982 }
5983   NEXT (vpc);
5984
5985   CASE (sem, INSN_WRITE_PCMPBZ) : /* pcmpbz $src2 */
5986 {
5987   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5988   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5989 #define FLD(f) abuf->fields.fmt_cmpz.f
5990 #define OPRND(f) par_exec->operands.fmt_cmpz.f
5991   int UNUSED written = abuf->written;
5992   PCADDR UNUSED pc = abuf->addr;
5993   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5994
5995   CPU (h_cond) = OPRND (condbit);
5996
5997 #undef OPRND
5998 #undef FLD
5999 }
6000   NEXT (vpc);
6001
6002   CASE (sem, INSN_PAR_SADD) : /* sadd */
6003 {
6004   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6005   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6006 #define FLD(f) abuf->fields.fmt_sadd.f
6007 #define OPRND(f) par_exec->operands.fmt_sadd.f
6008   int UNUSED written = 0;
6009   PCADDR UNUSED pc = abuf->addr;
6010   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6011
6012   {
6013     DI opval = ADDDI (SRADI (m32rxf_h_accums_get (current_cpu, ((UINT) 1)), 16), m32rxf_h_accums_get (current_cpu, ((UINT) 0)));
6014     OPRND (h_accums_0) = opval;
6015     TRACE_RESULT (current_cpu, abuf, "accums-0", 'D', opval);
6016   }
6017
6018 #undef OPRND
6019 #undef FLD
6020 }
6021   NEXT (vpc);
6022
6023   CASE (sem, INSN_WRITE_SADD) : /* sadd */
6024 {
6025   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6026   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6027 #define FLD(f) abuf->fields.fmt_sadd.f
6028 #define OPRND(f) par_exec->operands.fmt_sadd.f
6029   int UNUSED written = abuf->written;
6030   PCADDR UNUSED pc = abuf->addr;
6031   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6032
6033   m32rxf_h_accums_set (current_cpu, ((UINT) 0), OPRND (h_accums_0));
6034
6035 #undef OPRND
6036 #undef FLD
6037 }
6038   NEXT (vpc);
6039
6040   CASE (sem, INSN_PAR_MACWU1) : /* macwu1 $src1,$src2 */
6041 {
6042   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6043   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6044 #define FLD(f) abuf->fields.fmt_macwu1.f
6045 #define OPRND(f) par_exec->operands.fmt_macwu1.f
6046   int UNUSED written = 0;
6047   PCADDR UNUSED pc = abuf->addr;
6048   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6049
6050   {
6051     DI opval = SRADI (SLLDI (ADDDI (m32rxf_h_accums_get (current_cpu, ((UINT) 1)), MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535)))), 8), 8);
6052     OPRND (h_accums_1) = opval;
6053     TRACE_RESULT (current_cpu, abuf, "accums-1", 'D', opval);
6054   }
6055
6056 #undef OPRND
6057 #undef FLD
6058 }
6059   NEXT (vpc);
6060
6061   CASE (sem, INSN_WRITE_MACWU1) : /* macwu1 $src1,$src2 */
6062 {
6063   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6064   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6065 #define FLD(f) abuf->fields.fmt_macwu1.f
6066 #define OPRND(f) par_exec->operands.fmt_macwu1.f
6067   int UNUSED written = abuf->written;
6068   PCADDR UNUSED pc = abuf->addr;
6069   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6070
6071   m32rxf_h_accums_set (current_cpu, ((UINT) 1), OPRND (h_accums_1));
6072
6073 #undef OPRND
6074 #undef FLD
6075 }
6076   NEXT (vpc);
6077
6078   CASE (sem, INSN_PAR_MSBLO) : /* msblo $src1,$src2 */
6079 {
6080   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6081   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6082 #define FLD(f) abuf->fields.fmt_msblo.f
6083 #define OPRND(f) par_exec->operands.fmt_msblo.f
6084   int UNUSED written = 0;
6085   PCADDR UNUSED pc = abuf->addr;
6086   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6087
6088   {
6089     DI opval = SRADI (SLLDI (SUBDI (m32rxf_h_accum_get (current_cpu), SRADI (SLLDI (MULDI (EXTHIDI (TRUNCSIHI (* FLD (i_src1))), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 32), 16)), 8), 8);
6090     OPRND (accum) = opval;
6091     TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
6092   }
6093
6094 #undef OPRND
6095 #undef FLD
6096 }
6097   NEXT (vpc);
6098
6099   CASE (sem, INSN_WRITE_MSBLO) : /* msblo $src1,$src2 */
6100 {
6101   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6102   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6103 #define FLD(f) abuf->fields.fmt_msblo.f
6104 #define OPRND(f) par_exec->operands.fmt_msblo.f
6105   int UNUSED written = abuf->written;
6106   PCADDR UNUSED pc = abuf->addr;
6107   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6108
6109   m32rxf_h_accum_set (current_cpu, OPRND (accum));
6110
6111 #undef OPRND
6112 #undef FLD
6113 }
6114   NEXT (vpc);
6115
6116   CASE (sem, INSN_PAR_MULWU1) : /* mulwu1 $src1,$src2 */
6117 {
6118   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6119   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6120 #define FLD(f) abuf->fields.fmt_mulwu1.f
6121 #define OPRND(f) par_exec->operands.fmt_mulwu1.f
6122   int UNUSED written = 0;
6123   PCADDR UNUSED pc = abuf->addr;
6124   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6125
6126   {
6127     DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535))), 16), 16);
6128     OPRND (h_accums_1) = opval;
6129     TRACE_RESULT (current_cpu, abuf, "accums-1", 'D', opval);
6130   }
6131
6132 #undef OPRND
6133 #undef FLD
6134 }
6135   NEXT (vpc);
6136
6137   CASE (sem, INSN_WRITE_MULWU1) : /* mulwu1 $src1,$src2 */
6138 {
6139   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6140   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6141 #define FLD(f) abuf->fields.fmt_mulwu1.f
6142 #define OPRND(f) par_exec->operands.fmt_mulwu1.f
6143   int UNUSED written = abuf->written;
6144   PCADDR UNUSED pc = abuf->addr;
6145   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6146
6147   m32rxf_h_accums_set (current_cpu, ((UINT) 1), OPRND (h_accums_1));
6148
6149 #undef OPRND
6150 #undef FLD
6151 }
6152   NEXT (vpc);
6153
6154   CASE (sem, INSN_PAR_MACLH1) : /* maclh1 $src1,$src2 */
6155 {
6156   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6157   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6158 #define FLD(f) abuf->fields.fmt_macwu1.f
6159 #define OPRND(f) par_exec->operands.fmt_macwu1.f
6160   int UNUSED written = 0;
6161   PCADDR UNUSED pc = abuf->addr;
6162   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6163
6164   {
6165     DI opval = SRADI (SLLDI (ADDDI (m32rxf_h_accums_get (current_cpu, ((UINT) 1)), SLLDI (EXTSIDI (MULSI (EXTHISI (TRUNCSIHI (* FLD (i_src1))), SRASI (* FLD (i_src2), 16))), 16)), 8), 8);
6166     OPRND (h_accums_1) = opval;
6167     TRACE_RESULT (current_cpu, abuf, "accums-1", 'D', opval);
6168   }
6169
6170 #undef OPRND
6171 #undef FLD
6172 }
6173   NEXT (vpc);
6174
6175   CASE (sem, INSN_WRITE_MACLH1) : /* maclh1 $src1,$src2 */
6176 {
6177   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6178   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6179 #define FLD(f) abuf->fields.fmt_macwu1.f
6180 #define OPRND(f) par_exec->operands.fmt_macwu1.f
6181   int UNUSED written = abuf->written;
6182   PCADDR UNUSED pc = abuf->addr;
6183   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6184
6185   m32rxf_h_accums_set (current_cpu, ((UINT) 1), OPRND (h_accums_1));
6186
6187 #undef OPRND
6188 #undef FLD
6189 }
6190   NEXT (vpc);
6191
6192   CASE (sem, INSN_PAR_SC) : /* sc */
6193 {
6194   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6195   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6196 #define FLD(f) abuf->fields.cti.fields.fmt_sc.f
6197 #define OPRND(f) par_exec->operands.fmt_sc.f
6198   int UNUSED written = 0;
6199   PCADDR UNUSED pc = abuf->addr;
6200   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6201
6202 if (CPU (h_cond)) {
6203 SEM_SKIP_INSN (current_cpu, 1);
6204 }
6205
6206 #undef OPRND
6207 #undef FLD
6208 }
6209   NEXT (vpc);
6210
6211   CASE (sem, INSN_WRITE_SC) : /* sc */
6212 {
6213   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6214   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6215 #define FLD(f) abuf->fields.cti.fields.fmt_sc.f
6216 #define OPRND(f) par_exec->operands.fmt_sc.f
6217   int UNUSED written = abuf->written;
6218   PCADDR UNUSED pc = abuf->addr;
6219   SEM_BRANCH_INIT
6220   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6221
6222
6223   SEM_BRANCH_FINI (vpc);
6224 #undef OPRND
6225 #undef FLD
6226 }
6227   NEXT (vpc);
6228
6229   CASE (sem, INSN_PAR_SNC) : /* snc */
6230 {
6231   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6232   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6233 #define FLD(f) abuf->fields.cti.fields.fmt_sc.f
6234 #define OPRND(f) par_exec->operands.fmt_sc.f
6235   int UNUSED written = 0;
6236   PCADDR UNUSED pc = abuf->addr;
6237   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6238
6239 if (NOTBI (CPU (h_cond))) {
6240 SEM_SKIP_INSN (current_cpu, 1);
6241 }
6242
6243 #undef OPRND
6244 #undef FLD
6245 }
6246   NEXT (vpc);
6247
6248   CASE (sem, INSN_WRITE_SNC) : /* snc */
6249 {
6250   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6251   const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6252 #define FLD(f) abuf->fields.cti.fields.fmt_sc.f
6253 #define OPRND(f) par_exec->operands.fmt_sc.f
6254   int UNUSED written = abuf->written;
6255   PCADDR UNUSED pc = abuf->addr;
6256   SEM_BRANCH_INIT
6257   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6258
6259
6260   SEM_BRANCH_FINI (vpc);
6261 #undef OPRND
6262 #undef FLD
6263 }
6264   NEXT (vpc);
6265
6266
6267     }
6268   ENDSWITCH (sem) /* End of semantic switch.  */
6269
6270   /* At this point `vpc' contains the next insn to execute.  */
6271 }
6272
6273 #undef DEFINE_SWITCH
6274 #endif /* DEFINE_SWITCH */