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2001-11-14 Dave Brolley <brolley@redhat.com>
[deliverable/binutils-gdb.git] / sim / m32r / semx-switch.c
1 /* Simulator instruction semantics for m32rxf.
2
3 THIS FILE IS MACHINE GENERATED WITH CGEN.
4
5 Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
6
7 This file is part of the GNU simulators.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2, or (at your option)
12 any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License along
20 with this program; if not, write to the Free Software Foundation, Inc.,
21 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22
23 */
24
25 #ifdef DEFINE_LABELS
26
27 /* The labels have the case they have because the enum of insn types
28 is all uppercase and in the non-stdc case the insn symbol is built
29 into the enum name. */
30
31 static struct {
32 int index;
33 void *label;
34 } labels[] = {
35 { M32RXF_INSN_X_INVALID, && case_sem_INSN_X_INVALID },
36 { M32RXF_INSN_X_AFTER, && case_sem_INSN_X_AFTER },
37 { M32RXF_INSN_X_BEFORE, && case_sem_INSN_X_BEFORE },
38 { M32RXF_INSN_X_CTI_CHAIN, && case_sem_INSN_X_CTI_CHAIN },
39 { M32RXF_INSN_X_CHAIN, && case_sem_INSN_X_CHAIN },
40 { M32RXF_INSN_X_BEGIN, && case_sem_INSN_X_BEGIN },
41 { M32RXF_INSN_ADD, && case_sem_INSN_ADD },
42 { M32RXF_INSN_ADD3, && case_sem_INSN_ADD3 },
43 { M32RXF_INSN_AND, && case_sem_INSN_AND },
44 { M32RXF_INSN_AND3, && case_sem_INSN_AND3 },
45 { M32RXF_INSN_OR, && case_sem_INSN_OR },
46 { M32RXF_INSN_OR3, && case_sem_INSN_OR3 },
47 { M32RXF_INSN_XOR, && case_sem_INSN_XOR },
48 { M32RXF_INSN_XOR3, && case_sem_INSN_XOR3 },
49 { M32RXF_INSN_ADDI, && case_sem_INSN_ADDI },
50 { M32RXF_INSN_ADDV, && case_sem_INSN_ADDV },
51 { M32RXF_INSN_ADDV3, && case_sem_INSN_ADDV3 },
52 { M32RXF_INSN_ADDX, && case_sem_INSN_ADDX },
53 { M32RXF_INSN_BC8, && case_sem_INSN_BC8 },
54 { M32RXF_INSN_BC24, && case_sem_INSN_BC24 },
55 { M32RXF_INSN_BEQ, && case_sem_INSN_BEQ },
56 { M32RXF_INSN_BEQZ, && case_sem_INSN_BEQZ },
57 { M32RXF_INSN_BGEZ, && case_sem_INSN_BGEZ },
58 { M32RXF_INSN_BGTZ, && case_sem_INSN_BGTZ },
59 { M32RXF_INSN_BLEZ, && case_sem_INSN_BLEZ },
60 { M32RXF_INSN_BLTZ, && case_sem_INSN_BLTZ },
61 { M32RXF_INSN_BNEZ, && case_sem_INSN_BNEZ },
62 { M32RXF_INSN_BL8, && case_sem_INSN_BL8 },
63 { M32RXF_INSN_BL24, && case_sem_INSN_BL24 },
64 { M32RXF_INSN_BCL8, && case_sem_INSN_BCL8 },
65 { M32RXF_INSN_BCL24, && case_sem_INSN_BCL24 },
66 { M32RXF_INSN_BNC8, && case_sem_INSN_BNC8 },
67 { M32RXF_INSN_BNC24, && case_sem_INSN_BNC24 },
68 { M32RXF_INSN_BNE, && case_sem_INSN_BNE },
69 { M32RXF_INSN_BRA8, && case_sem_INSN_BRA8 },
70 { M32RXF_INSN_BRA24, && case_sem_INSN_BRA24 },
71 { M32RXF_INSN_BNCL8, && case_sem_INSN_BNCL8 },
72 { M32RXF_INSN_BNCL24, && case_sem_INSN_BNCL24 },
73 { M32RXF_INSN_CMP, && case_sem_INSN_CMP },
74 { M32RXF_INSN_CMPI, && case_sem_INSN_CMPI },
75 { M32RXF_INSN_CMPU, && case_sem_INSN_CMPU },
76 { M32RXF_INSN_CMPUI, && case_sem_INSN_CMPUI },
77 { M32RXF_INSN_CMPEQ, && case_sem_INSN_CMPEQ },
78 { M32RXF_INSN_CMPZ, && case_sem_INSN_CMPZ },
79 { M32RXF_INSN_DIV, && case_sem_INSN_DIV },
80 { M32RXF_INSN_DIVU, && case_sem_INSN_DIVU },
81 { M32RXF_INSN_REM, && case_sem_INSN_REM },
82 { M32RXF_INSN_REMU, && case_sem_INSN_REMU },
83 { M32RXF_INSN_DIVH, && case_sem_INSN_DIVH },
84 { M32RXF_INSN_JC, && case_sem_INSN_JC },
85 { M32RXF_INSN_JNC, && case_sem_INSN_JNC },
86 { M32RXF_INSN_JL, && case_sem_INSN_JL },
87 { M32RXF_INSN_JMP, && case_sem_INSN_JMP },
88 { M32RXF_INSN_LD, && case_sem_INSN_LD },
89 { M32RXF_INSN_LD_D, && case_sem_INSN_LD_D },
90 { M32RXF_INSN_LDB, && case_sem_INSN_LDB },
91 { M32RXF_INSN_LDB_D, && case_sem_INSN_LDB_D },
92 { M32RXF_INSN_LDH, && case_sem_INSN_LDH },
93 { M32RXF_INSN_LDH_D, && case_sem_INSN_LDH_D },
94 { M32RXF_INSN_LDUB, && case_sem_INSN_LDUB },
95 { M32RXF_INSN_LDUB_D, && case_sem_INSN_LDUB_D },
96 { M32RXF_INSN_LDUH, && case_sem_INSN_LDUH },
97 { M32RXF_INSN_LDUH_D, && case_sem_INSN_LDUH_D },
98 { M32RXF_INSN_LD_PLUS, && case_sem_INSN_LD_PLUS },
99 { M32RXF_INSN_LD24, && case_sem_INSN_LD24 },
100 { M32RXF_INSN_LDI8, && case_sem_INSN_LDI8 },
101 { M32RXF_INSN_LDI16, && case_sem_INSN_LDI16 },
102 { M32RXF_INSN_LOCK, && case_sem_INSN_LOCK },
103 { M32RXF_INSN_MACHI_A, && case_sem_INSN_MACHI_A },
104 { M32RXF_INSN_MACLO_A, && case_sem_INSN_MACLO_A },
105 { M32RXF_INSN_MACWHI_A, && case_sem_INSN_MACWHI_A },
106 { M32RXF_INSN_MACWLO_A, && case_sem_INSN_MACWLO_A },
107 { M32RXF_INSN_MUL, && case_sem_INSN_MUL },
108 { M32RXF_INSN_MULHI_A, && case_sem_INSN_MULHI_A },
109 { M32RXF_INSN_MULLO_A, && case_sem_INSN_MULLO_A },
110 { M32RXF_INSN_MULWHI_A, && case_sem_INSN_MULWHI_A },
111 { M32RXF_INSN_MULWLO_A, && case_sem_INSN_MULWLO_A },
112 { M32RXF_INSN_MV, && case_sem_INSN_MV },
113 { M32RXF_INSN_MVFACHI_A, && case_sem_INSN_MVFACHI_A },
114 { M32RXF_INSN_MVFACLO_A, && case_sem_INSN_MVFACLO_A },
115 { M32RXF_INSN_MVFACMI_A, && case_sem_INSN_MVFACMI_A },
116 { M32RXF_INSN_MVFC, && case_sem_INSN_MVFC },
117 { M32RXF_INSN_MVTACHI_A, && case_sem_INSN_MVTACHI_A },
118 { M32RXF_INSN_MVTACLO_A, && case_sem_INSN_MVTACLO_A },
119 { M32RXF_INSN_MVTC, && case_sem_INSN_MVTC },
120 { M32RXF_INSN_NEG, && case_sem_INSN_NEG },
121 { M32RXF_INSN_NOP, && case_sem_INSN_NOP },
122 { M32RXF_INSN_NOT, && case_sem_INSN_NOT },
123 { M32RXF_INSN_RAC_DSI, && case_sem_INSN_RAC_DSI },
124 { M32RXF_INSN_RACH_DSI, && case_sem_INSN_RACH_DSI },
125 { M32RXF_INSN_RTE, && case_sem_INSN_RTE },
126 { M32RXF_INSN_SETH, && case_sem_INSN_SETH },
127 { M32RXF_INSN_SLL, && case_sem_INSN_SLL },
128 { M32RXF_INSN_SLL3, && case_sem_INSN_SLL3 },
129 { M32RXF_INSN_SLLI, && case_sem_INSN_SLLI },
130 { M32RXF_INSN_SRA, && case_sem_INSN_SRA },
131 { M32RXF_INSN_SRA3, && case_sem_INSN_SRA3 },
132 { M32RXF_INSN_SRAI, && case_sem_INSN_SRAI },
133 { M32RXF_INSN_SRL, && case_sem_INSN_SRL },
134 { M32RXF_INSN_SRL3, && case_sem_INSN_SRL3 },
135 { M32RXF_INSN_SRLI, && case_sem_INSN_SRLI },
136 { M32RXF_INSN_ST, && case_sem_INSN_ST },
137 { M32RXF_INSN_ST_D, && case_sem_INSN_ST_D },
138 { M32RXF_INSN_STB, && case_sem_INSN_STB },
139 { M32RXF_INSN_STB_D, && case_sem_INSN_STB_D },
140 { M32RXF_INSN_STH, && case_sem_INSN_STH },
141 { M32RXF_INSN_STH_D, && case_sem_INSN_STH_D },
142 { M32RXF_INSN_ST_PLUS, && case_sem_INSN_ST_PLUS },
143 { M32RXF_INSN_ST_MINUS, && case_sem_INSN_ST_MINUS },
144 { M32RXF_INSN_SUB, && case_sem_INSN_SUB },
145 { M32RXF_INSN_SUBV, && case_sem_INSN_SUBV },
146 { M32RXF_INSN_SUBX, && case_sem_INSN_SUBX },
147 { M32RXF_INSN_TRAP, && case_sem_INSN_TRAP },
148 { M32RXF_INSN_UNLOCK, && case_sem_INSN_UNLOCK },
149 { M32RXF_INSN_SATB, && case_sem_INSN_SATB },
150 { M32RXF_INSN_SATH, && case_sem_INSN_SATH },
151 { M32RXF_INSN_SAT, && case_sem_INSN_SAT },
152 { M32RXF_INSN_PCMPBZ, && case_sem_INSN_PCMPBZ },
153 { M32RXF_INSN_SADD, && case_sem_INSN_SADD },
154 { M32RXF_INSN_MACWU1, && case_sem_INSN_MACWU1 },
155 { M32RXF_INSN_MSBLO, && case_sem_INSN_MSBLO },
156 { M32RXF_INSN_MULWU1, && case_sem_INSN_MULWU1 },
157 { M32RXF_INSN_MACLH1, && case_sem_INSN_MACLH1 },
158 { M32RXF_INSN_SC, && case_sem_INSN_SC },
159 { M32RXF_INSN_SNC, && case_sem_INSN_SNC },
160 { M32RXF_INSN_PAR_ADD, && case_sem_INSN_PAR_ADD },
161 { M32RXF_INSN_WRITE_ADD, && case_sem_INSN_WRITE_ADD },
162 { M32RXF_INSN_PAR_AND, && case_sem_INSN_PAR_AND },
163 { M32RXF_INSN_WRITE_AND, && case_sem_INSN_WRITE_AND },
164 { M32RXF_INSN_PAR_OR, && case_sem_INSN_PAR_OR },
165 { M32RXF_INSN_WRITE_OR, && case_sem_INSN_WRITE_OR },
166 { M32RXF_INSN_PAR_XOR, && case_sem_INSN_PAR_XOR },
167 { M32RXF_INSN_WRITE_XOR, && case_sem_INSN_WRITE_XOR },
168 { M32RXF_INSN_PAR_ADDI, && case_sem_INSN_PAR_ADDI },
169 { M32RXF_INSN_WRITE_ADDI, && case_sem_INSN_WRITE_ADDI },
170 { M32RXF_INSN_PAR_ADDV, && case_sem_INSN_PAR_ADDV },
171 { M32RXF_INSN_WRITE_ADDV, && case_sem_INSN_WRITE_ADDV },
172 { M32RXF_INSN_PAR_ADDX, && case_sem_INSN_PAR_ADDX },
173 { M32RXF_INSN_WRITE_ADDX, && case_sem_INSN_WRITE_ADDX },
174 { M32RXF_INSN_PAR_BC8, && case_sem_INSN_PAR_BC8 },
175 { M32RXF_INSN_WRITE_BC8, && case_sem_INSN_WRITE_BC8 },
176 { M32RXF_INSN_PAR_BL8, && case_sem_INSN_PAR_BL8 },
177 { M32RXF_INSN_WRITE_BL8, && case_sem_INSN_WRITE_BL8 },
178 { M32RXF_INSN_PAR_BCL8, && case_sem_INSN_PAR_BCL8 },
179 { M32RXF_INSN_WRITE_BCL8, && case_sem_INSN_WRITE_BCL8 },
180 { M32RXF_INSN_PAR_BNC8, && case_sem_INSN_PAR_BNC8 },
181 { M32RXF_INSN_WRITE_BNC8, && case_sem_INSN_WRITE_BNC8 },
182 { M32RXF_INSN_PAR_BRA8, && case_sem_INSN_PAR_BRA8 },
183 { M32RXF_INSN_WRITE_BRA8, && case_sem_INSN_WRITE_BRA8 },
184 { M32RXF_INSN_PAR_BNCL8, && case_sem_INSN_PAR_BNCL8 },
185 { M32RXF_INSN_WRITE_BNCL8, && case_sem_INSN_WRITE_BNCL8 },
186 { M32RXF_INSN_PAR_CMP, && case_sem_INSN_PAR_CMP },
187 { M32RXF_INSN_WRITE_CMP, && case_sem_INSN_WRITE_CMP },
188 { M32RXF_INSN_PAR_CMPU, && case_sem_INSN_PAR_CMPU },
189 { M32RXF_INSN_WRITE_CMPU, && case_sem_INSN_WRITE_CMPU },
190 { M32RXF_INSN_PAR_CMPEQ, && case_sem_INSN_PAR_CMPEQ },
191 { M32RXF_INSN_WRITE_CMPEQ, && case_sem_INSN_WRITE_CMPEQ },
192 { M32RXF_INSN_PAR_CMPZ, && case_sem_INSN_PAR_CMPZ },
193 { M32RXF_INSN_WRITE_CMPZ, && case_sem_INSN_WRITE_CMPZ },
194 { M32RXF_INSN_PAR_JC, && case_sem_INSN_PAR_JC },
195 { M32RXF_INSN_WRITE_JC, && case_sem_INSN_WRITE_JC },
196 { M32RXF_INSN_PAR_JNC, && case_sem_INSN_PAR_JNC },
197 { M32RXF_INSN_WRITE_JNC, && case_sem_INSN_WRITE_JNC },
198 { M32RXF_INSN_PAR_JL, && case_sem_INSN_PAR_JL },
199 { M32RXF_INSN_WRITE_JL, && case_sem_INSN_WRITE_JL },
200 { M32RXF_INSN_PAR_JMP, && case_sem_INSN_PAR_JMP },
201 { M32RXF_INSN_WRITE_JMP, && case_sem_INSN_WRITE_JMP },
202 { M32RXF_INSN_PAR_LD, && case_sem_INSN_PAR_LD },
203 { M32RXF_INSN_WRITE_LD, && case_sem_INSN_WRITE_LD },
204 { M32RXF_INSN_PAR_LDB, && case_sem_INSN_PAR_LDB },
205 { M32RXF_INSN_WRITE_LDB, && case_sem_INSN_WRITE_LDB },
206 { M32RXF_INSN_PAR_LDH, && case_sem_INSN_PAR_LDH },
207 { M32RXF_INSN_WRITE_LDH, && case_sem_INSN_WRITE_LDH },
208 { M32RXF_INSN_PAR_LDUB, && case_sem_INSN_PAR_LDUB },
209 { M32RXF_INSN_WRITE_LDUB, && case_sem_INSN_WRITE_LDUB },
210 { M32RXF_INSN_PAR_LDUH, && case_sem_INSN_PAR_LDUH },
211 { M32RXF_INSN_WRITE_LDUH, && case_sem_INSN_WRITE_LDUH },
212 { M32RXF_INSN_PAR_LD_PLUS, && case_sem_INSN_PAR_LD_PLUS },
213 { M32RXF_INSN_WRITE_LD_PLUS, && case_sem_INSN_WRITE_LD_PLUS },
214 { M32RXF_INSN_PAR_LDI8, && case_sem_INSN_PAR_LDI8 },
215 { M32RXF_INSN_WRITE_LDI8, && case_sem_INSN_WRITE_LDI8 },
216 { M32RXF_INSN_PAR_LOCK, && case_sem_INSN_PAR_LOCK },
217 { M32RXF_INSN_WRITE_LOCK, && case_sem_INSN_WRITE_LOCK },
218 { M32RXF_INSN_PAR_MACHI_A, && case_sem_INSN_PAR_MACHI_A },
219 { M32RXF_INSN_WRITE_MACHI_A, && case_sem_INSN_WRITE_MACHI_A },
220 { M32RXF_INSN_PAR_MACLO_A, && case_sem_INSN_PAR_MACLO_A },
221 { M32RXF_INSN_WRITE_MACLO_A, && case_sem_INSN_WRITE_MACLO_A },
222 { M32RXF_INSN_PAR_MACWHI_A, && case_sem_INSN_PAR_MACWHI_A },
223 { M32RXF_INSN_WRITE_MACWHI_A, && case_sem_INSN_WRITE_MACWHI_A },
224 { M32RXF_INSN_PAR_MACWLO_A, && case_sem_INSN_PAR_MACWLO_A },
225 { M32RXF_INSN_WRITE_MACWLO_A, && case_sem_INSN_WRITE_MACWLO_A },
226 { M32RXF_INSN_PAR_MUL, && case_sem_INSN_PAR_MUL },
227 { M32RXF_INSN_WRITE_MUL, && case_sem_INSN_WRITE_MUL },
228 { M32RXF_INSN_PAR_MULHI_A, && case_sem_INSN_PAR_MULHI_A },
229 { M32RXF_INSN_WRITE_MULHI_A, && case_sem_INSN_WRITE_MULHI_A },
230 { M32RXF_INSN_PAR_MULLO_A, && case_sem_INSN_PAR_MULLO_A },
231 { M32RXF_INSN_WRITE_MULLO_A, && case_sem_INSN_WRITE_MULLO_A },
232 { M32RXF_INSN_PAR_MULWHI_A, && case_sem_INSN_PAR_MULWHI_A },
233 { M32RXF_INSN_WRITE_MULWHI_A, && case_sem_INSN_WRITE_MULWHI_A },
234 { M32RXF_INSN_PAR_MULWLO_A, && case_sem_INSN_PAR_MULWLO_A },
235 { M32RXF_INSN_WRITE_MULWLO_A, && case_sem_INSN_WRITE_MULWLO_A },
236 { M32RXF_INSN_PAR_MV, && case_sem_INSN_PAR_MV },
237 { M32RXF_INSN_WRITE_MV, && case_sem_INSN_WRITE_MV },
238 { M32RXF_INSN_PAR_MVFACHI_A, && case_sem_INSN_PAR_MVFACHI_A },
239 { M32RXF_INSN_WRITE_MVFACHI_A, && case_sem_INSN_WRITE_MVFACHI_A },
240 { M32RXF_INSN_PAR_MVFACLO_A, && case_sem_INSN_PAR_MVFACLO_A },
241 { M32RXF_INSN_WRITE_MVFACLO_A, && case_sem_INSN_WRITE_MVFACLO_A },
242 { M32RXF_INSN_PAR_MVFACMI_A, && case_sem_INSN_PAR_MVFACMI_A },
243 { M32RXF_INSN_WRITE_MVFACMI_A, && case_sem_INSN_WRITE_MVFACMI_A },
244 { M32RXF_INSN_PAR_MVFC, && case_sem_INSN_PAR_MVFC },
245 { M32RXF_INSN_WRITE_MVFC, && case_sem_INSN_WRITE_MVFC },
246 { M32RXF_INSN_PAR_MVTACHI_A, && case_sem_INSN_PAR_MVTACHI_A },
247 { M32RXF_INSN_WRITE_MVTACHI_A, && case_sem_INSN_WRITE_MVTACHI_A },
248 { M32RXF_INSN_PAR_MVTACLO_A, && case_sem_INSN_PAR_MVTACLO_A },
249 { M32RXF_INSN_WRITE_MVTACLO_A, && case_sem_INSN_WRITE_MVTACLO_A },
250 { M32RXF_INSN_PAR_MVTC, && case_sem_INSN_PAR_MVTC },
251 { M32RXF_INSN_WRITE_MVTC, && case_sem_INSN_WRITE_MVTC },
252 { M32RXF_INSN_PAR_NEG, && case_sem_INSN_PAR_NEG },
253 { M32RXF_INSN_WRITE_NEG, && case_sem_INSN_WRITE_NEG },
254 { M32RXF_INSN_PAR_NOP, && case_sem_INSN_PAR_NOP },
255 { M32RXF_INSN_WRITE_NOP, && case_sem_INSN_WRITE_NOP },
256 { M32RXF_INSN_PAR_NOT, && case_sem_INSN_PAR_NOT },
257 { M32RXF_INSN_WRITE_NOT, && case_sem_INSN_WRITE_NOT },
258 { M32RXF_INSN_PAR_RAC_DSI, && case_sem_INSN_PAR_RAC_DSI },
259 { M32RXF_INSN_WRITE_RAC_DSI, && case_sem_INSN_WRITE_RAC_DSI },
260 { M32RXF_INSN_PAR_RACH_DSI, && case_sem_INSN_PAR_RACH_DSI },
261 { M32RXF_INSN_WRITE_RACH_DSI, && case_sem_INSN_WRITE_RACH_DSI },
262 { M32RXF_INSN_PAR_RTE, && case_sem_INSN_PAR_RTE },
263 { M32RXF_INSN_WRITE_RTE, && case_sem_INSN_WRITE_RTE },
264 { M32RXF_INSN_PAR_SLL, && case_sem_INSN_PAR_SLL },
265 { M32RXF_INSN_WRITE_SLL, && case_sem_INSN_WRITE_SLL },
266 { M32RXF_INSN_PAR_SLLI, && case_sem_INSN_PAR_SLLI },
267 { M32RXF_INSN_WRITE_SLLI, && case_sem_INSN_WRITE_SLLI },
268 { M32RXF_INSN_PAR_SRA, && case_sem_INSN_PAR_SRA },
269 { M32RXF_INSN_WRITE_SRA, && case_sem_INSN_WRITE_SRA },
270 { M32RXF_INSN_PAR_SRAI, && case_sem_INSN_PAR_SRAI },
271 { M32RXF_INSN_WRITE_SRAI, && case_sem_INSN_WRITE_SRAI },
272 { M32RXF_INSN_PAR_SRL, && case_sem_INSN_PAR_SRL },
273 { M32RXF_INSN_WRITE_SRL, && case_sem_INSN_WRITE_SRL },
274 { M32RXF_INSN_PAR_SRLI, && case_sem_INSN_PAR_SRLI },
275 { M32RXF_INSN_WRITE_SRLI, && case_sem_INSN_WRITE_SRLI },
276 { M32RXF_INSN_PAR_ST, && case_sem_INSN_PAR_ST },
277 { M32RXF_INSN_WRITE_ST, && case_sem_INSN_WRITE_ST },
278 { M32RXF_INSN_PAR_STB, && case_sem_INSN_PAR_STB },
279 { M32RXF_INSN_WRITE_STB, && case_sem_INSN_WRITE_STB },
280 { M32RXF_INSN_PAR_STH, && case_sem_INSN_PAR_STH },
281 { M32RXF_INSN_WRITE_STH, && case_sem_INSN_WRITE_STH },
282 { M32RXF_INSN_PAR_ST_PLUS, && case_sem_INSN_PAR_ST_PLUS },
283 { M32RXF_INSN_WRITE_ST_PLUS, && case_sem_INSN_WRITE_ST_PLUS },
284 { M32RXF_INSN_PAR_ST_MINUS, && case_sem_INSN_PAR_ST_MINUS },
285 { M32RXF_INSN_WRITE_ST_MINUS, && case_sem_INSN_WRITE_ST_MINUS },
286 { M32RXF_INSN_PAR_SUB, && case_sem_INSN_PAR_SUB },
287 { M32RXF_INSN_WRITE_SUB, && case_sem_INSN_WRITE_SUB },
288 { M32RXF_INSN_PAR_SUBV, && case_sem_INSN_PAR_SUBV },
289 { M32RXF_INSN_WRITE_SUBV, && case_sem_INSN_WRITE_SUBV },
290 { M32RXF_INSN_PAR_SUBX, && case_sem_INSN_PAR_SUBX },
291 { M32RXF_INSN_WRITE_SUBX, && case_sem_INSN_WRITE_SUBX },
292 { M32RXF_INSN_PAR_TRAP, && case_sem_INSN_PAR_TRAP },
293 { M32RXF_INSN_WRITE_TRAP, && case_sem_INSN_WRITE_TRAP },
294 { M32RXF_INSN_PAR_UNLOCK, && case_sem_INSN_PAR_UNLOCK },
295 { M32RXF_INSN_WRITE_UNLOCK, && case_sem_INSN_WRITE_UNLOCK },
296 { M32RXF_INSN_PAR_PCMPBZ, && case_sem_INSN_PAR_PCMPBZ },
297 { M32RXF_INSN_WRITE_PCMPBZ, && case_sem_INSN_WRITE_PCMPBZ },
298 { M32RXF_INSN_PAR_SADD, && case_sem_INSN_PAR_SADD },
299 { M32RXF_INSN_WRITE_SADD, && case_sem_INSN_WRITE_SADD },
300 { M32RXF_INSN_PAR_MACWU1, && case_sem_INSN_PAR_MACWU1 },
301 { M32RXF_INSN_WRITE_MACWU1, && case_sem_INSN_WRITE_MACWU1 },
302 { M32RXF_INSN_PAR_MSBLO, && case_sem_INSN_PAR_MSBLO },
303 { M32RXF_INSN_WRITE_MSBLO, && case_sem_INSN_WRITE_MSBLO },
304 { M32RXF_INSN_PAR_MULWU1, && case_sem_INSN_PAR_MULWU1 },
305 { M32RXF_INSN_WRITE_MULWU1, && case_sem_INSN_WRITE_MULWU1 },
306 { M32RXF_INSN_PAR_MACLH1, && case_sem_INSN_PAR_MACLH1 },
307 { M32RXF_INSN_WRITE_MACLH1, && case_sem_INSN_WRITE_MACLH1 },
308 { M32RXF_INSN_PAR_SC, && case_sem_INSN_PAR_SC },
309 { M32RXF_INSN_WRITE_SC, && case_sem_INSN_WRITE_SC },
310 { M32RXF_INSN_PAR_SNC, && case_sem_INSN_PAR_SNC },
311 { M32RXF_INSN_WRITE_SNC, && case_sem_INSN_WRITE_SNC },
312 { 0, 0 }
313 };
314 int i;
315
316 for (i = 0; labels[i].label != 0; ++i)
317 {
318 #if FAST_P
319 CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label;
320 #else
321 CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label;
322 #endif
323 }
324
325 #undef DEFINE_LABELS
326 #endif /* DEFINE_LABELS */
327
328 #ifdef DEFINE_SWITCH
329
330 /* If hyper-fast [well not unnecessarily slow] execution is selected, turn
331 off frills like tracing and profiling. */
332 /* FIXME: A better way would be to have TRACE_RESULT check for something
333 that can cause it to be optimized out. Another way would be to emit
334 special handlers into the instruction "stream". */
335
336 #if FAST_P
337 #undef TRACE_RESULT
338 #define TRACE_RESULT(cpu, abuf, name, type, val)
339 #endif
340
341 #undef GET_ATTR
342 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
343 #define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr)
344 #else
345 #define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_/**/attr)
346 #endif
347
348 {
349
350 #if WITH_SCACHE_PBB
351
352 /* Branch to next handler without going around main loop. */
353 #define NEXT(vpc) goto * SEM_ARGBUF (vpc) -> semantic.sem_case
354 SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
355
356 #else /* ! WITH_SCACHE_PBB */
357
358 #define NEXT(vpc) BREAK (sem)
359 #ifdef __GNUC__
360 #if FAST_P
361 SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_fast_lab)
362 #else
363 SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_full_lab)
364 #endif
365 #else
366 SWITCH (sem, SEM_ARGBUF (sc) -> idesc->num)
367 #endif
368
369 #endif /* ! WITH_SCACHE_PBB */
370
371 {
372
373 CASE (sem, INSN_X_INVALID) : /* --invalid-- */
374 {
375 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
376 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
377 #define FLD(f) abuf->fields.fmt_empty.f
378 int UNUSED written = 0;
379 IADDR UNUSED pc = abuf->addr;
380 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
381
382 {
383 /* Update the recorded pc in the cpu state struct.
384 Only necessary for WITH_SCACHE case, but to avoid the
385 conditional compilation .... */
386 SET_H_PC (pc);
387 /* Virtual insns have zero size. Overwrite vpc with address of next insn
388 using the default-insn-bitsize spec. When executing insns in parallel
389 we may want to queue the fault and continue execution. */
390 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
391 vpc = sim_engine_invalid_insn (current_cpu, pc, vpc);
392 }
393
394 #undef FLD
395 }
396 NEXT (vpc);
397
398 CASE (sem, INSN_X_AFTER) : /* --after-- */
399 {
400 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
401 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
402 #define FLD(f) abuf->fields.fmt_empty.f
403 int UNUSED written = 0;
404 IADDR UNUSED pc = abuf->addr;
405 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
406
407 {
408 #if WITH_SCACHE_PBB_M32RXF
409 m32rxf_pbb_after (current_cpu, sem_arg);
410 #endif
411 }
412
413 #undef FLD
414 }
415 NEXT (vpc);
416
417 CASE (sem, INSN_X_BEFORE) : /* --before-- */
418 {
419 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
420 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
421 #define FLD(f) abuf->fields.fmt_empty.f
422 int UNUSED written = 0;
423 IADDR UNUSED pc = abuf->addr;
424 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
425
426 {
427 #if WITH_SCACHE_PBB_M32RXF
428 m32rxf_pbb_before (current_cpu, sem_arg);
429 #endif
430 }
431
432 #undef FLD
433 }
434 NEXT (vpc);
435
436 CASE (sem, INSN_X_CTI_CHAIN) : /* --cti-chain-- */
437 {
438 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
439 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
440 #define FLD(f) abuf->fields.fmt_empty.f
441 int UNUSED written = 0;
442 IADDR UNUSED pc = abuf->addr;
443 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
444
445 {
446 #if WITH_SCACHE_PBB_M32RXF
447 #ifdef DEFINE_SWITCH
448 vpc = m32rxf_pbb_cti_chain (current_cpu, sem_arg,
449 pbb_br_type, pbb_br_npc);
450 BREAK (sem);
451 #else
452 /* FIXME: Allow provision of explicit ifmt spec in insn spec. */
453 vpc = m32rxf_pbb_cti_chain (current_cpu, sem_arg,
454 CPU_PBB_BR_TYPE (current_cpu),
455 CPU_PBB_BR_NPC (current_cpu));
456 #endif
457 #endif
458 }
459
460 #undef FLD
461 }
462 NEXT (vpc);
463
464 CASE (sem, INSN_X_CHAIN) : /* --chain-- */
465 {
466 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
467 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
468 #define FLD(f) abuf->fields.fmt_empty.f
469 int UNUSED written = 0;
470 IADDR UNUSED pc = abuf->addr;
471 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
472
473 {
474 #if WITH_SCACHE_PBB_M32RXF
475 vpc = m32rxf_pbb_chain (current_cpu, sem_arg);
476 #ifdef DEFINE_SWITCH
477 BREAK (sem);
478 #endif
479 #endif
480 }
481
482 #undef FLD
483 }
484 NEXT (vpc);
485
486 CASE (sem, INSN_X_BEGIN) : /* --begin-- */
487 {
488 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
489 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
490 #define FLD(f) abuf->fields.fmt_empty.f
491 int UNUSED written = 0;
492 IADDR UNUSED pc = abuf->addr;
493 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
494
495 {
496 #if WITH_SCACHE_PBB_M32RXF
497 #if defined DEFINE_SWITCH || defined FAST_P
498 /* In the switch case FAST_P is a constant, allowing several optimizations
499 in any called inline functions. */
500 vpc = m32rxf_pbb_begin (current_cpu, FAST_P);
501 #else
502 #if 0 /* cgen engine can't handle dynamic fast/full switching yet. */
503 vpc = m32rxf_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu)));
504 #else
505 vpc = m32rxf_pbb_begin (current_cpu, 0);
506 #endif
507 #endif
508 #endif
509 }
510
511 #undef FLD
512 }
513 NEXT (vpc);
514
515 CASE (sem, INSN_ADD) : /* add $dr,$sr */
516 {
517 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
518 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
519 #define FLD(f) abuf->fields.sfmt_add.f
520 int UNUSED written = 0;
521 IADDR UNUSED pc = abuf->addr;
522 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
523
524 {
525 SI opval = ADDSI (* FLD (i_dr), * FLD (i_sr));
526 * FLD (i_dr) = opval;
527 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
528 }
529
530 #undef FLD
531 }
532 NEXT (vpc);
533
534 CASE (sem, INSN_ADD3) : /* add3 $dr,$sr,$hash$slo16 */
535 {
536 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
537 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
538 #define FLD(f) abuf->fields.sfmt_add3.f
539 int UNUSED written = 0;
540 IADDR UNUSED pc = abuf->addr;
541 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
542
543 {
544 SI opval = ADDSI (* FLD (i_sr), FLD (f_simm16));
545 * FLD (i_dr) = opval;
546 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
547 }
548
549 #undef FLD
550 }
551 NEXT (vpc);
552
553 CASE (sem, INSN_AND) : /* and $dr,$sr */
554 {
555 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
556 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
557 #define FLD(f) abuf->fields.sfmt_add.f
558 int UNUSED written = 0;
559 IADDR UNUSED pc = abuf->addr;
560 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
561
562 {
563 SI opval = ANDSI (* FLD (i_dr), * FLD (i_sr));
564 * FLD (i_dr) = opval;
565 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
566 }
567
568 #undef FLD
569 }
570 NEXT (vpc);
571
572 CASE (sem, INSN_AND3) : /* and3 $dr,$sr,$uimm16 */
573 {
574 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
575 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
576 #define FLD(f) abuf->fields.sfmt_and3.f
577 int UNUSED written = 0;
578 IADDR UNUSED pc = abuf->addr;
579 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
580
581 {
582 SI opval = ANDSI (* FLD (i_sr), FLD (f_uimm16));
583 * FLD (i_dr) = opval;
584 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
585 }
586
587 #undef FLD
588 }
589 NEXT (vpc);
590
591 CASE (sem, INSN_OR) : /* or $dr,$sr */
592 {
593 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
594 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
595 #define FLD(f) abuf->fields.sfmt_add.f
596 int UNUSED written = 0;
597 IADDR UNUSED pc = abuf->addr;
598 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
599
600 {
601 SI opval = ORSI (* FLD (i_dr), * FLD (i_sr));
602 * FLD (i_dr) = opval;
603 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
604 }
605
606 #undef FLD
607 }
608 NEXT (vpc);
609
610 CASE (sem, INSN_OR3) : /* or3 $dr,$sr,$hash$ulo16 */
611 {
612 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
613 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
614 #define FLD(f) abuf->fields.sfmt_and3.f
615 int UNUSED written = 0;
616 IADDR UNUSED pc = abuf->addr;
617 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
618
619 {
620 SI opval = ORSI (* FLD (i_sr), FLD (f_uimm16));
621 * FLD (i_dr) = opval;
622 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
623 }
624
625 #undef FLD
626 }
627 NEXT (vpc);
628
629 CASE (sem, INSN_XOR) : /* xor $dr,$sr */
630 {
631 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
632 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
633 #define FLD(f) abuf->fields.sfmt_add.f
634 int UNUSED written = 0;
635 IADDR UNUSED pc = abuf->addr;
636 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
637
638 {
639 SI opval = XORSI (* FLD (i_dr), * FLD (i_sr));
640 * FLD (i_dr) = opval;
641 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
642 }
643
644 #undef FLD
645 }
646 NEXT (vpc);
647
648 CASE (sem, INSN_XOR3) : /* xor3 $dr,$sr,$uimm16 */
649 {
650 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
651 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
652 #define FLD(f) abuf->fields.sfmt_and3.f
653 int UNUSED written = 0;
654 IADDR UNUSED pc = abuf->addr;
655 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
656
657 {
658 SI opval = XORSI (* FLD (i_sr), FLD (f_uimm16));
659 * FLD (i_dr) = opval;
660 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
661 }
662
663 #undef FLD
664 }
665 NEXT (vpc);
666
667 CASE (sem, INSN_ADDI) : /* addi $dr,$simm8 */
668 {
669 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
670 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
671 #define FLD(f) abuf->fields.sfmt_addi.f
672 int UNUSED written = 0;
673 IADDR UNUSED pc = abuf->addr;
674 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
675
676 {
677 SI opval = ADDSI (* FLD (i_dr), FLD (f_simm8));
678 * FLD (i_dr) = opval;
679 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
680 }
681
682 #undef FLD
683 }
684 NEXT (vpc);
685
686 CASE (sem, INSN_ADDV) : /* addv $dr,$sr */
687 {
688 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
689 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
690 #define FLD(f) abuf->fields.sfmt_add.f
691 int UNUSED written = 0;
692 IADDR UNUSED pc = abuf->addr;
693 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
694
695 {
696 SI temp0;BI temp1;
697 temp0 = ADDSI (* FLD (i_dr), * FLD (i_sr));
698 temp1 = ADDOFSI (* FLD (i_dr), * FLD (i_sr), 0);
699 {
700 SI opval = temp0;
701 * FLD (i_dr) = opval;
702 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
703 }
704 {
705 BI opval = temp1;
706 CPU (h_cond) = opval;
707 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
708 }
709 }
710
711 #undef FLD
712 }
713 NEXT (vpc);
714
715 CASE (sem, INSN_ADDV3) : /* addv3 $dr,$sr,$simm16 */
716 {
717 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
718 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
719 #define FLD(f) abuf->fields.sfmt_add3.f
720 int UNUSED written = 0;
721 IADDR UNUSED pc = abuf->addr;
722 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
723
724 {
725 SI temp0;BI temp1;
726 temp0 = ADDSI (* FLD (i_sr), FLD (f_simm16));
727 temp1 = ADDOFSI (* FLD (i_sr), FLD (f_simm16), 0);
728 {
729 SI opval = temp0;
730 * FLD (i_dr) = opval;
731 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
732 }
733 {
734 BI opval = temp1;
735 CPU (h_cond) = opval;
736 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
737 }
738 }
739
740 #undef FLD
741 }
742 NEXT (vpc);
743
744 CASE (sem, INSN_ADDX) : /* addx $dr,$sr */
745 {
746 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
747 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
748 #define FLD(f) abuf->fields.sfmt_add.f
749 int UNUSED written = 0;
750 IADDR UNUSED pc = abuf->addr;
751 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
752
753 {
754 SI temp0;BI temp1;
755 temp0 = ADDCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
756 temp1 = ADDCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
757 {
758 SI opval = temp0;
759 * FLD (i_dr) = opval;
760 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
761 }
762 {
763 BI opval = temp1;
764 CPU (h_cond) = opval;
765 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
766 }
767 }
768
769 #undef FLD
770 }
771 NEXT (vpc);
772
773 CASE (sem, INSN_BC8) : /* bc.s $disp8 */
774 {
775 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
776 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
777 #define FLD(f) abuf->fields.sfmt_bl8.f
778 int UNUSED written = 0;
779 IADDR UNUSED pc = abuf->addr;
780 SEM_BRANCH_INIT
781 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
782
783 if (CPU (h_cond)) {
784 {
785 USI opval = FLD (i_disp8);
786 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
787 written |= (1 << 2);
788 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
789 }
790 }
791
792 abuf->written = written;
793 SEM_BRANCH_FINI (vpc);
794 #undef FLD
795 }
796 NEXT (vpc);
797
798 CASE (sem, INSN_BC24) : /* bc.l $disp24 */
799 {
800 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
801 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
802 #define FLD(f) abuf->fields.sfmt_bl24.f
803 int UNUSED written = 0;
804 IADDR UNUSED pc = abuf->addr;
805 SEM_BRANCH_INIT
806 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
807
808 if (CPU (h_cond)) {
809 {
810 USI opval = FLD (i_disp24);
811 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
812 written |= (1 << 2);
813 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
814 }
815 }
816
817 abuf->written = written;
818 SEM_BRANCH_FINI (vpc);
819 #undef FLD
820 }
821 NEXT (vpc);
822
823 CASE (sem, INSN_BEQ) : /* beq $src1,$src2,$disp16 */
824 {
825 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
826 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
827 #define FLD(f) abuf->fields.sfmt_beq.f
828 int UNUSED written = 0;
829 IADDR UNUSED pc = abuf->addr;
830 SEM_BRANCH_INIT
831 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
832
833 if (EQSI (* FLD (i_src1), * FLD (i_src2))) {
834 {
835 USI opval = FLD (i_disp16);
836 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
837 written |= (1 << 3);
838 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
839 }
840 }
841
842 abuf->written = written;
843 SEM_BRANCH_FINI (vpc);
844 #undef FLD
845 }
846 NEXT (vpc);
847
848 CASE (sem, INSN_BEQZ) : /* beqz $src2,$disp16 */
849 {
850 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
851 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
852 #define FLD(f) abuf->fields.sfmt_beq.f
853 int UNUSED written = 0;
854 IADDR UNUSED pc = abuf->addr;
855 SEM_BRANCH_INIT
856 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
857
858 if (EQSI (* FLD (i_src2), 0)) {
859 {
860 USI opval = FLD (i_disp16);
861 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
862 written |= (1 << 2);
863 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
864 }
865 }
866
867 abuf->written = written;
868 SEM_BRANCH_FINI (vpc);
869 #undef FLD
870 }
871 NEXT (vpc);
872
873 CASE (sem, INSN_BGEZ) : /* bgez $src2,$disp16 */
874 {
875 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
876 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
877 #define FLD(f) abuf->fields.sfmt_beq.f
878 int UNUSED written = 0;
879 IADDR UNUSED pc = abuf->addr;
880 SEM_BRANCH_INIT
881 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
882
883 if (GESI (* FLD (i_src2), 0)) {
884 {
885 USI opval = FLD (i_disp16);
886 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
887 written |= (1 << 2);
888 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
889 }
890 }
891
892 abuf->written = written;
893 SEM_BRANCH_FINI (vpc);
894 #undef FLD
895 }
896 NEXT (vpc);
897
898 CASE (sem, INSN_BGTZ) : /* bgtz $src2,$disp16 */
899 {
900 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
901 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
902 #define FLD(f) abuf->fields.sfmt_beq.f
903 int UNUSED written = 0;
904 IADDR UNUSED pc = abuf->addr;
905 SEM_BRANCH_INIT
906 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
907
908 if (GTSI (* FLD (i_src2), 0)) {
909 {
910 USI opval = FLD (i_disp16);
911 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
912 written |= (1 << 2);
913 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
914 }
915 }
916
917 abuf->written = written;
918 SEM_BRANCH_FINI (vpc);
919 #undef FLD
920 }
921 NEXT (vpc);
922
923 CASE (sem, INSN_BLEZ) : /* blez $src2,$disp16 */
924 {
925 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
926 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
927 #define FLD(f) abuf->fields.sfmt_beq.f
928 int UNUSED written = 0;
929 IADDR UNUSED pc = abuf->addr;
930 SEM_BRANCH_INIT
931 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
932
933 if (LESI (* FLD (i_src2), 0)) {
934 {
935 USI opval = FLD (i_disp16);
936 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
937 written |= (1 << 2);
938 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
939 }
940 }
941
942 abuf->written = written;
943 SEM_BRANCH_FINI (vpc);
944 #undef FLD
945 }
946 NEXT (vpc);
947
948 CASE (sem, INSN_BLTZ) : /* bltz $src2,$disp16 */
949 {
950 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
951 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
952 #define FLD(f) abuf->fields.sfmt_beq.f
953 int UNUSED written = 0;
954 IADDR UNUSED pc = abuf->addr;
955 SEM_BRANCH_INIT
956 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
957
958 if (LTSI (* FLD (i_src2), 0)) {
959 {
960 USI opval = FLD (i_disp16);
961 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
962 written |= (1 << 2);
963 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
964 }
965 }
966
967 abuf->written = written;
968 SEM_BRANCH_FINI (vpc);
969 #undef FLD
970 }
971 NEXT (vpc);
972
973 CASE (sem, INSN_BNEZ) : /* bnez $src2,$disp16 */
974 {
975 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
976 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
977 #define FLD(f) abuf->fields.sfmt_beq.f
978 int UNUSED written = 0;
979 IADDR UNUSED pc = abuf->addr;
980 SEM_BRANCH_INIT
981 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
982
983 if (NESI (* FLD (i_src2), 0)) {
984 {
985 USI opval = FLD (i_disp16);
986 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
987 written |= (1 << 2);
988 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
989 }
990 }
991
992 abuf->written = written;
993 SEM_BRANCH_FINI (vpc);
994 #undef FLD
995 }
996 NEXT (vpc);
997
998 CASE (sem, INSN_BL8) : /* bl.s $disp8 */
999 {
1000 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1001 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1002 #define FLD(f) abuf->fields.sfmt_bl8.f
1003 int UNUSED written = 0;
1004 IADDR UNUSED pc = abuf->addr;
1005 SEM_BRANCH_INIT
1006 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1007
1008 {
1009 {
1010 SI opval = ADDSI (ANDSI (pc, -4), 4);
1011 CPU (h_gr[((UINT) 14)]) = opval;
1012 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1013 }
1014 {
1015 USI opval = FLD (i_disp8);
1016 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1017 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1018 }
1019 }
1020
1021 SEM_BRANCH_FINI (vpc);
1022 #undef FLD
1023 }
1024 NEXT (vpc);
1025
1026 CASE (sem, INSN_BL24) : /* bl.l $disp24 */
1027 {
1028 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1029 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1030 #define FLD(f) abuf->fields.sfmt_bl24.f
1031 int UNUSED written = 0;
1032 IADDR UNUSED pc = abuf->addr;
1033 SEM_BRANCH_INIT
1034 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1035
1036 {
1037 {
1038 SI opval = ADDSI (pc, 4);
1039 CPU (h_gr[((UINT) 14)]) = opval;
1040 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1041 }
1042 {
1043 USI opval = FLD (i_disp24);
1044 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1045 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1046 }
1047 }
1048
1049 SEM_BRANCH_FINI (vpc);
1050 #undef FLD
1051 }
1052 NEXT (vpc);
1053
1054 CASE (sem, INSN_BCL8) : /* bcl.s $disp8 */
1055 {
1056 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1057 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1058 #define FLD(f) abuf->fields.sfmt_bl8.f
1059 int UNUSED written = 0;
1060 IADDR UNUSED pc = abuf->addr;
1061 SEM_BRANCH_INIT
1062 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1063
1064 if (CPU (h_cond)) {
1065 {
1066 {
1067 SI opval = ADDSI (ANDSI (pc, -4), 4);
1068 CPU (h_gr[((UINT) 14)]) = opval;
1069 written |= (1 << 3);
1070 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1071 }
1072 {
1073 USI opval = FLD (i_disp8);
1074 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1075 written |= (1 << 4);
1076 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1077 }
1078 }
1079 }
1080
1081 abuf->written = written;
1082 SEM_BRANCH_FINI (vpc);
1083 #undef FLD
1084 }
1085 NEXT (vpc);
1086
1087 CASE (sem, INSN_BCL24) : /* bcl.l $disp24 */
1088 {
1089 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1090 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1091 #define FLD(f) abuf->fields.sfmt_bl24.f
1092 int UNUSED written = 0;
1093 IADDR UNUSED pc = abuf->addr;
1094 SEM_BRANCH_INIT
1095 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1096
1097 if (CPU (h_cond)) {
1098 {
1099 {
1100 SI opval = ADDSI (pc, 4);
1101 CPU (h_gr[((UINT) 14)]) = opval;
1102 written |= (1 << 3);
1103 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1104 }
1105 {
1106 USI opval = FLD (i_disp24);
1107 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1108 written |= (1 << 4);
1109 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1110 }
1111 }
1112 }
1113
1114 abuf->written = written;
1115 SEM_BRANCH_FINI (vpc);
1116 #undef FLD
1117 }
1118 NEXT (vpc);
1119
1120 CASE (sem, INSN_BNC8) : /* bnc.s $disp8 */
1121 {
1122 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1123 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1124 #define FLD(f) abuf->fields.sfmt_bl8.f
1125 int UNUSED written = 0;
1126 IADDR UNUSED pc = abuf->addr;
1127 SEM_BRANCH_INIT
1128 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1129
1130 if (NOTBI (CPU (h_cond))) {
1131 {
1132 USI opval = FLD (i_disp8);
1133 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1134 written |= (1 << 2);
1135 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1136 }
1137 }
1138
1139 abuf->written = written;
1140 SEM_BRANCH_FINI (vpc);
1141 #undef FLD
1142 }
1143 NEXT (vpc);
1144
1145 CASE (sem, INSN_BNC24) : /* bnc.l $disp24 */
1146 {
1147 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1148 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1149 #define FLD(f) abuf->fields.sfmt_bl24.f
1150 int UNUSED written = 0;
1151 IADDR UNUSED pc = abuf->addr;
1152 SEM_BRANCH_INIT
1153 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1154
1155 if (NOTBI (CPU (h_cond))) {
1156 {
1157 USI opval = FLD (i_disp24);
1158 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1159 written |= (1 << 2);
1160 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1161 }
1162 }
1163
1164 abuf->written = written;
1165 SEM_BRANCH_FINI (vpc);
1166 #undef FLD
1167 }
1168 NEXT (vpc);
1169
1170 CASE (sem, INSN_BNE) : /* bne $src1,$src2,$disp16 */
1171 {
1172 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1173 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1174 #define FLD(f) abuf->fields.sfmt_beq.f
1175 int UNUSED written = 0;
1176 IADDR UNUSED pc = abuf->addr;
1177 SEM_BRANCH_INIT
1178 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1179
1180 if (NESI (* FLD (i_src1), * FLD (i_src2))) {
1181 {
1182 USI opval = FLD (i_disp16);
1183 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1184 written |= (1 << 3);
1185 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1186 }
1187 }
1188
1189 abuf->written = written;
1190 SEM_BRANCH_FINI (vpc);
1191 #undef FLD
1192 }
1193 NEXT (vpc);
1194
1195 CASE (sem, INSN_BRA8) : /* bra.s $disp8 */
1196 {
1197 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1198 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1199 #define FLD(f) abuf->fields.sfmt_bl8.f
1200 int UNUSED written = 0;
1201 IADDR UNUSED pc = abuf->addr;
1202 SEM_BRANCH_INIT
1203 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1204
1205 {
1206 USI opval = FLD (i_disp8);
1207 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1208 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1209 }
1210
1211 SEM_BRANCH_FINI (vpc);
1212 #undef FLD
1213 }
1214 NEXT (vpc);
1215
1216 CASE (sem, INSN_BRA24) : /* bra.l $disp24 */
1217 {
1218 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1219 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1220 #define FLD(f) abuf->fields.sfmt_bl24.f
1221 int UNUSED written = 0;
1222 IADDR UNUSED pc = abuf->addr;
1223 SEM_BRANCH_INIT
1224 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1225
1226 {
1227 USI opval = FLD (i_disp24);
1228 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1229 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1230 }
1231
1232 SEM_BRANCH_FINI (vpc);
1233 #undef FLD
1234 }
1235 NEXT (vpc);
1236
1237 CASE (sem, INSN_BNCL8) : /* bncl.s $disp8 */
1238 {
1239 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1240 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1241 #define FLD(f) abuf->fields.sfmt_bl8.f
1242 int UNUSED written = 0;
1243 IADDR UNUSED pc = abuf->addr;
1244 SEM_BRANCH_INIT
1245 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1246
1247 if (NOTBI (CPU (h_cond))) {
1248 {
1249 {
1250 SI opval = ADDSI (ANDSI (pc, -4), 4);
1251 CPU (h_gr[((UINT) 14)]) = opval;
1252 written |= (1 << 3);
1253 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1254 }
1255 {
1256 USI opval = FLD (i_disp8);
1257 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1258 written |= (1 << 4);
1259 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1260 }
1261 }
1262 }
1263
1264 abuf->written = written;
1265 SEM_BRANCH_FINI (vpc);
1266 #undef FLD
1267 }
1268 NEXT (vpc);
1269
1270 CASE (sem, INSN_BNCL24) : /* bncl.l $disp24 */
1271 {
1272 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1273 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1274 #define FLD(f) abuf->fields.sfmt_bl24.f
1275 int UNUSED written = 0;
1276 IADDR UNUSED pc = abuf->addr;
1277 SEM_BRANCH_INIT
1278 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1279
1280 if (NOTBI (CPU (h_cond))) {
1281 {
1282 {
1283 SI opval = ADDSI (pc, 4);
1284 CPU (h_gr[((UINT) 14)]) = opval;
1285 written |= (1 << 3);
1286 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1287 }
1288 {
1289 USI opval = FLD (i_disp24);
1290 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1291 written |= (1 << 4);
1292 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1293 }
1294 }
1295 }
1296
1297 abuf->written = written;
1298 SEM_BRANCH_FINI (vpc);
1299 #undef FLD
1300 }
1301 NEXT (vpc);
1302
1303 CASE (sem, INSN_CMP) : /* cmp $src1,$src2 */
1304 {
1305 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1306 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1307 #define FLD(f) abuf->fields.sfmt_st_plus.f
1308 int UNUSED written = 0;
1309 IADDR UNUSED pc = abuf->addr;
1310 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1311
1312 {
1313 BI opval = LTSI (* FLD (i_src1), * FLD (i_src2));
1314 CPU (h_cond) = opval;
1315 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
1316 }
1317
1318 #undef FLD
1319 }
1320 NEXT (vpc);
1321
1322 CASE (sem, INSN_CMPI) : /* cmpi $src2,$simm16 */
1323 {
1324 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1325 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1326 #define FLD(f) abuf->fields.sfmt_st_d.f
1327 int UNUSED written = 0;
1328 IADDR UNUSED pc = abuf->addr;
1329 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1330
1331 {
1332 BI opval = LTSI (* FLD (i_src2), FLD (f_simm16));
1333 CPU (h_cond) = opval;
1334 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
1335 }
1336
1337 #undef FLD
1338 }
1339 NEXT (vpc);
1340
1341 CASE (sem, INSN_CMPU) : /* cmpu $src1,$src2 */
1342 {
1343 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1344 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1345 #define FLD(f) abuf->fields.sfmt_st_plus.f
1346 int UNUSED written = 0;
1347 IADDR UNUSED pc = abuf->addr;
1348 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1349
1350 {
1351 BI opval = LTUSI (* FLD (i_src1), * FLD (i_src2));
1352 CPU (h_cond) = opval;
1353 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
1354 }
1355
1356 #undef FLD
1357 }
1358 NEXT (vpc);
1359
1360 CASE (sem, INSN_CMPUI) : /* cmpui $src2,$simm16 */
1361 {
1362 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1363 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1364 #define FLD(f) abuf->fields.sfmt_st_d.f
1365 int UNUSED written = 0;
1366 IADDR UNUSED pc = abuf->addr;
1367 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1368
1369 {
1370 BI opval = LTUSI (* FLD (i_src2), FLD (f_simm16));
1371 CPU (h_cond) = opval;
1372 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
1373 }
1374
1375 #undef FLD
1376 }
1377 NEXT (vpc);
1378
1379 CASE (sem, INSN_CMPEQ) : /* cmpeq $src1,$src2 */
1380 {
1381 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1382 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1383 #define FLD(f) abuf->fields.sfmt_st_plus.f
1384 int UNUSED written = 0;
1385 IADDR UNUSED pc = abuf->addr;
1386 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1387
1388 {
1389 BI opval = EQSI (* FLD (i_src1), * FLD (i_src2));
1390 CPU (h_cond) = opval;
1391 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
1392 }
1393
1394 #undef FLD
1395 }
1396 NEXT (vpc);
1397
1398 CASE (sem, INSN_CMPZ) : /* cmpz $src2 */
1399 {
1400 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1401 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1402 #define FLD(f) abuf->fields.sfmt_st_plus.f
1403 int UNUSED written = 0;
1404 IADDR UNUSED pc = abuf->addr;
1405 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1406
1407 {
1408 BI opval = EQSI (* FLD (i_src2), 0);
1409 CPU (h_cond) = opval;
1410 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
1411 }
1412
1413 #undef FLD
1414 }
1415 NEXT (vpc);
1416
1417 CASE (sem, INSN_DIV) : /* div $dr,$sr */
1418 {
1419 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1420 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1421 #define FLD(f) abuf->fields.sfmt_add.f
1422 int UNUSED written = 0;
1423 IADDR UNUSED pc = abuf->addr;
1424 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1425
1426 if (NESI (* FLD (i_sr), 0)) {
1427 {
1428 SI opval = DIVSI (* FLD (i_dr), * FLD (i_sr));
1429 * FLD (i_dr) = opval;
1430 written |= (1 << 2);
1431 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1432 }
1433 }
1434
1435 abuf->written = written;
1436 #undef FLD
1437 }
1438 NEXT (vpc);
1439
1440 CASE (sem, INSN_DIVU) : /* divu $dr,$sr */
1441 {
1442 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1443 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1444 #define FLD(f) abuf->fields.sfmt_add.f
1445 int UNUSED written = 0;
1446 IADDR UNUSED pc = abuf->addr;
1447 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1448
1449 if (NESI (* FLD (i_sr), 0)) {
1450 {
1451 SI opval = UDIVSI (* FLD (i_dr), * FLD (i_sr));
1452 * FLD (i_dr) = opval;
1453 written |= (1 << 2);
1454 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1455 }
1456 }
1457
1458 abuf->written = written;
1459 #undef FLD
1460 }
1461 NEXT (vpc);
1462
1463 CASE (sem, INSN_REM) : /* rem $dr,$sr */
1464 {
1465 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1466 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1467 #define FLD(f) abuf->fields.sfmt_add.f
1468 int UNUSED written = 0;
1469 IADDR UNUSED pc = abuf->addr;
1470 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1471
1472 if (NESI (* FLD (i_sr), 0)) {
1473 {
1474 SI opval = MODSI (* FLD (i_dr), * FLD (i_sr));
1475 * FLD (i_dr) = opval;
1476 written |= (1 << 2);
1477 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1478 }
1479 }
1480
1481 abuf->written = written;
1482 #undef FLD
1483 }
1484 NEXT (vpc);
1485
1486 CASE (sem, INSN_REMU) : /* remu $dr,$sr */
1487 {
1488 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1489 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1490 #define FLD(f) abuf->fields.sfmt_add.f
1491 int UNUSED written = 0;
1492 IADDR UNUSED pc = abuf->addr;
1493 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1494
1495 if (NESI (* FLD (i_sr), 0)) {
1496 {
1497 SI opval = UMODSI (* FLD (i_dr), * FLD (i_sr));
1498 * FLD (i_dr) = opval;
1499 written |= (1 << 2);
1500 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1501 }
1502 }
1503
1504 abuf->written = written;
1505 #undef FLD
1506 }
1507 NEXT (vpc);
1508
1509 CASE (sem, INSN_DIVH) : /* divh $dr,$sr */
1510 {
1511 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1512 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1513 #define FLD(f) abuf->fields.sfmt_add.f
1514 int UNUSED written = 0;
1515 IADDR UNUSED pc = abuf->addr;
1516 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1517
1518 if (NESI (* FLD (i_sr), 0)) {
1519 {
1520 SI opval = DIVSI (EXTHISI (TRUNCSIHI (* FLD (i_dr))), * FLD (i_sr));
1521 * FLD (i_dr) = opval;
1522 written |= (1 << 2);
1523 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1524 }
1525 }
1526
1527 abuf->written = written;
1528 #undef FLD
1529 }
1530 NEXT (vpc);
1531
1532 CASE (sem, INSN_JC) : /* jc $sr */
1533 {
1534 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1535 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1536 #define FLD(f) abuf->fields.sfmt_jl.f
1537 int UNUSED written = 0;
1538 IADDR UNUSED pc = abuf->addr;
1539 SEM_BRANCH_INIT
1540 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1541
1542 if (CPU (h_cond)) {
1543 {
1544 USI opval = ANDSI (* FLD (i_sr), -4);
1545 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1546 written |= (1 << 2);
1547 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1548 }
1549 }
1550
1551 abuf->written = written;
1552 SEM_BRANCH_FINI (vpc);
1553 #undef FLD
1554 }
1555 NEXT (vpc);
1556
1557 CASE (sem, INSN_JNC) : /* jnc $sr */
1558 {
1559 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1560 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1561 #define FLD(f) abuf->fields.sfmt_jl.f
1562 int UNUSED written = 0;
1563 IADDR UNUSED pc = abuf->addr;
1564 SEM_BRANCH_INIT
1565 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1566
1567 if (NOTBI (CPU (h_cond))) {
1568 {
1569 USI opval = ANDSI (* FLD (i_sr), -4);
1570 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1571 written |= (1 << 2);
1572 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1573 }
1574 }
1575
1576 abuf->written = written;
1577 SEM_BRANCH_FINI (vpc);
1578 #undef FLD
1579 }
1580 NEXT (vpc);
1581
1582 CASE (sem, INSN_JL) : /* jl $sr */
1583 {
1584 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1585 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1586 #define FLD(f) abuf->fields.sfmt_jl.f
1587 int UNUSED written = 0;
1588 IADDR UNUSED pc = abuf->addr;
1589 SEM_BRANCH_INIT
1590 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1591
1592 {
1593 SI temp0;USI temp1;
1594 temp0 = ADDSI (ANDSI (pc, -4), 4);
1595 temp1 = ANDSI (* FLD (i_sr), -4);
1596 {
1597 SI opval = temp0;
1598 CPU (h_gr[((UINT) 14)]) = opval;
1599 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1600 }
1601 {
1602 USI opval = temp1;
1603 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1604 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1605 }
1606 }
1607
1608 SEM_BRANCH_FINI (vpc);
1609 #undef FLD
1610 }
1611 NEXT (vpc);
1612
1613 CASE (sem, INSN_JMP) : /* jmp $sr */
1614 {
1615 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1616 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1617 #define FLD(f) abuf->fields.sfmt_jl.f
1618 int UNUSED written = 0;
1619 IADDR UNUSED pc = abuf->addr;
1620 SEM_BRANCH_INIT
1621 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1622
1623 {
1624 USI opval = ANDSI (* FLD (i_sr), -4);
1625 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1626 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1627 }
1628
1629 SEM_BRANCH_FINI (vpc);
1630 #undef FLD
1631 }
1632 NEXT (vpc);
1633
1634 CASE (sem, INSN_LD) : /* ld $dr,@$sr */
1635 {
1636 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1637 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1638 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1639 int UNUSED written = 0;
1640 IADDR UNUSED pc = abuf->addr;
1641 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1642
1643 {
1644 SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
1645 * FLD (i_dr) = opval;
1646 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1647 }
1648
1649 #undef FLD
1650 }
1651 NEXT (vpc);
1652
1653 CASE (sem, INSN_LD_D) : /* ld $dr,@($slo16,$sr) */
1654 {
1655 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1656 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1657 #define FLD(f) abuf->fields.sfmt_add3.f
1658 int UNUSED written = 0;
1659 IADDR UNUSED pc = abuf->addr;
1660 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1661
1662 {
1663 SI opval = GETMEMSI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)));
1664 * FLD (i_dr) = opval;
1665 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1666 }
1667
1668 #undef FLD
1669 }
1670 NEXT (vpc);
1671
1672 CASE (sem, INSN_LDB) : /* ldb $dr,@$sr */
1673 {
1674 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1675 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1676 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1677 int UNUSED written = 0;
1678 IADDR UNUSED pc = abuf->addr;
1679 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1680
1681 {
1682 SI opval = EXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
1683 * FLD (i_dr) = opval;
1684 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1685 }
1686
1687 #undef FLD
1688 }
1689 NEXT (vpc);
1690
1691 CASE (sem, INSN_LDB_D) : /* ldb $dr,@($slo16,$sr) */
1692 {
1693 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1694 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1695 #define FLD(f) abuf->fields.sfmt_add3.f
1696 int UNUSED written = 0;
1697 IADDR UNUSED pc = abuf->addr;
1698 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1699
1700 {
1701 SI opval = EXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1702 * FLD (i_dr) = opval;
1703 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1704 }
1705
1706 #undef FLD
1707 }
1708 NEXT (vpc);
1709
1710 CASE (sem, INSN_LDH) : /* ldh $dr,@$sr */
1711 {
1712 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1713 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1714 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1715 int UNUSED written = 0;
1716 IADDR UNUSED pc = abuf->addr;
1717 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1718
1719 {
1720 SI opval = EXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
1721 * FLD (i_dr) = opval;
1722 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1723 }
1724
1725 #undef FLD
1726 }
1727 NEXT (vpc);
1728
1729 CASE (sem, INSN_LDH_D) : /* ldh $dr,@($slo16,$sr) */
1730 {
1731 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1732 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1733 #define FLD(f) abuf->fields.sfmt_add3.f
1734 int UNUSED written = 0;
1735 IADDR UNUSED pc = abuf->addr;
1736 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1737
1738 {
1739 SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1740 * FLD (i_dr) = opval;
1741 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1742 }
1743
1744 #undef FLD
1745 }
1746 NEXT (vpc);
1747
1748 CASE (sem, INSN_LDUB) : /* ldub $dr,@$sr */
1749 {
1750 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1751 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1752 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1753 int UNUSED written = 0;
1754 IADDR UNUSED pc = abuf->addr;
1755 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1756
1757 {
1758 SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
1759 * FLD (i_dr) = opval;
1760 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1761 }
1762
1763 #undef FLD
1764 }
1765 NEXT (vpc);
1766
1767 CASE (sem, INSN_LDUB_D) : /* ldub $dr,@($slo16,$sr) */
1768 {
1769 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1770 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1771 #define FLD(f) abuf->fields.sfmt_add3.f
1772 int UNUSED written = 0;
1773 IADDR UNUSED pc = abuf->addr;
1774 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1775
1776 {
1777 SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1778 * FLD (i_dr) = opval;
1779 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1780 }
1781
1782 #undef FLD
1783 }
1784 NEXT (vpc);
1785
1786 CASE (sem, INSN_LDUH) : /* lduh $dr,@$sr */
1787 {
1788 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1789 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1790 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1791 int UNUSED written = 0;
1792 IADDR UNUSED pc = abuf->addr;
1793 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1794
1795 {
1796 SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
1797 * FLD (i_dr) = opval;
1798 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1799 }
1800
1801 #undef FLD
1802 }
1803 NEXT (vpc);
1804
1805 CASE (sem, INSN_LDUH_D) : /* lduh $dr,@($slo16,$sr) */
1806 {
1807 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1808 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1809 #define FLD(f) abuf->fields.sfmt_add3.f
1810 int UNUSED written = 0;
1811 IADDR UNUSED pc = abuf->addr;
1812 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1813
1814 {
1815 SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1816 * FLD (i_dr) = opval;
1817 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1818 }
1819
1820 #undef FLD
1821 }
1822 NEXT (vpc);
1823
1824 CASE (sem, INSN_LD_PLUS) : /* ld $dr,@$sr+ */
1825 {
1826 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1827 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1828 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1829 int UNUSED written = 0;
1830 IADDR UNUSED pc = abuf->addr;
1831 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1832
1833 {
1834 SI temp0;SI temp1;
1835 temp0 = GETMEMSI (current_cpu, pc, * FLD (i_sr));
1836 temp1 = ADDSI (* FLD (i_sr), 4);
1837 {
1838 SI opval = temp0;
1839 * FLD (i_dr) = opval;
1840 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1841 }
1842 {
1843 SI opval = temp1;
1844 * FLD (i_sr) = opval;
1845 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1846 }
1847 }
1848
1849 #undef FLD
1850 }
1851 NEXT (vpc);
1852
1853 CASE (sem, INSN_LD24) : /* ld24 $dr,$uimm24 */
1854 {
1855 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1856 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1857 #define FLD(f) abuf->fields.sfmt_ld24.f
1858 int UNUSED written = 0;
1859 IADDR UNUSED pc = abuf->addr;
1860 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1861
1862 {
1863 SI opval = FLD (i_uimm24);
1864 * FLD (i_dr) = opval;
1865 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1866 }
1867
1868 #undef FLD
1869 }
1870 NEXT (vpc);
1871
1872 CASE (sem, INSN_LDI8) : /* ldi8 $dr,$simm8 */
1873 {
1874 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1875 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1876 #define FLD(f) abuf->fields.sfmt_addi.f
1877 int UNUSED written = 0;
1878 IADDR UNUSED pc = abuf->addr;
1879 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1880
1881 {
1882 SI opval = FLD (f_simm8);
1883 * FLD (i_dr) = opval;
1884 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1885 }
1886
1887 #undef FLD
1888 }
1889 NEXT (vpc);
1890
1891 CASE (sem, INSN_LDI16) : /* ldi16 $dr,$hash$slo16 */
1892 {
1893 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1894 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1895 #define FLD(f) abuf->fields.sfmt_add3.f
1896 int UNUSED written = 0;
1897 IADDR UNUSED pc = abuf->addr;
1898 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1899
1900 {
1901 SI opval = FLD (f_simm16);
1902 * FLD (i_dr) = opval;
1903 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1904 }
1905
1906 #undef FLD
1907 }
1908 NEXT (vpc);
1909
1910 CASE (sem, INSN_LOCK) : /* lock $dr,@$sr */
1911 {
1912 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1913 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1914 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1915 int UNUSED written = 0;
1916 IADDR UNUSED pc = abuf->addr;
1917 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1918
1919 {
1920 {
1921 BI opval = 1;
1922 CPU (h_lock) = opval;
1923 TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
1924 }
1925 {
1926 SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
1927 * FLD (i_dr) = opval;
1928 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1929 }
1930 }
1931
1932 #undef FLD
1933 }
1934 NEXT (vpc);
1935
1936 CASE (sem, INSN_MACHI_A) : /* machi $src1,$src2,$acc */
1937 {
1938 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1939 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1940 #define FLD(f) abuf->fields.sfmt_machi_a.f
1941 int UNUSED written = 0;
1942 IADDR UNUSED pc = abuf->addr;
1943 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1944
1945 {
1946 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8);
1947 SET_H_ACCUMS (FLD (f_acc), opval);
1948 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
1949 }
1950
1951 #undef FLD
1952 }
1953 NEXT (vpc);
1954
1955 CASE (sem, INSN_MACLO_A) : /* maclo $src1,$src2,$acc */
1956 {
1957 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1958 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1959 #define FLD(f) abuf->fields.sfmt_machi_a.f
1960 int UNUSED written = 0;
1961 IADDR UNUSED pc = abuf->addr;
1962 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1963
1964 {
1965 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8);
1966 SET_H_ACCUMS (FLD (f_acc), opval);
1967 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
1968 }
1969
1970 #undef FLD
1971 }
1972 NEXT (vpc);
1973
1974 CASE (sem, INSN_MACWHI_A) : /* macwhi $src1,$src2,$acc */
1975 {
1976 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1977 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1978 #define FLD(f) abuf->fields.sfmt_machi_a.f
1979 int UNUSED written = 0;
1980 IADDR UNUSED pc = abuf->addr;
1981 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1982
1983 {
1984 DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))));
1985 SET_H_ACCUMS (FLD (f_acc), opval);
1986 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
1987 }
1988
1989 #undef FLD
1990 }
1991 NEXT (vpc);
1992
1993 CASE (sem, INSN_MACWLO_A) : /* macwlo $src1,$src2,$acc */
1994 {
1995 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1996 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1997 #define FLD(f) abuf->fields.sfmt_machi_a.f
1998 int UNUSED written = 0;
1999 IADDR UNUSED pc = abuf->addr;
2000 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2001
2002 {
2003 DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))));
2004 SET_H_ACCUMS (FLD (f_acc), opval);
2005 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2006 }
2007
2008 #undef FLD
2009 }
2010 NEXT (vpc);
2011
2012 CASE (sem, INSN_MUL) : /* mul $dr,$sr */
2013 {
2014 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2015 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2016 #define FLD(f) abuf->fields.sfmt_add.f
2017 int UNUSED written = 0;
2018 IADDR UNUSED pc = abuf->addr;
2019 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2020
2021 {
2022 SI opval = MULSI (* FLD (i_dr), * FLD (i_sr));
2023 * FLD (i_dr) = opval;
2024 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2025 }
2026
2027 #undef FLD
2028 }
2029 NEXT (vpc);
2030
2031 CASE (sem, INSN_MULHI_A) : /* mulhi $src1,$src2,$acc */
2032 {
2033 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2034 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2035 #define FLD(f) abuf->fields.sfmt_machi_a.f
2036 int UNUSED written = 0;
2037 IADDR UNUSED pc = abuf->addr;
2038 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2039
2040 {
2041 DI opval = SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 16), 16);
2042 SET_H_ACCUMS (FLD (f_acc), opval);
2043 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2044 }
2045
2046 #undef FLD
2047 }
2048 NEXT (vpc);
2049
2050 CASE (sem, INSN_MULLO_A) : /* mullo $src1,$src2,$acc */
2051 {
2052 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2053 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2054 #define FLD(f) abuf->fields.sfmt_machi_a.f
2055 int UNUSED written = 0;
2056 IADDR UNUSED pc = abuf->addr;
2057 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2058
2059 {
2060 DI opval = SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 16), 16);
2061 SET_H_ACCUMS (FLD (f_acc), opval);
2062 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2063 }
2064
2065 #undef FLD
2066 }
2067 NEXT (vpc);
2068
2069 CASE (sem, INSN_MULWHI_A) : /* mulwhi $src1,$src2,$acc */
2070 {
2071 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2072 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2073 #define FLD(f) abuf->fields.sfmt_machi_a.f
2074 int UNUSED written = 0;
2075 IADDR UNUSED pc = abuf->addr;
2076 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2077
2078 {
2079 DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))));
2080 SET_H_ACCUMS (FLD (f_acc), opval);
2081 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2082 }
2083
2084 #undef FLD
2085 }
2086 NEXT (vpc);
2087
2088 CASE (sem, INSN_MULWLO_A) : /* mulwlo $src1,$src2,$acc */
2089 {
2090 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2091 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2092 #define FLD(f) abuf->fields.sfmt_machi_a.f
2093 int UNUSED written = 0;
2094 IADDR UNUSED pc = abuf->addr;
2095 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2096
2097 {
2098 DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))));
2099 SET_H_ACCUMS (FLD (f_acc), opval);
2100 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2101 }
2102
2103 #undef FLD
2104 }
2105 NEXT (vpc);
2106
2107 CASE (sem, INSN_MV) : /* mv $dr,$sr */
2108 {
2109 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2110 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2111 #define FLD(f) abuf->fields.sfmt_ld_plus.f
2112 int UNUSED written = 0;
2113 IADDR UNUSED pc = abuf->addr;
2114 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2115
2116 {
2117 SI opval = * FLD (i_sr);
2118 * FLD (i_dr) = opval;
2119 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2120 }
2121
2122 #undef FLD
2123 }
2124 NEXT (vpc);
2125
2126 CASE (sem, INSN_MVFACHI_A) : /* mvfachi $dr,$accs */
2127 {
2128 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2129 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2130 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
2131 int UNUSED written = 0;
2132 IADDR UNUSED pc = abuf->addr;
2133 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2134
2135 {
2136 SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 32));
2137 * FLD (i_dr) = opval;
2138 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2139 }
2140
2141 #undef FLD
2142 }
2143 NEXT (vpc);
2144
2145 CASE (sem, INSN_MVFACLO_A) : /* mvfaclo $dr,$accs */
2146 {
2147 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2148 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2149 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
2150 int UNUSED written = 0;
2151 IADDR UNUSED pc = abuf->addr;
2152 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2153
2154 {
2155 SI opval = TRUNCDISI (GET_H_ACCUMS (FLD (f_accs)));
2156 * FLD (i_dr) = opval;
2157 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2158 }
2159
2160 #undef FLD
2161 }
2162 NEXT (vpc);
2163
2164 CASE (sem, INSN_MVFACMI_A) : /* mvfacmi $dr,$accs */
2165 {
2166 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2167 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2168 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
2169 int UNUSED written = 0;
2170 IADDR UNUSED pc = abuf->addr;
2171 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2172
2173 {
2174 SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 16));
2175 * FLD (i_dr) = opval;
2176 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2177 }
2178
2179 #undef FLD
2180 }
2181 NEXT (vpc);
2182
2183 CASE (sem, INSN_MVFC) : /* mvfc $dr,$scr */
2184 {
2185 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2186 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2187 #define FLD(f) abuf->fields.sfmt_ld_plus.f
2188 int UNUSED written = 0;
2189 IADDR UNUSED pc = abuf->addr;
2190 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2191
2192 {
2193 SI opval = GET_H_CR (FLD (f_r2));
2194 * FLD (i_dr) = opval;
2195 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2196 }
2197
2198 #undef FLD
2199 }
2200 NEXT (vpc);
2201
2202 CASE (sem, INSN_MVTACHI_A) : /* mvtachi $src1,$accs */
2203 {
2204 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2205 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2206 #define FLD(f) abuf->fields.sfmt_mvtachi_a.f
2207 int UNUSED written = 0;
2208 IADDR UNUSED pc = abuf->addr;
2209 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2210
2211 {
2212 DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (* FLD (i_src1)), 32));
2213 SET_H_ACCUMS (FLD (f_accs), opval);
2214 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2215 }
2216
2217 #undef FLD
2218 }
2219 NEXT (vpc);
2220
2221 CASE (sem, INSN_MVTACLO_A) : /* mvtaclo $src1,$accs */
2222 {
2223 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2224 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2225 #define FLD(f) abuf->fields.sfmt_mvtachi_a.f
2226 int UNUSED written = 0;
2227 IADDR UNUSED pc = abuf->addr;
2228 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2229
2230 {
2231 DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0xffffffff, 0)), ZEXTSIDI (* FLD (i_src1)));
2232 SET_H_ACCUMS (FLD (f_accs), opval);
2233 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2234 }
2235
2236 #undef FLD
2237 }
2238 NEXT (vpc);
2239
2240 CASE (sem, INSN_MVTC) : /* mvtc $sr,$dcr */
2241 {
2242 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2243 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2244 #define FLD(f) abuf->fields.sfmt_ld_plus.f
2245 int UNUSED written = 0;
2246 IADDR UNUSED pc = abuf->addr;
2247 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2248
2249 {
2250 USI opval = * FLD (i_sr);
2251 SET_H_CR (FLD (f_r1), opval);
2252 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
2253 }
2254
2255 #undef FLD
2256 }
2257 NEXT (vpc);
2258
2259 CASE (sem, INSN_NEG) : /* neg $dr,$sr */
2260 {
2261 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2262 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2263 #define FLD(f) abuf->fields.sfmt_ld_plus.f
2264 int UNUSED written = 0;
2265 IADDR UNUSED pc = abuf->addr;
2266 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2267
2268 {
2269 SI opval = NEGSI (* FLD (i_sr));
2270 * FLD (i_dr) = opval;
2271 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2272 }
2273
2274 #undef FLD
2275 }
2276 NEXT (vpc);
2277
2278 CASE (sem, INSN_NOP) : /* nop */
2279 {
2280 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2281 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2282 #define FLD(f) abuf->fields.fmt_empty.f
2283 int UNUSED written = 0;
2284 IADDR UNUSED pc = abuf->addr;
2285 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2286
2287 PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr);
2288
2289 #undef FLD
2290 }
2291 NEXT (vpc);
2292
2293 CASE (sem, INSN_NOT) : /* not $dr,$sr */
2294 {
2295 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2296 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2297 #define FLD(f) abuf->fields.sfmt_ld_plus.f
2298 int UNUSED written = 0;
2299 IADDR UNUSED pc = abuf->addr;
2300 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2301
2302 {
2303 SI opval = INVSI (* FLD (i_sr));
2304 * FLD (i_dr) = opval;
2305 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2306 }
2307
2308 #undef FLD
2309 }
2310 NEXT (vpc);
2311
2312 CASE (sem, INSN_RAC_DSI) : /* rac $accd,$accs,$imm1 */
2313 {
2314 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2315 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2316 #define FLD(f) abuf->fields.sfmt_rac_dsi.f
2317 int UNUSED written = 0;
2318 IADDR UNUSED pc = abuf->addr;
2319 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2320
2321 {
2322 DI tmp_tmp1;
2323 tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1));
2324 tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 32768));
2325 {
2326 DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0xffff0000))) ? (MAKEDI (32767, 0xffff0000)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0xffff0000)));
2327 SET_H_ACCUMS (FLD (f_accd), opval);
2328 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2329 }
2330 }
2331
2332 #undef FLD
2333 }
2334 NEXT (vpc);
2335
2336 CASE (sem, INSN_RACH_DSI) : /* rach $accd,$accs,$imm1 */
2337 {
2338 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2339 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2340 #define FLD(f) abuf->fields.sfmt_rac_dsi.f
2341 int UNUSED written = 0;
2342 IADDR UNUSED pc = abuf->addr;
2343 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2344
2345 {
2346 DI tmp_tmp1;
2347 tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1));
2348 tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 0x80000000));
2349 {
2350 DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0))) ? (MAKEDI (32767, 0)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0)));
2351 SET_H_ACCUMS (FLD (f_accd), opval);
2352 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2353 }
2354 }
2355
2356 #undef FLD
2357 }
2358 NEXT (vpc);
2359
2360 CASE (sem, INSN_RTE) : /* rte */
2361 {
2362 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2363 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2364 #define FLD(f) abuf->fields.fmt_empty.f
2365 int UNUSED written = 0;
2366 IADDR UNUSED pc = abuf->addr;
2367 SEM_BRANCH_INIT
2368 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2369
2370 {
2371 {
2372 USI opval = ANDSI (GET_H_CR (((UINT) 6)), -4);
2373 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
2374 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
2375 }
2376 {
2377 USI opval = GET_H_CR (((UINT) 14));
2378 SET_H_CR (((UINT) 6), opval);
2379 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
2380 }
2381 {
2382 UQI opval = CPU (h_bpsw);
2383 SET_H_PSW (opval);
2384 TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
2385 }
2386 {
2387 UQI opval = CPU (h_bbpsw);
2388 CPU (h_bpsw) = opval;
2389 TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
2390 }
2391 }
2392
2393 SEM_BRANCH_FINI (vpc);
2394 #undef FLD
2395 }
2396 NEXT (vpc);
2397
2398 CASE (sem, INSN_SETH) : /* seth $dr,$hash$hi16 */
2399 {
2400 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2401 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2402 #define FLD(f) abuf->fields.sfmt_seth.f
2403 int UNUSED written = 0;
2404 IADDR UNUSED pc = abuf->addr;
2405 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2406
2407 {
2408 SI opval = SLLSI (FLD (f_hi16), 16);
2409 * FLD (i_dr) = opval;
2410 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2411 }
2412
2413 #undef FLD
2414 }
2415 NEXT (vpc);
2416
2417 CASE (sem, INSN_SLL) : /* sll $dr,$sr */
2418 {
2419 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2420 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2421 #define FLD(f) abuf->fields.sfmt_add.f
2422 int UNUSED written = 0;
2423 IADDR UNUSED pc = abuf->addr;
2424 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2425
2426 {
2427 SI opval = SLLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
2428 * FLD (i_dr) = opval;
2429 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2430 }
2431
2432 #undef FLD
2433 }
2434 NEXT (vpc);
2435
2436 CASE (sem, INSN_SLL3) : /* sll3 $dr,$sr,$simm16 */
2437 {
2438 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2439 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2440 #define FLD(f) abuf->fields.sfmt_add3.f
2441 int UNUSED written = 0;
2442 IADDR UNUSED pc = abuf->addr;
2443 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2444
2445 {
2446 SI opval = SLLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
2447 * FLD (i_dr) = opval;
2448 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2449 }
2450
2451 #undef FLD
2452 }
2453 NEXT (vpc);
2454
2455 CASE (sem, INSN_SLLI) : /* slli $dr,$uimm5 */
2456 {
2457 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2458 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2459 #define FLD(f) abuf->fields.sfmt_slli.f
2460 int UNUSED written = 0;
2461 IADDR UNUSED pc = abuf->addr;
2462 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2463
2464 {
2465 SI opval = SLLSI (* FLD (i_dr), FLD (f_uimm5));
2466 * FLD (i_dr) = opval;
2467 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2468 }
2469
2470 #undef FLD
2471 }
2472 NEXT (vpc);
2473
2474 CASE (sem, INSN_SRA) : /* sra $dr,$sr */
2475 {
2476 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2477 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2478 #define FLD(f) abuf->fields.sfmt_add.f
2479 int UNUSED written = 0;
2480 IADDR UNUSED pc = abuf->addr;
2481 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2482
2483 {
2484 SI opval = SRASI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
2485 * FLD (i_dr) = opval;
2486 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2487 }
2488
2489 #undef FLD
2490 }
2491 NEXT (vpc);
2492
2493 CASE (sem, INSN_SRA3) : /* sra3 $dr,$sr,$simm16 */
2494 {
2495 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2496 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2497 #define FLD(f) abuf->fields.sfmt_add3.f
2498 int UNUSED written = 0;
2499 IADDR UNUSED pc = abuf->addr;
2500 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2501
2502 {
2503 SI opval = SRASI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
2504 * FLD (i_dr) = opval;
2505 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2506 }
2507
2508 #undef FLD
2509 }
2510 NEXT (vpc);
2511
2512 CASE (sem, INSN_SRAI) : /* srai $dr,$uimm5 */
2513 {
2514 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2515 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2516 #define FLD(f) abuf->fields.sfmt_slli.f
2517 int UNUSED written = 0;
2518 IADDR UNUSED pc = abuf->addr;
2519 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2520
2521 {
2522 SI opval = SRASI (* FLD (i_dr), FLD (f_uimm5));
2523 * FLD (i_dr) = opval;
2524 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2525 }
2526
2527 #undef FLD
2528 }
2529 NEXT (vpc);
2530
2531 CASE (sem, INSN_SRL) : /* srl $dr,$sr */
2532 {
2533 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2534 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2535 #define FLD(f) abuf->fields.sfmt_add.f
2536 int UNUSED written = 0;
2537 IADDR UNUSED pc = abuf->addr;
2538 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2539
2540 {
2541 SI opval = SRLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
2542 * FLD (i_dr) = opval;
2543 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2544 }
2545
2546 #undef FLD
2547 }
2548 NEXT (vpc);
2549
2550 CASE (sem, INSN_SRL3) : /* srl3 $dr,$sr,$simm16 */
2551 {
2552 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2553 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2554 #define FLD(f) abuf->fields.sfmt_add3.f
2555 int UNUSED written = 0;
2556 IADDR UNUSED pc = abuf->addr;
2557 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2558
2559 {
2560 SI opval = SRLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
2561 * FLD (i_dr) = opval;
2562 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2563 }
2564
2565 #undef FLD
2566 }
2567 NEXT (vpc);
2568
2569 CASE (sem, INSN_SRLI) : /* srli $dr,$uimm5 */
2570 {
2571 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2572 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2573 #define FLD(f) abuf->fields.sfmt_slli.f
2574 int UNUSED written = 0;
2575 IADDR UNUSED pc = abuf->addr;
2576 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2577
2578 {
2579 SI opval = SRLSI (* FLD (i_dr), FLD (f_uimm5));
2580 * FLD (i_dr) = opval;
2581 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2582 }
2583
2584 #undef FLD
2585 }
2586 NEXT (vpc);
2587
2588 CASE (sem, INSN_ST) : /* st $src1,@$src2 */
2589 {
2590 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2591 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2592 #define FLD(f) abuf->fields.sfmt_st_plus.f
2593 int UNUSED written = 0;
2594 IADDR UNUSED pc = abuf->addr;
2595 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2596
2597 {
2598 SI opval = * FLD (i_src1);
2599 SETMEMSI (current_cpu, pc, * FLD (i_src2), opval);
2600 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2601 }
2602
2603 #undef FLD
2604 }
2605 NEXT (vpc);
2606
2607 CASE (sem, INSN_ST_D) : /* st $src1,@($slo16,$src2) */
2608 {
2609 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2610 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2611 #define FLD(f) abuf->fields.sfmt_st_d.f
2612 int UNUSED written = 0;
2613 IADDR UNUSED pc = abuf->addr;
2614 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2615
2616 {
2617 SI opval = * FLD (i_src1);
2618 SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
2619 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2620 }
2621
2622 #undef FLD
2623 }
2624 NEXT (vpc);
2625
2626 CASE (sem, INSN_STB) : /* stb $src1,@$src2 */
2627 {
2628 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2629 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2630 #define FLD(f) abuf->fields.sfmt_st_plus.f
2631 int UNUSED written = 0;
2632 IADDR UNUSED pc = abuf->addr;
2633 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2634
2635 {
2636 QI opval = * FLD (i_src1);
2637 SETMEMQI (current_cpu, pc, * FLD (i_src2), opval);
2638 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2639 }
2640
2641 #undef FLD
2642 }
2643 NEXT (vpc);
2644
2645 CASE (sem, INSN_STB_D) : /* stb $src1,@($slo16,$src2) */
2646 {
2647 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2648 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2649 #define FLD(f) abuf->fields.sfmt_st_d.f
2650 int UNUSED written = 0;
2651 IADDR UNUSED pc = abuf->addr;
2652 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2653
2654 {
2655 QI opval = * FLD (i_src1);
2656 SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
2657 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2658 }
2659
2660 #undef FLD
2661 }
2662 NEXT (vpc);
2663
2664 CASE (sem, INSN_STH) : /* sth $src1,@$src2 */
2665 {
2666 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2667 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2668 #define FLD(f) abuf->fields.sfmt_st_plus.f
2669 int UNUSED written = 0;
2670 IADDR UNUSED pc = abuf->addr;
2671 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2672
2673 {
2674 HI opval = * FLD (i_src1);
2675 SETMEMHI (current_cpu, pc, * FLD (i_src2), opval);
2676 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2677 }
2678
2679 #undef FLD
2680 }
2681 NEXT (vpc);
2682
2683 CASE (sem, INSN_STH_D) : /* sth $src1,@($slo16,$src2) */
2684 {
2685 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2686 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2687 #define FLD(f) abuf->fields.sfmt_st_d.f
2688 int UNUSED written = 0;
2689 IADDR UNUSED pc = abuf->addr;
2690 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2691
2692 {
2693 HI opval = * FLD (i_src1);
2694 SETMEMHI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
2695 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2696 }
2697
2698 #undef FLD
2699 }
2700 NEXT (vpc);
2701
2702 CASE (sem, INSN_ST_PLUS) : /* st $src1,@+$src2 */
2703 {
2704 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2705 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2706 #define FLD(f) abuf->fields.sfmt_st_plus.f
2707 int UNUSED written = 0;
2708 IADDR UNUSED pc = abuf->addr;
2709 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2710
2711 {
2712 SI tmp_new_src2;
2713 tmp_new_src2 = ADDSI (* FLD (i_src2), 4);
2714 {
2715 SI opval = * FLD (i_src1);
2716 SETMEMSI (current_cpu, pc, tmp_new_src2, opval);
2717 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2718 }
2719 {
2720 SI opval = tmp_new_src2;
2721 * FLD (i_src2) = opval;
2722 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2723 }
2724 }
2725
2726 #undef FLD
2727 }
2728 NEXT (vpc);
2729
2730 CASE (sem, INSN_ST_MINUS) : /* st $src1,@-$src2 */
2731 {
2732 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2733 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2734 #define FLD(f) abuf->fields.sfmt_st_plus.f
2735 int UNUSED written = 0;
2736 IADDR UNUSED pc = abuf->addr;
2737 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2738
2739 {
2740 SI tmp_new_src2;
2741 tmp_new_src2 = SUBSI (* FLD (i_src2), 4);
2742 {
2743 SI opval = * FLD (i_src1);
2744 SETMEMSI (current_cpu, pc, tmp_new_src2, opval);
2745 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2746 }
2747 {
2748 SI opval = tmp_new_src2;
2749 * FLD (i_src2) = opval;
2750 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2751 }
2752 }
2753
2754 #undef FLD
2755 }
2756 NEXT (vpc);
2757
2758 CASE (sem, INSN_SUB) : /* sub $dr,$sr */
2759 {
2760 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2761 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2762 #define FLD(f) abuf->fields.sfmt_add.f
2763 int UNUSED written = 0;
2764 IADDR UNUSED pc = abuf->addr;
2765 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2766
2767 {
2768 SI opval = SUBSI (* FLD (i_dr), * FLD (i_sr));
2769 * FLD (i_dr) = opval;
2770 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2771 }
2772
2773 #undef FLD
2774 }
2775 NEXT (vpc);
2776
2777 CASE (sem, INSN_SUBV) : /* subv $dr,$sr */
2778 {
2779 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2780 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2781 #define FLD(f) abuf->fields.sfmt_add.f
2782 int UNUSED written = 0;
2783 IADDR UNUSED pc = abuf->addr;
2784 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2785
2786 {
2787 SI temp0;BI temp1;
2788 temp0 = SUBSI (* FLD (i_dr), * FLD (i_sr));
2789 temp1 = SUBOFSI (* FLD (i_dr), * FLD (i_sr), 0);
2790 {
2791 SI opval = temp0;
2792 * FLD (i_dr) = opval;
2793 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2794 }
2795 {
2796 BI opval = temp1;
2797 CPU (h_cond) = opval;
2798 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
2799 }
2800 }
2801
2802 #undef FLD
2803 }
2804 NEXT (vpc);
2805
2806 CASE (sem, INSN_SUBX) : /* subx $dr,$sr */
2807 {
2808 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2809 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2810 #define FLD(f) abuf->fields.sfmt_add.f
2811 int UNUSED written = 0;
2812 IADDR UNUSED pc = abuf->addr;
2813 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2814
2815 {
2816 SI temp0;BI temp1;
2817 temp0 = SUBCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
2818 temp1 = SUBCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
2819 {
2820 SI opval = temp0;
2821 * FLD (i_dr) = opval;
2822 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2823 }
2824 {
2825 BI opval = temp1;
2826 CPU (h_cond) = opval;
2827 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
2828 }
2829 }
2830
2831 #undef FLD
2832 }
2833 NEXT (vpc);
2834
2835 CASE (sem, INSN_TRAP) : /* trap $uimm4 */
2836 {
2837 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2838 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2839 #define FLD(f) abuf->fields.sfmt_trap.f
2840 int UNUSED written = 0;
2841 IADDR UNUSED pc = abuf->addr;
2842 SEM_BRANCH_INIT
2843 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2844
2845 {
2846 {
2847 USI opval = GET_H_CR (((UINT) 6));
2848 SET_H_CR (((UINT) 14), opval);
2849 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
2850 }
2851 {
2852 USI opval = ADDSI (pc, 4);
2853 SET_H_CR (((UINT) 6), opval);
2854 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
2855 }
2856 {
2857 UQI opval = CPU (h_bpsw);
2858 CPU (h_bbpsw) = opval;
2859 TRACE_RESULT (current_cpu, abuf, "bbpsw", 'x', opval);
2860 }
2861 {
2862 UQI opval = GET_H_PSW ();
2863 CPU (h_bpsw) = opval;
2864 TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
2865 }
2866 {
2867 UQI opval = ANDQI (GET_H_PSW (), 128);
2868 SET_H_PSW (opval);
2869 TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
2870 }
2871 {
2872 SI opval = m32r_trap (current_cpu, pc, FLD (f_uimm4));
2873 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
2874 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
2875 }
2876 }
2877
2878 SEM_BRANCH_FINI (vpc);
2879 #undef FLD
2880 }
2881 NEXT (vpc);
2882
2883 CASE (sem, INSN_UNLOCK) : /* unlock $src1,@$src2 */
2884 {
2885 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2886 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2887 #define FLD(f) abuf->fields.sfmt_st_plus.f
2888 int UNUSED written = 0;
2889 IADDR UNUSED pc = abuf->addr;
2890 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2891
2892 {
2893 if (CPU (h_lock)) {
2894 {
2895 SI opval = * FLD (i_src1);
2896 SETMEMSI (current_cpu, pc, * FLD (i_src2), opval);
2897 written |= (1 << 4);
2898 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2899 }
2900 }
2901 {
2902 BI opval = 0;
2903 CPU (h_lock) = opval;
2904 TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
2905 }
2906 }
2907
2908 abuf->written = written;
2909 #undef FLD
2910 }
2911 NEXT (vpc);
2912
2913 CASE (sem, INSN_SATB) : /* satb $dr,$sr */
2914 {
2915 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2916 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2917 #define FLD(f) abuf->fields.sfmt_ld_plus.f
2918 int UNUSED written = 0;
2919 IADDR UNUSED pc = abuf->addr;
2920 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2921
2922 {
2923 SI opval = (GESI (* FLD (i_sr), 127)) ? (127) : (LESI (* FLD (i_sr), -128)) ? (-128) : (* FLD (i_sr));
2924 * FLD (i_dr) = opval;
2925 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2926 }
2927
2928 #undef FLD
2929 }
2930 NEXT (vpc);
2931
2932 CASE (sem, INSN_SATH) : /* sath $dr,$sr */
2933 {
2934 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2935 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2936 #define FLD(f) abuf->fields.sfmt_ld_plus.f
2937 int UNUSED written = 0;
2938 IADDR UNUSED pc = abuf->addr;
2939 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2940
2941 {
2942 SI opval = (GESI (* FLD (i_sr), 32767)) ? (32767) : (LESI (* FLD (i_sr), -32768)) ? (-32768) : (* FLD (i_sr));
2943 * FLD (i_dr) = opval;
2944 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2945 }
2946
2947 #undef FLD
2948 }
2949 NEXT (vpc);
2950
2951 CASE (sem, INSN_SAT) : /* sat $dr,$sr */
2952 {
2953 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2954 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2955 #define FLD(f) abuf->fields.sfmt_ld_plus.f
2956 int UNUSED written = 0;
2957 IADDR UNUSED pc = abuf->addr;
2958 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2959
2960 {
2961 SI opval = ((CPU (h_cond)) ? (((LTSI (* FLD (i_sr), 0)) ? (2147483647) : (0x80000000))) : (* FLD (i_sr)));
2962 * FLD (i_dr) = opval;
2963 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2964 }
2965
2966 #undef FLD
2967 }
2968 NEXT (vpc);
2969
2970 CASE (sem, INSN_PCMPBZ) : /* pcmpbz $src2 */
2971 {
2972 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2973 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2974 #define FLD(f) abuf->fields.sfmt_st_plus.f
2975 int UNUSED written = 0;
2976 IADDR UNUSED pc = abuf->addr;
2977 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2978
2979 {
2980 BI opval = (EQSI (ANDSI (* FLD (i_src2), 255), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 65280), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 16711680), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 0xff000000), 0)) ? (1) : (0);
2981 CPU (h_cond) = opval;
2982 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
2983 }
2984
2985 #undef FLD
2986 }
2987 NEXT (vpc);
2988
2989 CASE (sem, INSN_SADD) : /* sadd */
2990 {
2991 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2992 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2993 #define FLD(f) abuf->fields.fmt_empty.f
2994 int UNUSED written = 0;
2995 IADDR UNUSED pc = abuf->addr;
2996 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2997
2998 {
2999 DI opval = ADDDI (SRADI (GET_H_ACCUMS (((UINT) 1)), 16), GET_H_ACCUMS (((UINT) 0)));
3000 SET_H_ACCUMS (((UINT) 0), opval);
3001 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
3002 }
3003
3004 #undef FLD
3005 }
3006 NEXT (vpc);
3007
3008 CASE (sem, INSN_MACWU1) : /* macwu1 $src1,$src2 */
3009 {
3010 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3011 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3012 #define FLD(f) abuf->fields.sfmt_st_plus.f
3013 int UNUSED written = 0;
3014 IADDR UNUSED pc = abuf->addr;
3015 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3016
3017 {
3018 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535)))), 8), 8);
3019 SET_H_ACCUMS (((UINT) 1), opval);
3020 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
3021 }
3022
3023 #undef FLD
3024 }
3025 NEXT (vpc);
3026
3027 CASE (sem, INSN_MSBLO) : /* msblo $src1,$src2 */
3028 {
3029 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3030 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3031 #define FLD(f) abuf->fields.sfmt_st_plus.f
3032 int UNUSED written = 0;
3033 IADDR UNUSED pc = abuf->addr;
3034 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3035
3036 {
3037 DI opval = SRADI (SLLDI (SUBDI (GET_H_ACCUM (), SRADI (SLLDI (MULDI (EXTHIDI (TRUNCSIHI (* FLD (i_src1))), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 32), 16)), 8), 8);
3038 SET_H_ACCUM (opval);
3039 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
3040 }
3041
3042 #undef FLD
3043 }
3044 NEXT (vpc);
3045
3046 CASE (sem, INSN_MULWU1) : /* mulwu1 $src1,$src2 */
3047 {
3048 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3049 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3050 #define FLD(f) abuf->fields.sfmt_st_plus.f
3051 int UNUSED written = 0;
3052 IADDR UNUSED pc = abuf->addr;
3053 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3054
3055 {
3056 DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535))), 16), 16);
3057 SET_H_ACCUMS (((UINT) 1), opval);
3058 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
3059 }
3060
3061 #undef FLD
3062 }
3063 NEXT (vpc);
3064
3065 CASE (sem, INSN_MACLH1) : /* maclh1 $src1,$src2 */
3066 {
3067 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3068 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3069 #define FLD(f) abuf->fields.sfmt_st_plus.f
3070 int UNUSED written = 0;
3071 IADDR UNUSED pc = abuf->addr;
3072 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3073
3074 {
3075 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), SLLDI (EXTSIDI (MULSI (EXTHISI (TRUNCSIHI (* FLD (i_src1))), SRASI (* FLD (i_src2), 16))), 16)), 8), 8);
3076 SET_H_ACCUMS (((UINT) 1), opval);
3077 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
3078 }
3079
3080 #undef FLD
3081 }
3082 NEXT (vpc);
3083
3084 CASE (sem, INSN_SC) : /* sc */
3085 {
3086 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3087 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3088 #define FLD(f) abuf->fields.fmt_empty.f
3089 int UNUSED written = 0;
3090 IADDR UNUSED pc = abuf->addr;
3091 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3092
3093 if (ZEXTBISI (CPU (h_cond)))
3094 SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
3095
3096 #undef FLD
3097 }
3098 NEXT (vpc);
3099
3100 CASE (sem, INSN_SNC) : /* snc */
3101 {
3102 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3103 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3104 #define FLD(f) abuf->fields.fmt_empty.f
3105 int UNUSED written = 0;
3106 IADDR UNUSED pc = abuf->addr;
3107 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3108
3109 if (ZEXTBISI (NOTBI (CPU (h_cond))))
3110 SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
3111
3112 #undef FLD
3113 }
3114 NEXT (vpc);
3115
3116 CASE (sem, INSN_PAR_ADD) : /* add $dr,$sr */
3117 {
3118 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3119 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3120 #define FLD(f) abuf->fields.sfmt_add.f
3121 #define OPRND(f) par_exec->operands.sfmt_add.f
3122 int UNUSED written = 0;
3123 IADDR UNUSED pc = abuf->addr;
3124 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3125
3126 {
3127 SI opval = ADDSI (* FLD (i_dr), * FLD (i_sr));
3128 OPRND (dr) = opval;
3129 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3130 }
3131
3132 #undef OPRND
3133 #undef FLD
3134 }
3135 NEXT (vpc);
3136
3137 CASE (sem, INSN_WRITE_ADD) : /* add $dr,$sr */
3138 {
3139 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3140 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3141 #define FLD(f) abuf->fields.sfmt_add.f
3142 #define OPRND(f) par_exec->operands.sfmt_add.f
3143 int UNUSED written = abuf->written;
3144 IADDR UNUSED pc = abuf->addr;
3145 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3146
3147 * FLD (i_dr) = OPRND (dr);
3148
3149 #undef OPRND
3150 #undef FLD
3151 }
3152 NEXT (vpc);
3153
3154 CASE (sem, INSN_PAR_AND) : /* and $dr,$sr */
3155 {
3156 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3157 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3158 #define FLD(f) abuf->fields.sfmt_add.f
3159 #define OPRND(f) par_exec->operands.sfmt_add.f
3160 int UNUSED written = 0;
3161 IADDR UNUSED pc = abuf->addr;
3162 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3163
3164 {
3165 SI opval = ANDSI (* FLD (i_dr), * FLD (i_sr));
3166 OPRND (dr) = opval;
3167 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3168 }
3169
3170 #undef OPRND
3171 #undef FLD
3172 }
3173 NEXT (vpc);
3174
3175 CASE (sem, INSN_WRITE_AND) : /* and $dr,$sr */
3176 {
3177 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3178 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3179 #define FLD(f) abuf->fields.sfmt_add.f
3180 #define OPRND(f) par_exec->operands.sfmt_add.f
3181 int UNUSED written = abuf->written;
3182 IADDR UNUSED pc = abuf->addr;
3183 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3184
3185 * FLD (i_dr) = OPRND (dr);
3186
3187 #undef OPRND
3188 #undef FLD
3189 }
3190 NEXT (vpc);
3191
3192 CASE (sem, INSN_PAR_OR) : /* or $dr,$sr */
3193 {
3194 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3195 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3196 #define FLD(f) abuf->fields.sfmt_add.f
3197 #define OPRND(f) par_exec->operands.sfmt_add.f
3198 int UNUSED written = 0;
3199 IADDR UNUSED pc = abuf->addr;
3200 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3201
3202 {
3203 SI opval = ORSI (* FLD (i_dr), * FLD (i_sr));
3204 OPRND (dr) = opval;
3205 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3206 }
3207
3208 #undef OPRND
3209 #undef FLD
3210 }
3211 NEXT (vpc);
3212
3213 CASE (sem, INSN_WRITE_OR) : /* or $dr,$sr */
3214 {
3215 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3216 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3217 #define FLD(f) abuf->fields.sfmt_add.f
3218 #define OPRND(f) par_exec->operands.sfmt_add.f
3219 int UNUSED written = abuf->written;
3220 IADDR UNUSED pc = abuf->addr;
3221 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3222
3223 * FLD (i_dr) = OPRND (dr);
3224
3225 #undef OPRND
3226 #undef FLD
3227 }
3228 NEXT (vpc);
3229
3230 CASE (sem, INSN_PAR_XOR) : /* xor $dr,$sr */
3231 {
3232 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3233 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3234 #define FLD(f) abuf->fields.sfmt_add.f
3235 #define OPRND(f) par_exec->operands.sfmt_add.f
3236 int UNUSED written = 0;
3237 IADDR UNUSED pc = abuf->addr;
3238 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3239
3240 {
3241 SI opval = XORSI (* FLD (i_dr), * FLD (i_sr));
3242 OPRND (dr) = opval;
3243 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3244 }
3245
3246 #undef OPRND
3247 #undef FLD
3248 }
3249 NEXT (vpc);
3250
3251 CASE (sem, INSN_WRITE_XOR) : /* xor $dr,$sr */
3252 {
3253 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3254 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3255 #define FLD(f) abuf->fields.sfmt_add.f
3256 #define OPRND(f) par_exec->operands.sfmt_add.f
3257 int UNUSED written = abuf->written;
3258 IADDR UNUSED pc = abuf->addr;
3259 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3260
3261 * FLD (i_dr) = OPRND (dr);
3262
3263 #undef OPRND
3264 #undef FLD
3265 }
3266 NEXT (vpc);
3267
3268 CASE (sem, INSN_PAR_ADDI) : /* addi $dr,$simm8 */
3269 {
3270 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3271 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3272 #define FLD(f) abuf->fields.sfmt_addi.f
3273 #define OPRND(f) par_exec->operands.sfmt_addi.f
3274 int UNUSED written = 0;
3275 IADDR UNUSED pc = abuf->addr;
3276 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3277
3278 {
3279 SI opval = ADDSI (* FLD (i_dr), FLD (f_simm8));
3280 OPRND (dr) = opval;
3281 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3282 }
3283
3284 #undef OPRND
3285 #undef FLD
3286 }
3287 NEXT (vpc);
3288
3289 CASE (sem, INSN_WRITE_ADDI) : /* addi $dr,$simm8 */
3290 {
3291 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3292 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3293 #define FLD(f) abuf->fields.sfmt_addi.f
3294 #define OPRND(f) par_exec->operands.sfmt_addi.f
3295 int UNUSED written = abuf->written;
3296 IADDR UNUSED pc = abuf->addr;
3297 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3298
3299 * FLD (i_dr) = OPRND (dr);
3300
3301 #undef OPRND
3302 #undef FLD
3303 }
3304 NEXT (vpc);
3305
3306 CASE (sem, INSN_PAR_ADDV) : /* addv $dr,$sr */
3307 {
3308 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3309 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3310 #define FLD(f) abuf->fields.sfmt_add.f
3311 #define OPRND(f) par_exec->operands.sfmt_addv.f
3312 int UNUSED written = 0;
3313 IADDR UNUSED pc = abuf->addr;
3314 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3315
3316 {
3317 SI temp0;BI temp1;
3318 temp0 = ADDSI (* FLD (i_dr), * FLD (i_sr));
3319 temp1 = ADDOFSI (* FLD (i_dr), * FLD (i_sr), 0);
3320 {
3321 SI opval = temp0;
3322 OPRND (dr) = opval;
3323 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3324 }
3325 {
3326 BI opval = temp1;
3327 OPRND (condbit) = opval;
3328 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
3329 }
3330 }
3331
3332 #undef OPRND
3333 #undef FLD
3334 }
3335 NEXT (vpc);
3336
3337 CASE (sem, INSN_WRITE_ADDV) : /* addv $dr,$sr */
3338 {
3339 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3340 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3341 #define FLD(f) abuf->fields.sfmt_add.f
3342 #define OPRND(f) par_exec->operands.sfmt_addv.f
3343 int UNUSED written = abuf->written;
3344 IADDR UNUSED pc = abuf->addr;
3345 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3346
3347 CPU (h_cond) = OPRND (condbit);
3348 * FLD (i_dr) = OPRND (dr);
3349
3350 #undef OPRND
3351 #undef FLD
3352 }
3353 NEXT (vpc);
3354
3355 CASE (sem, INSN_PAR_ADDX) : /* addx $dr,$sr */
3356 {
3357 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3358 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3359 #define FLD(f) abuf->fields.sfmt_add.f
3360 #define OPRND(f) par_exec->operands.sfmt_addx.f
3361 int UNUSED written = 0;
3362 IADDR UNUSED pc = abuf->addr;
3363 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3364
3365 {
3366 SI temp0;BI temp1;
3367 temp0 = ADDCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
3368 temp1 = ADDCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
3369 {
3370 SI opval = temp0;
3371 OPRND (dr) = opval;
3372 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3373 }
3374 {
3375 BI opval = temp1;
3376 OPRND (condbit) = opval;
3377 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
3378 }
3379 }
3380
3381 #undef OPRND
3382 #undef FLD
3383 }
3384 NEXT (vpc);
3385
3386 CASE (sem, INSN_WRITE_ADDX) : /* addx $dr,$sr */
3387 {
3388 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3389 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3390 #define FLD(f) abuf->fields.sfmt_add.f
3391 #define OPRND(f) par_exec->operands.sfmt_addx.f
3392 int UNUSED written = abuf->written;
3393 IADDR UNUSED pc = abuf->addr;
3394 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3395
3396 CPU (h_cond) = OPRND (condbit);
3397 * FLD (i_dr) = OPRND (dr);
3398
3399 #undef OPRND
3400 #undef FLD
3401 }
3402 NEXT (vpc);
3403
3404 CASE (sem, INSN_PAR_BC8) : /* bc.s $disp8 */
3405 {
3406 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3407 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3408 #define FLD(f) abuf->fields.sfmt_bl8.f
3409 #define OPRND(f) par_exec->operands.sfmt_bc8.f
3410 int UNUSED written = 0;
3411 IADDR UNUSED pc = abuf->addr;
3412 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3413
3414 if (CPU (h_cond)) {
3415 {
3416 USI opval = FLD (i_disp8);
3417 OPRND (pc) = opval;
3418 written |= (1 << 2);
3419 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3420 }
3421 }
3422
3423 abuf->written = written;
3424 #undef OPRND
3425 #undef FLD
3426 }
3427 NEXT (vpc);
3428
3429 CASE (sem, INSN_WRITE_BC8) : /* bc.s $disp8 */
3430 {
3431 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3432 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3433 #define FLD(f) abuf->fields.sfmt_bl8.f
3434 #define OPRND(f) par_exec->operands.sfmt_bc8.f
3435 int UNUSED written = abuf->written;
3436 IADDR UNUSED pc = abuf->addr;
3437 SEM_BRANCH_INIT
3438 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3439
3440 if (written & (1 << 2))
3441 {
3442 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3443 }
3444
3445 SEM_BRANCH_FINI (vpc);
3446 #undef OPRND
3447 #undef FLD
3448 }
3449 NEXT (vpc);
3450
3451 CASE (sem, INSN_PAR_BL8) : /* bl.s $disp8 */
3452 {
3453 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3454 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3455 #define FLD(f) abuf->fields.sfmt_bl8.f
3456 #define OPRND(f) par_exec->operands.sfmt_bl8.f
3457 int UNUSED written = 0;
3458 IADDR UNUSED pc = abuf->addr;
3459 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3460
3461 {
3462 {
3463 SI opval = ADDSI (ANDSI (pc, -4), 4);
3464 OPRND (h_gr_SI_14) = opval;
3465 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3466 }
3467 {
3468 USI opval = FLD (i_disp8);
3469 OPRND (pc) = opval;
3470 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3471 }
3472 }
3473
3474 #undef OPRND
3475 #undef FLD
3476 }
3477 NEXT (vpc);
3478
3479 CASE (sem, INSN_WRITE_BL8) : /* bl.s $disp8 */
3480 {
3481 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3482 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3483 #define FLD(f) abuf->fields.sfmt_bl8.f
3484 #define OPRND(f) par_exec->operands.sfmt_bl8.f
3485 int UNUSED written = abuf->written;
3486 IADDR UNUSED pc = abuf->addr;
3487 SEM_BRANCH_INIT
3488 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3489
3490 CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_SI_14);
3491 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3492
3493 SEM_BRANCH_FINI (vpc);
3494 #undef OPRND
3495 #undef FLD
3496 }
3497 NEXT (vpc);
3498
3499 CASE (sem, INSN_PAR_BCL8) : /* bcl.s $disp8 */
3500 {
3501 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3502 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3503 #define FLD(f) abuf->fields.sfmt_bl8.f
3504 #define OPRND(f) par_exec->operands.sfmt_bcl8.f
3505 int UNUSED written = 0;
3506 IADDR UNUSED pc = abuf->addr;
3507 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3508
3509 if (CPU (h_cond)) {
3510 {
3511 {
3512 SI opval = ADDSI (ANDSI (pc, -4), 4);
3513 OPRND (h_gr_SI_14) = opval;
3514 written |= (1 << 3);
3515 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3516 }
3517 {
3518 USI opval = FLD (i_disp8);
3519 OPRND (pc) = opval;
3520 written |= (1 << 4);
3521 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3522 }
3523 }
3524 }
3525
3526 abuf->written = written;
3527 #undef OPRND
3528 #undef FLD
3529 }
3530 NEXT (vpc);
3531
3532 CASE (sem, INSN_WRITE_BCL8) : /* bcl.s $disp8 */
3533 {
3534 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3535 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3536 #define FLD(f) abuf->fields.sfmt_bl8.f
3537 #define OPRND(f) par_exec->operands.sfmt_bcl8.f
3538 int UNUSED written = abuf->written;
3539 IADDR UNUSED pc = abuf->addr;
3540 SEM_BRANCH_INIT
3541 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3542
3543 if (written & (1 << 3))
3544 {
3545 CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_SI_14);
3546 }
3547 if (written & (1 << 4))
3548 {
3549 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3550 }
3551
3552 SEM_BRANCH_FINI (vpc);
3553 #undef OPRND
3554 #undef FLD
3555 }
3556 NEXT (vpc);
3557
3558 CASE (sem, INSN_PAR_BNC8) : /* bnc.s $disp8 */
3559 {
3560 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3561 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3562 #define FLD(f) abuf->fields.sfmt_bl8.f
3563 #define OPRND(f) par_exec->operands.sfmt_bc8.f
3564 int UNUSED written = 0;
3565 IADDR UNUSED pc = abuf->addr;
3566 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3567
3568 if (NOTBI (CPU (h_cond))) {
3569 {
3570 USI opval = FLD (i_disp8);
3571 OPRND (pc) = opval;
3572 written |= (1 << 2);
3573 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3574 }
3575 }
3576
3577 abuf->written = written;
3578 #undef OPRND
3579 #undef FLD
3580 }
3581 NEXT (vpc);
3582
3583 CASE (sem, INSN_WRITE_BNC8) : /* bnc.s $disp8 */
3584 {
3585 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3586 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3587 #define FLD(f) abuf->fields.sfmt_bl8.f
3588 #define OPRND(f) par_exec->operands.sfmt_bc8.f
3589 int UNUSED written = abuf->written;
3590 IADDR UNUSED pc = abuf->addr;
3591 SEM_BRANCH_INIT
3592 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3593
3594 if (written & (1 << 2))
3595 {
3596 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3597 }
3598
3599 SEM_BRANCH_FINI (vpc);
3600 #undef OPRND
3601 #undef FLD
3602 }
3603 NEXT (vpc);
3604
3605 CASE (sem, INSN_PAR_BRA8) : /* bra.s $disp8 */
3606 {
3607 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3608 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3609 #define FLD(f) abuf->fields.sfmt_bl8.f
3610 #define OPRND(f) par_exec->operands.sfmt_bra8.f
3611 int UNUSED written = 0;
3612 IADDR UNUSED pc = abuf->addr;
3613 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3614
3615 {
3616 USI opval = FLD (i_disp8);
3617 OPRND (pc) = opval;
3618 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3619 }
3620
3621 #undef OPRND
3622 #undef FLD
3623 }
3624 NEXT (vpc);
3625
3626 CASE (sem, INSN_WRITE_BRA8) : /* bra.s $disp8 */
3627 {
3628 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3629 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3630 #define FLD(f) abuf->fields.sfmt_bl8.f
3631 #define OPRND(f) par_exec->operands.sfmt_bra8.f
3632 int UNUSED written = abuf->written;
3633 IADDR UNUSED pc = abuf->addr;
3634 SEM_BRANCH_INIT
3635 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3636
3637 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3638
3639 SEM_BRANCH_FINI (vpc);
3640 #undef OPRND
3641 #undef FLD
3642 }
3643 NEXT (vpc);
3644
3645 CASE (sem, INSN_PAR_BNCL8) : /* bncl.s $disp8 */
3646 {
3647 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3648 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3649 #define FLD(f) abuf->fields.sfmt_bl8.f
3650 #define OPRND(f) par_exec->operands.sfmt_bcl8.f
3651 int UNUSED written = 0;
3652 IADDR UNUSED pc = abuf->addr;
3653 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3654
3655 if (NOTBI (CPU (h_cond))) {
3656 {
3657 {
3658 SI opval = ADDSI (ANDSI (pc, -4), 4);
3659 OPRND (h_gr_SI_14) = opval;
3660 written |= (1 << 3);
3661 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3662 }
3663 {
3664 USI opval = FLD (i_disp8);
3665 OPRND (pc) = opval;
3666 written |= (1 << 4);
3667 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3668 }
3669 }
3670 }
3671
3672 abuf->written = written;
3673 #undef OPRND
3674 #undef FLD
3675 }
3676 NEXT (vpc);
3677
3678 CASE (sem, INSN_WRITE_BNCL8) : /* bncl.s $disp8 */
3679 {
3680 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3681 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3682 #define FLD(f) abuf->fields.sfmt_bl8.f
3683 #define OPRND(f) par_exec->operands.sfmt_bcl8.f
3684 int UNUSED written = abuf->written;
3685 IADDR UNUSED pc = abuf->addr;
3686 SEM_BRANCH_INIT
3687 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3688
3689 if (written & (1 << 3))
3690 {
3691 CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_SI_14);
3692 }
3693 if (written & (1 << 4))
3694 {
3695 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3696 }
3697
3698 SEM_BRANCH_FINI (vpc);
3699 #undef OPRND
3700 #undef FLD
3701 }
3702 NEXT (vpc);
3703
3704 CASE (sem, INSN_PAR_CMP) : /* cmp $src1,$src2 */
3705 {
3706 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3707 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3708 #define FLD(f) abuf->fields.sfmt_st_plus.f
3709 #define OPRND(f) par_exec->operands.sfmt_cmp.f
3710 int UNUSED written = 0;
3711 IADDR UNUSED pc = abuf->addr;
3712 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3713
3714 {
3715 BI opval = LTSI (* FLD (i_src1), * FLD (i_src2));
3716 OPRND (condbit) = opval;
3717 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
3718 }
3719
3720 #undef OPRND
3721 #undef FLD
3722 }
3723 NEXT (vpc);
3724
3725 CASE (sem, INSN_WRITE_CMP) : /* cmp $src1,$src2 */
3726 {
3727 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3728 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3729 #define FLD(f) abuf->fields.sfmt_st_plus.f
3730 #define OPRND(f) par_exec->operands.sfmt_cmp.f
3731 int UNUSED written = abuf->written;
3732 IADDR UNUSED pc = abuf->addr;
3733 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3734
3735 CPU (h_cond) = OPRND (condbit);
3736
3737 #undef OPRND
3738 #undef FLD
3739 }
3740 NEXT (vpc);
3741
3742 CASE (sem, INSN_PAR_CMPU) : /* cmpu $src1,$src2 */
3743 {
3744 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3745 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3746 #define FLD(f) abuf->fields.sfmt_st_plus.f
3747 #define OPRND(f) par_exec->operands.sfmt_cmp.f
3748 int UNUSED written = 0;
3749 IADDR UNUSED pc = abuf->addr;
3750 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3751
3752 {
3753 BI opval = LTUSI (* FLD (i_src1), * FLD (i_src2));
3754 OPRND (condbit) = opval;
3755 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
3756 }
3757
3758 #undef OPRND
3759 #undef FLD
3760 }
3761 NEXT (vpc);
3762
3763 CASE (sem, INSN_WRITE_CMPU) : /* cmpu $src1,$src2 */
3764 {
3765 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3766 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3767 #define FLD(f) abuf->fields.sfmt_st_plus.f
3768 #define OPRND(f) par_exec->operands.sfmt_cmp.f
3769 int UNUSED written = abuf->written;
3770 IADDR UNUSED pc = abuf->addr;
3771 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3772
3773 CPU (h_cond) = OPRND (condbit);
3774
3775 #undef OPRND
3776 #undef FLD
3777 }
3778 NEXT (vpc);
3779
3780 CASE (sem, INSN_PAR_CMPEQ) : /* cmpeq $src1,$src2 */
3781 {
3782 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3783 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3784 #define FLD(f) abuf->fields.sfmt_st_plus.f
3785 #define OPRND(f) par_exec->operands.sfmt_cmp.f
3786 int UNUSED written = 0;
3787 IADDR UNUSED pc = abuf->addr;
3788 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3789
3790 {
3791 BI opval = EQSI (* FLD (i_src1), * FLD (i_src2));
3792 OPRND (condbit) = opval;
3793 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
3794 }
3795
3796 #undef OPRND
3797 #undef FLD
3798 }
3799 NEXT (vpc);
3800
3801 CASE (sem, INSN_WRITE_CMPEQ) : /* cmpeq $src1,$src2 */
3802 {
3803 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3804 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3805 #define FLD(f) abuf->fields.sfmt_st_plus.f
3806 #define OPRND(f) par_exec->operands.sfmt_cmp.f
3807 int UNUSED written = abuf->written;
3808 IADDR UNUSED pc = abuf->addr;
3809 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3810
3811 CPU (h_cond) = OPRND (condbit);
3812
3813 #undef OPRND
3814 #undef FLD
3815 }
3816 NEXT (vpc);
3817
3818 CASE (sem, INSN_PAR_CMPZ) : /* cmpz $src2 */
3819 {
3820 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3821 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3822 #define FLD(f) abuf->fields.sfmt_st_plus.f
3823 #define OPRND(f) par_exec->operands.sfmt_cmpz.f
3824 int UNUSED written = 0;
3825 IADDR UNUSED pc = abuf->addr;
3826 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3827
3828 {
3829 BI opval = EQSI (* FLD (i_src2), 0);
3830 OPRND (condbit) = opval;
3831 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
3832 }
3833
3834 #undef OPRND
3835 #undef FLD
3836 }
3837 NEXT (vpc);
3838
3839 CASE (sem, INSN_WRITE_CMPZ) : /* cmpz $src2 */
3840 {
3841 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3842 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3843 #define FLD(f) abuf->fields.sfmt_st_plus.f
3844 #define OPRND(f) par_exec->operands.sfmt_cmpz.f
3845 int UNUSED written = abuf->written;
3846 IADDR UNUSED pc = abuf->addr;
3847 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3848
3849 CPU (h_cond) = OPRND (condbit);
3850
3851 #undef OPRND
3852 #undef FLD
3853 }
3854 NEXT (vpc);
3855
3856 CASE (sem, INSN_PAR_JC) : /* jc $sr */
3857 {
3858 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3859 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3860 #define FLD(f) abuf->fields.sfmt_jl.f
3861 #define OPRND(f) par_exec->operands.sfmt_jc.f
3862 int UNUSED written = 0;
3863 IADDR UNUSED pc = abuf->addr;
3864 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3865
3866 if (CPU (h_cond)) {
3867 {
3868 USI opval = ANDSI (* FLD (i_sr), -4);
3869 OPRND (pc) = opval;
3870 written |= (1 << 2);
3871 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3872 }
3873 }
3874
3875 abuf->written = written;
3876 #undef OPRND
3877 #undef FLD
3878 }
3879 NEXT (vpc);
3880
3881 CASE (sem, INSN_WRITE_JC) : /* jc $sr */
3882 {
3883 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3884 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3885 #define FLD(f) abuf->fields.sfmt_jl.f
3886 #define OPRND(f) par_exec->operands.sfmt_jc.f
3887 int UNUSED written = abuf->written;
3888 IADDR UNUSED pc = abuf->addr;
3889 SEM_BRANCH_INIT
3890 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3891
3892 if (written & (1 << 2))
3893 {
3894 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3895 }
3896
3897 SEM_BRANCH_FINI (vpc);
3898 #undef OPRND
3899 #undef FLD
3900 }
3901 NEXT (vpc);
3902
3903 CASE (sem, INSN_PAR_JNC) : /* jnc $sr */
3904 {
3905 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3906 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3907 #define FLD(f) abuf->fields.sfmt_jl.f
3908 #define OPRND(f) par_exec->operands.sfmt_jc.f
3909 int UNUSED written = 0;
3910 IADDR UNUSED pc = abuf->addr;
3911 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3912
3913 if (NOTBI (CPU (h_cond))) {
3914 {
3915 USI opval = ANDSI (* FLD (i_sr), -4);
3916 OPRND (pc) = opval;
3917 written |= (1 << 2);
3918 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3919 }
3920 }
3921
3922 abuf->written = written;
3923 #undef OPRND
3924 #undef FLD
3925 }
3926 NEXT (vpc);
3927
3928 CASE (sem, INSN_WRITE_JNC) : /* jnc $sr */
3929 {
3930 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3931 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3932 #define FLD(f) abuf->fields.sfmt_jl.f
3933 #define OPRND(f) par_exec->operands.sfmt_jc.f
3934 int UNUSED written = abuf->written;
3935 IADDR UNUSED pc = abuf->addr;
3936 SEM_BRANCH_INIT
3937 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3938
3939 if (written & (1 << 2))
3940 {
3941 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3942 }
3943
3944 SEM_BRANCH_FINI (vpc);
3945 #undef OPRND
3946 #undef FLD
3947 }
3948 NEXT (vpc);
3949
3950 CASE (sem, INSN_PAR_JL) : /* jl $sr */
3951 {
3952 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3953 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3954 #define FLD(f) abuf->fields.sfmt_jl.f
3955 #define OPRND(f) par_exec->operands.sfmt_jl.f
3956 int UNUSED written = 0;
3957 IADDR UNUSED pc = abuf->addr;
3958 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3959
3960 {
3961 SI temp0;USI temp1;
3962 temp0 = ADDSI (ANDSI (pc, -4), 4);
3963 temp1 = ANDSI (* FLD (i_sr), -4);
3964 {
3965 SI opval = temp0;
3966 OPRND (h_gr_SI_14) = opval;
3967 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3968 }
3969 {
3970 USI opval = temp1;
3971 OPRND (pc) = opval;
3972 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3973 }
3974 }
3975
3976 #undef OPRND
3977 #undef FLD
3978 }
3979 NEXT (vpc);
3980
3981 CASE (sem, INSN_WRITE_JL) : /* jl $sr */
3982 {
3983 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3984 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3985 #define FLD(f) abuf->fields.sfmt_jl.f
3986 #define OPRND(f) par_exec->operands.sfmt_jl.f
3987 int UNUSED written = abuf->written;
3988 IADDR UNUSED pc = abuf->addr;
3989 SEM_BRANCH_INIT
3990 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3991
3992 CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_SI_14);
3993 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3994
3995 SEM_BRANCH_FINI (vpc);
3996 #undef OPRND
3997 #undef FLD
3998 }
3999 NEXT (vpc);
4000
4001 CASE (sem, INSN_PAR_JMP) : /* jmp $sr */
4002 {
4003 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4004 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4005 #define FLD(f) abuf->fields.sfmt_jl.f
4006 #define OPRND(f) par_exec->operands.sfmt_jmp.f
4007 int UNUSED written = 0;
4008 IADDR UNUSED pc = abuf->addr;
4009 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4010
4011 {
4012 USI opval = ANDSI (* FLD (i_sr), -4);
4013 OPRND (pc) = opval;
4014 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4015 }
4016
4017 #undef OPRND
4018 #undef FLD
4019 }
4020 NEXT (vpc);
4021
4022 CASE (sem, INSN_WRITE_JMP) : /* jmp $sr */
4023 {
4024 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4025 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4026 #define FLD(f) abuf->fields.sfmt_jl.f
4027 #define OPRND(f) par_exec->operands.sfmt_jmp.f
4028 int UNUSED written = abuf->written;
4029 IADDR UNUSED pc = abuf->addr;
4030 SEM_BRANCH_INIT
4031 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4032
4033 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
4034
4035 SEM_BRANCH_FINI (vpc);
4036 #undef OPRND
4037 #undef FLD
4038 }
4039 NEXT (vpc);
4040
4041 CASE (sem, INSN_PAR_LD) : /* ld $dr,@$sr */
4042 {
4043 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4044 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4045 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4046 #define OPRND(f) par_exec->operands.sfmt_ld.f
4047 int UNUSED written = 0;
4048 IADDR UNUSED pc = abuf->addr;
4049 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4050
4051 {
4052 SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
4053 OPRND (dr) = opval;
4054 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4055 }
4056
4057 #undef OPRND
4058 #undef FLD
4059 }
4060 NEXT (vpc);
4061
4062 CASE (sem, INSN_WRITE_LD) : /* ld $dr,@$sr */
4063 {
4064 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4065 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4066 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4067 #define OPRND(f) par_exec->operands.sfmt_ld.f
4068 int UNUSED written = abuf->written;
4069 IADDR UNUSED pc = abuf->addr;
4070 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4071
4072 * FLD (i_dr) = OPRND (dr);
4073
4074 #undef OPRND
4075 #undef FLD
4076 }
4077 NEXT (vpc);
4078
4079 CASE (sem, INSN_PAR_LDB) : /* ldb $dr,@$sr */
4080 {
4081 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4082 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4083 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4084 #define OPRND(f) par_exec->operands.sfmt_ldb.f
4085 int UNUSED written = 0;
4086 IADDR UNUSED pc = abuf->addr;
4087 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4088
4089 {
4090 SI opval = EXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
4091 OPRND (dr) = opval;
4092 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4093 }
4094
4095 #undef OPRND
4096 #undef FLD
4097 }
4098 NEXT (vpc);
4099
4100 CASE (sem, INSN_WRITE_LDB) : /* ldb $dr,@$sr */
4101 {
4102 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4103 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4104 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4105 #define OPRND(f) par_exec->operands.sfmt_ldb.f
4106 int UNUSED written = abuf->written;
4107 IADDR UNUSED pc = abuf->addr;
4108 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4109
4110 * FLD (i_dr) = OPRND (dr);
4111
4112 #undef OPRND
4113 #undef FLD
4114 }
4115 NEXT (vpc);
4116
4117 CASE (sem, INSN_PAR_LDH) : /* ldh $dr,@$sr */
4118 {
4119 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4120 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4121 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4122 #define OPRND(f) par_exec->operands.sfmt_ldh.f
4123 int UNUSED written = 0;
4124 IADDR UNUSED pc = abuf->addr;
4125 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4126
4127 {
4128 SI opval = EXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
4129 OPRND (dr) = opval;
4130 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4131 }
4132
4133 #undef OPRND
4134 #undef FLD
4135 }
4136 NEXT (vpc);
4137
4138 CASE (sem, INSN_WRITE_LDH) : /* ldh $dr,@$sr */
4139 {
4140 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4141 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4142 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4143 #define OPRND(f) par_exec->operands.sfmt_ldh.f
4144 int UNUSED written = abuf->written;
4145 IADDR UNUSED pc = abuf->addr;
4146 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4147
4148 * FLD (i_dr) = OPRND (dr);
4149
4150 #undef OPRND
4151 #undef FLD
4152 }
4153 NEXT (vpc);
4154
4155 CASE (sem, INSN_PAR_LDUB) : /* ldub $dr,@$sr */
4156 {
4157 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4158 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4159 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4160 #define OPRND(f) par_exec->operands.sfmt_ldb.f
4161 int UNUSED written = 0;
4162 IADDR UNUSED pc = abuf->addr;
4163 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4164
4165 {
4166 SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
4167 OPRND (dr) = opval;
4168 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4169 }
4170
4171 #undef OPRND
4172 #undef FLD
4173 }
4174 NEXT (vpc);
4175
4176 CASE (sem, INSN_WRITE_LDUB) : /* ldub $dr,@$sr */
4177 {
4178 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4179 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4180 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4181 #define OPRND(f) par_exec->operands.sfmt_ldb.f
4182 int UNUSED written = abuf->written;
4183 IADDR UNUSED pc = abuf->addr;
4184 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4185
4186 * FLD (i_dr) = OPRND (dr);
4187
4188 #undef OPRND
4189 #undef FLD
4190 }
4191 NEXT (vpc);
4192
4193 CASE (sem, INSN_PAR_LDUH) : /* lduh $dr,@$sr */
4194 {
4195 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4196 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4197 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4198 #define OPRND(f) par_exec->operands.sfmt_ldh.f
4199 int UNUSED written = 0;
4200 IADDR UNUSED pc = abuf->addr;
4201 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4202
4203 {
4204 SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
4205 OPRND (dr) = opval;
4206 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4207 }
4208
4209 #undef OPRND
4210 #undef FLD
4211 }
4212 NEXT (vpc);
4213
4214 CASE (sem, INSN_WRITE_LDUH) : /* lduh $dr,@$sr */
4215 {
4216 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4217 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4218 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4219 #define OPRND(f) par_exec->operands.sfmt_ldh.f
4220 int UNUSED written = abuf->written;
4221 IADDR UNUSED pc = abuf->addr;
4222 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4223
4224 * FLD (i_dr) = OPRND (dr);
4225
4226 #undef OPRND
4227 #undef FLD
4228 }
4229 NEXT (vpc);
4230
4231 CASE (sem, INSN_PAR_LD_PLUS) : /* ld $dr,@$sr+ */
4232 {
4233 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4234 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4235 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4236 #define OPRND(f) par_exec->operands.sfmt_ld_plus.f
4237 int UNUSED written = 0;
4238 IADDR UNUSED pc = abuf->addr;
4239 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4240
4241 {
4242 SI temp0;SI temp1;
4243 temp0 = GETMEMSI (current_cpu, pc, * FLD (i_sr));
4244 temp1 = ADDSI (* FLD (i_sr), 4);
4245 {
4246 SI opval = temp0;
4247 OPRND (dr) = opval;
4248 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4249 }
4250 {
4251 SI opval = temp1;
4252 OPRND (sr) = opval;
4253 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4254 }
4255 }
4256
4257 #undef OPRND
4258 #undef FLD
4259 }
4260 NEXT (vpc);
4261
4262 CASE (sem, INSN_WRITE_LD_PLUS) : /* ld $dr,@$sr+ */
4263 {
4264 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4265 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4266 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4267 #define OPRND(f) par_exec->operands.sfmt_ld_plus.f
4268 int UNUSED written = abuf->written;
4269 IADDR UNUSED pc = abuf->addr;
4270 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4271
4272 * FLD (i_dr) = OPRND (dr);
4273 * FLD (i_sr) = OPRND (sr);
4274
4275 #undef OPRND
4276 #undef FLD
4277 }
4278 NEXT (vpc);
4279
4280 CASE (sem, INSN_PAR_LDI8) : /* ldi8 $dr,$simm8 */
4281 {
4282 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4283 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4284 #define FLD(f) abuf->fields.sfmt_addi.f
4285 #define OPRND(f) par_exec->operands.sfmt_ldi8.f
4286 int UNUSED written = 0;
4287 IADDR UNUSED pc = abuf->addr;
4288 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4289
4290 {
4291 SI opval = FLD (f_simm8);
4292 OPRND (dr) = opval;
4293 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4294 }
4295
4296 #undef OPRND
4297 #undef FLD
4298 }
4299 NEXT (vpc);
4300
4301 CASE (sem, INSN_WRITE_LDI8) : /* ldi8 $dr,$simm8 */
4302 {
4303 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4304 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4305 #define FLD(f) abuf->fields.sfmt_addi.f
4306 #define OPRND(f) par_exec->operands.sfmt_ldi8.f
4307 int UNUSED written = abuf->written;
4308 IADDR UNUSED pc = abuf->addr;
4309 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4310
4311 * FLD (i_dr) = OPRND (dr);
4312
4313 #undef OPRND
4314 #undef FLD
4315 }
4316 NEXT (vpc);
4317
4318 CASE (sem, INSN_PAR_LOCK) : /* lock $dr,@$sr */
4319 {
4320 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4321 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4322 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4323 #define OPRND(f) par_exec->operands.sfmt_lock.f
4324 int UNUSED written = 0;
4325 IADDR UNUSED pc = abuf->addr;
4326 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4327
4328 {
4329 {
4330 BI opval = 1;
4331 OPRND (h_lock_BI) = opval;
4332 TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
4333 }
4334 {
4335 SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
4336 OPRND (dr) = opval;
4337 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4338 }
4339 }
4340
4341 #undef OPRND
4342 #undef FLD
4343 }
4344 NEXT (vpc);
4345
4346 CASE (sem, INSN_WRITE_LOCK) : /* lock $dr,@$sr */
4347 {
4348 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4349 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4350 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4351 #define OPRND(f) par_exec->operands.sfmt_lock.f
4352 int UNUSED written = abuf->written;
4353 IADDR UNUSED pc = abuf->addr;
4354 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4355
4356 * FLD (i_dr) = OPRND (dr);
4357 CPU (h_lock) = OPRND (h_lock_BI);
4358
4359 #undef OPRND
4360 #undef FLD
4361 }
4362 NEXT (vpc);
4363
4364 CASE (sem, INSN_PAR_MACHI_A) : /* machi $src1,$src2,$acc */
4365 {
4366 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4367 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4368 #define FLD(f) abuf->fields.sfmt_machi_a.f
4369 #define OPRND(f) par_exec->operands.sfmt_machi_a.f
4370 int UNUSED written = 0;
4371 IADDR UNUSED pc = abuf->addr;
4372 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4373
4374 {
4375 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8);
4376 OPRND (acc) = opval;
4377 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4378 }
4379
4380 #undef OPRND
4381 #undef FLD
4382 }
4383 NEXT (vpc);
4384
4385 CASE (sem, INSN_WRITE_MACHI_A) : /* machi $src1,$src2,$acc */
4386 {
4387 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4388 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4389 #define FLD(f) abuf->fields.sfmt_machi_a.f
4390 #define OPRND(f) par_exec->operands.sfmt_machi_a.f
4391 int UNUSED written = abuf->written;
4392 IADDR UNUSED pc = abuf->addr;
4393 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4394
4395 SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4396
4397 #undef OPRND
4398 #undef FLD
4399 }
4400 NEXT (vpc);
4401
4402 CASE (sem, INSN_PAR_MACLO_A) : /* maclo $src1,$src2,$acc */
4403 {
4404 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4405 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4406 #define FLD(f) abuf->fields.sfmt_machi_a.f
4407 #define OPRND(f) par_exec->operands.sfmt_machi_a.f
4408 int UNUSED written = 0;
4409 IADDR UNUSED pc = abuf->addr;
4410 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4411
4412 {
4413 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8);
4414 OPRND (acc) = opval;
4415 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4416 }
4417
4418 #undef OPRND
4419 #undef FLD
4420 }
4421 NEXT (vpc);
4422
4423 CASE (sem, INSN_WRITE_MACLO_A) : /* maclo $src1,$src2,$acc */
4424 {
4425 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4426 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4427 #define FLD(f) abuf->fields.sfmt_machi_a.f
4428 #define OPRND(f) par_exec->operands.sfmt_machi_a.f
4429 int UNUSED written = abuf->written;
4430 IADDR UNUSED pc = abuf->addr;
4431 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4432
4433 SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4434
4435 #undef OPRND
4436 #undef FLD
4437 }
4438 NEXT (vpc);
4439
4440 CASE (sem, INSN_PAR_MACWHI_A) : /* macwhi $src1,$src2,$acc */
4441 {
4442 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4443 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4444 #define FLD(f) abuf->fields.sfmt_machi_a.f
4445 #define OPRND(f) par_exec->operands.sfmt_machi_a.f
4446 int UNUSED written = 0;
4447 IADDR UNUSED pc = abuf->addr;
4448 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4449
4450 {
4451 DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))));
4452 OPRND (acc) = opval;
4453 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4454 }
4455
4456 #undef OPRND
4457 #undef FLD
4458 }
4459 NEXT (vpc);
4460
4461 CASE (sem, INSN_WRITE_MACWHI_A) : /* macwhi $src1,$src2,$acc */
4462 {
4463 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4464 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4465 #define FLD(f) abuf->fields.sfmt_machi_a.f
4466 #define OPRND(f) par_exec->operands.sfmt_machi_a.f
4467 int UNUSED written = abuf->written;
4468 IADDR UNUSED pc = abuf->addr;
4469 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4470
4471 SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4472
4473 #undef OPRND
4474 #undef FLD
4475 }
4476 NEXT (vpc);
4477
4478 CASE (sem, INSN_PAR_MACWLO_A) : /* macwlo $src1,$src2,$acc */
4479 {
4480 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4481 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4482 #define FLD(f) abuf->fields.sfmt_machi_a.f
4483 #define OPRND(f) par_exec->operands.sfmt_machi_a.f
4484 int UNUSED written = 0;
4485 IADDR UNUSED pc = abuf->addr;
4486 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4487
4488 {
4489 DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))));
4490 OPRND (acc) = opval;
4491 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4492 }
4493
4494 #undef OPRND
4495 #undef FLD
4496 }
4497 NEXT (vpc);
4498
4499 CASE (sem, INSN_WRITE_MACWLO_A) : /* macwlo $src1,$src2,$acc */
4500 {
4501 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4502 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4503 #define FLD(f) abuf->fields.sfmt_machi_a.f
4504 #define OPRND(f) par_exec->operands.sfmt_machi_a.f
4505 int UNUSED written = abuf->written;
4506 IADDR UNUSED pc = abuf->addr;
4507 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4508
4509 SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4510
4511 #undef OPRND
4512 #undef FLD
4513 }
4514 NEXT (vpc);
4515
4516 CASE (sem, INSN_PAR_MUL) : /* mul $dr,$sr */
4517 {
4518 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4519 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4520 #define FLD(f) abuf->fields.sfmt_add.f
4521 #define OPRND(f) par_exec->operands.sfmt_add.f
4522 int UNUSED written = 0;
4523 IADDR UNUSED pc = abuf->addr;
4524 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4525
4526 {
4527 SI opval = MULSI (* FLD (i_dr), * FLD (i_sr));
4528 OPRND (dr) = opval;
4529 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4530 }
4531
4532 #undef OPRND
4533 #undef FLD
4534 }
4535 NEXT (vpc);
4536
4537 CASE (sem, INSN_WRITE_MUL) : /* mul $dr,$sr */
4538 {
4539 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4540 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4541 #define FLD(f) abuf->fields.sfmt_add.f
4542 #define OPRND(f) par_exec->operands.sfmt_add.f
4543 int UNUSED written = abuf->written;
4544 IADDR UNUSED pc = abuf->addr;
4545 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4546
4547 * FLD (i_dr) = OPRND (dr);
4548
4549 #undef OPRND
4550 #undef FLD
4551 }
4552 NEXT (vpc);
4553
4554 CASE (sem, INSN_PAR_MULHI_A) : /* mulhi $src1,$src2,$acc */
4555 {
4556 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4557 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4558 #define FLD(f) abuf->fields.sfmt_machi_a.f
4559 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4560 int UNUSED written = 0;
4561 IADDR UNUSED pc = abuf->addr;
4562 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4563
4564 {
4565 DI opval = SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 16), 16);
4566 OPRND (acc) = opval;
4567 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4568 }
4569
4570 #undef OPRND
4571 #undef FLD
4572 }
4573 NEXT (vpc);
4574
4575 CASE (sem, INSN_WRITE_MULHI_A) : /* mulhi $src1,$src2,$acc */
4576 {
4577 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4578 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4579 #define FLD(f) abuf->fields.sfmt_machi_a.f
4580 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4581 int UNUSED written = abuf->written;
4582 IADDR UNUSED pc = abuf->addr;
4583 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4584
4585 SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4586
4587 #undef OPRND
4588 #undef FLD
4589 }
4590 NEXT (vpc);
4591
4592 CASE (sem, INSN_PAR_MULLO_A) : /* mullo $src1,$src2,$acc */
4593 {
4594 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4595 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4596 #define FLD(f) abuf->fields.sfmt_machi_a.f
4597 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4598 int UNUSED written = 0;
4599 IADDR UNUSED pc = abuf->addr;
4600 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4601
4602 {
4603 DI opval = SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 16), 16);
4604 OPRND (acc) = opval;
4605 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4606 }
4607
4608 #undef OPRND
4609 #undef FLD
4610 }
4611 NEXT (vpc);
4612
4613 CASE (sem, INSN_WRITE_MULLO_A) : /* mullo $src1,$src2,$acc */
4614 {
4615 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4616 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4617 #define FLD(f) abuf->fields.sfmt_machi_a.f
4618 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4619 int UNUSED written = abuf->written;
4620 IADDR UNUSED pc = abuf->addr;
4621 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4622
4623 SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4624
4625 #undef OPRND
4626 #undef FLD
4627 }
4628 NEXT (vpc);
4629
4630 CASE (sem, INSN_PAR_MULWHI_A) : /* mulwhi $src1,$src2,$acc */
4631 {
4632 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4633 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4634 #define FLD(f) abuf->fields.sfmt_machi_a.f
4635 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4636 int UNUSED written = 0;
4637 IADDR UNUSED pc = abuf->addr;
4638 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4639
4640 {
4641 DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))));
4642 OPRND (acc) = opval;
4643 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4644 }
4645
4646 #undef OPRND
4647 #undef FLD
4648 }
4649 NEXT (vpc);
4650
4651 CASE (sem, INSN_WRITE_MULWHI_A) : /* mulwhi $src1,$src2,$acc */
4652 {
4653 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4654 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4655 #define FLD(f) abuf->fields.sfmt_machi_a.f
4656 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4657 int UNUSED written = abuf->written;
4658 IADDR UNUSED pc = abuf->addr;
4659 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4660
4661 SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4662
4663 #undef OPRND
4664 #undef FLD
4665 }
4666 NEXT (vpc);
4667
4668 CASE (sem, INSN_PAR_MULWLO_A) : /* mulwlo $src1,$src2,$acc */
4669 {
4670 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4671 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4672 #define FLD(f) abuf->fields.sfmt_machi_a.f
4673 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4674 int UNUSED written = 0;
4675 IADDR UNUSED pc = abuf->addr;
4676 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4677
4678 {
4679 DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))));
4680 OPRND (acc) = opval;
4681 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4682 }
4683
4684 #undef OPRND
4685 #undef FLD
4686 }
4687 NEXT (vpc);
4688
4689 CASE (sem, INSN_WRITE_MULWLO_A) : /* mulwlo $src1,$src2,$acc */
4690 {
4691 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4692 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4693 #define FLD(f) abuf->fields.sfmt_machi_a.f
4694 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4695 int UNUSED written = abuf->written;
4696 IADDR UNUSED pc = abuf->addr;
4697 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4698
4699 SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4700
4701 #undef OPRND
4702 #undef FLD
4703 }
4704 NEXT (vpc);
4705
4706 CASE (sem, INSN_PAR_MV) : /* mv $dr,$sr */
4707 {
4708 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4709 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4710 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4711 #define OPRND(f) par_exec->operands.sfmt_mv.f
4712 int UNUSED written = 0;
4713 IADDR UNUSED pc = abuf->addr;
4714 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4715
4716 {
4717 SI opval = * FLD (i_sr);
4718 OPRND (dr) = opval;
4719 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4720 }
4721
4722 #undef OPRND
4723 #undef FLD
4724 }
4725 NEXT (vpc);
4726
4727 CASE (sem, INSN_WRITE_MV) : /* mv $dr,$sr */
4728 {
4729 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4730 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4731 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4732 #define OPRND(f) par_exec->operands.sfmt_mv.f
4733 int UNUSED written = abuf->written;
4734 IADDR UNUSED pc = abuf->addr;
4735 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4736
4737 * FLD (i_dr) = OPRND (dr);
4738
4739 #undef OPRND
4740 #undef FLD
4741 }
4742 NEXT (vpc);
4743
4744 CASE (sem, INSN_PAR_MVFACHI_A) : /* mvfachi $dr,$accs */
4745 {
4746 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4747 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4748 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
4749 #define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
4750 int UNUSED written = 0;
4751 IADDR UNUSED pc = abuf->addr;
4752 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4753
4754 {
4755 SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 32));
4756 OPRND (dr) = opval;
4757 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4758 }
4759
4760 #undef OPRND
4761 #undef FLD
4762 }
4763 NEXT (vpc);
4764
4765 CASE (sem, INSN_WRITE_MVFACHI_A) : /* mvfachi $dr,$accs */
4766 {
4767 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4768 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4769 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
4770 #define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
4771 int UNUSED written = abuf->written;
4772 IADDR UNUSED pc = abuf->addr;
4773 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4774
4775 * FLD (i_dr) = OPRND (dr);
4776
4777 #undef OPRND
4778 #undef FLD
4779 }
4780 NEXT (vpc);
4781
4782 CASE (sem, INSN_PAR_MVFACLO_A) : /* mvfaclo $dr,$accs */
4783 {
4784 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4785 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4786 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
4787 #define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
4788 int UNUSED written = 0;
4789 IADDR UNUSED pc = abuf->addr;
4790 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4791
4792 {
4793 SI opval = TRUNCDISI (GET_H_ACCUMS (FLD (f_accs)));
4794 OPRND (dr) = opval;
4795 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4796 }
4797
4798 #undef OPRND
4799 #undef FLD
4800 }
4801 NEXT (vpc);
4802
4803 CASE (sem, INSN_WRITE_MVFACLO_A) : /* mvfaclo $dr,$accs */
4804 {
4805 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4806 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4807 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
4808 #define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
4809 int UNUSED written = abuf->written;
4810 IADDR UNUSED pc = abuf->addr;
4811 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4812
4813 * FLD (i_dr) = OPRND (dr);
4814
4815 #undef OPRND
4816 #undef FLD
4817 }
4818 NEXT (vpc);
4819
4820 CASE (sem, INSN_PAR_MVFACMI_A) : /* mvfacmi $dr,$accs */
4821 {
4822 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4823 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4824 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
4825 #define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
4826 int UNUSED written = 0;
4827 IADDR UNUSED pc = abuf->addr;
4828 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4829
4830 {
4831 SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 16));
4832 OPRND (dr) = opval;
4833 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4834 }
4835
4836 #undef OPRND
4837 #undef FLD
4838 }
4839 NEXT (vpc);
4840
4841 CASE (sem, INSN_WRITE_MVFACMI_A) : /* mvfacmi $dr,$accs */
4842 {
4843 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4844 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4845 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
4846 #define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
4847 int UNUSED written = abuf->written;
4848 IADDR UNUSED pc = abuf->addr;
4849 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4850
4851 * FLD (i_dr) = OPRND (dr);
4852
4853 #undef OPRND
4854 #undef FLD
4855 }
4856 NEXT (vpc);
4857
4858 CASE (sem, INSN_PAR_MVFC) : /* mvfc $dr,$scr */
4859 {
4860 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4861 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4862 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4863 #define OPRND(f) par_exec->operands.sfmt_mvfc.f
4864 int UNUSED written = 0;
4865 IADDR UNUSED pc = abuf->addr;
4866 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4867
4868 {
4869 SI opval = GET_H_CR (FLD (f_r2));
4870 OPRND (dr) = opval;
4871 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4872 }
4873
4874 #undef OPRND
4875 #undef FLD
4876 }
4877 NEXT (vpc);
4878
4879 CASE (sem, INSN_WRITE_MVFC) : /* mvfc $dr,$scr */
4880 {
4881 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4882 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4883 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4884 #define OPRND(f) par_exec->operands.sfmt_mvfc.f
4885 int UNUSED written = abuf->written;
4886 IADDR UNUSED pc = abuf->addr;
4887 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4888
4889 * FLD (i_dr) = OPRND (dr);
4890
4891 #undef OPRND
4892 #undef FLD
4893 }
4894 NEXT (vpc);
4895
4896 CASE (sem, INSN_PAR_MVTACHI_A) : /* mvtachi $src1,$accs */
4897 {
4898 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4899 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4900 #define FLD(f) abuf->fields.sfmt_mvtachi_a.f
4901 #define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f
4902 int UNUSED written = 0;
4903 IADDR UNUSED pc = abuf->addr;
4904 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4905
4906 {
4907 DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (* FLD (i_src1)), 32));
4908 OPRND (accs) = opval;
4909 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4910 }
4911
4912 #undef OPRND
4913 #undef FLD
4914 }
4915 NEXT (vpc);
4916
4917 CASE (sem, INSN_WRITE_MVTACHI_A) : /* mvtachi $src1,$accs */
4918 {
4919 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4920 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4921 #define FLD(f) abuf->fields.sfmt_mvtachi_a.f
4922 #define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f
4923 int UNUSED written = abuf->written;
4924 IADDR UNUSED pc = abuf->addr;
4925 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4926
4927 SET_H_ACCUMS (FLD (f_accs), OPRND (accs));
4928
4929 #undef OPRND
4930 #undef FLD
4931 }
4932 NEXT (vpc);
4933
4934 CASE (sem, INSN_PAR_MVTACLO_A) : /* mvtaclo $src1,$accs */
4935 {
4936 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4937 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4938 #define FLD(f) abuf->fields.sfmt_mvtachi_a.f
4939 #define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f
4940 int UNUSED written = 0;
4941 IADDR UNUSED pc = abuf->addr;
4942 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4943
4944 {
4945 DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0xffffffff, 0)), ZEXTSIDI (* FLD (i_src1)));
4946 OPRND (accs) = opval;
4947 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4948 }
4949
4950 #undef OPRND
4951 #undef FLD
4952 }
4953 NEXT (vpc);
4954
4955 CASE (sem, INSN_WRITE_MVTACLO_A) : /* mvtaclo $src1,$accs */
4956 {
4957 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4958 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4959 #define FLD(f) abuf->fields.sfmt_mvtachi_a.f
4960 #define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f
4961 int UNUSED written = abuf->written;
4962 IADDR UNUSED pc = abuf->addr;
4963 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4964
4965 SET_H_ACCUMS (FLD (f_accs), OPRND (accs));
4966
4967 #undef OPRND
4968 #undef FLD
4969 }
4970 NEXT (vpc);
4971
4972 CASE (sem, INSN_PAR_MVTC) : /* mvtc $sr,$dcr */
4973 {
4974 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4975 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4976 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4977 #define OPRND(f) par_exec->operands.sfmt_mvtc.f
4978 int UNUSED written = 0;
4979 IADDR UNUSED pc = abuf->addr;
4980 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4981
4982 {
4983 USI opval = * FLD (i_sr);
4984 OPRND (dcr) = opval;
4985 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
4986 }
4987
4988 #undef OPRND
4989 #undef FLD
4990 }
4991 NEXT (vpc);
4992
4993 CASE (sem, INSN_WRITE_MVTC) : /* mvtc $sr,$dcr */
4994 {
4995 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4996 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4997 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4998 #define OPRND(f) par_exec->operands.sfmt_mvtc.f
4999 int UNUSED written = abuf->written;
5000 IADDR UNUSED pc = abuf->addr;
5001 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5002
5003 SET_H_CR (FLD (f_r1), OPRND (dcr));
5004
5005 #undef OPRND
5006 #undef FLD
5007 }
5008 NEXT (vpc);
5009
5010 CASE (sem, INSN_PAR_NEG) : /* neg $dr,$sr */
5011 {
5012 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5013 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5014 #define FLD(f) abuf->fields.sfmt_ld_plus.f
5015 #define OPRND(f) par_exec->operands.sfmt_mv.f
5016 int UNUSED written = 0;
5017 IADDR UNUSED pc = abuf->addr;
5018 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5019
5020 {
5021 SI opval = NEGSI (* FLD (i_sr));
5022 OPRND (dr) = opval;
5023 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5024 }
5025
5026 #undef OPRND
5027 #undef FLD
5028 }
5029 NEXT (vpc);
5030
5031 CASE (sem, INSN_WRITE_NEG) : /* neg $dr,$sr */
5032 {
5033 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5034 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5035 #define FLD(f) abuf->fields.sfmt_ld_plus.f
5036 #define OPRND(f) par_exec->operands.sfmt_mv.f
5037 int UNUSED written = abuf->written;
5038 IADDR UNUSED pc = abuf->addr;
5039 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5040
5041 * FLD (i_dr) = OPRND (dr);
5042
5043 #undef OPRND
5044 #undef FLD
5045 }
5046 NEXT (vpc);
5047
5048 CASE (sem, INSN_PAR_NOP) : /* nop */
5049 {
5050 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5051 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5052 #define FLD(f) abuf->fields.fmt_empty.f
5053 #define OPRND(f) par_exec->operands.sfmt_nop.f
5054 int UNUSED written = 0;
5055 IADDR UNUSED pc = abuf->addr;
5056 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5057
5058 PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr);
5059
5060 #undef OPRND
5061 #undef FLD
5062 }
5063 NEXT (vpc);
5064
5065 CASE (sem, INSN_WRITE_NOP) : /* nop */
5066 {
5067 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5068 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5069 #define FLD(f) abuf->fields.fmt_empty.f
5070 #define OPRND(f) par_exec->operands.sfmt_nop.f
5071 int UNUSED written = abuf->written;
5072 IADDR UNUSED pc = abuf->addr;
5073 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5074
5075
5076 #undef OPRND
5077 #undef FLD
5078 }
5079 NEXT (vpc);
5080
5081 CASE (sem, INSN_PAR_NOT) : /* not $dr,$sr */
5082 {
5083 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5084 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5085 #define FLD(f) abuf->fields.sfmt_ld_plus.f
5086 #define OPRND(f) par_exec->operands.sfmt_mv.f
5087 int UNUSED written = 0;
5088 IADDR UNUSED pc = abuf->addr;
5089 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5090
5091 {
5092 SI opval = INVSI (* FLD (i_sr));
5093 OPRND (dr) = opval;
5094 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5095 }
5096
5097 #undef OPRND
5098 #undef FLD
5099 }
5100 NEXT (vpc);
5101
5102 CASE (sem, INSN_WRITE_NOT) : /* not $dr,$sr */
5103 {
5104 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5105 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5106 #define FLD(f) abuf->fields.sfmt_ld_plus.f
5107 #define OPRND(f) par_exec->operands.sfmt_mv.f
5108 int UNUSED written = abuf->written;
5109 IADDR UNUSED pc = abuf->addr;
5110 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5111
5112 * FLD (i_dr) = OPRND (dr);
5113
5114 #undef OPRND
5115 #undef FLD
5116 }
5117 NEXT (vpc);
5118
5119 CASE (sem, INSN_PAR_RAC_DSI) : /* rac $accd,$accs,$imm1 */
5120 {
5121 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5122 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5123 #define FLD(f) abuf->fields.sfmt_rac_dsi.f
5124 #define OPRND(f) par_exec->operands.sfmt_rac_dsi.f
5125 int UNUSED written = 0;
5126 IADDR UNUSED pc = abuf->addr;
5127 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5128
5129 {
5130 DI tmp_tmp1;
5131 tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1));
5132 tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 32768));
5133 {
5134 DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0xffff0000))) ? (MAKEDI (32767, 0xffff0000)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0xffff0000)));
5135 OPRND (accd) = opval;
5136 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
5137 }
5138 }
5139
5140 #undef OPRND
5141 #undef FLD
5142 }
5143 NEXT (vpc);
5144
5145 CASE (sem, INSN_WRITE_RAC_DSI) : /* rac $accd,$accs,$imm1 */
5146 {
5147 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5148 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5149 #define FLD(f) abuf->fields.sfmt_rac_dsi.f
5150 #define OPRND(f) par_exec->operands.sfmt_rac_dsi.f
5151 int UNUSED written = abuf->written;
5152 IADDR UNUSED pc = abuf->addr;
5153 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5154
5155 SET_H_ACCUMS (FLD (f_accd), OPRND (accd));
5156
5157 #undef OPRND
5158 #undef FLD
5159 }
5160 NEXT (vpc);
5161
5162 CASE (sem, INSN_PAR_RACH_DSI) : /* rach $accd,$accs,$imm1 */
5163 {
5164 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5165 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5166 #define FLD(f) abuf->fields.sfmt_rac_dsi.f
5167 #define OPRND(f) par_exec->operands.sfmt_rac_dsi.f
5168 int UNUSED written = 0;
5169 IADDR UNUSED pc = abuf->addr;
5170 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5171
5172 {
5173 DI tmp_tmp1;
5174 tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1));
5175 tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 0x80000000));
5176 {
5177 DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0))) ? (MAKEDI (32767, 0)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0)));
5178 OPRND (accd) = opval;
5179 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
5180 }
5181 }
5182
5183 #undef OPRND
5184 #undef FLD
5185 }
5186 NEXT (vpc);
5187
5188 CASE (sem, INSN_WRITE_RACH_DSI) : /* rach $accd,$accs,$imm1 */
5189 {
5190 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5191 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5192 #define FLD(f) abuf->fields.sfmt_rac_dsi.f
5193 #define OPRND(f) par_exec->operands.sfmt_rac_dsi.f
5194 int UNUSED written = abuf->written;
5195 IADDR UNUSED pc = abuf->addr;
5196 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5197
5198 SET_H_ACCUMS (FLD (f_accd), OPRND (accd));
5199
5200 #undef OPRND
5201 #undef FLD
5202 }
5203 NEXT (vpc);
5204
5205 CASE (sem, INSN_PAR_RTE) : /* rte */
5206 {
5207 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5208 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5209 #define FLD(f) abuf->fields.fmt_empty.f
5210 #define OPRND(f) par_exec->operands.sfmt_rte.f
5211 int UNUSED written = 0;
5212 IADDR UNUSED pc = abuf->addr;
5213 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5214
5215 {
5216 {
5217 USI opval = ANDSI (GET_H_CR (((UINT) 6)), -4);
5218 OPRND (pc) = opval;
5219 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
5220 }
5221 {
5222 USI opval = GET_H_CR (((UINT) 14));
5223 OPRND (h_cr_USI_6) = opval;
5224 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
5225 }
5226 {
5227 UQI opval = CPU (h_bpsw);
5228 OPRND (h_psw_UQI) = opval;
5229 TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
5230 }
5231 {
5232 UQI opval = CPU (h_bbpsw);
5233 OPRND (h_bpsw_UQI) = opval;
5234 TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
5235 }
5236 }
5237
5238 #undef OPRND
5239 #undef FLD
5240 }
5241 NEXT (vpc);
5242
5243 CASE (sem, INSN_WRITE_RTE) : /* rte */
5244 {
5245 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5246 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5247 #define FLD(f) abuf->fields.fmt_empty.f
5248 #define OPRND(f) par_exec->operands.sfmt_rte.f
5249 int UNUSED written = abuf->written;
5250 IADDR UNUSED pc = abuf->addr;
5251 SEM_BRANCH_INIT
5252 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5253
5254 CPU (h_bpsw) = OPRND (h_bpsw_UQI);
5255 SET_H_CR (((UINT) 6), OPRND (h_cr_USI_6));
5256 SET_H_PSW (OPRND (h_psw_UQI));
5257 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
5258
5259 SEM_BRANCH_FINI (vpc);
5260 #undef OPRND
5261 #undef FLD
5262 }
5263 NEXT (vpc);
5264
5265 CASE (sem, INSN_PAR_SLL) : /* sll $dr,$sr */
5266 {
5267 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5268 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5269 #define FLD(f) abuf->fields.sfmt_add.f
5270 #define OPRND(f) par_exec->operands.sfmt_add.f
5271 int UNUSED written = 0;
5272 IADDR UNUSED pc = abuf->addr;
5273 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5274
5275 {
5276 SI opval = SLLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
5277 OPRND (dr) = opval;
5278 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5279 }
5280
5281 #undef OPRND
5282 #undef FLD
5283 }
5284 NEXT (vpc);
5285
5286 CASE (sem, INSN_WRITE_SLL) : /* sll $dr,$sr */
5287 {
5288 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5289 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5290 #define FLD(f) abuf->fields.sfmt_add.f
5291 #define OPRND(f) par_exec->operands.sfmt_add.f
5292 int UNUSED written = abuf->written;
5293 IADDR UNUSED pc = abuf->addr;
5294 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5295
5296 * FLD (i_dr) = OPRND (dr);
5297
5298 #undef OPRND
5299 #undef FLD
5300 }
5301 NEXT (vpc);
5302
5303 CASE (sem, INSN_PAR_SLLI) : /* slli $dr,$uimm5 */
5304 {
5305 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5306 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5307 #define FLD(f) abuf->fields.sfmt_slli.f
5308 #define OPRND(f) par_exec->operands.sfmt_slli.f
5309 int UNUSED written = 0;
5310 IADDR UNUSED pc = abuf->addr;
5311 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5312
5313 {
5314 SI opval = SLLSI (* FLD (i_dr), FLD (f_uimm5));
5315 OPRND (dr) = opval;
5316 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5317 }
5318
5319 #undef OPRND
5320 #undef FLD
5321 }
5322 NEXT (vpc);
5323
5324 CASE (sem, INSN_WRITE_SLLI) : /* slli $dr,$uimm5 */
5325 {
5326 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5327 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5328 #define FLD(f) abuf->fields.sfmt_slli.f
5329 #define OPRND(f) par_exec->operands.sfmt_slli.f
5330 int UNUSED written = abuf->written;
5331 IADDR UNUSED pc = abuf->addr;
5332 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5333
5334 * FLD (i_dr) = OPRND (dr);
5335
5336 #undef OPRND
5337 #undef FLD
5338 }
5339 NEXT (vpc);
5340
5341 CASE (sem, INSN_PAR_SRA) : /* sra $dr,$sr */
5342 {
5343 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5344 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5345 #define FLD(f) abuf->fields.sfmt_add.f
5346 #define OPRND(f) par_exec->operands.sfmt_add.f
5347 int UNUSED written = 0;
5348 IADDR UNUSED pc = abuf->addr;
5349 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5350
5351 {
5352 SI opval = SRASI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
5353 OPRND (dr) = opval;
5354 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5355 }
5356
5357 #undef OPRND
5358 #undef FLD
5359 }
5360 NEXT (vpc);
5361
5362 CASE (sem, INSN_WRITE_SRA) : /* sra $dr,$sr */
5363 {
5364 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5365 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5366 #define FLD(f) abuf->fields.sfmt_add.f
5367 #define OPRND(f) par_exec->operands.sfmt_add.f
5368 int UNUSED written = abuf->written;
5369 IADDR UNUSED pc = abuf->addr;
5370 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5371
5372 * FLD (i_dr) = OPRND (dr);
5373
5374 #undef OPRND
5375 #undef FLD
5376 }
5377 NEXT (vpc);
5378
5379 CASE (sem, INSN_PAR_SRAI) : /* srai $dr,$uimm5 */
5380 {
5381 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5382 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5383 #define FLD(f) abuf->fields.sfmt_slli.f
5384 #define OPRND(f) par_exec->operands.sfmt_slli.f
5385 int UNUSED written = 0;
5386 IADDR UNUSED pc = abuf->addr;
5387 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5388
5389 {
5390 SI opval = SRASI (* FLD (i_dr), FLD (f_uimm5));
5391 OPRND (dr) = opval;
5392 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5393 }
5394
5395 #undef OPRND
5396 #undef FLD
5397 }
5398 NEXT (vpc);
5399
5400 CASE (sem, INSN_WRITE_SRAI) : /* srai $dr,$uimm5 */
5401 {
5402 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5403 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5404 #define FLD(f) abuf->fields.sfmt_slli.f
5405 #define OPRND(f) par_exec->operands.sfmt_slli.f
5406 int UNUSED written = abuf->written;
5407 IADDR UNUSED pc = abuf->addr;
5408 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5409
5410 * FLD (i_dr) = OPRND (dr);
5411
5412 #undef OPRND
5413 #undef FLD
5414 }
5415 NEXT (vpc);
5416
5417 CASE (sem, INSN_PAR_SRL) : /* srl $dr,$sr */
5418 {
5419 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5420 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5421 #define FLD(f) abuf->fields.sfmt_add.f
5422 #define OPRND(f) par_exec->operands.sfmt_add.f
5423 int UNUSED written = 0;
5424 IADDR UNUSED pc = abuf->addr;
5425 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5426
5427 {
5428 SI opval = SRLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
5429 OPRND (dr) = opval;
5430 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5431 }
5432
5433 #undef OPRND
5434 #undef FLD
5435 }
5436 NEXT (vpc);
5437
5438 CASE (sem, INSN_WRITE_SRL) : /* srl $dr,$sr */
5439 {
5440 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5441 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5442 #define FLD(f) abuf->fields.sfmt_add.f
5443 #define OPRND(f) par_exec->operands.sfmt_add.f
5444 int UNUSED written = abuf->written;
5445 IADDR UNUSED pc = abuf->addr;
5446 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5447
5448 * FLD (i_dr) = OPRND (dr);
5449
5450 #undef OPRND
5451 #undef FLD
5452 }
5453 NEXT (vpc);
5454
5455 CASE (sem, INSN_PAR_SRLI) : /* srli $dr,$uimm5 */
5456 {
5457 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5458 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5459 #define FLD(f) abuf->fields.sfmt_slli.f
5460 #define OPRND(f) par_exec->operands.sfmt_slli.f
5461 int UNUSED written = 0;
5462 IADDR UNUSED pc = abuf->addr;
5463 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5464
5465 {
5466 SI opval = SRLSI (* FLD (i_dr), FLD (f_uimm5));
5467 OPRND (dr) = opval;
5468 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5469 }
5470
5471 #undef OPRND
5472 #undef FLD
5473 }
5474 NEXT (vpc);
5475
5476 CASE (sem, INSN_WRITE_SRLI) : /* srli $dr,$uimm5 */
5477 {
5478 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5479 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5480 #define FLD(f) abuf->fields.sfmt_slli.f
5481 #define OPRND(f) par_exec->operands.sfmt_slli.f
5482 int UNUSED written = abuf->written;
5483 IADDR UNUSED pc = abuf->addr;
5484 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5485
5486 * FLD (i_dr) = OPRND (dr);
5487
5488 #undef OPRND
5489 #undef FLD
5490 }
5491 NEXT (vpc);
5492
5493 CASE (sem, INSN_PAR_ST) : /* st $src1,@$src2 */
5494 {
5495 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5496 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5497 #define FLD(f) abuf->fields.sfmt_st_plus.f
5498 #define OPRND(f) par_exec->operands.sfmt_st.f
5499 int UNUSED written = 0;
5500 IADDR UNUSED pc = abuf->addr;
5501 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5502
5503 {
5504 SI opval = * FLD (i_src1);
5505 OPRND (h_memory_SI_src2_idx) = * FLD (i_src2);
5506 OPRND (h_memory_SI_src2) = opval;
5507 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5508 }
5509
5510 #undef OPRND
5511 #undef FLD
5512 }
5513 NEXT (vpc);
5514
5515 CASE (sem, INSN_WRITE_ST) : /* st $src1,@$src2 */
5516 {
5517 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5518 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5519 #define FLD(f) abuf->fields.sfmt_st_plus.f
5520 #define OPRND(f) par_exec->operands.sfmt_st.f
5521 int UNUSED written = abuf->written;
5522 IADDR UNUSED pc = abuf->addr;
5523 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5524
5525 SETMEMSI (current_cpu, pc, OPRND (h_memory_SI_src2_idx), OPRND (h_memory_SI_src2));
5526
5527 #undef OPRND
5528 #undef FLD
5529 }
5530 NEXT (vpc);
5531
5532 CASE (sem, INSN_PAR_STB) : /* stb $src1,@$src2 */
5533 {
5534 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5535 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5536 #define FLD(f) abuf->fields.sfmt_st_plus.f
5537 #define OPRND(f) par_exec->operands.sfmt_stb.f
5538 int UNUSED written = 0;
5539 IADDR UNUSED pc = abuf->addr;
5540 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5541
5542 {
5543 QI opval = * FLD (i_src1);
5544 OPRND (h_memory_QI_src2_idx) = * FLD (i_src2);
5545 OPRND (h_memory_QI_src2) = opval;
5546 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5547 }
5548
5549 #undef OPRND
5550 #undef FLD
5551 }
5552 NEXT (vpc);
5553
5554 CASE (sem, INSN_WRITE_STB) : /* stb $src1,@$src2 */
5555 {
5556 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5557 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5558 #define FLD(f) abuf->fields.sfmt_st_plus.f
5559 #define OPRND(f) par_exec->operands.sfmt_stb.f
5560 int UNUSED written = abuf->written;
5561 IADDR UNUSED pc = abuf->addr;
5562 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5563
5564 SETMEMQI (current_cpu, pc, OPRND (h_memory_QI_src2_idx), OPRND (h_memory_QI_src2));
5565
5566 #undef OPRND
5567 #undef FLD
5568 }
5569 NEXT (vpc);
5570
5571 CASE (sem, INSN_PAR_STH) : /* sth $src1,@$src2 */
5572 {
5573 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5574 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5575 #define FLD(f) abuf->fields.sfmt_st_plus.f
5576 #define OPRND(f) par_exec->operands.sfmt_sth.f
5577 int UNUSED written = 0;
5578 IADDR UNUSED pc = abuf->addr;
5579 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5580
5581 {
5582 HI opval = * FLD (i_src1);
5583 OPRND (h_memory_HI_src2_idx) = * FLD (i_src2);
5584 OPRND (h_memory_HI_src2) = opval;
5585 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5586 }
5587
5588 #undef OPRND
5589 #undef FLD
5590 }
5591 NEXT (vpc);
5592
5593 CASE (sem, INSN_WRITE_STH) : /* sth $src1,@$src2 */
5594 {
5595 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5596 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5597 #define FLD(f) abuf->fields.sfmt_st_plus.f
5598 #define OPRND(f) par_exec->operands.sfmt_sth.f
5599 int UNUSED written = abuf->written;
5600 IADDR UNUSED pc = abuf->addr;
5601 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5602
5603 SETMEMHI (current_cpu, pc, OPRND (h_memory_HI_src2_idx), OPRND (h_memory_HI_src2));
5604
5605 #undef OPRND
5606 #undef FLD
5607 }
5608 NEXT (vpc);
5609
5610 CASE (sem, INSN_PAR_ST_PLUS) : /* st $src1,@+$src2 */
5611 {
5612 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5613 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5614 #define FLD(f) abuf->fields.sfmt_st_plus.f
5615 #define OPRND(f) par_exec->operands.sfmt_st_plus.f
5616 int UNUSED written = 0;
5617 IADDR UNUSED pc = abuf->addr;
5618 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5619
5620 {
5621 SI tmp_new_src2;
5622 tmp_new_src2 = ADDSI (* FLD (i_src2), 4);
5623 {
5624 SI opval = * FLD (i_src1);
5625 OPRND (h_memory_SI_new_src2_idx) = tmp_new_src2;
5626 OPRND (h_memory_SI_new_src2) = opval;
5627 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5628 }
5629 {
5630 SI opval = tmp_new_src2;
5631 OPRND (src2) = opval;
5632 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5633 }
5634 }
5635
5636 #undef OPRND
5637 #undef FLD
5638 }
5639 NEXT (vpc);
5640
5641 CASE (sem, INSN_WRITE_ST_PLUS) : /* st $src1,@+$src2 */
5642 {
5643 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5644 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5645 #define FLD(f) abuf->fields.sfmt_st_plus.f
5646 #define OPRND(f) par_exec->operands.sfmt_st_plus.f
5647 int UNUSED written = abuf->written;
5648 IADDR UNUSED pc = abuf->addr;
5649 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5650
5651 SETMEMSI (current_cpu, pc, OPRND (h_memory_SI_new_src2_idx), OPRND (h_memory_SI_new_src2));
5652 * FLD (i_src2) = OPRND (src2);
5653
5654 #undef OPRND
5655 #undef FLD
5656 }
5657 NEXT (vpc);
5658
5659 CASE (sem, INSN_PAR_ST_MINUS) : /* st $src1,@-$src2 */
5660 {
5661 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5662 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5663 #define FLD(f) abuf->fields.sfmt_st_plus.f
5664 #define OPRND(f) par_exec->operands.sfmt_st_plus.f
5665 int UNUSED written = 0;
5666 IADDR UNUSED pc = abuf->addr;
5667 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5668
5669 {
5670 SI tmp_new_src2;
5671 tmp_new_src2 = SUBSI (* FLD (i_src2), 4);
5672 {
5673 SI opval = * FLD (i_src1);
5674 OPRND (h_memory_SI_new_src2_idx) = tmp_new_src2;
5675 OPRND (h_memory_SI_new_src2) = opval;
5676 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5677 }
5678 {
5679 SI opval = tmp_new_src2;
5680 OPRND (src2) = opval;
5681 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5682 }
5683 }
5684
5685 #undef OPRND
5686 #undef FLD
5687 }
5688 NEXT (vpc);
5689
5690 CASE (sem, INSN_WRITE_ST_MINUS) : /* st $src1,@-$src2 */
5691 {
5692 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5693 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5694 #define FLD(f) abuf->fields.sfmt_st_plus.f
5695 #define OPRND(f) par_exec->operands.sfmt_st_plus.f
5696 int UNUSED written = abuf->written;
5697 IADDR UNUSED pc = abuf->addr;
5698 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5699
5700 SETMEMSI (current_cpu, pc, OPRND (h_memory_SI_new_src2_idx), OPRND (h_memory_SI_new_src2));
5701 * FLD (i_src2) = OPRND (src2);
5702
5703 #undef OPRND
5704 #undef FLD
5705 }
5706 NEXT (vpc);
5707
5708 CASE (sem, INSN_PAR_SUB) : /* sub $dr,$sr */
5709 {
5710 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5711 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5712 #define FLD(f) abuf->fields.sfmt_add.f
5713 #define OPRND(f) par_exec->operands.sfmt_add.f
5714 int UNUSED written = 0;
5715 IADDR UNUSED pc = abuf->addr;
5716 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5717
5718 {
5719 SI opval = SUBSI (* FLD (i_dr), * FLD (i_sr));
5720 OPRND (dr) = opval;
5721 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5722 }
5723
5724 #undef OPRND
5725 #undef FLD
5726 }
5727 NEXT (vpc);
5728
5729 CASE (sem, INSN_WRITE_SUB) : /* sub $dr,$sr */
5730 {
5731 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5732 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5733 #define FLD(f) abuf->fields.sfmt_add.f
5734 #define OPRND(f) par_exec->operands.sfmt_add.f
5735 int UNUSED written = abuf->written;
5736 IADDR UNUSED pc = abuf->addr;
5737 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5738
5739 * FLD (i_dr) = OPRND (dr);
5740
5741 #undef OPRND
5742 #undef FLD
5743 }
5744 NEXT (vpc);
5745
5746 CASE (sem, INSN_PAR_SUBV) : /* subv $dr,$sr */
5747 {
5748 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5749 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5750 #define FLD(f) abuf->fields.sfmt_add.f
5751 #define OPRND(f) par_exec->operands.sfmt_addv.f
5752 int UNUSED written = 0;
5753 IADDR UNUSED pc = abuf->addr;
5754 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5755
5756 {
5757 SI temp0;BI temp1;
5758 temp0 = SUBSI (* FLD (i_dr), * FLD (i_sr));
5759 temp1 = SUBOFSI (* FLD (i_dr), * FLD (i_sr), 0);
5760 {
5761 SI opval = temp0;
5762 OPRND (dr) = opval;
5763 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5764 }
5765 {
5766 BI opval = temp1;
5767 OPRND (condbit) = opval;
5768 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
5769 }
5770 }
5771
5772 #undef OPRND
5773 #undef FLD
5774 }
5775 NEXT (vpc);
5776
5777 CASE (sem, INSN_WRITE_SUBV) : /* subv $dr,$sr */
5778 {
5779 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5780 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5781 #define FLD(f) abuf->fields.sfmt_add.f
5782 #define OPRND(f) par_exec->operands.sfmt_addv.f
5783 int UNUSED written = abuf->written;
5784 IADDR UNUSED pc = abuf->addr;
5785 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5786
5787 CPU (h_cond) = OPRND (condbit);
5788 * FLD (i_dr) = OPRND (dr);
5789
5790 #undef OPRND
5791 #undef FLD
5792 }
5793 NEXT (vpc);
5794
5795 CASE (sem, INSN_PAR_SUBX) : /* subx $dr,$sr */
5796 {
5797 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5798 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5799 #define FLD(f) abuf->fields.sfmt_add.f
5800 #define OPRND(f) par_exec->operands.sfmt_addx.f
5801 int UNUSED written = 0;
5802 IADDR UNUSED pc = abuf->addr;
5803 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5804
5805 {
5806 SI temp0;BI temp1;
5807 temp0 = SUBCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
5808 temp1 = SUBCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
5809 {
5810 SI opval = temp0;
5811 OPRND (dr) = opval;
5812 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5813 }
5814 {
5815 BI opval = temp1;
5816 OPRND (condbit) = opval;
5817 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
5818 }
5819 }
5820
5821 #undef OPRND
5822 #undef FLD
5823 }
5824 NEXT (vpc);
5825
5826 CASE (sem, INSN_WRITE_SUBX) : /* subx $dr,$sr */
5827 {
5828 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5829 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5830 #define FLD(f) abuf->fields.sfmt_add.f
5831 #define OPRND(f) par_exec->operands.sfmt_addx.f
5832 int UNUSED written = abuf->written;
5833 IADDR UNUSED pc = abuf->addr;
5834 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5835
5836 CPU (h_cond) = OPRND (condbit);
5837 * FLD (i_dr) = OPRND (dr);
5838
5839 #undef OPRND
5840 #undef FLD
5841 }
5842 NEXT (vpc);
5843
5844 CASE (sem, INSN_PAR_TRAP) : /* trap $uimm4 */
5845 {
5846 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5847 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5848 #define FLD(f) abuf->fields.sfmt_trap.f
5849 #define OPRND(f) par_exec->operands.sfmt_trap.f
5850 int UNUSED written = 0;
5851 IADDR UNUSED pc = abuf->addr;
5852 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5853
5854 {
5855 {
5856 USI opval = GET_H_CR (((UINT) 6));
5857 OPRND (h_cr_USI_14) = opval;
5858 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
5859 }
5860 {
5861 USI opval = ADDSI (pc, 4);
5862 OPRND (h_cr_USI_6) = opval;
5863 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
5864 }
5865 {
5866 UQI opval = CPU (h_bpsw);
5867 OPRND (h_bbpsw_UQI) = opval;
5868 TRACE_RESULT (current_cpu, abuf, "bbpsw", 'x', opval);
5869 }
5870 {
5871 UQI opval = GET_H_PSW ();
5872 OPRND (h_bpsw_UQI) = opval;
5873 TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
5874 }
5875 {
5876 UQI opval = ANDQI (GET_H_PSW (), 128);
5877 OPRND (h_psw_UQI) = opval;
5878 TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
5879 }
5880 {
5881 SI opval = m32r_trap (current_cpu, pc, FLD (f_uimm4));
5882 OPRND (pc) = opval;
5883 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
5884 }
5885 }
5886
5887 #undef OPRND
5888 #undef FLD
5889 }
5890 NEXT (vpc);
5891
5892 CASE (sem, INSN_WRITE_TRAP) : /* trap $uimm4 */
5893 {
5894 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5895 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5896 #define FLD(f) abuf->fields.sfmt_trap.f
5897 #define OPRND(f) par_exec->operands.sfmt_trap.f
5898 int UNUSED written = abuf->written;
5899 IADDR UNUSED pc = abuf->addr;
5900 SEM_BRANCH_INIT
5901 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5902
5903 CPU (h_bbpsw) = OPRND (h_bbpsw_UQI);
5904 CPU (h_bpsw) = OPRND (h_bpsw_UQI);
5905 SET_H_CR (((UINT) 14), OPRND (h_cr_USI_14));
5906 SET_H_CR (((UINT) 6), OPRND (h_cr_USI_6));
5907 SET_H_PSW (OPRND (h_psw_UQI));
5908 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
5909
5910 SEM_BRANCH_FINI (vpc);
5911 #undef OPRND
5912 #undef FLD
5913 }
5914 NEXT (vpc);
5915
5916 CASE (sem, INSN_PAR_UNLOCK) : /* unlock $src1,@$src2 */
5917 {
5918 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5919 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5920 #define FLD(f) abuf->fields.sfmt_st_plus.f
5921 #define OPRND(f) par_exec->operands.sfmt_unlock.f
5922 int UNUSED written = 0;
5923 IADDR UNUSED pc = abuf->addr;
5924 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5925
5926 {
5927 if (CPU (h_lock)) {
5928 {
5929 SI opval = * FLD (i_src1);
5930 OPRND (h_memory_SI_src2_idx) = * FLD (i_src2);
5931 OPRND (h_memory_SI_src2) = opval;
5932 written |= (1 << 4);
5933 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5934 }
5935 }
5936 {
5937 BI opval = 0;
5938 OPRND (h_lock_BI) = opval;
5939 TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
5940 }
5941 }
5942
5943 abuf->written = written;
5944 #undef OPRND
5945 #undef FLD
5946 }
5947 NEXT (vpc);
5948
5949 CASE (sem, INSN_WRITE_UNLOCK) : /* unlock $src1,@$src2 */
5950 {
5951 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5952 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5953 #define FLD(f) abuf->fields.sfmt_st_plus.f
5954 #define OPRND(f) par_exec->operands.sfmt_unlock.f
5955 int UNUSED written = abuf->written;
5956 IADDR UNUSED pc = abuf->addr;
5957 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5958
5959 CPU (h_lock) = OPRND (h_lock_BI);
5960 if (written & (1 << 4))
5961 {
5962 SETMEMSI (current_cpu, pc, OPRND (h_memory_SI_src2_idx), OPRND (h_memory_SI_src2));
5963 }
5964
5965 #undef OPRND
5966 #undef FLD
5967 }
5968 NEXT (vpc);
5969
5970 CASE (sem, INSN_PAR_PCMPBZ) : /* pcmpbz $src2 */
5971 {
5972 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5973 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5974 #define FLD(f) abuf->fields.sfmt_st_plus.f
5975 #define OPRND(f) par_exec->operands.sfmt_cmpz.f
5976 int UNUSED written = 0;
5977 IADDR UNUSED pc = abuf->addr;
5978 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5979
5980 {
5981 BI opval = (EQSI (ANDSI (* FLD (i_src2), 255), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 65280), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 16711680), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 0xff000000), 0)) ? (1) : (0);
5982 OPRND (condbit) = opval;
5983 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
5984 }
5985
5986 #undef OPRND
5987 #undef FLD
5988 }
5989 NEXT (vpc);
5990
5991 CASE (sem, INSN_WRITE_PCMPBZ) : /* pcmpbz $src2 */
5992 {
5993 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5994 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5995 #define FLD(f) abuf->fields.sfmt_st_plus.f
5996 #define OPRND(f) par_exec->operands.sfmt_cmpz.f
5997 int UNUSED written = abuf->written;
5998 IADDR UNUSED pc = abuf->addr;
5999 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6000
6001 CPU (h_cond) = OPRND (condbit);
6002
6003 #undef OPRND
6004 #undef FLD
6005 }
6006 NEXT (vpc);
6007
6008 CASE (sem, INSN_PAR_SADD) : /* sadd */
6009 {
6010 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6011 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6012 #define FLD(f) abuf->fields.fmt_empty.f
6013 #define OPRND(f) par_exec->operands.sfmt_sadd.f
6014 int UNUSED written = 0;
6015 IADDR UNUSED pc = abuf->addr;
6016 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6017
6018 {
6019 DI opval = ADDDI (SRADI (GET_H_ACCUMS (((UINT) 1)), 16), GET_H_ACCUMS (((UINT) 0)));
6020 OPRND (h_accums_DI_0) = opval;
6021 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
6022 }
6023
6024 #undef OPRND
6025 #undef FLD
6026 }
6027 NEXT (vpc);
6028
6029 CASE (sem, INSN_WRITE_SADD) : /* sadd */
6030 {
6031 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6032 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6033 #define FLD(f) abuf->fields.fmt_empty.f
6034 #define OPRND(f) par_exec->operands.sfmt_sadd.f
6035 int UNUSED written = abuf->written;
6036 IADDR UNUSED pc = abuf->addr;
6037 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6038
6039 SET_H_ACCUMS (((UINT) 0), OPRND (h_accums_DI_0));
6040
6041 #undef OPRND
6042 #undef FLD
6043 }
6044 NEXT (vpc);
6045
6046 CASE (sem, INSN_PAR_MACWU1) : /* macwu1 $src1,$src2 */
6047 {
6048 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6049 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6050 #define FLD(f) abuf->fields.sfmt_st_plus.f
6051 #define OPRND(f) par_exec->operands.sfmt_macwu1.f
6052 int UNUSED written = 0;
6053 IADDR UNUSED pc = abuf->addr;
6054 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6055
6056 {
6057 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535)))), 8), 8);
6058 OPRND (h_accums_DI_1) = opval;
6059 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
6060 }
6061
6062 #undef OPRND
6063 #undef FLD
6064 }
6065 NEXT (vpc);
6066
6067 CASE (sem, INSN_WRITE_MACWU1) : /* macwu1 $src1,$src2 */
6068 {
6069 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6070 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6071 #define FLD(f) abuf->fields.sfmt_st_plus.f
6072 #define OPRND(f) par_exec->operands.sfmt_macwu1.f
6073 int UNUSED written = abuf->written;
6074 IADDR UNUSED pc = abuf->addr;
6075 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6076
6077 SET_H_ACCUMS (((UINT) 1), OPRND (h_accums_DI_1));
6078
6079 #undef OPRND
6080 #undef FLD
6081 }
6082 NEXT (vpc);
6083
6084 CASE (sem, INSN_PAR_MSBLO) : /* msblo $src1,$src2 */
6085 {
6086 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6087 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6088 #define FLD(f) abuf->fields.sfmt_st_plus.f
6089 #define OPRND(f) par_exec->operands.sfmt_msblo.f
6090 int UNUSED written = 0;
6091 IADDR UNUSED pc = abuf->addr;
6092 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6093
6094 {
6095 DI opval = SRADI (SLLDI (SUBDI (GET_H_ACCUM (), SRADI (SLLDI (MULDI (EXTHIDI (TRUNCSIHI (* FLD (i_src1))), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 32), 16)), 8), 8);
6096 OPRND (accum) = opval;
6097 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
6098 }
6099
6100 #undef OPRND
6101 #undef FLD
6102 }
6103 NEXT (vpc);
6104
6105 CASE (sem, INSN_WRITE_MSBLO) : /* msblo $src1,$src2 */
6106 {
6107 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6108 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6109 #define FLD(f) abuf->fields.sfmt_st_plus.f
6110 #define OPRND(f) par_exec->operands.sfmt_msblo.f
6111 int UNUSED written = abuf->written;
6112 IADDR UNUSED pc = abuf->addr;
6113 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6114
6115 SET_H_ACCUM (OPRND (accum));
6116
6117 #undef OPRND
6118 #undef FLD
6119 }
6120 NEXT (vpc);
6121
6122 CASE (sem, INSN_PAR_MULWU1) : /* mulwu1 $src1,$src2 */
6123 {
6124 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6125 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6126 #define FLD(f) abuf->fields.sfmt_st_plus.f
6127 #define OPRND(f) par_exec->operands.sfmt_mulwu1.f
6128 int UNUSED written = 0;
6129 IADDR UNUSED pc = abuf->addr;
6130 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6131
6132 {
6133 DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535))), 16), 16);
6134 OPRND (h_accums_DI_1) = opval;
6135 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
6136 }
6137
6138 #undef OPRND
6139 #undef FLD
6140 }
6141 NEXT (vpc);
6142
6143 CASE (sem, INSN_WRITE_MULWU1) : /* mulwu1 $src1,$src2 */
6144 {
6145 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6146 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6147 #define FLD(f) abuf->fields.sfmt_st_plus.f
6148 #define OPRND(f) par_exec->operands.sfmt_mulwu1.f
6149 int UNUSED written = abuf->written;
6150 IADDR UNUSED pc = abuf->addr;
6151 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6152
6153 SET_H_ACCUMS (((UINT) 1), OPRND (h_accums_DI_1));
6154
6155 #undef OPRND
6156 #undef FLD
6157 }
6158 NEXT (vpc);
6159
6160 CASE (sem, INSN_PAR_MACLH1) : /* maclh1 $src1,$src2 */
6161 {
6162 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6163 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6164 #define FLD(f) abuf->fields.sfmt_st_plus.f
6165 #define OPRND(f) par_exec->operands.sfmt_macwu1.f
6166 int UNUSED written = 0;
6167 IADDR UNUSED pc = abuf->addr;
6168 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6169
6170 {
6171 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), SLLDI (EXTSIDI (MULSI (EXTHISI (TRUNCSIHI (* FLD (i_src1))), SRASI (* FLD (i_src2), 16))), 16)), 8), 8);
6172 OPRND (h_accums_DI_1) = opval;
6173 TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
6174 }
6175
6176 #undef OPRND
6177 #undef FLD
6178 }
6179 NEXT (vpc);
6180
6181 CASE (sem, INSN_WRITE_MACLH1) : /* maclh1 $src1,$src2 */
6182 {
6183 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6184 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6185 #define FLD(f) abuf->fields.sfmt_st_plus.f
6186 #define OPRND(f) par_exec->operands.sfmt_macwu1.f
6187 int UNUSED written = abuf->written;
6188 IADDR UNUSED pc = abuf->addr;
6189 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6190
6191 SET_H_ACCUMS (((UINT) 1), OPRND (h_accums_DI_1));
6192
6193 #undef OPRND
6194 #undef FLD
6195 }
6196 NEXT (vpc);
6197
6198 CASE (sem, INSN_PAR_SC) : /* sc */
6199 {
6200 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6201 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6202 #define FLD(f) abuf->fields.fmt_empty.f
6203 #define OPRND(f) par_exec->operands.sfmt_sc.f
6204 int UNUSED written = 0;
6205 IADDR UNUSED pc = abuf->addr;
6206 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6207
6208 if (ZEXTBISI (CPU (h_cond)))
6209 SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
6210
6211 #undef OPRND
6212 #undef FLD
6213 }
6214 NEXT (vpc);
6215
6216 CASE (sem, INSN_WRITE_SC) : /* sc */
6217 {
6218 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6219 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6220 #define FLD(f) abuf->fields.fmt_empty.f
6221 #define OPRND(f) par_exec->operands.sfmt_sc.f
6222 int UNUSED written = abuf->written;
6223 IADDR UNUSED pc = abuf->addr;
6224 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6225
6226
6227 #undef OPRND
6228 #undef FLD
6229 }
6230 NEXT (vpc);
6231
6232 CASE (sem, INSN_PAR_SNC) : /* snc */
6233 {
6234 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6235 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6236 #define FLD(f) abuf->fields.fmt_empty.f
6237 #define OPRND(f) par_exec->operands.sfmt_sc.f
6238 int UNUSED written = 0;
6239 IADDR UNUSED pc = abuf->addr;
6240 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6241
6242 if (ZEXTBISI (NOTBI (CPU (h_cond))))
6243 SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
6244
6245 #undef OPRND
6246 #undef FLD
6247 }
6248 NEXT (vpc);
6249
6250 CASE (sem, INSN_WRITE_SNC) : /* snc */
6251 {
6252 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6253 const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6254 #define FLD(f) abuf->fields.fmt_empty.f
6255 #define OPRND(f) par_exec->operands.sfmt_sc.f
6256 int UNUSED written = abuf->written;
6257 IADDR UNUSED pc = abuf->addr;
6258 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6259
6260
6261 #undef OPRND
6262 #undef FLD
6263 }
6264 NEXT (vpc);
6265
6266
6267 }
6268 ENDSWITCH (sem) /* End of semantic switch. */
6269
6270 /* At this point `vpc' contains the next insn to execute. */
6271 }
6272
6273 #undef DEFINE_SWITCH
6274 #endif /* DEFINE_SWITCH */
GDB Binutils - Deliverables
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