sim/m32r/sim-if.c

   1 /* Main simulator entry points specific to the M32R.
   2    Copyright (C) 1996-2021 Free Software Foundation, Inc.
   3    Contributed by Cygnus Support.
   4
   5    This file is part of GDB, the GNU debugger.
   6
   7    This program is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 3 of the License, or
  10    (at your option) any later version.
  11
  12    This program is distributed in the hope that it will be useful,
  13    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15    GNU General Public License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  19
  20 /* This must come before any other includes.  */
  21 #include "defs.h"
  22
  23 #include "sim-main.h"
  24 #include "sim-options.h"
  25 #include "libiberty.h"
  26 #include "bfd.h"
  27
  28 #include <string.h>
  29 #include <stdlib.h>
  30
  31 #include "dv-m32r_uart.h"
  32
  33 static void free_state (SIM_DESC);
  34 static void print_m32r_misc_cpu (SIM_CPU *cpu, int verbose);
  35 \f
  36 /* Cover function of sim_state_free to free the cpu buffers as well.  */
  37
  38 static void
  39 free_state (SIM_DESC sd)
  40 {
  41   if (STATE_MODULES (sd) != NULL)
  42     sim_module_uninstall (sd);
  43   sim_cpu_free_all (sd);
  44   sim_state_free (sd);
  45 }
  46
  47 extern const SIM_MACH * const m32r_sim_machs[];
  48
  49 /* Create an instance of the simulator.  */
  50
  51 SIM_DESC
  52 sim_open (SIM_OPEN_KIND kind, host_callback *callback, struct bfd *abfd,
  53           char * const *argv)
  54 {
  55   SIM_DESC sd = sim_state_alloc (kind, callback);
  56   char c;
  57   int i;
  58
  59   /* Set default options before parsing user options.  */
  60   STATE_MACHS (sd) = m32r_sim_machs;
  61   STATE_MODEL_NAME (sd) = "m32r/d";
  62   current_alignment = STRICT_ALIGNMENT;
  63   current_target_byte_order = BFD_ENDIAN_BIG;
  64
  65   /* The cpu data is kept in a separately allocated chunk of memory.  */
  66   if (sim_cpu_alloc_all (sd, 1) != SIM_RC_OK)
  67     {
  68       free_state (sd);
  69       return 0;
  70     }
  71
  72   if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
  73     {
  74       free_state (sd);
  75       return 0;
  76     }
  77
  78   /* The parser will print an error message for us, so we silently return.  */
  79   if (sim_parse_args (sd, argv) != SIM_RC_OK)
  80     {
  81       free_state (sd);
  82       return 0;
  83     }
  84
  85   /* Allocate a handler for the control registers and other devices
  86      if no memory for that range has been allocated by the user.
  87      All are allocated in one chunk to keep things from being
  88      unnecessarily complicated.
  89      TODO: Move these to the sim-model framework.  */
  90   sim_hw_parse (sd, "/core/%s/reg %#x %i", "m32r_uart", UART_BASE_ADDR, 0x100);
  91   sim_hw_parse (sd, "/core/%s/reg %#x %i", "m32r_cache", 0xfffffff0, 0x10);
  92
  93   /* Allocate core managed memory if none specified by user.
  94      Use address 4 here in case the user wanted address 0 unmapped.  */
  95   if (sim_core_read_buffer (sd, NULL, read_map, &c, 4, 1) == 0)
  96     sim_do_commandf (sd, "memory region 0,0x%x", M32R_DEFAULT_MEM_SIZE);
  97
  98   /* check for/establish the reference program image */
  99   if (sim_analyze_program (sd,
 100                            (STATE_PROG_ARGV (sd) != NULL
 101                             ? *STATE_PROG_ARGV (sd)
 102                             : NULL),
 103                            abfd) != SIM_RC_OK)
 104     {
 105       free_state (sd);
 106       return 0;
 107     }
 108
 109   /* Establish any remaining configuration options.  */
 110   if (sim_config (sd) != SIM_RC_OK)
 111     {
 112       free_state (sd);
 113       return 0;
 114     }
 115
 116   if (sim_post_argv_init (sd) != SIM_RC_OK)
 117     {
 118       free_state (sd);
 119       return 0;
 120     }
 121
 122   /* Open a copy of the cpu descriptor table.  */
 123   {
 124     CGEN_CPU_DESC cd = m32r_cgen_cpu_open_1 (STATE_ARCHITECTURE (sd)->printable_name,
 125                                              CGEN_ENDIAN_BIG);
 126     for (i = 0; i < MAX_NR_PROCESSORS; ++i)
 127       {
 128         SIM_CPU *cpu = STATE_CPU (sd, i);
 129         CPU_CPU_DESC (cpu) = cd;
 130         CPU_DISASSEMBLER (cpu) = sim_cgen_disassemble_insn;
 131       }
 132     m32r_cgen_init_dis (cd);
 133   }
 134
 135   for (c = 0; c < MAX_NR_PROCESSORS; ++c)
 136     {
 137       /* Only needed for profiling, but the structure member is small.  */
 138       memset (CPU_M32R_MISC_PROFILE (STATE_CPU (sd, i)), 0,
 139               sizeof (* CPU_M32R_MISC_PROFILE (STATE_CPU (sd, i))));
 140       /* Hook in callback for reporting these stats */
 141       PROFILE_INFO_CPU_CALLBACK (CPU_PROFILE_DATA (STATE_CPU (sd, i)))
 142         = print_m32r_misc_cpu;
 143     }
 144
 145   return sd;
 146 }
 147 \f
 148 SIM_RC
 149 sim_create_inferior (SIM_DESC sd, struct bfd *abfd, char * const *argv,
 150                      char * const *envp)
 151 {
 152   SIM_CPU *current_cpu = STATE_CPU (sd, 0);
 153   SIM_ADDR addr;
 154
 155   if (abfd != NULL)
 156     addr = bfd_get_start_address (abfd);
 157   else
 158     addr = 0;
 159   sim_pc_set (current_cpu, addr);
 160
 161 #ifdef M32R_LINUX
 162   m32rbf_h_cr_set (current_cpu,
 163                     m32r_decode_gdb_ctrl_regnum(SPI_REGNUM), 0x1f00000);
 164   m32rbf_h_cr_set (current_cpu,
 165                     m32r_decode_gdb_ctrl_regnum(SPU_REGNUM), 0x1f00000);
 166 #endif
 167
 168   /* Standalone mode (i.e. `run`) will take care of the argv for us in
 169      sim_open() -> sim_parse_args().  But in debug mode (i.e. 'target sim'
 170      with `gdb`), we need to handle it because the user can change the
 171      argv on the fly via gdb's 'run'.  */
 172   if (STATE_PROG_ARGV (sd) != argv)
 173     {
 174       freeargv (STATE_PROG_ARGV (sd));
 175       STATE_PROG_ARGV (sd) = dupargv (argv);
 176     }
 177
 178   return SIM_RC_OK;
 179 }
 180
 181 /* PROFILE_CPU_CALLBACK */
 182
 183 static void
 184 print_m32r_misc_cpu (SIM_CPU *cpu, int verbose)
 185 {
 186   SIM_DESC sd = CPU_STATE (cpu);
 187   char buf[20];
 188
 189   if (CPU_PROFILE_FLAGS (cpu) [PROFILE_INSN_IDX])
 190     {
 191       sim_io_printf (sd, "Miscellaneous Statistics\n\n");
 192       sim_io_printf (sd, "  %-*s %s\n\n",
 193                      PROFILE_LABEL_WIDTH, "Fill nops:",
 194                      sim_add_commas (buf, sizeof (buf),
 195                                      CPU_M32R_MISC_PROFILE (cpu)->fillnop_count));
 196       if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_m32rx)
 197         sim_io_printf (sd, "  %-*s %s\n\n",
 198                        PROFILE_LABEL_WIDTH, "Parallel insns:",
 199                        sim_add_commas (buf, sizeof (buf),
 200                                        CPU_M32R_MISC_PROFILE (cpu)->parallel_count));
 201       if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_m32r2)
 202         sim_io_printf (sd, "  %-*s %s\n\n",
 203                        PROFILE_LABEL_WIDTH, "Parallel insns:",
 204                        sim_add_commas (buf, sizeof (buf),
 205                                        CPU_M32R_MISC_PROFILE (cpu)->parallel_count));
 206     }
 207 }