* Personal prototype "gx" translation-based JIT engine for M32R.
[deliverable/binutils-gdb.git] / sim / m32r-gx / sim-main.h
1 /* Main header for the m32r. */
2
3 #define USING_SIM_BASE_H /* FIXME: quick hack */
4
5 struct _sim_cpu; /* FIXME: should be in sim-basics.h */
6 typedef struct _sim_cpu SIM_CPU;
7
8 /* sim-basics.h includes config.h but cgen-types.h must be included before
9 sim-basics.h and cgen-types.h needs config.h. */
10 #include "config.h"
11
12 #include "ansidecl.h"
13 #include "symcat.h"
14 #include "cgen-types.h"
15 #include "arch.h"
16 #include "sim-basics.h"
17
18 /* These must be defined before sim-base.h. */
19 typedef USI sim_cia;
20 #define CIA_GET(cpu) (cpu)->regs.h_pc
21 #define CIA_SET(cpu,val) (cpu)->regs.h_pc = (val)
22
23 #define TRAP_SYSCALL 0
24
25 #include "sim-base.h"
26 #include "cpu-sim.h"
27
28 #ifdef WANT_CPU_M32R
29 #include "cpu.h"
30 #include "decode.h"
31 #endif
32 #include "cpuall.h"
33
34
35 /* match with definition in gx-translate.c! */
36 typedef struct tgx_cpu_regs
37 {
38 unsigned int h_pc; /* program counter */
39 signed int h_gr[16]; /* general registers */
40 unsigned int h_cr[16]; /* control registers */
41 long long h_accum; /* accumulator */
42 unsigned h_lock; /* lock */
43 } tgx_cpu_regs;
44
45 /* match with definition in gx-translate.c! */
46 typedef struct tgx_syscall_data
47 {
48 unsigned pc;
49 unsigned func;
50 unsigned arg1;
51 unsigned arg2;
52 unsigned arg3;
53 unsigned errcode;
54 unsigned result;
55 unsigned result2;
56 } tgx_syscall_data;
57
58
59 /* match with definition in gx-translate.c! */
60 typedef struct tgx_callbacks
61 {
62 unsigned (*load)(unsigned pc, unsigned addr);
63 void (*store)(unsigned pc, unsigned addr, unsigned data);
64 signed char (*load1)(unsigned pc, unsigned addr);
65 void (*store1)(unsigned pc, unsigned addr, signed char data);
66 signed short (*load2)(unsigned pc, unsigned addr);
67 void (*store2)(unsigned pc, unsigned addr, signed short data);
68 void (*syscall)(tgx_syscall_data* data);
69 } tgx_callbacks;
70
71
72
73 struct _sim_cpu
74 {
75 sim_cpu_base base;
76 tgx_cpu_regs regs;
77 };
78
79 struct sim_state {
80 sim_cpu *cpu;
81 #define STATE_CPU(sd, n) (/*&*/ (sd)->cpu)
82 sim_state_base base;
83 };
84
85
86 /* Default memory size. */
87 #define M32R_DEFAULT_MEM_SIZE 0x800000 /* 8M */
88
89
90
91 /* Register access fns. These look up the current mach and call the
92 appropriate handler. */
93 SI h_gr_get (SIM_CPU *, UINT);
94 void h_gr_set (SIM_CPU *, UINT, SI);
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