sim/mips/ChangeLog

   1 2006-12-21  Hans-Peter Nilsson  <hp@axis.com>
   2
   3         * acconfig.h: Remove.
   4         * config.in, configure: Regenerate.
   5
   6 2006-11-07  Thiemo Seufer  <ths@mips.com>
   7
   8         * dsp.igen (do_w_op): Fix compiler warning.
   9
  10 2006-08-29  Thiemo Seufer  <ths@mips.com>
  11             David Ung  <davidu@mips.com>
  12
  13         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
  14         sim_igen_machine.
  15         * configure: Regenerate.
  16         * mips.igen (model): Add smartmips.
  17         (MADDU): Increment ACX if carry.
  18         (do_mult): Clear ACX.
  19         (ROR,RORV): Add smartmips.
  20         (include): Include smartmips.igen.
  21         * sim-main.h (ACX): Set to REGISTERS[89].
  22         * smartmips.igen: New file.
  23
  24 2006-08-29  Thiemo Seufer  <ths@mips.com>
  25             David Ung  <davidu@mips.com>
  26
  27         * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
  28         mips3264r2.igen. Add missing dependency rules.
  29         * m16e.igen: Support for mips16e save/restore instructions.
  30
  31 2006-06-13  Richard Earnshaw  <rearnsha@arm.com>
  32
  33         * configure: Regenerated.
  34
  35 2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
  36
  37         * configure: Regenerated.
  38
  39 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
  40
  41         * configure: Regenerated.
  42
  43 2006-05-15 Chao-ying Fu  <fu@mips.com>
  44
  45         * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
  46
  47 2006-04-18  Nick Clifton  <nickc@redhat.com>
  48
  49         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
  50         statement.
  51
  52 2006-03-29  Hans-Peter Nilsson  <hp@axis.com>
  53
  54         * configure: Regenerate.
  55
  56 2005-12-14  Chao-ying Fu  <fu@mips.com>
  57
  58         * Makefile.in (SIM_OBJS): Add dsp.o.
  59         (dsp.o): New dependency.
  60         (IGEN_INCLUDE): Add dsp.igen.
  61         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
  62         mipsisa64*-*-*): Add dsp to sim_igen_machine.
  63         * configure: Regenerate.
  64         * mips.igen: Add dsp model and include dsp.igen.
  65         (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
  66         because these instructions are extended in DSP ASE.
  67         * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
  68         adding 6 DSP accumulator registers and 1 DSP control register.
  69         (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
  70         AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
  71         DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
  72         DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
  73         DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
  74         DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
  75         DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
  76         DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
  77         DSPCR_CCOND_SMASK): New define.
  78         (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
  79         * dsp.c, dsp.igen: New files for MIPS DSP ASE.
  80
  81 2005-07-08  Ian Lance Taylor  <ian@airs.com>
  82
  83         * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
  84
  85 2005-06-16  David Ung  <davidu@mips.com>
  86             Nigel Stephens  <nigel@mips.com>
  87
  88         * mips.igen: New mips16e model and include m16e.igen.
  89         (check_u64): Add mips16e tag.
  90         * m16e.igen: New file for MIPS16e instructions.
  91         * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
  92         mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
  93         models.
  94         * configure: Regenerate.
  95
  96 2005-05-26  David Ung  <davidu@mips.com>
  97
  98         * mips.igen (mips32r2, mips64r2): New ISA models.  Add new model
  99         tags to all instructions which are applicable to the new ISAs.
 100         (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
 101         vr.igen.
 102         * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
 103         instructions.
 104         * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
 105         to mips.igen.
 106         * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
 107         * configure: Regenerate.
 108
 109 2005-03-23  Mark Kettenis  <kettenis@gnu.org>
 110
 111         * configure: Regenerate.
 112
 113 2005-01-14  Andrew Cagney  <cagney@gnu.org>
 114
 115         * configure.ac: Sinclude aclocal.m4 before common.m4.  Add
 116         explicit call to AC_CONFIG_HEADER.
 117         * configure: Regenerate.
 118
 119 2005-01-12  Andrew Cagney  <cagney@gnu.org>
 120
 121         * configure.ac: Update to use ../common/common.m4.
 122         * configure: Re-generate.
 123
 124 2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>
 125
 126         * configure: Regenerated to track ../common/aclocal.m4 changes.
 127
 128 2005-01-07  Andrew Cagney  <cagney@gnu.org>
 129
 130         * configure.ac: Rename configure.in, require autoconf 2.59.
 131         * configure: Re-generate.
 132
 133 2004-12-08  Hans-Peter Nilsson  <hp@axis.com>
 134
 135         * configure: Regenerate for ../common/aclocal.m4 update.
 136
 137 2004-09-24  Monika Chaddha  <monika@acmet.com>
 138
 139         Committed by Andrew Cagney.
 140         * m16.igen (CMP, CMPI): Fix assembler.
 141
 142 2004-08-18  Chris Demetriou  <cgd@broadcom.com>
 143
 144         * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
 145         * configure: Regenerate.
 146
 147 2004-06-25  Chris Demetriou  <cgd@broadcom.com>
 148
 149         * configure.in (sim_m16_machine): Include mipsIII.
 150         * configure: Regenerate.
 151
 152 2004-05-11  Maciej W. Rozycki  <macro@ds2.pg.gda.pl>
 153
 154         * mips/interp.c (decode_coproc): Sign-extend the address retrieved
 155         from COP0_BADVADDR.
 156         * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
 157
 158 2004-04-10  Chris Demetriou  <cgd@broadcom.com>
 159
 160         * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
 161
 162 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 163
 164         * mips.igen (check_fmt): Remove.
 165         (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
 166         (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
 167         (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
 168         (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
 169         (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
 170         (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
 171         (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
 172         (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
 173         (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
 174         (C.cnd.fmta): Remove incorrect call to check_fmt_p.
 175
 176 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 177
 178         * sb1.igen (check_sbx): New function.
 179         (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
 180
 181 2004-03-29  Chris Demetriou  <cgd@broadcom.com>
 182             Richard Sandiford  <rsandifo@redhat.com>
 183
 184         * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
 185         (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
 186         * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
 187         separate implementations for mipsIV and mipsV.  Use new macros to
 188         determine whether the restrictions apply.
 189
 190 2004-01-19  Chris Demetriou  <cgd@broadcom.com>
 191
 192         * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
 193         (check_mult_hilo): Improve comments.
 194         (check_div_hilo): Likewise.  Also, fork off a new version
 195         to handle mips32/mips64 (since there are no hazards to check
 196         in MIPS32/MIPS64).
 197
 198 2003-06-17  Richard Sandiford  <rsandifo@redhat.com>
 199
 200         * mips.igen (do_dmultx): Fix check for negative operands.
 201
 202 2003-05-16  Ian Lance Taylor  <ian@airs.com>
 203
 204         * Makefile.in (SHELL): Make sure this is defined.
 205         (various): Use $(SHELL) whenever we invoke move-if-change.
 206
 207 2003-05-03  Chris Demetriou  <cgd@broadcom.com>
 208
 209         * cp1.c: Tweak attribution slightly.
 210         * cp1.h: Likewise.
 211         * mdmx.c: Likewise.
 212         * mdmx.igen: Likewise.
 213         * mips3d.igen: Likewise.
 214         * sb1.igen: Likewise.
 215
 216 2003-04-15  Richard Sandiford  <rsandifo@redhat.com>
 217
 218         * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
 219         unsigned operands.
 220
 221 2003-02-27  Andrew Cagney  <cagney@redhat.com>
 222
 223         * interp.c (sim_open): Rename _bfd to bfd.
 224         (sim_create_inferior): Ditto.
 225
 226 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
 227
 228         * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
 229
 230 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
 231
 232         * mips.igen (EI, DI): Remove.
 233
 234 2003-01-05  Richard Sandiford  <rsandifo@redhat.com>
 235
 236         * Makefile.in (tmp-run-multi): Fix mips16 filter.
 237
 238 2003-01-04  Richard Sandiford  <rsandifo@redhat.com>
 239             Andrew Cagney  <ac131313@redhat.com>
 240             Gavin Romig-Koch  <gavin@redhat.com>
 241             Graydon Hoare  <graydon@redhat.com>
 242             Aldy Hernandez  <aldyh@redhat.com>
 243             Dave Brolley  <brolley@redhat.com>
 244             Chris Demetriou  <cgd@broadcom.com>
 245
 246         * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
 247         (sim_mach_default): New variable.
 248         (mips64vr-*-*, mips64vrel-*-*): New configurations.
 249         Add a new simulator generator, MULTI.
 250         * configure: Regenerate.
 251         * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
 252         (multi-run.o): New dependency.
 253         (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
 254         (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
 255         (tmp-multi): Combine them.
 256         (BUILT_SRC_FROM_MULTI): New variable.  Depend on tmp-multi.
 257         (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
 258         (distclean-extra): New rule.
 259         * sim-main.h: Include bfd.h.
 260         (MIPS_MACH): New macro.
 261         * mips.igen (vr4120, vr5400, vr5500): New models.
 262         (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
 263         * vr.igen: Replace with new version.
 264
 265 2003-01-04  Chris Demetriou  <cgd@broadcom.com>
 266
 267         * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
 268         * configure: Regenerate.
 269
 270 2002-12-31  Chris Demetriou  <cgd@broadcom.com>
 271
 272         * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
 273         * mips.igen: Remove all invocations of check_branch_bug and
 274         mark_branch_bug.
 275
 276 2002-12-16  Chris Demetriou  <cgd@broadcom.com>
 277
 278         * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
 279
 280 2002-07-30  Chris Demetriou  <cgd@broadcom.com>
 281
 282         * mips.igen (do_load_double, do_store_double): New functions.
 283         (LDC1, SDC1): Rename to...
 284         (LDC1b, SDC1b): respectively.
 285         (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
 286
 287 2002-07-29  Michael Snyder  <msnyder@redhat.com>
 288
 289         * cp1.c (fp_recip2): Modify initialization expression so that
 290         GCC will recognize it as constant.
 291
 292 2002-06-18  Chris Demetriou  <cgd@broadcom.com>
 293
 294         * mdmx.c (SD_): Delete.
 295         (Unpredictable): Re-define, for now, to directly invoke
 296         unpredictable_action().
 297         (mdmx_acc_op): Fix error in .ob immediate handling.
 298
 299 2002-06-18  Andrew Cagney  <cagney@redhat.com>
 300
 301         * interp.c (sim_firmware_command): Initialize `address'.
 302
 303 2002-06-16  Andrew Cagney  <ac131313@redhat.com>
 304
 305         * configure: Regenerated to track ../common/aclocal.m4 changes.
 306
 307 2002-06-14  Chris Demetriou  <cgd@broadcom.com>
 308             Ed Satterthwaite  <ehs@broadcom.com>
 309
 310         * mips3d.igen: New file which contains MIPS-3D ASE instructions.
 311         * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
 312         * mips.igen: Include mips3d.igen.
 313         (mips3d): New model name for MIPS-3D ASE instructions.
 314         (CVT.W.fmt): Don't use this instruction for word (source) format
 315         instructions.
 316         * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
 317         (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
 318         (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
 319         (NR_FRAC_GUARD, IMPLICIT_1): New macros.
 320         * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
 321         (RSquareRoot1, RSquareRoot2): New macros.
 322         (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
 323         (fp_rsqrt2): New functions.
 324         * configure.in: Add MIPS-3D support to mipsisa64 simulator.
 325         * configure: Regenerate.
 326
 327 2002-06-13  Chris Demetriou  <cgd@broadcom.com>
 328             Ed Satterthwaite  <ehs@broadcom.com>
 329
 330         * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
 331         (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
 332         (fp_inv_sqrt, fpu_format_name): Add paired-single support.
 333         (convert): Note that this function is not used for paired-single
 334         format conversions.
 335         (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
 336         * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
 337         (check_fmt_p): Enable paired-single support.
 338         (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
 339         (PUU.PS): New instructions.
 340         (CVT.S.fmt): Don't use this instruction for paired-single format
 341         destinations.
 342         * sim-main.h (FP_formats): New value 'fmt_ps.'
 343         (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
 344         (PSLower, PSUpper, PackPS, ConvertPS): New macros.
 345
 346 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
 347
 348         * mips.igen: Fix formatting of function calls in
 349         many FP operations.
 350
 351 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
 352
 353         * mips.igen (MOVN, MOVZ): Trace result.
 354         (TNEI): Print "tnei" as the opcode name in traces.
 355         (CEIL.W): Add disassembly string for traces.
 356         (RSQRT.fmt): Make location of disassembly string consistent
 357         with other instructions.
 358
 359 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
 360
 361         * mips.igen (X): Delete unused function.
 362
 363 2002-06-08  Andrew Cagney  <cagney@redhat.com>
 364
 365         * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
 366
 367 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 368             Ed Satterthwaite  <ehs@broadcom.com>
 369
 370         * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
 371         (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
 372         * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
 373         (fp_nmsub): New prototypes.
 374         (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
 375         (NegMultiplySub): New defines.
 376         * mips.igen (RSQRT.fmt): Use RSquareRoot().
 377         (MADD.D, MADD.S): Replace with...
 378         (MADD.fmt): New instruction.
 379         (MSUB.D, MSUB.S): Replace with...
 380         (MSUB.fmt): New instruction.
 381         (NMADD.D, NMADD.S): Replace with...
 382         (NMADD.fmt): New instruction.
 383         (NMSUB.D, MSUB.S): Replace with...
 384         (NMSUB.fmt): New instruction.
 385
 386 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 387             Ed Satterthwaite  <ehs@broadcom.com>
 388
 389         * cp1.c: Fix more comment spelling and formatting.
 390         (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
 391         (denorm_mode): New function.
 392         (fpu_unary, fpu_binary): Round results after operation, collect
 393         status from rounding operations, and update the FCSR.
 394         (convert): Collect status from integer conversions and rounding
 395         operations, and update the FCSR.  Adjust NaN values that result
 396         from conversions.  Convert to use sim_io_eprintf rather than
 397         fprintf, and remove some debugging code.
 398         * cp1.h (fenr_FS): New define.
 399
 400 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 401
 402         * cp1.c (convert): Remove unusable debugging code, and move MIPS
 403         rounding mode to sim FP rounding mode flag conversion code into...
 404         (rounding_mode): New function.
 405
 406 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 407
 408         * cp1.c: Clean up formatting of a few comments.
 409         (value_fpr): Reformat switch statement.
 410
 411 2002-06-06  Chris Demetriou  <cgd@broadcom.com>
 412             Ed Satterthwaite  <ehs@broadcom.com>
 413
 414         * cp1.h: New file.
 415         * sim-main.h: Include cp1.h.
 416         (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
 417         (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
 418         (FP_RM_TOMINF, GETRM): Remove.  Moved to cp1.h.
 419         (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
 420         (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
 421         (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
 422         * cp1.c: Don't include sim-fpu.h; already included by
 423         sim-main.h.  Clean up formatting of some comments.
 424         (NaN, Equal, Less): Remove.
 425         (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
 426         (fp_cmp): New functions.
 427         * mips.igen (do_c_cond_fmt): Remove.
 428         (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
 429         Compare.  Add result tracing.
 430         (CxC1): Remove, replace with...
 431         (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
 432         (DMxC1): Remove, replace with...
 433         (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
 434         (MxC1): Remove, replace with...
 435         (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
 436
 437 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
 438
 439         * sim-main.h (FGRIDX): Remove, replace all uses with...
 440         (FGR_BASE): New macro.
 441         (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
 442         (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
 443         (NR_FGR, FGR): Likewise.
 444         * interp.c: Replace all uses of FGRIDX with FGR_BASE.
 445         * mips.igen: Likewise.
 446
 447 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
 448
 449         * cp1.c: Add an FSF Copyright notice to this file.
 450
 451 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
 452             Ed Satterthwaite  <ehs@broadcom.com>
 453
 454         * cp1.c (Infinity): Remove.
 455         * sim-main.h (Infinity): Likewise.
 456
 457         * cp1.c (fp_unary, fp_binary): New functions.
 458         (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
 459         (fp_sqrt): New functions, implemented in terms of the above.
 460         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
 461         (Recip, SquareRoot): Remove (replaced by functions above).
 462         * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
 463         (fp_recip, fp_sqrt): New prototypes.
 464         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
 465         (Recip, SquareRoot): Replace prototypes with #defines which
 466         invoke the functions above.
 467
 468 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 469
 470         * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
 471         (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
 472         file, remove PARAMS from prototypes.
 473         (value_fpr, store_fpr, convert): Likewise.  Use SIM_STATE to provide
 474         simulator state arguments.
 475         (ValueFPR, StoreFPR, Convert): Move lower in file.  Use SIM_ARGS to
 476         pass simulator state arguments.
 477         * cp1.c (SD): Redefine as CPU_STATE(cpu).
 478         (store_fpr, convert): Remove 'sd' argument.
 479         (value_fpr): Likewise.  Convert to use 'SD' instead.
 480
 481 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 482
 483         * cp1.c (Min, Max): Remove #if 0'd functions.
 484         * sim-main.h (Min, Max): Remove.
 485
 486 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 487
 488         * cp1.c: fix formatting of switch case and default labels.
 489         * interp.c: Likewise.
 490         * sim-main.c: Likewise.
 491
 492 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 493
 494         * cp1.c: Clean up comments which describe FP formats.
 495          (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
 496
 497 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 498             Ed Satterthwaite  <ehs@broadcom.com>
 499
 500         * configure.in (mipsisa64sb1*-*-*): New target for supporting
 501         Broadcom SiByte SB-1 processor configurations.
 502         * configure: Regenerate.
 503         * sb1.igen: New file.
 504         * mips.igen: Include sb1.igen.
 505         (sb1): New model.
 506         * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
 507         * mdmx.igen: Add "sb1" model to all appropriate functions and
 508         instructions.
 509         * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
 510         (ob_func, ob_acc): Reference the above.
 511         (qh_acc): Adjust to keep the same size as ob_acc.
 512         * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
 513         (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
 514
 515 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 516
 517         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
 518
 519 2002-06-02  Chris Demetriou  <cgd@broadcom.com>
 520             Ed Satterthwaite  <ehs@broadcom.com>
 521
 522         * mips.igen (mdmx): New (pseudo-)model.
 523         * mdmx.c, mdmx.igen: New files.
 524         * Makefile.in (SIM_OBJS): Add mdmx.o.
 525         * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
 526         New typedefs.
 527         (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
 528         (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
 529         (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
 530         (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
 531         (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
 532         (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
 533         (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
 534         (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
 535         (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
 536         (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
 537         (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
 538         (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
 539         (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
 540         (qh_fmtsel): New macros.
 541         (_sim_cpu): New member "acc".
 542         (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
 543         (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
 544
 545 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
 546
 547         * interp.c: Use 'deprecated' rather than 'depreciated.'
 548         * sim-main.h: Likewise.
 549
 550 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
 551
 552         * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
 553         which wouldn't compile anyway.
 554         * sim-main.h (unpredictable_action): New function prototype.
 555         (Unpredictable): Define to call igen function unpredictable().
 556         (NotWordValue): New macro to call igen function not_word_value().
 557         (UndefinedResult): Remove.
 558         * interp.c (undefined_result): Remove.
 559         (unpredictable_action): New function.
 560         * mips.igen (not_word_value, unpredictable): New functions.
 561         (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
 562         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
 563         (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
 564         NotWordValue() to check for unpredictable inputs, then
 565         Unpredictable() to handle them.
 566
 567 2002-02-24  Chris Demetriou  <cgd@broadcom.com>
 568
 569         * mips.igen: Fix formatting of calls to Unpredictable().
 570
 571 2002-04-20  Andrew Cagney  <ac131313@redhat.com>
 572
 573         * interp.c (sim_open): Revert previous change.
 574
 575 2002-04-18  Alexandre Oliva  <aoliva@redhat.com>
 576
 577         * interp.c (sim_open): Disable chunk of code that wrote code in
 578         vector table entries.
 579
 580 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
 581
 582         * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
 583         (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
 584         unused definitions.
 585
 586 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
 587
 588         * cp1.c: Fix many formatting issues.
 589
 590 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
 591
 592         * cp1.c (fpu_format_name): New function to replace...
 593         (DOFMT): This.  Delete, and update all callers.
 594         (fpu_rounding_mode_name): New function to replace...
 595         (RMMODE): This.  Delete, and update all callers.
 596
 597 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
 598
 599         * interp.c: Move FPU support routines from here to...
 600         * cp1.c: Here.  New file.
 601         * Makefile.in (SIM_OBJS): Add cp1.o to object list.
 602         (cp1.o): New target.
 603
 604 2002-03-12  Chris Demetriou  <cgd@broadcom.com>
 605
 606         * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
 607         * mips.igen (mips32, mips64): New models, add to all instructions
 608         and functions as appropriate.
 609         (loadstore_ea, check_u64): New variant for model mips64.
 610         (check_fmt_p): New variant for models mipsV and mips64, remove
 611         mipsV model marking fro other variant.
 612         (SLL) Rename to...
 613         (SLLa) this.
 614         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
 615         for mips32 and mips64.
 616         (DCLO, DCLZ): New instructions for mips64.
 617
 618 2002-03-07  Chris Demetriou  <cgd@broadcom.com>
 619
 620         * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
 621         immediate or code as a hex value with the "%#lx" format.
 622         (ANDI): Likewise, and fix printed instruction name.
 623
 624 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
 625
 626         * sim-main.h (UndefinedResult, Unpredictable): New macros
 627         which currently do nothing.
 628
 629 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
 630
 631         * sim-main.h (status_UX, status_SX, status_KX, status_TS)
 632         (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
 633         (status_CU3): New definitions.
 634
 635         * sim-main.h (ExceptionCause): Add new values for MIPS32
 636         and MIPS64: MDMX, MCheck, CacheErr.  Update comments
 637         for DebugBreakPoint and NMIReset to note their status in
 638         MIPS32 and MIPS64.
 639         (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
 640         (SignalExceptionCacheErr): New exception macros.
 641
 642 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
 643
 644         * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
 645         * sim-main.h (COP_Usable): Define, but for now coprocessor 1
 646         is always enabled.
 647         (SignalExceptionCoProcessorUnusable): Take as argument the
 648         unusable coprocessor number.
 649
 650 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
 651
 652         * mips.igen: Fix formatting of all SignalException calls.
 653
 654 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
 655
 656         * sim-main.h (SIGNEXTEND): Remove.
 657
 658 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
 659
 660         * mips.igen: Remove gencode comment from top of file, fix
 661         spelling in another comment.
 662
 663 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
 664
 665         * mips.igen (check_fmt, check_fmt_p): New functions to check
 666         whether specific floating point formats are usable.
 667         (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
 668         (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
 669         (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
 670         Use the new functions.
 671         (do_c_cond_fmt): Remove format checks...
 672         (C.cond.fmta, C.cond.fmtb): And move them into all callers.
 673
 674 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
 675
 676         * mips.igen: Fix formatting of check_fpu calls.
 677
 678 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
 679
 680         * mips.igen (FLOOR.L.fmt): Store correct destination register.
 681
 682 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
 683
 684         * mips.igen: Remove whitespace at end of lines.
 685
 686 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
 687
 688         * mips.igen (loadstore_ea): New function to do effective
 689         address calculations.
 690         (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
 691         do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
 692         CACHE): Use loadstore_ea to do effective address computations.
 693
 694 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
 695
 696         * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
 697         * mips.igen (LL, CxC1, MxC1): Likewise.
 698
 699 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
 700
 701         * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
 702         CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
 703         FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
 704         MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
 705         NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
 706         SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
 707         Don't split opcode fields by hand, use the opcode field values
 708         provided by igen.
 709
 710 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
 711
 712         * mips.igen (do_divu): Fix spacing.
 713
 714         * mips.igen (do_dsllv): Move to be right before DSLLV,
 715         to match the rest of the do_<shift> functions.
 716
 717 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
 718
 719         * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
 720         DSRL32, do_dsrlv): Trace inputs and results.
 721
 722 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
 723
 724         * mips.igen (CACHE): Provide instruction-printing string.
 725
 726         * interp.c (signal_exception): Comment tokens after #endif.
 727
 728 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
 729
 730         * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
 731         (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
 732         NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
 733         ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
 734         CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
 735         C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
 736         SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
 737         LWC1, SWC1): Add "f" to filter, since these are FP instructions.
 738
 739 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
 740
 741         * mips.igen (DSRA32, DSRAV): Fix order of arguments in
 742         instruction-printing string.
 743         (LWU): Use '64' as the filter flag.
 744
 745 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
 746
 747         * mips.igen (SDXC1): Fix instruction-printing string.
 748
 749 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
 750
 751         * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
 752         filter flags "32,f".
 753
 754 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
 755
 756         * mips.igen (PREFX): This is a 64-bit instruction, use '64'
 757         as the filter flag.
 758
 759 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
 760
 761         * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
 762         add a comma) so that it more closely match the MIPS ISA
 763         documentation opcode partitioning.
 764         (PREF): Put useful names on opcode fields, and include
 765         instruction-printing string.
 766
 767 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
 768
 769         * mips.igen (check_u64): New function which in the future will
 770         check whether 64-bit instructions are usable and signal an
 771         exception if not.  Currently a no-op.
 772         (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
 773         DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
 774         DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
 775         LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
 776
 777         * mips.igen (check_fpu): New function which in the future will
 778         check whether FPU instructions are usable and signal an exception
 779         if not.  Currently a no-op.
 780         (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
 781         CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
 782         CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
 783         LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
 784         MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
 785         NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
 786         ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
 787         SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
 788
 789 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
 790
 791         * mips.igen (do_load_left, do_load_right): Move to be immediately
 792         following do_load.
 793         (do_store_left, do_store_right): Move to be immediately following
 794         do_store.
 795
 796 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
 797
 798         * mips.igen (mipsV): New model name.  Also, add it to
 799         all instructions and functions where it is appropriate.
 800
 801 2002-02-18  Chris Demetriou  <cgd@broadcom.com>
 802
 803         * mips.igen: For all functions and instructions, list model
 804         names that support that instruction one per line.
 805
 806 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
 807
 808         * mips.igen: Add some additional comments about supported
 809         models, and about which instructions go where.
 810         (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
 811         order as is used in the rest of the file.
 812
 813 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
 814
 815         * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
 816         indicating that ALU32_END or ALU64_END are there to check
 817         for overflow.
 818         (DADD): Likewise, but also remove previous comment about
 819         overflow checking.
 820
 821 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
 822
 823         * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
 824         DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
 825         JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
 826         SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
 827         ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
 828         fields (i.e., add and move commas) so that they more closely
 829         match the MIPS ISA documentation opcode partitioning.
 830
 831 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
 832
 833         * mips.igen (ADDI): Print immediate value.
 834         (BREAK): Print code.
 835         (DADDIU, DSRAV, DSRLV): Print correct instruction name.
 836         (SLL): Print "nop" specially, and don't run the code
 837         that does the shift for the "nop" case.
 838
 839 2001-11-17  Fred Fish  <fnf@redhat.com>
 840
 841         * sim-main.h (float_operation): Move enum declaration outside
 842         of _sim_cpu struct declaration.
 843
 844 2001-04-12  Jim Blandy  <jimb@redhat.com>
 845
 846         * mips.igen (CFC1, CTC1): Pass the correct register numbers to
 847         PENDING_FILL.  Use PENDING_SCHED directly to handle the pending
 848         set of the FCSR.
 849         * sim-main.h (COCIDX): Remove definition; this isn't supported by
 850         PENDING_FILL, and you can get the intended effect gracefully by
 851         calling PENDING_SCHED directly.
 852
 853 2001-02-23  Ben Elliston  <bje@redhat.com>
 854
 855         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
 856         already defined elsewhere.
 857
 858 2001-02-19  Ben Elliston  <bje@redhat.com>
 859
 860         * sim-main.h (sim_monitor): Return an int.
 861         * interp.c (sim_monitor): Add return values.
 862         (signal_exception): Handle error conditions from sim_monitor.
 863
 864 2001-02-08  Ben Elliston  <bje@redhat.com>
 865
 866         * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
 867         (store_memory): Likewise, pass cia to sim_core_write*.
 868
 869 2000-10-19  Frank Ch. Eigler  <fche@redhat.com>
 870
 871         On advice from Chris G. Demetriou <cgd@sibyte.com>:
 872         * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
 873
 874 Thu Jul 27 22:02:05 2000  Andrew Cagney  <cagney@b1.cygnus.com>
 875
 876         From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
 877         * Makefile.in: Don't delete *.igen when cleaning directory.
 878
 879 Wed Jul 19 18:50:51 2000  Andrew Cagney  <cagney@b1.cygnus.com>
 880
 881         * m16.igen (break): Call SignalException not sim_engine_halt.
 882
 883 Mon Jul  3 11:13:20 2000  Andrew Cagney  <cagney@b1.cygnus.com>
 884
 885         From Jason Eckhardt:
 886         * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
 887
 888 Tue Jun 13 20:52:07 2000  Andrew Cagney  <cagney@b1.cygnus.com>
 889
 890         * mips.igen (MxC1, DMxC1): Fix printf formatting.
 891
 892 2000-05-24  Michael Hayes  <mhayes@cygnus.com>
 893
 894         * mips.igen (do_dmultx): Fix typo.
 895
 896 Tue May 23 21:39:23 2000  Andrew Cagney  <cagney@b1.cygnus.com>
 897
 898         * configure: Regenerated to track ../common/aclocal.m4 changes.
 899
 900 Fri Apr 28 20:48:36 2000  Andrew Cagney  <cagney@b1.cygnus.com>
 901
 902         * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
 903
 904 2000-04-12  Frank Ch. Eigler  <fche@redhat.com>
 905
 906         * sim-main.h (GPR_CLEAR): Define macro.
 907
 908 Mon Apr 10 00:07:09 2000  Andrew Cagney  <cagney@b1.cygnus.com>
 909
 910         * interp.c (decode_coproc): Output long using %lx and not %s.
 911
 912 2000-03-21  Frank Ch. Eigler  <fche@redhat.com>
 913
 914         * interp.c (sim_open): Sort & extend dummy memory regions for
 915         --board=jmr3904 for eCos.
 916
 917 2000-03-02  Frank Ch. Eigler  <fche@redhat.com>
 918
 919         * configure: Regenerated.
 920
 921 Tue Feb  8 18:35:01 2000  Donald Lindsay  <dlindsay@hound.cygnus.com>
 922
 923         * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
 924         calls, conditional on the simulator being in verbose mode.
 925
 926 Fri Feb  4 09:45:15 2000  Donald Lindsay  <dlindsay@cygnus.com>
 927
 928         * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
 929         cache don't get ReservedInstruction traps.
 930
 931 1999-11-29  Mark Salter  <msalter@cygnus.com>
 932
 933         * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
 934         to clear status bits in sdisr register. This is how the hardware works.
 935
 936         * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
 937         being used by cygmon.
 938
 939 1999-11-11  Andrew Haley  <aph@cygnus.com>
 940
 941         * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
 942         instructions.
 943
 944 Thu Sep  9 15:12:08 1999  Geoffrey Keating  <geoffk@cygnus.com>
 945
 946         * mips.igen (MULT): Correct previous mis-applied patch.
 947
 948 Tue Sep  7 13:34:54 1999  Geoffrey Keating  <geoffk@cygnus.com>
 949
 950         * mips.igen (delayslot32): Handle sequence like
 951         mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
 952         correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
 953         (MULT): Actually pass the third register...
 954
 955 1999-09-03  Mark Salter  <msalter@cygnus.com>
 956
 957         * interp.c (sim_open): Added more memory aliases for additional
 958         hardware being touched by cygmon on jmr3904 board.
 959
 960 Thu Sep  2 18:15:53 1999  Andrew Cagney  <cagney@b1.cygnus.com>
 961
 962         * configure: Regenerated to track ../common/aclocal.m4 changes.
 963
 964 Tue Jul 27 16:36:51 1999  Andrew Cagney  <cagney@amy.cygnus.com>
 965
 966         * interp.c (sim_store_register): Handle case where client - GDB -
 967         specifies that a 4 byte register is 8 bytes in size.
 968         (sim_fetch_register): Ditto.
 969
 970 1999-07-14  Frank Ch. Eigler  <fche@cygnus.com>
 971
 972         Implement "sim firmware" option, inspired by jimb's version of 1998-01.
 973         * interp.c (firmware_option_p): New global flag: "sim firmware" given.
 974         (idt_monitor_base): Base address for IDT monitor traps.
 975         (pmon_monitor_base): Ditto for PMON.
 976         (lsipmon_monitor_base): Ditto for LSI PMON.
 977         (MONITOR_BASE, MONITOR_SIZE): Removed macros.
 978         (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
 979         (sim_firmware_command): New function.
 980         (mips_option_handler): Call it for OPTION_FIRMWARE.
 981         (sim_open): Allocate memory for idt_monitor region.  If "--board"
 982         option was given, add no monitor by default.  Add BREAK hooks only if
 983         monitors are also there.
 984
 985 Mon Jul 12 00:02:27 1999  Andrew Cagney  <cagney@amy.cygnus.com>
 986
 987         * interp.c (sim_monitor): Flush output before reading input.
 988
 989 Sun Jul 11 19:28:11 1999  Andrew Cagney  <cagney@b1.cygnus.com>
 990
 991         * tconfig.in (SIM_HANDLES_LMA): Always define.
 992
 993 Thu Jul  8 16:06:59 1999  Andrew Cagney  <cagney@b1.cygnus.com>
 994
 995         From Mark Salter <msalter@cygnus.com>:
 996         * interp.c (BOARD_BSP): Define.  Add to list of possible boards.
 997         (sim_open): Add setup for BSP board.
 998
 999 Wed Jul  7 12:45:58 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1000
1001         * mips.igen (MULT, MULTU): Add syntax for two operand version.
1002         (DMFC0, DMTC0): Recognize.  Call DecodeCoproc which will report
1003         them as unimplemented.
1004
1005 1999-05-08  Felix Lee  <flee@cygnus.com>
1006
1007         * configure: Regenerated to track ../common/aclocal.m4 changes.
1008
1009 1999-04-21  Frank Ch. Eigler  <fche@cygnus.com>
1010
1011         * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1012
1013 Thu Apr 15 14:15:17 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1014
1015         * configure.in: Any mips64vr5*-*-* target should have
1016         -DTARGET_ENABLE_FR=1.
1017         (default_endian): Any mips64vr*el-*-* target should default to
1018         LITTLE_ENDIAN.
1019         * configure: Re-generate.
1020
1021 1999-02-19  Gavin Romig-Koch  <gavin@cygnus.com>
1022
1023         * mips.igen (ldl): Extend from _16_, not 32.
1024
1025 Wed Jan 27 18:51:38 1999  Andrew Cagney  <cagney@chook.cygnus.com>
1026
1027         * interp.c (sim_store_register): Force registers written to by GDB
1028         into an un-interpreted state.
1029
1030 1999-02-05  Frank Ch. Eigler  <fche@cygnus.com>
1031
1032         * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1033         CPU, start periodic background I/O polls.
1034         (tx3904sio_poll): New function: periodic I/O poller.
1035
1036 1998-12-30  Frank Ch. Eigler  <fche@cygnus.com>
1037
1038         * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1039
1040 Tue Dec 29 16:03:53 1998  Rainer Orth  <ro@TechFak.Uni-Bielefeld.DE>
1041
1042         * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1043         case statement.
1044
1045 1998-12-29  Frank Ch. Eigler  <fche@cygnus.com>
1046
1047         * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1048         (load_word): Call SIM_CORE_SIGNAL hook on error.
1049         (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1050         starting.  For exception dispatching, pass PC instead of NULL_CIA.
1051         (decode_coproc): Use COP0_BADVADDR to store faulting address.
1052         * sim-main.h (COP0_BADVADDR): Define.
1053         (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1054         (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1055         (_sim_cpu): Add exc_* fields to store register value snapshots.
1056         * mips.igen (*): Replace memory-related SignalException* calls
1057         with references to SIM_CORE_SIGNAL hook.
1058
1059         * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1060         fix.
1061         * sim-main.c (*): Minor warning cleanups.
1062
1063 1998-12-24  Gavin Romig-Koch  <gavin@cygnus.com>
1064
1065         * m16.igen (DADDIU5): Correct type-o.
1066
1067 Mon Dec 21 10:34:48 1998  Andrew Cagney  <cagney@chook>
1068
1069         * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1070         variables.
1071
1072 Wed Dec 16 18:20:28 1998  Andrew Cagney  <cagney@chook>
1073
1074         * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1075         to include path.
1076         (interp.o): Add dependency on itable.h
1077         (oengine.c, gencode): Delete remaining references.
1078         (BUILT_SRC_FROM_GEN): Clean up.
1079
1080 1998-12-16  Gavin Romig-Koch  <gavin@cygnus.com>
1081
1082         * vr4run.c: New.
1083         * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1084         tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1085         tmp-run-hack) : New.
1086         * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1087         DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1088         Drop the "64" qualifier to get the HACK generator working.
1089         Use IMMEDIATE rather than IMMED.  Use SHAMT rather than SHIFT.
1090         * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1091         qualifier to get the hack generator working.
1092         (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1093         (DSLL): Use do_dsll.
1094         (DSLLV): Use do_dsllv.
1095         (DSRA): Use do_dsra.
1096         (DSRL): Use do_dsrl.
1097         (DSRLV): Use do_dsrlv.
1098         (BC1): Move *vr4100 to get the HACK generator working.
1099         (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1100         get the HACK generator working.
1101         (MACC) Rename to get the HACK generator working.
1102         (DMACC,MACCS,DMACCS): Add the 64.
1103
1104 1998-12-12  Gavin Romig-Koch  <gavin@cygnus.com>
1105
1106         * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1107         * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1108
1109 1998-12-11  Gavin Romig-Koch  <gavin@cygnus.com>
1110
1111     * mips/interp.c (DEBUG): Cleanups.
1112
1113 1998-12-10  Frank Ch. Eigler  <fche@cygnus.com>
1114
1115         * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1116         (tx3904sio_tickle): fflush after a stdout character output.
1117
1118 1998-12-03  Frank Ch. Eigler  <fche@cygnus.com>
1119
1120         * interp.c (sim_close): Uninstall modules.
1121
1122 Wed Nov 25 13:41:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1123
1124         * sim-main.h, interp.c (sim_monitor): Change to global
1125         function.
1126
1127 Wed Nov 25 17:33:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1128
1129         * configure.in (vr4100): Only include vr4100 instructions in
1130         simulator.
1131         * configure: Re-generate.
1132         * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1133
1134 Mon Nov 23 18:20:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1135
1136         * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1137         * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1138         true alternative.
1139
1140         * configure.in (sim_default_gen, sim_use_gen): Replace with
1141         sim_gen.
1142         (--enable-sim-igen): Delete config option. Always using IGEN.
1143         * configure: Re-generate.
1144
1145         * Makefile.in (gencode): Kill, kill, kill.
1146         * gencode.c: Ditto.
1147
1148 Mon Nov 23 18:07:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1149
1150         * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1151         bit mips16 igen simulator.
1152         * configure: Re-generate.
1153
1154         * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1155         as part of vr4100 ISA.
1156         * vr.igen: Mark all instructions as 64 bit only.
1157
1158 Mon Nov 23 17:07:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1159
1160         * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1161         Pacify GCC.
1162
1163 Mon Nov 23 13:23:40 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1164
1165         * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1166         mipsIII/mips16 igen simulator.  Fix sim_gen VS sim_igen typos.
1167         * configure: Re-generate.
1168
1169         * m16.igen (BREAK): Define breakpoint instruction.
1170         (JALX32): Mark instruction as mips16 and not r3900.
1171         * mips.igen (C.cond.fmt): Fix typo in instruction format.
1172
1173         * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1174
1175 Sat Nov  7 09:54:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1176
1177         * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1178         insn as a debug breakpoint.
1179
1180         * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1181         pending.slot_size.
1182         (PENDING_SCHED): Clean up trace statement.
1183         (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1184         (PENDING_FILL): Delay write by only one cycle.
1185         (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1186
1187         * sim-main.c (pending_tick): Clean up trace statements. Add trace
1188         of pending writes.
1189         (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1190         32 & 64.
1191         (pending_tick): Move incrementing of index to FOR statement.
1192         (pending_tick): Only update PENDING_OUT after a write has occured.
1193
1194         * configure.in: Add explicit mips-lsi-* target.  Use gencode to
1195         build simulator.
1196         * configure: Re-generate.
1197
1198         * interp.c (sim_engine_run OLD): Delete explicit call to
1199         PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1200
1201 Sat Oct 30 09:49:10 1998  Frank Ch. Eigler  <fche@cygnus.com>
1202
1203         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1204         interrupt level number to match changed SignalExceptionInterrupt
1205         macro.
1206
1207 Fri Oct  9 18:02:25 1998  Doug Evans  <devans@canuck.cygnus.com>
1208
1209         * interp.c: #include "itable.h" if WITH_IGEN.
1210         (get_insn_name): New function.
1211         (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1212         * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1213
1214 Mon Sep 14 12:36:44 1998  Frank Ch. Eigler  <fche@cygnus.com>
1215
1216         * configure: Rebuilt to inhale new common/aclocal.m4.
1217
1218 Tue Sep  1 15:39:18 1998  Frank Ch. Eigler  <fche@cygnus.com>
1219
1220         * dv-tx3904sio.c: Include sim-assert.h.
1221
1222 Tue Aug 25 12:49:46 1998  Frank Ch. Eigler  <fche@cygnus.com>
1223
1224         * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1225         * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1226         Reorganize target-specific sim-hardware checks.
1227         * configure: rebuilt.
1228         * interp.c (sim_open): For tx39 target boards, set
1229         OPERATING_ENVIRONMENT, add tx3904sio devices.
1230         * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1231         ROM executables.  Install dv-sockser into sim-modules list.
1232
1233         * dv-tx3904irc.c: Compiler warning clean-up.
1234         * dv-tx3904tmr.c: Compiler warning clean-up.  Remove particularly
1235         frequent hw-trace messages.
1236
1237 Fri Jul 31 18:14:16 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1238
1239         * vr.igen (MulAcc): Identify as a vr4100 specific function.
1240
1241 Sat Jul 25 16:03:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1242
1243         * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1244
1245         * vr.igen: New file.
1246         (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1247         * mips.igen: Define vr4100 model. Include vr.igen.
1248 Mon Jun 29 09:21:07 1998  Gavin Koch  <gavin@cygnus.com>
1249
1250         * mips.igen (check_mf_hilo): Correct check.
1251
1252 Wed Jun 17 12:20:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1253
1254         * sim-main.h (interrupt_event): Add prototype.
1255
1256         * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1257         register_ptr, register_value.
1258         (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1259
1260         * sim-main.h (tracefh): Make extern.
1261
1262 Tue Jun 16 14:39:00 1998  Frank Ch. Eigler  <fche@cygnus.com>
1263
1264         * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1265         Reduce unnecessarily high timer event frequency.
1266         * dv-tx3904cpu.c: Ditto for interrupt event.
1267
1268 Wed Jun 10 13:22:32 1998  Frank Ch. Eigler  <fche@cygnus.com>
1269
1270         * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1271         to allay warnings.
1272         (interrupt_event): Made non-static.
1273
1274         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1275         interchange of configuration values for external vs. internal
1276         clock dividers.
1277
1278 Tue Jun  9 12:46:24 1998  Ian Carmichael  <iancarm@cygnus.com>
1279
1280         * mips.igen (BREAK): Moved code to here for
1281         simulator-reserved break instructions.
1282         * gencode.c (build_instruction): Ditto.
1283         * interp.c (signal_exception): Code moved from here.  Non-
1284         reserved instructions now use exception vector, rather
1285         than halting sim.
1286         * sim-main.h: Moved magic constants to here.
1287
1288 Tue Jun  9 12:29:50 1998  Frank Ch. Eigler  <fche@cygnus.com>
1289
1290         * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1291         register upon non-zero interrupt event level, clear upon zero
1292         event value.
1293         * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1294         by passing zero event value.
1295         (*_io_{read,write}_buffer): Endianness fixes.
1296         * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1297         (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1298
1299         * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1300         serial I/O and timer module at base address 0xFFFF0000.
1301
1302 Tue Jun  9 11:52:29 1998  Gavin Koch  <gavin@cygnus.com>
1303
1304         * mips.igen (SWC1) : Correct the handling of ReverseEndian
1305         and BigEndianCPU.
1306
1307 Tue Jun  9 11:40:57 1998  Gavin Koch  <gavin@cygnus.com>
1308
1309         * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1310         parts.
1311         * configure: Update.
1312
1313 Thu Jun  4 15:37:33 1998  Frank Ch. Eigler  <fche@cygnus.com>
1314
1315         * dv-tx3904tmr.c: New file - implements tx3904 timer.
1316         * dv-tx3904{irc,cpu}.c: Mild reformatting.
1317         * configure.in: Include tx3904tmr in hw_device list.
1318         * configure: Rebuilt.
1319         * interp.c (sim_open): Instantiate three timer instances.
1320         Fix address typo of tx3904irc instance.
1321
1322 Tue Jun  2 15:48:02 1998  Ian Carmichael  <iancarm@cygnus.com>
1323
1324         * interp.c (signal_exception): SystemCall exception now uses
1325         the exception vector.
1326
1327 Mon Jun  1 18:18:26 1998  Frank Ch. Eigler  <fche@cygnus.com>
1328
1329         * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1330         to allay warnings.
1331
1332 Fri May 29 11:40:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1333
1334         * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1335
1336 Mon May 25 20:47:45 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1337
1338         * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1339
1340         * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1341         sim-main.h. Declare a struct hw_descriptor instead of struct
1342         hw_device_descriptor.
1343
1344 Mon May 25 12:41:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1345
1346         * mips.igen (do_store_left, do_load_left): Compute nr of left and
1347         right bits and then re-align left hand bytes to correct byte
1348         lanes.  Fix incorrect computation in do_store_left when loading
1349         bytes from second word.
1350
1351 Fri May 22 13:34:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1352
1353         * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1354         * interp.c (sim_open): Only create a device tree when HW is
1355         enabled.
1356
1357         * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1358         * interp.c (signal_exception): Ditto.
1359
1360 Thu May 21 14:24:11 1998  Gavin Koch  <gavin@cygnus.com>
1361
1362         * gencode.c: Mark BEGEZALL as LIKELY.
1363
1364 Thu May 21 18:57:19 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1365
1366         * sim-main.h (ALU32_END): Sign extend 32 bit results.
1367         * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1368
1369 Mon May 18 18:22:42 1998  Frank Ch. Eigler  <fche@cygnus.com>
1370
1371         * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1372         modules.  Recognize TX39 target with "mips*tx39" pattern.
1373         * configure: Rebuilt.
1374         * sim-main.h (*): Added many macros defining bits in
1375         TX39 control registers.
1376         (SignalInterrupt): Send actual PC instead of NULL.
1377         (SignalNMIReset): New exception type.
1378         * interp.c (board): New variable for future use to identify
1379         a particular board being simulated.
1380         (mips_option_handler,mips_options): Added "--board" option.
1381         (interrupt_event): Send actual PC.
1382         (sim_open): Make memory layout conditional on board setting.
1383         (signal_exception): Initial implementation of hardware interrupt
1384         handling.  Accept another break instruction variant for simulator
1385         exit.
1386         (decode_coproc): Implement RFE instruction for TX39.
1387         (mips.igen): Decode RFE instruction as such.
1388         * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
1389         * interp.c: Define "jmr3904" and "jmr3904debug" board types and
1390         bbegin to implement memory map.
1391         * dv-tx3904cpu.c: New file.
1392         * dv-tx3904irc.c: New file.
1393
1394 Wed May 13 14:40:11 1998  Gavin Koch  <gavin@cygnus.com>
1395
1396         * mips.igen (check_mt_hilo): Create a separate r3900 version.
1397
1398 Wed May 13 14:11:46 1998  Gavin Koch  <gavin@cygnus.com>
1399
1400         * tx.igen (madd,maddu):  Replace calls to check_op_hilo
1401         with calls to check_div_hilo.
1402
1403 Wed May 13 09:59:27 1998  Gavin Koch  <gavin@cygnus.com>
1404
1405         * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
1406         Replace check_op_hilo with check_mult_hilo and check_div_hilo.
1407         Add special r3900 version of do_mult_hilo.
1408         (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
1409         with calls to check_mult_hilo.
1410         (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
1411         with calls to check_div_hilo.
1412
1413 Tue May 12 15:22:11 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1414
1415         * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
1416         Document a replacement.
1417
1418 Fri May  8 17:48:19 1998  Ian Carmichael  <iancarm@cygnus.com>
1419
1420         * interp.c (sim_monitor): Make mon_printf work.
1421
1422 Wed May  6 19:42:19 1998  Doug Evans  <devans@canuck.cygnus.com>
1423
1424         * sim-main.h (INSN_NAME): New arg `cpu'.
1425
1426 Tue Apr 28 18:33:31 1998  Geoffrey Noer  <noer@cygnus.com>
1427
1428         * configure: Regenerated to track ../common/aclocal.m4 changes.
1429
1430 Sun Apr 26 15:31:55 1998  Tom Tromey  <tromey@creche>
1431
1432         * configure: Regenerated to track ../common/aclocal.m4 changes.
1433         * config.in: Ditto.
1434
1435 Sun Apr 26 15:20:01 1998  Tom Tromey  <tromey@cygnus.com>
1436
1437         * acconfig.h: New file.
1438         * configure.in: Reverted change of Apr 24; use sinclude again.
1439
1440 Fri Apr 24 14:16:40 1998  Tom Tromey  <tromey@creche>
1441
1442         * configure: Regenerated to track ../common/aclocal.m4 changes.
1443         * config.in: Ditto.
1444
1445 Fri Apr 24 11:19:20 1998  Tom Tromey  <tromey@cygnus.com>
1446
1447         * configure.in: Don't call sinclude.
1448
1449 Fri Apr 24 11:35:01 1998  Andrew Cagney  <cagney@chook.cygnus.com>
1450
1451         * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
1452
1453 Tue Apr 21 11:59:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1454
1455         * mips.igen (ERET): Implement.
1456
1457         * interp.c (decode_coproc): Return sign-extended EPC.
1458
1459         * mips.igen (ANDI, LUI, MFC0): Add tracing code.
1460
1461         * interp.c (signal_exception): Do not ignore Trap.
1462         (signal_exception): On TRAP, restart at exception address.
1463         (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
1464         (signal_exception): Update.
1465         (sim_open): Patch V_COMMON interrupt vector with an abort sequence
1466         so that TRAP instructions are caught.
1467
1468 Mon Apr 20 11:26:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1469
1470         * sim-main.h (struct hilo_access, struct hilo_history): Define,
1471         contains HI/LO access history.
1472         (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
1473         (HIACCESS, LOACCESS): Delete, replace with
1474         (HIHISTORY, LOHISTORY): New macros.
1475         (CHECKHILO): Delete all, moved to mips.igen
1476
1477         * gencode.c (build_instruction): Do not generate checks for
1478         correct HI/LO register usage.
1479
1480         * interp.c (old_engine_run): Delete checks for correct HI/LO
1481         register usage.
1482
1483         * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
1484         check_mf_cycles): New functions.
1485         (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
1486         do_divu, domultx, do_mult, do_multu): Use.
1487
1488         * tx.igen ("madd", "maddu"): Use.
1489
1490 Wed Apr 15 18:31:54 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1491
1492         * mips.igen (DSRAV): Use function do_dsrav.
1493         (SRAV): Use new function do_srav.
1494
1495         * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
1496         (B): Sign extend 11 bit immediate.
1497         (EXT-B*): Shift 16 bit immediate left by 1.
1498         (ADDIU*): Don't sign extend immediate value.
1499
1500 Wed Apr 15 10:32:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1501
1502         * m16run.c (sim_engine_run): Restore CIA after handling an event.
1503
1504         * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
1505         functions.
1506
1507         * mips.igen (delayslot32, nullify_next_insn): New functions.
1508         (m16.igen): Always include.
1509         (do_*): Add more tracing.
1510
1511         * m16.igen (delayslot16): Add NIA argument, could be called by a
1512         32 bit MIPS16 instruction.
1513
1514         * interp.c (ifetch16): Move function from here.
1515         * sim-main.c (ifetch16): To here.
1516
1517         * sim-main.c (ifetch16, ifetch32): Update to match current
1518         implementations of LH, LW.
1519         (signal_exception): Don't print out incorrect hex value of illegal
1520         instruction.
1521
1522 Wed Apr 15 00:17:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1523
1524         * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
1525         instruction.
1526
1527         * m16.igen: Implement MIPS16 instructions.
1528
1529         * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
1530         do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
1531         do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
1532         do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
1533         do_srl, do_srlv, do_subu, do_xor, do_xori): New functions.  Move
1534         bodies of corresponding code from 32 bit insn to these.  Also used
1535         by MIPS16 versions of functions.
1536
1537         * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
1538         (IMEM16): Drop NR argument from macro.
1539
1540 Sat Apr  4 22:39:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1541
1542         * Makefile.in (SIM_OBJS): Add sim-main.o.
1543
1544         * sim-main.h (address_translation, load_memory, store_memory,
1545         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
1546         as INLINE_SIM_MAIN.
1547         (pr_addr, pr_uword64): Declare.
1548         (sim-main.c): Include when H_REVEALS_MODULE_P.
1549
1550         * interp.c (address_translation, load_memory, store_memory,
1551         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
1552         from here.
1553         * sim-main.c: To here. Fix compilation problems.
1554
1555         * configure.in: Enable inlining.
1556         * configure: Re-config.
1557
1558 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1559
1560         * configure: Regenerated to track ../common/aclocal.m4 changes.
1561
1562 Fri Apr  3 04:32:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1563
1564         * mips.igen: Include tx.igen.
1565         * Makefile.in (IGEN_INCLUDE): Add tx.igen.
1566         * tx.igen: New file, contains MADD and MADDU.
1567
1568         * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
1569         the hardwired constant `7'.
1570         (store_memory): Ditto.
1571         (LOADDRMASK): Move definition to sim-main.h.
1572
1573         mips.igen (MTC0): Enable for r3900.
1574         (ADDU): Add trace.
1575
1576         mips.igen (do_load_byte): Delete.
1577         (do_load, do_store, do_load_left, do_load_write, do_store_left,
1578         do_store_right): New functions.
1579         (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
1580
1581         configure.in: Let the tx39 use igen again.
1582         configure: Update.
1583
1584 Thu Apr  2 10:59:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1585
1586         * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
1587         not an address sized quantity.  Return zero for cache sizes.
1588
1589 Wed Apr  1 23:47:53 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1590
1591         * mips.igen (r3900): r3900 does not support 64 bit integer
1592         operations.
1593
1594 Mon Mar 30 14:46:05 1998  Gavin Koch  <gavin@cygnus.com>
1595
1596         * configure.in (mipstx39*-*-*): Use gencode simulator rather
1597         than igen one.
1598         * configure : Rebuild.
1599
1600 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1601
1602         * configure: Regenerated to track ../common/aclocal.m4 changes.
1603
1604 Fri Mar 27 15:01:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1605
1606         * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
1607
1608 Wed Mar 25 16:44:27 1998  Ian Carmichael  <iancarm@cygnus.com>
1609
1610         * configure: Regenerated to track ../common/aclocal.m4 changes.
1611         * config.in: Regenerated to track ../common/aclocal.m4 changes.
1612
1613 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1614
1615         * configure: Regenerated to track ../common/aclocal.m4 changes.
1616
1617 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1618
1619         * interp.c (Max, Min): Comment out functions. Not yet used.
1620
1621 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1622
1623         * configure: Regenerated to track ../common/aclocal.m4 changes.
1624
1625 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
1626
1627         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
1628         configurable settings for stand-alone simulator.
1629
1630         * configure.in: Added X11 search, just in case.
1631
1632         * configure: Regenerated.
1633
1634 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1635
1636         * interp.c (sim_write, sim_read, load_memory, store_memory):
1637         Replace sim_core_*_map with read_map, write_map, exec_map resp.
1638
1639 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1640
1641         * sim-main.h (GETFCC): Return an unsigned value.
1642
1643 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1644
1645         * mips.igen (DIV): Fix check for -1 / MIN_INT.
1646         (DADD): Result destination is RD not RT.
1647
1648 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1649
1650         * sim-main.h (HIACCESS, LOACCESS): Always define.
1651
1652         * mdmx.igen (Maxi, Mini): Rename Max, Min.
1653
1654         * interp.c (sim_info): Delete.
1655
1656 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
1657
1658         * interp.c (DECLARE_OPTION_HANDLER): Use it.
1659         (mips_option_handler): New argument `cpu'.
1660         (sim_open): Update call to sim_add_option_table.
1661
1662 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1663
1664         * mips.igen (CxC1): Add tracing.
1665
1666 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1667
1668         * sim-main.h (Max, Min): Declare.
1669
1670         * interp.c (Max, Min): New functions.
1671
1672         * mips.igen (BC1): Add tracing.
1673
1674 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
1675
1676         * interp.c Added memory map for stack in vr4100
1677
1678 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
1679
1680         * interp.c (load_memory): Add missing "break"'s.
1681
1682 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1683
1684         * interp.c (sim_store_register, sim_fetch_register): Pass in
1685         length parameter.  Return -1.
1686
1687 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
1688
1689         * interp.c: Added hardware init hook, fixed warnings.
1690
1691 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1692
1693         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
1694
1695 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1696
1697         * interp.c (ifetch16): New function.
1698
1699         * sim-main.h (IMEM32): Rename IMEM.
1700         (IMEM16_IMMED): Define.
1701         (IMEM16): Define.
1702         (DELAY_SLOT): Update.
1703
1704         * m16run.c (sim_engine_run): New file.
1705
1706         * m16.igen: All instructions except LB.
1707         (LB): Call do_load_byte.
1708         * mips.igen (do_load_byte): New function.
1709         (LB): Call do_load_byte.
1710
1711         * mips.igen: Move spec for insn bit size and high bit from here.
1712         * Makefile.in (tmp-igen, tmp-m16): To here.
1713
1714         * m16.dc: New file, decode mips16 instructions.
1715
1716         * Makefile.in (SIM_NO_ALL): Define.
1717         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
1718
1719 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1720
1721         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
1722         point unit to 32 bit registers.
1723         * configure: Re-generate.
1724
1725 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1726
1727         * configure.in (sim_use_gen): Make IGEN the default simulator
1728         generator for generic 32 and 64 bit mips targets.
1729         * configure: Re-generate.
1730
1731 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1732
1733         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
1734         bitsize.
1735
1736         * interp.c (sim_fetch_register, sim_store_register): Read/write
1737         FGR from correct location.
1738         (sim_open): Set size of FGR's according to
1739         WITH_TARGET_FLOATING_POINT_BITSIZE.
1740
1741         * sim-main.h (FGR): Store floating point registers in a separate
1742         array.
1743
1744 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1745
1746         * configure: Regenerated to track ../common/aclocal.m4 changes.
1747
1748 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1749
1750         * interp.c (ColdReset): Call PENDING_INVALIDATE.
1751
1752         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
1753
1754         * interp.c (pending_tick): New function.  Deliver pending writes.
1755
1756         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
1757         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
1758         it can handle mixed sized quantites and single bits.
1759
1760 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1761
1762         * interp.c (oengine.h): Do not include when building with IGEN.
1763         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
1764         (sim_info): Ditto for PROCESSOR_64BIT.
1765         (sim_monitor): Replace ut_reg with unsigned_word.
1766         (*): Ditto for t_reg.
1767         (LOADDRMASK): Define.
1768         (sim_open): Remove defunct check that host FP is IEEE compliant,
1769         using software to emulate floating point.
1770         (value_fpr, ...): Always compile, was conditional on HASFPU.
1771
1772 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1773
1774         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
1775         size.
1776
1777         * interp.c (SD, CPU): Define.
1778         (mips_option_handler): Set flags in each CPU.
1779         (interrupt_event): Assume CPU 0 is the one being iterrupted.
1780         (sim_close): Do not clear STATE, deleted anyway.
1781         (sim_write, sim_read): Assume CPU zero's vm should be used for
1782         data transfers.
1783         (sim_create_inferior): Set the PC for all processors.
1784         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
1785         argument.
1786         (mips16_entry): Pass correct nr of args to store_word, load_word.
1787         (ColdReset): Cold reset all cpu's.
1788         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
1789         (sim_monitor, load_memory, store_memory, signal_exception): Use
1790         `CPU' instead of STATE_CPU.
1791
1792
1793         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
1794         SD or CPU_.
1795
1796         * sim-main.h (signal_exception): Add sim_cpu arg.
1797         (SignalException*): Pass both SD and CPU to signal_exception.
1798         * interp.c (signal_exception): Update.
1799
1800         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
1801         Ditto
1802         (sync_operation, prefetch, cache_op, store_memory, load_memory,
1803         address_translation): Ditto
1804         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
1805
1806 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1807
1808         * configure: Regenerated to track ../common/aclocal.m4 changes.
1809
1810 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1811
1812         * interp.c (sim_engine_run): Add `nr_cpus' argument.
1813
1814         * mips.igen (model): Map processor names onto BFD name.
1815
1816         * sim-main.h (CPU_CIA): Delete.
1817         (SET_CIA, GET_CIA): Define
1818
1819 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1820
1821         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
1822         regiser.
1823
1824         * configure.in (default_endian): Configure a big-endian simulator
1825         by default.
1826         * configure: Re-generate.
1827
1828 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
1829
1830         * configure: Regenerated to track ../common/aclocal.m4 changes.
1831
1832 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
1833
1834         * interp.c (sim_monitor): Handle Densan monitor outbyte
1835         and inbyte functions.
1836
1837 1997-12-29  Felix Lee  <flee@cygnus.com>
1838
1839         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
1840
1841 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
1842
1843         * Makefile.in (tmp-igen): Arrange for $zero to always be
1844         reset to zero after every instruction.
1845
1846 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1847
1848         * configure: Regenerated to track ../common/aclocal.m4 changes.
1849         * config.in: Ditto.
1850
1851 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
1852
1853         * mips.igen (MSUB): Fix to work like MADD.
1854         * gencode.c (MSUB): Similarly.
1855
1856 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
1857
1858         * configure: Regenerated to track ../common/aclocal.m4 changes.
1859
1860 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1861
1862         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
1863
1864 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1865
1866         * sim-main.h (sim-fpu.h): Include.
1867
1868         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
1869         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
1870         using host independant sim_fpu module.
1871
1872 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1873
1874         * interp.c (signal_exception): Report internal errors with SIGABRT
1875         not SIGQUIT.
1876
1877         * sim-main.h (C0_CONFIG): New register.
1878         (signal.h): No longer include.
1879
1880         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
1881
1882 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
1883
1884         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
1885
1886 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1887
1888         * mips.igen: Tag vr5000 instructions.
1889         (ANDI): Was missing mipsIV model, fix assembler syntax.
1890         (do_c_cond_fmt): New function.
1891         (C.cond.fmt): Handle mips I-III which do not support CC field
1892         separatly.
1893         (bc1): Handle mips IV which do not have a delaed FCC separatly.
1894         (SDR): Mask paddr when BigEndianMem, not the converse as specified
1895         in IV3.2 spec.
1896         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
1897         vr5000 which saves LO in a GPR separatly.
1898
1899         * configure.in (enable-sim-igen): For vr5000, select vr5000
1900         specific instructions.
1901         * configure: Re-generate.
1902
1903 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1904
1905         * Makefile.in (SIM_OBJS): Add sim-fpu module.
1906
1907         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
1908         fmt_uninterpreted_64 bit cases to switch.  Convert to
1909         fmt_formatted,
1910
1911         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
1912
1913         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
1914         as specified in IV3.2 spec.
1915         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
1916
1917 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1918
1919         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
1920         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
1921         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
1922         PENDING_FILL versions of instructions.  Simplify.
1923         (X): New function.
1924         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
1925         instructions.
1926         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
1927         a signed value.
1928         (MTHI, MFHI): Disable code checking HI-LO.
1929
1930         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
1931         global.
1932         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
1933
1934 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1935
1936         * gencode.c (build_mips16_operands): Replace IPC with cia.
1937
1938         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
1939         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
1940         IPC to `cia'.
1941         (UndefinedResult): Replace function with macro/function
1942         combination.
1943         (sim_engine_run): Don't save PC in IPC.
1944
1945         * sim-main.h (IPC): Delete.
1946
1947
1948         * interp.c (signal_exception, store_word, load_word,
1949         address_translation, load_memory, store_memory, cache_op,
1950         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
1951         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
1952         current instruction address - cia - argument.
1953         (sim_read, sim_write): Call address_translation directly.
1954         (sim_engine_run): Rename variable vaddr to cia.
1955         (signal_exception): Pass cia to sim_monitor
1956
1957         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
1958         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
1959         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
1960
1961         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
1962         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
1963         SIM_ASSERT.
1964
1965         * interp.c (signal_exception): Pass restart address to
1966         sim_engine_restart.
1967
1968         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
1969         idecode.o): Add dependency.
1970
1971         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
1972         Delete definitions
1973         (DELAY_SLOT): Update NIA not PC with branch address.
1974         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
1975
1976         * mips.igen: Use CIA not PC in branch calculations.
1977         (illegal): Call SignalException.
1978         (BEQ, ADDIU): Fix assembler.
1979
1980 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1981
1982         * m16.igen (JALX): Was missing.
1983
1984         * configure.in (enable-sim-igen): New configuration option.
1985         * configure: Re-generate.
1986
1987         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
1988
1989         * interp.c (load_memory, store_memory): Delete parameter RAW.
1990         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
1991         bypassing {load,store}_memory.
1992
1993         * sim-main.h (ByteSwapMem): Delete definition.
1994
1995         * Makefile.in (SIM_OBJS): Add sim-memopt module.
1996
1997         * interp.c (sim_do_command, sim_commands): Delete mips specific
1998         commands.  Handled by module sim-options.
1999
2000         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2001         (WITH_MODULO_MEMORY): Define.
2002
2003         * interp.c (sim_info): Delete code printing memory size.
2004
2005         * interp.c (mips_size): Nee sim_size, delete function.
2006         (power2): Delete.
2007         (monitor, monitor_base, monitor_size): Delete global variables.
2008         (sim_open, sim_close): Delete code creating monitor and other
2009         memory regions.  Use sim-memopts module, via sim_do_commandf, to
2010         manage memory regions.
2011         (load_memory, store_memory): Use sim-core for memory model.
2012
2013         * interp.c (address_translation): Delete all memory map code
2014         except line forcing 32 bit addresses.
2015
2016 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2017
2018         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
2019         trace options.
2020
2021         * interp.c (logfh, logfile): Delete globals.
2022         (sim_open, sim_close): Delete code opening & closing log file.
2023         (mips_option_handler): Delete -l and -n options.
2024         (OPTION mips_options): Ditto.
2025
2026         * interp.c (OPTION mips_options): Rename option trace to dinero.
2027         (mips_option_handler): Update.
2028
2029 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2030
2031         * interp.c (fetch_str): New function.
2032         (sim_monitor): Rewrite using sim_read & sim_write.
2033         (sim_open): Check magic number.
2034         (sim_open): Write monitor vectors into memory using sim_write.
2035         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2036         (sim_read, sim_write): Simplify - transfer data one byte at a
2037         time.
2038         (load_memory, store_memory): Clarify meaning of parameter RAW.
2039
2040         * sim-main.h (isHOST): Defete definition.
2041         (isTARGET): Mark as depreciated.
2042         (address_translation): Delete parameter HOST.
2043
2044         * interp.c (address_translation): Delete parameter HOST.
2045
2046 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2047
2048         * mips.igen:
2049
2050         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2051         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2052
2053 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2054
2055         * mips.igen: Add model filter field to records.
2056
2057 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2058
2059         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
2060
2061         interp.c (sim_engine_run): Do not compile function sim_engine_run
2062         when WITH_IGEN == 1.
2063
2064         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2065         target architecture.
2066
2067         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2068         igen. Replace with configuration variables sim_igen_flags /
2069         sim_m16_flags.
2070
2071         * m16.igen: New file.  Copy mips16 insns here.
2072         * mips.igen: From here.
2073
2074 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2075
2076         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2077         to top.
2078         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2079
2080 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
2081
2082         * gencode.c (build_instruction): Follow sim_write's lead in using
2083         BigEndianMem instead of !ByteSwapMem.
2084
2085 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2086
2087         * configure.in (sim_gen): Dependent on target, select type of
2088         generator.  Always select old style generator.
2089
2090         configure: Re-generate.
2091
2092         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2093         targets.
2094         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2095         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2096         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2097         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2098         SIM_@sim_gen@_*, set by autoconf.
2099
2100 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2101
2102         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2103
2104         * interp.c (ColdReset): Remove #ifdef HASFPU, check
2105         CURRENT_FLOATING_POINT instead.
2106
2107         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2108         (address_translation): Raise exception InstructionFetch when
2109         translation fails and isINSTRUCTION.
2110
2111         * interp.c (sim_open, sim_write, sim_monitor, store_word,
2112         sim_engine_run): Change type of of vaddr and paddr to
2113         address_word.
2114         (address_translation, prefetch, load_memory, store_memory,
2115         cache_op): Change type of vAddr and pAddr to address_word.
2116
2117         * gencode.c (build_instruction): Change type of vaddr and paddr to
2118         address_word.
2119
2120 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2121
2122         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2123         macro to obtain result of ALU op.
2124
2125 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2126
2127         * interp.c (sim_info): Call profile_print.
2128
2129 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2130
2131         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2132
2133         * sim-main.h (WITH_PROFILE): Do not define, defined in
2134         common/sim-config.h.  Use sim-profile module.
2135         (simPROFILE): Delete defintion.
2136
2137         * interp.c (PROFILE): Delete definition.
2138         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2139         (sim_close): Delete code writing profile histogram.
2140         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2141         Delete.
2142         (sim_engine_run): Delete code profiling the PC.
2143
2144 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2145
2146         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2147
2148         * interp.c (sim_monitor): Make register pointers of type
2149         unsigned_word*.
2150
2151         * sim-main.h: Make registers of type unsigned_word not
2152         signed_word.
2153
2154 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2155
2156         * interp.c (sync_operation): Rename from SyncOperation, make
2157         global, add SD argument.
2158         (prefetch): Rename from Prefetch, make global, add SD argument.
2159         (decode_coproc): Make global.
2160
2161         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2162
2163         * gencode.c (build_instruction): Generate DecodeCoproc not
2164         decode_coproc calls.
2165
2166         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2167         (SizeFGR): Move to sim-main.h
2168         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2169         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2170         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2171         sim-main.h.
2172         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2173         FP_RM_TOMINF, GETRM): Move to sim-main.h.
2174         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2175         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2176         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2177         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2178
2179         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2180         exception.
2181         (sim-alu.h): Include.
2182         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2183         (sim_cia): Typedef to instruction_address.
2184
2185 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2186
2187         * Makefile.in (interp.o): Rename generated file engine.c to
2188         oengine.c.
2189
2190         * interp.c: Update.
2191
2192 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2193
2194         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2195
2196 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2197
2198         * gencode.c (build_instruction): For "FPSQRT", output correct
2199         number of arguments to Recip.
2200
2201 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2202
2203         * Makefile.in (interp.o): Depends on sim-main.h
2204
2205         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2206
2207         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2208         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2209         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2210         STATE, DSSTATE): Define
2211         (GPR, FGRIDX, ..): Define.
2212
2213         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2214         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2215         (GPR, FGRIDX, ...): Delete macros.
2216
2217         * interp.c: Update names to match defines from sim-main.h
2218
2219 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2220
2221         * interp.c (sim_monitor): Add SD argument.
2222         (sim_warning): Delete.  Replace calls with calls to
2223         sim_io_eprintf.
2224         (sim_error): Delete. Replace calls with sim_io_error.
2225         (open_trace, writeout32, writeout16, getnum): Add SD argument.
2226         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2227         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2228         argument.
2229         (mips_size): Rename from sim_size. Add SD argument.
2230
2231         * interp.c (simulator): Delete global variable.
2232         (callback): Delete global variable.
2233         (mips_option_handler, sim_open, sim_write, sim_read,
2234         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2235         sim_size,sim_monitor): Use sim_io_* not callback->*.
2236         (sim_open): ZALLOC simulator struct.
2237         (PROFILE): Do not define.
2238
2239 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2240
2241         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2242         support.h with corresponding code.
2243
2244         * sim-main.h (word64, uword64), support.h: Move definition to
2245         sim-main.h.
2246         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2247
2248         * support.h: Delete
2249         * Makefile.in: Update dependencies
2250         * interp.c: Do not include.
2251
2252 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2253
2254         * interp.c (address_translation, load_memory, store_memory,
2255         cache_op): Rename to from AddressTranslation et.al., make global,
2256         add SD argument
2257
2258         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2259         CacheOp): Define.
2260
2261         * interp.c (SignalException): Rename to signal_exception, make
2262         global.
2263
2264         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2265
2266         * sim-main.h (SignalException, SignalExceptionInterrupt,
2267         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2268         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2269         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2270         Define.
2271
2272         * interp.c, support.h: Use.
2273
2274 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2275
2276         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2277         to value_fpr / store_fpr. Add SD argument.
2278         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2279         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2280
2281         * sim-main.h (ValueFPR, StoreFPR): Define.
2282
2283 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2284
2285         * interp.c (sim_engine_run): Check consistency between configure
2286         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2287         and HASFPU.
2288
2289         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2290         (mips_fpu): Configure WITH_FLOATING_POINT.
2291         (mips_endian): Configure WITH_TARGET_ENDIAN.
2292         * configure: Update.
2293
2294 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2295
2296         * configure: Regenerated to track ../common/aclocal.m4 changes.
2297
2298 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
2299
2300         * configure: Regenerated.
2301
2302 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
2303
2304         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2305
2306 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2307
2308         * gencode.c (print_igen_insn_models): Assume certain architectures
2309         include all mips* instructions.
2310         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2311         instruction.
2312
2313         * Makefile.in (tmp.igen): Add target. Generate igen input from
2314         gencode file.
2315
2316         * gencode.c (FEATURE_IGEN): Define.
2317         (main): Add --igen option.  Generate output in igen format.
2318         (process_instructions): Format output according to igen option.
2319         (print_igen_insn_format): New function.
2320         (print_igen_insn_models): New function.
2321         (process_instructions): Only issue warnings and ignore
2322         instructions when no FEATURE_IGEN.
2323
2324 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2325
2326         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2327         MIPS targets.
2328
2329 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2330
2331         * configure: Regenerated to track ../common/aclocal.m4 changes.
2332
2333 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2334
2335         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2336         SIM_RESERVED_BITS): Delete, moved to common.
2337         (SIM_EXTRA_CFLAGS): Update.
2338
2339 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2340
2341         * configure.in: Configure non-strict memory alignment.
2342         * configure: Regenerated to track ../common/aclocal.m4 changes.
2343
2344 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2345
2346         * configure: Regenerated to track ../common/aclocal.m4 changes.
2347
2348 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
2349
2350         * gencode.c (SDBBP,DERET): Added (3900) insns.
2351         (RFE): Turn on for 3900.
2352         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2353         (dsstate): Made global.
2354         (SUBTARGET_R3900): Added.
2355         (CANCELDELAYSLOT): New.
2356         (SignalException): Ignore SystemCall rather than ignore and
2357         terminate.  Add DebugBreakPoint handling.
2358         (decode_coproc): New insns RFE, DERET; and new registers Debug
2359         and DEPC protected by SUBTARGET_R3900.
2360         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2361         bits explicitly.
2362         * Makefile.in,configure.in: Add mips subtarget option.
2363         * configure: Update.
2364
2365 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
2366
2367         * gencode.c: Add r3900 (tx39).
2368
2369
2370 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
2371
2372         * gencode.c (build_instruction): Don't need to subtract 4 for
2373         JALR, just 2.
2374
2375 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
2376
2377         * interp.c: Correct some HASFPU problems.
2378
2379 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2380
2381         * configure: Regenerated to track ../common/aclocal.m4 changes.
2382
2383 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2384
2385         * interp.c (mips_options): Fix samples option short form, should
2386         be `x'.
2387
2388 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2389
2390         * interp.c (sim_info): Enable info code.  Was just returning.
2391
2392 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2393
2394         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
2395         MFC0.
2396
2397 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2398
2399         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
2400         constants.
2401         (build_instruction): Ditto for LL.
2402
2403 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
2404
2405         * configure: Regenerated to track ../common/aclocal.m4 changes.
2406
2407 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2408
2409         * configure: Regenerated to track ../common/aclocal.m4 changes.
2410         * config.in: Ditto.
2411
2412 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2413
2414         * interp.c (sim_open): Add call to sim_analyze_program, update
2415         call to sim_config.
2416
2417 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2418
2419         * interp.c (sim_kill): Delete.
2420         (sim_create_inferior): Add ABFD argument. Set PC from same.
2421         (sim_load): Move code initializing trap handlers from here.
2422         (sim_open): To here.
2423         (sim_load): Delete, use sim-hload.c.
2424
2425         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
2426
2427 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2428
2429         * configure: Regenerated to track ../common/aclocal.m4 changes.
2430         * config.in: Ditto.
2431
2432 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2433
2434         * interp.c (sim_open): Add ABFD argument.
2435         (sim_load): Move call to sim_config from here.
2436         (sim_open): To here.  Check return status.
2437
2438 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
2439
2440         * gencode.c (build_instruction): Two arg MADD should
2441         not assign result to $0.
2442
2443 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
2444
2445         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
2446         * sim/mips/configure.in: Regenerate.
2447
2448 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
2449
2450         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
2451         signed8, unsigned8 et.al. types.
2452
2453         * interp.c (SUB_REG_FETCH): Handle both little and big endian
2454         hosts when selecting subreg.
2455
2456 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
2457
2458         * interp.c (sim_engine_run): Reset the ZERO register to zero
2459         regardless of FEATURE_WARN_ZERO.
2460         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
2461
2462 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2463
2464         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
2465         (SignalException): For BreakPoints ignore any mode bits and just
2466         save the PC.
2467         (SignalException): Always set the CAUSE register.
2468
2469 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2470
2471         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
2472         exception has been taken.
2473
2474         * interp.c: Implement the ERET and mt/f sr instructions.
2475
2476 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2477
2478         * interp.c (SignalException): Don't bother restarting an
2479         interrupt.
2480
2481 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2482
2483         * interp.c (SignalException): Really take an interrupt.
2484         (interrupt_event): Only deliver interrupts when enabled.
2485
2486 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2487
2488         * interp.c (sim_info): Only print info when verbose.
2489         (sim_info) Use sim_io_printf for output.
2490
2491 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2492
2493         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
2494         mips architectures.
2495
2496 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2497
2498         * interp.c (sim_do_command): Check for common commands if a
2499         simulator specific command fails.
2500
2501 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
2502
2503         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
2504         and simBE when DEBUG is defined.
2505
2506 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2507
2508         * interp.c (interrupt_event): New function.  Pass exception event
2509         onto exception handler.
2510
2511         * configure.in: Check for stdlib.h.
2512         * configure: Regenerate.
2513
2514         * gencode.c (build_instruction): Add UNUSED attribute to tempS
2515         variable declaration.
2516         (build_instruction): Initialize memval1.
2517         (build_instruction): Add UNUSED attribute to byte, bigend,
2518         reverse.
2519         (build_operands): Ditto.
2520
2521         * interp.c: Fix GCC warnings.
2522         (sim_get_quit_code): Delete.
2523
2524         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
2525         * Makefile.in: Ditto.
2526         * configure: Re-generate.
2527
2528         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
2529
2530 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2531
2532         * interp.c (mips_option_handler): New function parse argumes using
2533         sim-options.
2534         (myname): Replace with STATE_MY_NAME.
2535         (sim_open): Delete check for host endianness - performed by
2536         sim_config.
2537         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
2538         (sim_open): Move much of the initialization from here.
2539         (sim_load): To here.  After the image has been loaded and
2540         endianness set.
2541         (sim_open): Move ColdReset from here.
2542         (sim_create_inferior): To here.
2543         (sim_open): Make FP check less dependant on host endianness.
2544
2545         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
2546         run.
2547         * interp.c (sim_set_callbacks): Delete.
2548
2549         * interp.c (membank, membank_base, membank_size): Replace with
2550         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
2551         (sim_open): Remove call to callback->init. gdb/run do this.
2552
2553         * interp.c: Update
2554
2555         * sim-main.h (SIM_HAVE_FLATMEM): Define.
2556
2557         * interp.c (big_endian_p): Delete, replaced by
2558         current_target_byte_order.
2559
2560 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2561
2562         * interp.c (host_read_long, host_read_word, host_swap_word,
2563         host_swap_long): Delete. Using common sim-endian.
2564         (sim_fetch_register, sim_store_register): Use H2T.
2565         (pipeline_ticks): Delete.  Handled by sim-events.
2566         (sim_info): Update.
2567         (sim_engine_run): Update.
2568
2569 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2570
2571         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
2572         reason from here.
2573         (SignalException): To here. Signal using sim_engine_halt.
2574         (sim_stop_reason): Delete, moved to common.
2575
2576 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
2577
2578         * interp.c (sim_open): Add callback argument.
2579         (sim_set_callbacks): Delete SIM_DESC argument.
2580         (sim_size): Ditto.
2581
2582 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2583
2584         * Makefile.in (SIM_OBJS): Add common modules.
2585
2586         * interp.c (sim_set_callbacks): Also set SD callback.
2587         (set_endianness, xfer_*, swap_*): Delete.
2588         (host_read_word, host_read_long, host_swap_word, host_swap_long):
2589         Change to functions using sim-endian macros.
2590         (control_c, sim_stop): Delete, use common version.
2591         (simulate): Convert into.
2592         (sim_engine_run): This function.
2593         (sim_resume): Delete.
2594
2595         * interp.c (simulation): New variable - the simulator object.
2596         (sim_kind): Delete global - merged into simulation.
2597         (sim_load): Cleanup.  Move PC assignment from here.
2598         (sim_create_inferior): To here.
2599
2600         * sim-main.h: New file.
2601         * interp.c (sim-main.h): Include.
2602
2603 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
2604
2605         * configure: Regenerated to track ../common/aclocal.m4 changes.
2606
2607 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
2608
2609         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
2610
2611 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
2612
2613         * gencode.c (build_instruction): DIV instructions: check
2614         for division by zero and integer overflow before using
2615         host's division operation.
2616
2617 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
2618
2619         * Makefile.in (SIM_OBJS): Add sim-load.o.
2620         * interp.c: #include bfd.h.
2621         (target_byte_order): Delete.
2622         (sim_kind, myname, big_endian_p): New static locals.
2623         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
2624         after argument parsing.  Recognize -E arg, set endianness accordingly.
2625         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
2626         load file into simulator.  Set PC from bfd.
2627         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
2628         (set_endianness): Use big_endian_p instead of target_byte_order.
2629
2630 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2631
2632         * interp.c (sim_size): Delete prototype - conflicts with
2633         definition in remote-sim.h.  Correct definition.
2634
2635 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
2636
2637         * configure: Regenerated to track ../common/aclocal.m4 changes.
2638         * config.in: Ditto.
2639
2640 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
2641
2642         * interp.c (sim_open): New arg `kind'.
2643
2644         * configure: Regenerated to track ../common/aclocal.m4 changes.
2645
2646 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2647
2648         * configure: Regenerated to track ../common/aclocal.m4 changes.
2649
2650 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
2651
2652         * interp.c (sim_open): Set optind to 0 before calling getopt.
2653
2654 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
2655
2656         * configure: Regenerated to track ../common/aclocal.m4 changes.
2657
2658 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
2659
2660         * interp.c : Replace uses of pr_addr with pr_uword64
2661         where the bit length is always 64 independent of SIM_ADDR.
2662         (pr_uword64) : added.
2663
2664 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
2665
2666         * configure: Re-generate.
2667
2668 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
2669
2670         * configure: Regenerate to track ../common/aclocal.m4 changes.
2671
2672 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
2673
2674         * interp.c (sim_open): New SIM_DESC result.  Argument is now
2675         in argv form.
2676         (other sim_*): New SIM_DESC argument.
2677
2678 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
2679
2680         * interp.c: Fix printing of addresses for non-64-bit targets.
2681         (pr_addr): Add function to print address based on size.
2682
2683 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
2684
2685         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
2686
2687 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
2688
2689         * gencode.c (build_mips16_operands): Correct computation of base
2690         address for extended PC relative instruction.
2691
2692 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
2693
2694         * interp.c (mips16_entry): Add support for floating point cases.
2695         (SignalException): Pass floating point cases to mips16_entry.
2696         (ValueFPR): Don't restrict fmt_single and fmt_word to even
2697         registers.
2698         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
2699         or fmt_word.
2700         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
2701         and then set the state to fmt_uninterpreted.
2702         (COP_SW): Temporarily set the state to fmt_word while calling
2703         ValueFPR.
2704
2705 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
2706
2707         * gencode.c (build_instruction): The high order may be set in the
2708         comparison flags at any ISA level, not just ISA 4.
2709
2710 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
2711
2712         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
2713         COMMON_{PRE,POST}_CONFIG_FRAG instead.
2714         * configure.in: sinclude ../common/aclocal.m4.
2715         * configure: Regenerated.
2716
2717 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
2718
2719         * configure: Rebuild after change to aclocal.m4.
2720
2721 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
2722
2723         * configure configure.in Makefile.in:  Update to new configure
2724         scheme which is more compatible with WinGDB builds.
2725         * configure.in:  Improve comment on how to run autoconf.
2726         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
2727         * Makefile.in:  Use autoconf substitution to install common
2728         makefile fragment.
2729
2730 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
2731
2732         * gencode.c (build_instruction): Use BigEndianCPU instead of
2733         ByteSwapMem.
2734
2735 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
2736
2737         * interp.c (sim_monitor): Make output to stdout visible in
2738         wingdb's I/O log window.
2739
2740 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
2741
2742         * support.h: Undo previous change to SIGTRAP
2743         and SIGQUIT values.
2744
2745 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
2746
2747         * interp.c (store_word, load_word): New static functions.
2748         (mips16_entry): New static function.
2749         (SignalException): Look for mips16 entry and exit instructions.
2750         (simulate): Use the correct index when setting fpr_state after
2751         doing a pending move.
2752
2753 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
2754
2755         * interp.c: Fix byte-swapping code throughout to work on
2756         both little- and big-endian hosts.
2757
2758 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
2759
2760         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
2761         with gdb/config/i386/xm-windows.h.
2762
2763 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
2764
2765         * gencode.c (build_instruction): Work around MSVC++ code gen bug
2766         that messes up arithmetic shifts.
2767
2768 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
2769
2770         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
2771         SIGTRAP and SIGQUIT for _WIN32.
2772
2773 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
2774
2775         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
2776         force a 64 bit multiplication.
2777         (build_instruction) [OR]: In mips16 mode, don't do anything if the
2778         destination register is 0, since that is the default mips16 nop
2779         instruction.
2780
2781 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
2782
2783         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
2784         (build_endian_shift): Don't check proc64.
2785         (build_instruction): Always set memval to uword64.  Cast op2 to
2786         uword64 when shifting it left in memory instructions.  Always use
2787         the same code for stores--don't special case proc64.
2788
2789         * gencode.c (build_mips16_operands): Fix base PC value for PC
2790         relative operands.
2791         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
2792         jal instruction.
2793         * interp.c (simJALDELAYSLOT): Define.
2794         (JALDELAYSLOT): Define.
2795         (INDELAYSLOT, INJALDELAYSLOT): Define.
2796         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
2797
2798 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
2799
2800         * interp.c (sim_open): add flush_cache as a PMON routine
2801         (sim_monitor): handle flush_cache by ignoring it
2802
2803 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
2804
2805         * gencode.c (build_instruction): Use !ByteSwapMem instead of
2806         BigEndianMem.
2807         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
2808         (BigEndianMem): Rename to ByteSwapMem and change sense.
2809         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
2810         BigEndianMem references to !ByteSwapMem.
2811         (set_endianness): New function, with prototype.
2812         (sim_open): Call set_endianness.
2813         (sim_info): Use simBE instead of BigEndianMem.
2814         (xfer_direct_word, xfer_direct_long, swap_direct_word,
2815         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
2816         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
2817         ifdefs, keeping the prototype declaration.
2818         (swap_word): Rewrite correctly.
2819         (ColdReset): Delete references to CONFIG.  Delete endianness related
2820         code; moved to set_endianness.
2821
2822 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
2823
2824         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
2825         * interp.c (CHECKHILO): Define away.
2826         (simSIGINT): New macro.
2827         (membank_size): Increase from 1MB to 2MB.
2828         (control_c): New function.
2829         (sim_resume): Rename parameter signal to signal_number.  Add local
2830         variable prev.  Call signal before and after simulate.
2831         (sim_stop_reason): Add simSIGINT support.
2832         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
2833         functions always.
2834         (sim_warning): Delete call to SignalException.  Do call printf_filtered
2835         if logfh is NULL.
2836         (AddressTranslation): Add #ifdef DEBUG around debugging message and
2837         a call to sim_warning.
2838
2839 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
2840
2841         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
2842         16 bit instructions.
2843
2844 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
2845
2846         Add support for mips16 (16 bit MIPS implementation):
2847         * gencode.c (inst_type): Add mips16 instruction encoding types.
2848         (GETDATASIZEINSN): Define.
2849         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
2850         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
2851         mtlo.
2852         (MIPS16_DECODE): New table, for mips16 instructions.
2853         (bitmap_val): New static function.
2854         (struct mips16_op): Define.
2855         (mips16_op_table): New table, for mips16 operands.
2856         (build_mips16_operands): New static function.
2857         (process_instructions): If PC is odd, decode a mips16
2858         instruction.  Break out instruction handling into new
2859         build_instruction function.
2860         (build_instruction): New static function, broken out of
2861         process_instructions.  Check modifiers rather than flags for SHIFT
2862         bit count and m[ft]{hi,lo} direction.
2863         (usage): Pass program name to fprintf.
2864         (main): Remove unused variable this_option_optind.  Change
2865         ``*loptarg++'' to ``loptarg++''.
2866         (my_strtoul): Parenthesize && within ||.
2867         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
2868         (simulate): If PC is odd, fetch a 16 bit instruction, and
2869         increment PC by 2 rather than 4.
2870         * configure.in: Add case for mips16*-*-*.
2871         * configure: Rebuild.
2872
2873 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
2874
2875         * interp.c: Allow -t to enable tracing in standalone simulator.
2876         Fix garbage output in trace file and error messages.
2877
2878 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
2879
2880         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
2881         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
2882         * configure.in: Simplify using macros in ../common/aclocal.m4.
2883         * configure: Regenerated.
2884         * tconfig.in: New file.
2885
2886 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
2887
2888         * interp.c: Fix bugs in 64-bit port.
2889         Use ansi function declarations for msvc compiler.
2890         Initialize and test file pointer in trace code.
2891         Prevent duplicate definition of LAST_EMED_REGNUM.
2892
2893 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
2894
2895         * interp.c (xfer_big_long): Prevent unwanted sign extension.
2896
2897 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
2898
2899         * interp.c (SignalException): Check for explicit terminating
2900         breakpoint value.
2901         * gencode.c: Pass instruction value through SignalException()
2902         calls for Trap, Breakpoint and Syscall.
2903
2904 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
2905
2906         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
2907         only used on those hosts that provide it.
2908         * configure.in: Add sqrt() to list of functions to be checked for.
2909         * config.in: Re-generated.
2910         * configure: Re-generated.
2911
2912 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
2913
2914         * gencode.c (process_instructions): Call build_endian_shift when
2915         expanding STORE RIGHT, to fix swr.
2916         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
2917         clear the high bits.
2918         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
2919         Fix float to int conversions to produce signed values.
2920
2921 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
2922
2923         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
2924         (process_instructions): Correct handling of nor instruction.
2925         Correct shift count for 32 bit shift instructions. Correct sign
2926         extension for arithmetic shifts to not shift the number of bits in
2927         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
2928         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
2929         Fix madd.
2930         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
2931         It's OK to have a mult follow a mult.  What's not OK is to have a
2932         mult follow an mfhi.
2933         (Convert): Comment out incorrect rounding code.
2934
2935 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
2936
2937         * interp.c (sim_monitor): Improved monitor printf
2938         simulation. Tidied up simulator warnings, and added "--log" option
2939         for directing warning message output.
2940         * gencode.c: Use sim_warning() rather than WARNING macro.
2941
2942 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
2943
2944         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
2945         getopt1.o, rather than on gencode.c.  Link objects together.
2946         Don't link against -liberty.
2947         (gencode.o, getopt.o, getopt1.o): New targets.
2948         * gencode.c: Include <ctype.h> and "ansidecl.h".
2949         (AND): Undefine after including "ansidecl.h".
2950         (ULONG_MAX): Define if not defined.
2951         (OP_*): Don't define macros; now defined in opcode/mips.h.
2952         (main): Call my_strtoul rather than strtoul.
2953         (my_strtoul): New static function.
2954
2955 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
2956
2957         * gencode.c (process_instructions):  Generate word64 and uword64
2958         instead of `long long' and `unsigned long long' data types.
2959         * interp.c:  #include sysdep.h to get signals, and define default
2960         for SIGBUS.
2961         * (Convert):  Work around for Visual-C++ compiler bug with type
2962         conversion.
2963         * support.h:  Make things compile under Visual-C++ by using
2964         __int64 instead of `long long'.  Change many refs to long long
2965         into word64/uword64 typedefs.
2966
2967 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
2968
2969         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
2970         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
2971         (docdir): Removed.
2972         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
2973         (AC_PROG_INSTALL): Added.
2974         (AC_PROG_CC): Moved to before configure.host call.
2975         * configure: Rebuilt.
2976
2977 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
2978
2979         * configure.in: Define @SIMCONF@ depending on mips target.
2980         * configure: Rebuild.
2981         * Makefile.in (run): Add @SIMCONF@ to control simulator
2982         construction.
2983         * gencode.c: Change LOADDRMASK to 64bit memory model only.
2984         * interp.c: Remove some debugging, provide more detailed error
2985         messages, update memory accesses to use LOADDRMASK.
2986
2987 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
2988
2989         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
2990         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
2991         stamp-h.
2992         * configure: Rebuild.
2993         * config.in: New file, generated by autoheader.
2994         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
2995         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
2996         HAVE_ANINT and HAVE_AINT, as appropriate.
2997         * Makefile.in (run): Use @LIBS@ rather than -lm.
2998         (interp.o): Depend upon config.h.
2999         (Makefile): Just rebuild Makefile.
3000         (clean): Remove stamp-h.
3001         (mostlyclean): Make the same as clean, not as distclean.
3002         (config.h, stamp-h): New targets.
3003
3004 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3005
3006         * interp.c (ColdReset): Fix boolean test. Make all simulator
3007         globals static.
3008
3009 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
3010
3011         * interp.c (xfer_direct_word, xfer_direct_long,
3012         swap_direct_word, swap_direct_long, xfer_big_word,
3013         xfer_big_long, xfer_little_word, xfer_little_long,
3014         swap_word,swap_long): Added.
3015         * interp.c (ColdReset): Provide function indirection to
3016         host<->simulated_target transfer routines.
3017         * interp.c (sim_store_register, sim_fetch_register): Updated to
3018         make use of indirected transfer routines.
3019
3020 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
3021
3022         * gencode.c (process_instructions): Ensure FP ABS instruction
3023         recognised.
3024         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3025         system call support.
3026
3027 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
3028
3029         * interp.c (sim_do_command): Complain if callback structure not
3030         initialised.
3031
3032 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
3033
3034         * interp.c (Convert): Provide round-to-nearest and round-to-zero
3035         support for Sun hosts.
3036         * Makefile.in (gencode): Ensure the host compiler and libraries
3037         used for cross-hosted build.
3038
3039 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
3040
3041         * interp.c, gencode.c: Some more (TODO) tidying.
3042
3043 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
3044
3045         * gencode.c, interp.c: Replaced explicit long long references with
3046         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3047         * support.h (SET64LO, SET64HI): Macros added.
3048
3049 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
3050
3051         * configure: Regenerate with autoconf 2.7.
3052
3053 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
3054
3055         * interp.c (LoadMemory): Enclose text following #endif in /* */.
3056         * support.h: Remove superfluous "1" from #if.
3057         * support.h (CHECKSIM): Remove stray 'a' at end of line.
3058
3059 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
3060
3061         * interp.c (StoreFPR): Control UndefinedResult() call on
3062         WARN_RESULT manifest.
3063
3064 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
3065
3066         * gencode.c: Tidied instruction decoding, and added FP instruction
3067         support.
3068
3069         * interp.c: Added dineroIII, and BSD profiling support. Also
3070         run-time FP handling.
3071
3072 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
3073
3074         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3075         gencode.c, interp.c, support.h: created.