1 2015-04-18 Mike Frysinger <vapier@gentoo.org>
3 * sim-main.h (sim_cia): Delete.
5 2015-04-17 Mike Frysinger <vapier@gentoo.org>
7 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
9 * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
10 (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
11 * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
12 CIA_SET to CPU_PC_SET.
13 * sim-main.h (CIA_GET, CIA_SET): Delete.
15 2015-04-15 Mike Frysinger <vapier@gentoo.org>
17 * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
18 * sim-main.h (STATE_CPU): Delete.
20 2015-04-13 Mike Frysinger <vapier@gentoo.org>
22 * configure: Regenerate.
24 2015-04-13 Mike Frysinger <vapier@gentoo.org>
26 * Makefile.in (SIM_OBJS): Add sim-cpu.o.
27 * interp.c (mips_pc_get, mips_pc_set): New functions.
28 (sim_open): Declare new local var i. Call sim_cpu_alloc_all.
29 Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
31 * sim-main.h (SIM_CPU): Define.
32 (struct sim_state): Change cpu to an array of pointers.
35 2015-04-13 Mike Frysinger <vapier@gentoo.org>
37 * interp.c (mips_option_handler, open_trace, sim_close,
38 sim_write, sim_read, sim_store_register, sim_fetch_register,
39 sim_create_inferior, pr_addr, pr_uword64): Convert old style
41 (sim_open): Convert old style prototype. Change casts with
42 sim_write to unsigned char *.
43 (fetch_str): Change null to unsigned char, and change cast to
45 (sim_monitor): Change c & ch to unsigned char. Change cast to
48 2015-04-12 Mike Frysinger <vapier@gentoo.org>
50 * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
52 2015-04-06 Mike Frysinger <vapier@gentoo.org>
54 * Makefile.in (SIM_OBJS): Delete sim-engine.o.
56 2015-04-01 Mike Frysinger <vapier@gentoo.org>
58 * tconfig.h (SIM_HAVE_PROFILE): Delete.
60 2015-03-31 Mike Frysinger <vapier@gentoo.org>
62 * config.in, configure: Regenerate.
64 2015-03-24 Mike Frysinger <vapier@gentoo.org>
66 * interp.c (sim_pc_get): New function.
68 2015-03-24 Mike Frysinger <vapier@gentoo.org>
70 * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
71 * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
73 2015-03-24 Mike Frysinger <vapier@gentoo.org>
75 * configure: Regenerate.
77 2015-03-23 Mike Frysinger <vapier@gentoo.org>
79 * configure: Regenerate.
81 2015-03-23 Mike Frysinger <vapier@gentoo.org>
83 * configure: Regenerate.
84 * configure.ac (mips_extra_objs): Delete.
85 * Makefile.in (MIPS_EXTRA_OBJS): Delete.
86 (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
88 2015-03-23 Mike Frysinger <vapier@gentoo.org>
90 * configure: Regenerate.
91 * configure.ac: Delete sim_hw checks for dv-sockser.
93 2015-03-16 Mike Frysinger <vapier@gentoo.org>
95 * config.in, configure: Regenerate.
96 * tconfig.in: Rename file ...
97 * tconfig.h: ... here.
99 2015-03-15 Mike Frysinger <vapier@gentoo.org>
101 * tconfig.in: Delete includes.
102 [HAVE_DV_SOCKSER]: Delete.
104 2015-03-14 Mike Frysinger <vapier@gentoo.org>
106 * Makefile.in (SIM_RUN_OBJS): Delete.
108 2015-03-14 Mike Frysinger <vapier@gentoo.org>
110 * configure.ac (AC_CHECK_HEADERS): Delete.
111 * aclocal.m4, configure: Regenerate.
113 2014-08-19 Alan Modra <amodra@gmail.com>
115 * configure: Regenerate.
117 2014-08-15 Roland McGrath <mcgrathr@google.com>
119 * configure: Regenerate.
120 * config.in: Regenerate.
122 2014-03-04 Mike Frysinger <vapier@gentoo.org>
124 * configure: Regenerate.
126 2013-09-23 Alan Modra <amodra@gmail.com>
128 * configure: Regenerate.
130 2013-06-03 Mike Frysinger <vapier@gentoo.org>
132 * aclocal.m4, configure: Regenerate.
134 2013-05-10 Freddie Chopin <freddie_chopin@op.pl>
136 * configure: Rebuild.
138 2013-03-26 Mike Frysinger <vapier@gentoo.org>
140 * configure: Regenerate.
142 2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
144 * configure.ac: Address use of dv-sockser.o.
145 * tconfig.in: Conditionalize use of dv_sockser_install.
146 * configure: Regenerated.
147 * config.in: Regenerated.
149 2012-10-04 Chao-ying Fu <fu@mips.com>
150 Steve Ellcey <sellcey@mips.com>
152 * mips/mips3264r2.igen (rdhwr): New.
154 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
156 * configure.ac: Always link against dv-sockser.o.
157 * configure: Regenerate.
159 2012-06-15 Joel Brobecker <brobecker@adacore.com>
161 * config.in, configure: Regenerate.
163 2012-05-18 Nick Clifton <nickc@redhat.com>
166 * interp.c: Include config.h before system header files.
168 2012-03-24 Mike Frysinger <vapier@gentoo.org>
170 * aclocal.m4, config.in, configure: Regenerate.
172 2011-12-03 Mike Frysinger <vapier@gentoo.org>
174 * aclocal.m4: New file.
175 * configure: Regenerate.
177 2011-10-19 Mike Frysinger <vapier@gentoo.org>
179 * configure: Regenerate after common/acinclude.m4 update.
181 2011-10-17 Mike Frysinger <vapier@gentoo.org>
183 * configure.ac: Change include to common/acinclude.m4.
185 2011-10-17 Mike Frysinger <vapier@gentoo.org>
187 * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
188 call. Replace common.m4 include with SIM_AC_COMMON.
189 * configure: Regenerate.
191 2011-07-08 Hans-Peter Nilsson <hp@axis.com>
193 * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
195 (tmp-mach-multi): Exit early when igen fails.
197 2011-07-05 Mike Frysinger <vapier@gentoo.org>
199 * interp.c (sim_do_command): Delete.
201 2011-02-14 Mike Frysinger <vapier@gentoo.org>
203 * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
204 (tx3904sio_fifo_reset): Likewise.
205 * interp.c (sim_monitor): Likewise.
207 2010-04-14 Mike Frysinger <vapier@gentoo.org>
209 * interp.c (sim_write): Add const to buffer arg.
211 2010-01-18 Masaki Muranaka <monaka@monami-software.com> (tiny change)
213 * interp.c: Don't include sysdep.h
215 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
217 * configure: Regenerate.
219 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
221 * config.in: Regenerate.
222 * configure: Likewise.
224 * configure: Regenerate.
226 2008-07-11 Hans-Peter Nilsson <hp@axis.com>
228 * configure: Regenerate to track ../common/common.m4 changes.
231 2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
232 Daniel Jacobowitz <dan@codesourcery.com>
233 Joseph Myers <joseph@codesourcery.com>
235 * configure: Regenerate.
237 2007-10-22 Richard Sandiford <rsandifo@nildram.co.uk>
239 * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
240 that unconditionally allows fmt_ps.
241 (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
242 (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
243 (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
244 filter from 64,f to 32,f.
245 (PREFX): Change filter from 64 to 32.
246 (LDXC1, LUXC1): Provide separate mips32r2 implementations
247 that use do_load_double instead of do_load. Make both LUXC1
248 versions unpredictable if SizeFGR () != 64.
249 (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
250 instead of do_store. Remove unused variable. Make both SUXC1
251 versions unpredictable if SizeFGR () != 64.
253 2007-10-07 Richard Sandiford <rsandifo@nildram.co.uk>
255 * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
256 (sc, swxc1): Likewise. Also fix big-endian and reverse-endian
257 shifts for that case.
259 2007-09-04 Nick Clifton <nickc@redhat.com>
261 * interp.c (options enum): Add OPTION_INFO_MEMORY.
262 (display_mem_info): New static variable.
263 (mips_option_handler): Handle OPTION_INFO_MEMORY.
264 (mips_options): Add info-memory and memory-info.
265 (sim_open): After processing the command line and board
266 specification, check display_mem_info. If it is set then
267 call the real handler for the --memory-info command line
270 2007-08-24 Joel Brobecker <brobecker@adacore.com>
272 * configure.ac: Change license of multi-run.c to GPL version 3.
273 * configure: Regenerate.
275 2007-06-28 Richard Sandiford <richard@codesourcery.com>
277 * configure.ac, configure: Revert last patch.
279 2007-06-26 Richard Sandiford <richard@codesourcery.com>
281 * configure.ac (sim_mipsisa3264_configs): New variable.
282 (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
283 every configuration support all four targets, using the triplet to
284 determine the default.
285 * configure: Regenerate.
287 2007-06-25 Richard Sandiford <richard@codesourcery.com>
289 * Makefile.in (m16run.o): New rule.
291 2007-05-15 Thiemo Seufer <ths@mips.com>
293 * mips3264r2.igen (DSHD): Fix compile warning.
295 2007-05-14 Thiemo Seufer <ths@mips.com>
297 * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
298 CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
299 NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
300 RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
303 2007-03-01 Thiemo Seufer <ths@mips.com>
305 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
308 2007-02-20 Thiemo Seufer <ths@mips.com>
310 * dsp.igen: Update copyright notice.
311 * dsp2.igen: Fix copyright notice.
313 2007-02-20 Thiemo Seufer <ths@mips.com>
314 Chao-Ying Fu <fu@mips.com>
316 * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
317 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
318 Add dsp2 to sim_igen_machine.
319 * configure: Regenerate.
320 * dsp.igen (do_ph_op): Add MUL support when op = 2.
321 (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
322 (mulq_rs.ph): Use do_ph_mulq.
323 (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
324 * mips.igen: Add dsp2 model and include dsp2.igen.
325 (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
326 for *mips32r2, *mips64r2, *dsp.
327 (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
328 for *mips32r2, *mips64r2, *dsp2.
329 * dsp2.igen: New file for MIPS DSP REV 2 ASE.
331 2007-02-19 Thiemo Seufer <ths@mips.com>
332 Nigel Stephens <nigel@mips.com>
334 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
335 jumps with hazard barrier.
337 2007-02-19 Thiemo Seufer <ths@mips.com>
338 Nigel Stephens <nigel@mips.com>
340 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
341 after each call to sim_io_write.
343 2007-02-19 Thiemo Seufer <ths@mips.com>
344 Nigel Stephens <nigel@mips.com>
346 * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
347 supported by this simulator.
348 (decode_coproc): Recognise additional CP0 Config registers
351 2007-02-19 Thiemo Seufer <ths@mips.com>
352 Nigel Stephens <nigel@mips.com>
353 David Ung <davidu@mips.com>
355 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
356 uninterpreted formats. If fmt is one of the uninterpreted types
357 don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
358 fmt_word, and fmt_uninterpreted_64 like fmt_long.
359 (store_fpr): When writing an invalid odd register, set the
360 matching even register to fmt_unknown, not the following register.
361 * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
362 the the memory window at offset 0 set by --memory-size command
364 (sim_store_register): Handle storing 4 bytes to an 8 byte floating
366 (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
368 (sim_monitor): When returning the memory size to the MIPS
369 application, use the value in STATE_MEM_SIZE, not an arbitrary
371 (cop_lw): Don' mess around with FPR_STATE, just pass
372 fmt_uninterpreted_32 to StoreFPR.
374 (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
376 * mips.igen (not_word_value): Single version for mips32, mips64
379 2007-02-19 Thiemo Seufer <ths@mips.com>
380 Nigel Stephens <nigel@mips.com>
382 * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
385 2007-02-17 Thiemo Seufer <ths@mips.com>
387 * configure.ac (mips*-sde-elf*): Move in front of generic machine
389 * configure: Regenerate.
391 2007-02-17 Thiemo Seufer <ths@mips.com>
393 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
394 Add mdmx to sim_igen_machine.
395 (mipsisa64*-*-*): Likewise. Remove dsp.
396 (mipsisa32*-*-*): Remove dsp.
397 * configure: Regenerate.
399 2007-02-13 Thiemo Seufer <ths@mips.com>
401 * configure.ac: Add mips*-sde-elf* target.
402 * configure: Regenerate.
404 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
406 * acconfig.h: Remove.
407 * config.in, configure: Regenerate.
409 2006-11-07 Thiemo Seufer <ths@mips.com>
411 * dsp.igen (do_w_op): Fix compiler warning.
413 2006-08-29 Thiemo Seufer <ths@mips.com>
414 David Ung <davidu@mips.com>
416 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
418 * configure: Regenerate.
419 * mips.igen (model): Add smartmips.
420 (MADDU): Increment ACX if carry.
421 (do_mult): Clear ACX.
422 (ROR,RORV): Add smartmips.
423 (include): Include smartmips.igen.
424 * sim-main.h (ACX): Set to REGISTERS[89].
425 * smartmips.igen: New file.
427 2006-08-29 Thiemo Seufer <ths@mips.com>
428 David Ung <davidu@mips.com>
430 * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
431 mips3264r2.igen. Add missing dependency rules.
432 * m16e.igen: Support for mips16e save/restore instructions.
434 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
436 * configure: Regenerated.
438 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
440 * configure: Regenerated.
442 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
444 * configure: Regenerated.
446 2006-05-15 Chao-ying Fu <fu@mips.com>
448 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
450 2006-04-18 Nick Clifton <nickc@redhat.com>
452 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
455 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
457 * configure: Regenerate.
459 2005-12-14 Chao-ying Fu <fu@mips.com>
461 * Makefile.in (SIM_OBJS): Add dsp.o.
462 (dsp.o): New dependency.
463 (IGEN_INCLUDE): Add dsp.igen.
464 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
465 mipsisa64*-*-*): Add dsp to sim_igen_machine.
466 * configure: Regenerate.
467 * mips.igen: Add dsp model and include dsp.igen.
468 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
469 because these instructions are extended in DSP ASE.
470 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
471 adding 6 DSP accumulator registers and 1 DSP control register.
472 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
473 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
474 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
475 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
476 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
477 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
478 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
479 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
480 DSPCR_CCOND_SMASK): New define.
481 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
482 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
484 2005-07-08 Ian Lance Taylor <ian@airs.com>
486 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
488 2005-06-16 David Ung <davidu@mips.com>
489 Nigel Stephens <nigel@mips.com>
491 * mips.igen: New mips16e model and include m16e.igen.
492 (check_u64): Add mips16e tag.
493 * m16e.igen: New file for MIPS16e instructions.
494 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
495 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
497 * configure: Regenerate.
499 2005-05-26 David Ung <davidu@mips.com>
501 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
502 tags to all instructions which are applicable to the new ISAs.
503 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
505 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
507 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
509 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
510 * configure: Regenerate.
512 2005-03-23 Mark Kettenis <kettenis@gnu.org>
514 * configure: Regenerate.
516 2005-01-14 Andrew Cagney <cagney@gnu.org>
518 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
519 explicit call to AC_CONFIG_HEADER.
520 * configure: Regenerate.
522 2005-01-12 Andrew Cagney <cagney@gnu.org>
524 * configure.ac: Update to use ../common/common.m4.
525 * configure: Re-generate.
527 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
529 * configure: Regenerated to track ../common/aclocal.m4 changes.
531 2005-01-07 Andrew Cagney <cagney@gnu.org>
533 * configure.ac: Rename configure.in, require autoconf 2.59.
534 * configure: Re-generate.
536 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
538 * configure: Regenerate for ../common/aclocal.m4 update.
540 2004-09-24 Monika Chaddha <monika@acmet.com>
542 Committed by Andrew Cagney.
543 * m16.igen (CMP, CMPI): Fix assembler.
545 2004-08-18 Chris Demetriou <cgd@broadcom.com>
547 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
548 * configure: Regenerate.
550 2004-06-25 Chris Demetriou <cgd@broadcom.com>
552 * configure.in (sim_m16_machine): Include mipsIII.
553 * configure: Regenerate.
555 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
557 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
559 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
561 2004-04-10 Chris Demetriou <cgd@broadcom.com>
563 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
565 2004-04-09 Chris Demetriou <cgd@broadcom.com>
567 * mips.igen (check_fmt): Remove.
568 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
569 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
570 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
571 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
572 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
573 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
574 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
575 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
576 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
577 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
579 2004-04-09 Chris Demetriou <cgd@broadcom.com>
581 * sb1.igen (check_sbx): New function.
582 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
584 2004-03-29 Chris Demetriou <cgd@broadcom.com>
585 Richard Sandiford <rsandifo@redhat.com>
587 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
588 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
589 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
590 separate implementations for mipsIV and mipsV. Use new macros to
591 determine whether the restrictions apply.
593 2004-01-19 Chris Demetriou <cgd@broadcom.com>
595 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
596 (check_mult_hilo): Improve comments.
597 (check_div_hilo): Likewise. Also, fork off a new version
598 to handle mips32/mips64 (since there are no hazards to check
601 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
603 * mips.igen (do_dmultx): Fix check for negative operands.
605 2003-05-16 Ian Lance Taylor <ian@airs.com>
607 * Makefile.in (SHELL): Make sure this is defined.
608 (various): Use $(SHELL) whenever we invoke move-if-change.
610 2003-05-03 Chris Demetriou <cgd@broadcom.com>
612 * cp1.c: Tweak attribution slightly.
615 * mdmx.igen: Likewise.
616 * mips3d.igen: Likewise.
617 * sb1.igen: Likewise.
619 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
621 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
624 2003-02-27 Andrew Cagney <cagney@redhat.com>
626 * interp.c (sim_open): Rename _bfd to bfd.
627 (sim_create_inferior): Ditto.
629 2003-01-14 Chris Demetriou <cgd@broadcom.com>
631 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
633 2003-01-14 Chris Demetriou <cgd@broadcom.com>
635 * mips.igen (EI, DI): Remove.
637 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
639 * Makefile.in (tmp-run-multi): Fix mips16 filter.
641 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
642 Andrew Cagney <ac131313@redhat.com>
643 Gavin Romig-Koch <gavin@redhat.com>
644 Graydon Hoare <graydon@redhat.com>
645 Aldy Hernandez <aldyh@redhat.com>
646 Dave Brolley <brolley@redhat.com>
647 Chris Demetriou <cgd@broadcom.com>
649 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
650 (sim_mach_default): New variable.
651 (mips64vr-*-*, mips64vrel-*-*): New configurations.
652 Add a new simulator generator, MULTI.
653 * configure: Regenerate.
654 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
655 (multi-run.o): New dependency.
656 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
657 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
658 (tmp-multi): Combine them.
659 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
660 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
661 (distclean-extra): New rule.
662 * sim-main.h: Include bfd.h.
663 (MIPS_MACH): New macro.
664 * mips.igen (vr4120, vr5400, vr5500): New models.
665 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
666 * vr.igen: Replace with new version.
668 2003-01-04 Chris Demetriou <cgd@broadcom.com>
670 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
671 * configure: Regenerate.
673 2002-12-31 Chris Demetriou <cgd@broadcom.com>
675 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
676 * mips.igen: Remove all invocations of check_branch_bug and
679 2002-12-16 Chris Demetriou <cgd@broadcom.com>
681 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
683 2002-07-30 Chris Demetriou <cgd@broadcom.com>
685 * mips.igen (do_load_double, do_store_double): New functions.
686 (LDC1, SDC1): Rename to...
687 (LDC1b, SDC1b): respectively.
688 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
690 2002-07-29 Michael Snyder <msnyder@redhat.com>
692 * cp1.c (fp_recip2): Modify initialization expression so that
693 GCC will recognize it as constant.
695 2002-06-18 Chris Demetriou <cgd@broadcom.com>
697 * mdmx.c (SD_): Delete.
698 (Unpredictable): Re-define, for now, to directly invoke
699 unpredictable_action().
700 (mdmx_acc_op): Fix error in .ob immediate handling.
702 2002-06-18 Andrew Cagney <cagney@redhat.com>
704 * interp.c (sim_firmware_command): Initialize `address'.
706 2002-06-16 Andrew Cagney <ac131313@redhat.com>
708 * configure: Regenerated to track ../common/aclocal.m4 changes.
710 2002-06-14 Chris Demetriou <cgd@broadcom.com>
711 Ed Satterthwaite <ehs@broadcom.com>
713 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
714 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
715 * mips.igen: Include mips3d.igen.
716 (mips3d): New model name for MIPS-3D ASE instructions.
717 (CVT.W.fmt): Don't use this instruction for word (source) format
719 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
720 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
721 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
722 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
723 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
724 (RSquareRoot1, RSquareRoot2): New macros.
725 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
726 (fp_rsqrt2): New functions.
727 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
728 * configure: Regenerate.
730 2002-06-13 Chris Demetriou <cgd@broadcom.com>
731 Ed Satterthwaite <ehs@broadcom.com>
733 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
734 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
735 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
736 (convert): Note that this function is not used for paired-single
738 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
739 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
740 (check_fmt_p): Enable paired-single support.
741 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
742 (PUU.PS): New instructions.
743 (CVT.S.fmt): Don't use this instruction for paired-single format
745 * sim-main.h (FP_formats): New value 'fmt_ps.'
746 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
747 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
749 2002-06-12 Chris Demetriou <cgd@broadcom.com>
751 * mips.igen: Fix formatting of function calls in
754 2002-06-12 Chris Demetriou <cgd@broadcom.com>
756 * mips.igen (MOVN, MOVZ): Trace result.
757 (TNEI): Print "tnei" as the opcode name in traces.
758 (CEIL.W): Add disassembly string for traces.
759 (RSQRT.fmt): Make location of disassembly string consistent
760 with other instructions.
762 2002-06-12 Chris Demetriou <cgd@broadcom.com>
764 * mips.igen (X): Delete unused function.
766 2002-06-08 Andrew Cagney <cagney@redhat.com>
768 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
770 2002-06-07 Chris Demetriou <cgd@broadcom.com>
771 Ed Satterthwaite <ehs@broadcom.com>
773 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
774 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
775 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
776 (fp_nmsub): New prototypes.
777 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
778 (NegMultiplySub): New defines.
779 * mips.igen (RSQRT.fmt): Use RSquareRoot().
780 (MADD.D, MADD.S): Replace with...
781 (MADD.fmt): New instruction.
782 (MSUB.D, MSUB.S): Replace with...
783 (MSUB.fmt): New instruction.
784 (NMADD.D, NMADD.S): Replace with...
785 (NMADD.fmt): New instruction.
786 (NMSUB.D, MSUB.S): Replace with...
787 (NMSUB.fmt): New instruction.
789 2002-06-07 Chris Demetriou <cgd@broadcom.com>
790 Ed Satterthwaite <ehs@broadcom.com>
792 * cp1.c: Fix more comment spelling and formatting.
793 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
794 (denorm_mode): New function.
795 (fpu_unary, fpu_binary): Round results after operation, collect
796 status from rounding operations, and update the FCSR.
797 (convert): Collect status from integer conversions and rounding
798 operations, and update the FCSR. Adjust NaN values that result
799 from conversions. Convert to use sim_io_eprintf rather than
800 fprintf, and remove some debugging code.
801 * cp1.h (fenr_FS): New define.
803 2002-06-07 Chris Demetriou <cgd@broadcom.com>
805 * cp1.c (convert): Remove unusable debugging code, and move MIPS
806 rounding mode to sim FP rounding mode flag conversion code into...
807 (rounding_mode): New function.
809 2002-06-07 Chris Demetriou <cgd@broadcom.com>
811 * cp1.c: Clean up formatting of a few comments.
812 (value_fpr): Reformat switch statement.
814 2002-06-06 Chris Demetriou <cgd@broadcom.com>
815 Ed Satterthwaite <ehs@broadcom.com>
818 * sim-main.h: Include cp1.h.
819 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
820 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
821 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
822 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
823 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
824 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
825 * cp1.c: Don't include sim-fpu.h; already included by
826 sim-main.h. Clean up formatting of some comments.
827 (NaN, Equal, Less): Remove.
828 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
829 (fp_cmp): New functions.
830 * mips.igen (do_c_cond_fmt): Remove.
831 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
832 Compare. Add result tracing.
833 (CxC1): Remove, replace with...
834 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
835 (DMxC1): Remove, replace with...
836 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
837 (MxC1): Remove, replace with...
838 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
840 2002-06-04 Chris Demetriou <cgd@broadcom.com>
842 * sim-main.h (FGRIDX): Remove, replace all uses with...
843 (FGR_BASE): New macro.
844 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
845 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
846 (NR_FGR, FGR): Likewise.
847 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
848 * mips.igen: Likewise.
850 2002-06-04 Chris Demetriou <cgd@broadcom.com>
852 * cp1.c: Add an FSF Copyright notice to this file.
854 2002-06-04 Chris Demetriou <cgd@broadcom.com>
855 Ed Satterthwaite <ehs@broadcom.com>
857 * cp1.c (Infinity): Remove.
858 * sim-main.h (Infinity): Likewise.
860 * cp1.c (fp_unary, fp_binary): New functions.
861 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
862 (fp_sqrt): New functions, implemented in terms of the above.
863 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
864 (Recip, SquareRoot): Remove (replaced by functions above).
865 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
866 (fp_recip, fp_sqrt): New prototypes.
867 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
868 (Recip, SquareRoot): Replace prototypes with #defines which
869 invoke the functions above.
871 2002-06-03 Chris Demetriou <cgd@broadcom.com>
873 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
874 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
875 file, remove PARAMS from prototypes.
876 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
877 simulator state arguments.
878 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
879 pass simulator state arguments.
880 * cp1.c (SD): Redefine as CPU_STATE(cpu).
881 (store_fpr, convert): Remove 'sd' argument.
882 (value_fpr): Likewise. Convert to use 'SD' instead.
884 2002-06-03 Chris Demetriou <cgd@broadcom.com>
886 * cp1.c (Min, Max): Remove #if 0'd functions.
887 * sim-main.h (Min, Max): Remove.
889 2002-06-03 Chris Demetriou <cgd@broadcom.com>
891 * cp1.c: fix formatting of switch case and default labels.
892 * interp.c: Likewise.
893 * sim-main.c: Likewise.
895 2002-06-03 Chris Demetriou <cgd@broadcom.com>
897 * cp1.c: Clean up comments which describe FP formats.
898 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
900 2002-06-03 Chris Demetriou <cgd@broadcom.com>
901 Ed Satterthwaite <ehs@broadcom.com>
903 * configure.in (mipsisa64sb1*-*-*): New target for supporting
904 Broadcom SiByte SB-1 processor configurations.
905 * configure: Regenerate.
906 * sb1.igen: New file.
907 * mips.igen: Include sb1.igen.
909 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
910 * mdmx.igen: Add "sb1" model to all appropriate functions and
912 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
913 (ob_func, ob_acc): Reference the above.
914 (qh_acc): Adjust to keep the same size as ob_acc.
915 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
916 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
918 2002-06-03 Chris Demetriou <cgd@broadcom.com>
920 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
922 2002-06-02 Chris Demetriou <cgd@broadcom.com>
923 Ed Satterthwaite <ehs@broadcom.com>
925 * mips.igen (mdmx): New (pseudo-)model.
926 * mdmx.c, mdmx.igen: New files.
927 * Makefile.in (SIM_OBJS): Add mdmx.o.
928 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
930 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
931 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
932 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
933 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
934 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
935 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
936 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
937 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
938 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
939 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
940 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
941 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
942 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
943 (qh_fmtsel): New macros.
944 (_sim_cpu): New member "acc".
945 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
946 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
948 2002-05-01 Chris Demetriou <cgd@broadcom.com>
950 * interp.c: Use 'deprecated' rather than 'depreciated.'
951 * sim-main.h: Likewise.
953 2002-05-01 Chris Demetriou <cgd@broadcom.com>
955 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
956 which wouldn't compile anyway.
957 * sim-main.h (unpredictable_action): New function prototype.
958 (Unpredictable): Define to call igen function unpredictable().
959 (NotWordValue): New macro to call igen function not_word_value().
960 (UndefinedResult): Remove.
961 * interp.c (undefined_result): Remove.
962 (unpredictable_action): New function.
963 * mips.igen (not_word_value, unpredictable): New functions.
964 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
965 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
966 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
967 NotWordValue() to check for unpredictable inputs, then
968 Unpredictable() to handle them.
970 2002-02-24 Chris Demetriou <cgd@broadcom.com>
972 * mips.igen: Fix formatting of calls to Unpredictable().
974 2002-04-20 Andrew Cagney <ac131313@redhat.com>
976 * interp.c (sim_open): Revert previous change.
978 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
980 * interp.c (sim_open): Disable chunk of code that wrote code in
981 vector table entries.
983 2002-03-19 Chris Demetriou <cgd@broadcom.com>
985 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
986 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
989 2002-03-19 Chris Demetriou <cgd@broadcom.com>
991 * cp1.c: Fix many formatting issues.
993 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
995 * cp1.c (fpu_format_name): New function to replace...
996 (DOFMT): This. Delete, and update all callers.
997 (fpu_rounding_mode_name): New function to replace...
998 (RMMODE): This. Delete, and update all callers.
1000 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1002 * interp.c: Move FPU support routines from here to...
1003 * cp1.c: Here. New file.
1004 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1005 (cp1.o): New target.
1007 2002-03-12 Chris Demetriou <cgd@broadcom.com>
1009 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1010 * mips.igen (mips32, mips64): New models, add to all instructions
1011 and functions as appropriate.
1012 (loadstore_ea, check_u64): New variant for model mips64.
1013 (check_fmt_p): New variant for models mipsV and mips64, remove
1014 mipsV model marking fro other variant.
1017 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1018 for mips32 and mips64.
1019 (DCLO, DCLZ): New instructions for mips64.
1021 2002-03-07 Chris Demetriou <cgd@broadcom.com>
1023 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1024 immediate or code as a hex value with the "%#lx" format.
1025 (ANDI): Likewise, and fix printed instruction name.
1027 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1029 * sim-main.h (UndefinedResult, Unpredictable): New macros
1030 which currently do nothing.
1032 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1034 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1035 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1036 (status_CU3): New definitions.
1038 * sim-main.h (ExceptionCause): Add new values for MIPS32
1039 and MIPS64: MDMX, MCheck, CacheErr. Update comments
1040 for DebugBreakPoint and NMIReset to note their status in
1042 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1043 (SignalExceptionCacheErr): New exception macros.
1045 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1047 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1048 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1050 (SignalExceptionCoProcessorUnusable): Take as argument the
1051 unusable coprocessor number.
1053 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1055 * mips.igen: Fix formatting of all SignalException calls.
1057 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1059 * sim-main.h (SIGNEXTEND): Remove.
1061 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1063 * mips.igen: Remove gencode comment from top of file, fix
1064 spelling in another comment.
1066 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1068 * mips.igen (check_fmt, check_fmt_p): New functions to check
1069 whether specific floating point formats are usable.
1070 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1071 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1072 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1073 Use the new functions.
1074 (do_c_cond_fmt): Remove format checks...
1075 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1077 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1079 * mips.igen: Fix formatting of check_fpu calls.
1081 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1083 * mips.igen (FLOOR.L.fmt): Store correct destination register.
1085 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1087 * mips.igen: Remove whitespace at end of lines.
1089 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1091 * mips.igen (loadstore_ea): New function to do effective
1092 address calculations.
1093 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1094 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1095 CACHE): Use loadstore_ea to do effective address computations.
1097 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1099 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1100 * mips.igen (LL, CxC1, MxC1): Likewise.
1102 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1104 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1105 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1106 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1107 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1108 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1109 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1110 Don't split opcode fields by hand, use the opcode field values
1113 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1115 * mips.igen (do_divu): Fix spacing.
1117 * mips.igen (do_dsllv): Move to be right before DSLLV,
1118 to match the rest of the do_<shift> functions.
1120 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1122 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1123 DSRL32, do_dsrlv): Trace inputs and results.
1125 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1127 * mips.igen (CACHE): Provide instruction-printing string.
1129 * interp.c (signal_exception): Comment tokens after #endif.
1131 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1133 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1134 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1135 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1136 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1137 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1138 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1139 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1140 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1142 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1144 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1145 instruction-printing string.
1146 (LWU): Use '64' as the filter flag.
1148 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1150 * mips.igen (SDXC1): Fix instruction-printing string.
1152 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1154 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1155 filter flags "32,f".
1157 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1159 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1162 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1164 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1165 add a comma) so that it more closely match the MIPS ISA
1166 documentation opcode partitioning.
1167 (PREF): Put useful names on opcode fields, and include
1168 instruction-printing string.
1170 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1172 * mips.igen (check_u64): New function which in the future will
1173 check whether 64-bit instructions are usable and signal an
1174 exception if not. Currently a no-op.
1175 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1176 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1177 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1178 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1180 * mips.igen (check_fpu): New function which in the future will
1181 check whether FPU instructions are usable and signal an exception
1182 if not. Currently a no-op.
1183 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1184 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1185 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1186 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1187 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1188 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1189 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1190 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1192 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1194 * mips.igen (do_load_left, do_load_right): Move to be immediately
1196 (do_store_left, do_store_right): Move to be immediately following
1199 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1201 * mips.igen (mipsV): New model name. Also, add it to
1202 all instructions and functions where it is appropriate.
1204 2002-02-18 Chris Demetriou <cgd@broadcom.com>
1206 * mips.igen: For all functions and instructions, list model
1207 names that support that instruction one per line.
1209 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1211 * mips.igen: Add some additional comments about supported
1212 models, and about which instructions go where.
1213 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1214 order as is used in the rest of the file.
1216 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1218 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1219 indicating that ALU32_END or ALU64_END are there to check
1221 (DADD): Likewise, but also remove previous comment about
1224 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1226 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1227 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1228 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1229 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1230 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1231 fields (i.e., add and move commas) so that they more closely
1232 match the MIPS ISA documentation opcode partitioning.
1234 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1236 * mips.igen (ADDI): Print immediate value.
1237 (BREAK): Print code.
1238 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1239 (SLL): Print "nop" specially, and don't run the code
1240 that does the shift for the "nop" case.
1242 2001-11-17 Fred Fish <fnf@redhat.com>
1244 * sim-main.h (float_operation): Move enum declaration outside
1245 of _sim_cpu struct declaration.
1247 2001-04-12 Jim Blandy <jimb@redhat.com>
1249 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1250 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
1252 * sim-main.h (COCIDX): Remove definition; this isn't supported by
1253 PENDING_FILL, and you can get the intended effect gracefully by
1254 calling PENDING_SCHED directly.
1256 2001-02-23 Ben Elliston <bje@redhat.com>
1258 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1259 already defined elsewhere.
1261 2001-02-19 Ben Elliston <bje@redhat.com>
1263 * sim-main.h (sim_monitor): Return an int.
1264 * interp.c (sim_monitor): Add return values.
1265 (signal_exception): Handle error conditions from sim_monitor.
1267 2001-02-08 Ben Elliston <bje@redhat.com>
1269 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1270 (store_memory): Likewise, pass cia to sim_core_write*.
1272 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
1274 On advice from Chris G. Demetriou <cgd@sibyte.com>:
1275 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1277 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
1279 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1280 * Makefile.in: Don't delete *.igen when cleaning directory.
1282 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
1284 * m16.igen (break): Call SignalException not sim_engine_halt.
1286 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
1288 From Jason Eckhardt:
1289 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1291 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
1293 * mips.igen (MxC1, DMxC1): Fix printf formatting.
1295 2000-05-24 Michael Hayes <mhayes@cygnus.com>
1297 * mips.igen (do_dmultx): Fix typo.
1299 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
1301 * configure: Regenerated to track ../common/aclocal.m4 changes.
1303 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
1305 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1307 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
1309 * sim-main.h (GPR_CLEAR): Define macro.
1311 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
1313 * interp.c (decode_coproc): Output long using %lx and not %s.
1315 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
1317 * interp.c (sim_open): Sort & extend dummy memory regions for
1318 --board=jmr3904 for eCos.
1320 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
1322 * configure: Regenerated.
1324 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
1326 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1327 calls, conditional on the simulator being in verbose mode.
1329 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
1331 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1332 cache don't get ReservedInstruction traps.
1334 1999-11-29 Mark Salter <msalter@cygnus.com>
1336 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1337 to clear status bits in sdisr register. This is how the hardware works.
1339 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1340 being used by cygmon.
1342 1999-11-11 Andrew Haley <aph@cygnus.com>
1344 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1347 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
1349 * mips.igen (MULT): Correct previous mis-applied patch.
1351 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
1353 * mips.igen (delayslot32): Handle sequence like
1354 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1355 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1356 (MULT): Actually pass the third register...
1358 1999-09-03 Mark Salter <msalter@cygnus.com>
1360 * interp.c (sim_open): Added more memory aliases for additional
1361 hardware being touched by cygmon on jmr3904 board.
1363 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1365 * configure: Regenerated to track ../common/aclocal.m4 changes.
1367 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
1369 * interp.c (sim_store_register): Handle case where client - GDB -
1370 specifies that a 4 byte register is 8 bytes in size.
1371 (sim_fetch_register): Ditto.
1373 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
1375 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1376 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1377 (idt_monitor_base): Base address for IDT monitor traps.
1378 (pmon_monitor_base): Ditto for PMON.
1379 (lsipmon_monitor_base): Ditto for LSI PMON.
1380 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1381 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1382 (sim_firmware_command): New function.
1383 (mips_option_handler): Call it for OPTION_FIRMWARE.
1384 (sim_open): Allocate memory for idt_monitor region. If "--board"
1385 option was given, add no monitor by default. Add BREAK hooks only if
1386 monitors are also there.
1388 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
1390 * interp.c (sim_monitor): Flush output before reading input.
1392 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
1394 * tconfig.in (SIM_HANDLES_LMA): Always define.
1396 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
1398 From Mark Salter <msalter@cygnus.com>:
1399 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
1400 (sim_open): Add setup for BSP board.
1402 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
1404 * mips.igen (MULT, MULTU): Add syntax for two operand version.
1405 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
1406 them as unimplemented.
1408 1999-05-08 Felix Lee <flee@cygnus.com>
1410 * configure: Regenerated to track ../common/aclocal.m4 changes.
1412 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
1414 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1416 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
1418 * configure.in: Any mips64vr5*-*-* target should have
1419 -DTARGET_ENABLE_FR=1.
1420 (default_endian): Any mips64vr*el-*-* target should default to
1422 * configure: Re-generate.
1424 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
1426 * mips.igen (ldl): Extend from _16_, not 32.
1428 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
1430 * interp.c (sim_store_register): Force registers written to by GDB
1431 into an un-interpreted state.
1433 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
1435 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1436 CPU, start periodic background I/O polls.
1437 (tx3904sio_poll): New function: periodic I/O poller.
1439 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
1441 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1443 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
1445 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1448 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
1450 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1451 (load_word): Call SIM_CORE_SIGNAL hook on error.
1452 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1453 starting. For exception dispatching, pass PC instead of NULL_CIA.
1454 (decode_coproc): Use COP0_BADVADDR to store faulting address.
1455 * sim-main.h (COP0_BADVADDR): Define.
1456 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1457 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1458 (_sim_cpu): Add exc_* fields to store register value snapshots.
1459 * mips.igen (*): Replace memory-related SignalException* calls
1460 with references to SIM_CORE_SIGNAL hook.
1462 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1464 * sim-main.c (*): Minor warning cleanups.
1466 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
1468 * m16.igen (DADDIU5): Correct type-o.
1470 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
1472 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1475 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
1477 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1479 (interp.o): Add dependency on itable.h
1480 (oengine.c, gencode): Delete remaining references.
1481 (BUILT_SRC_FROM_GEN): Clean up.
1483 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
1486 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1487 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1488 tmp-run-hack) : New.
1489 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1490 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1491 Drop the "64" qualifier to get the HACK generator working.
1492 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
1493 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1494 qualifier to get the hack generator working.
1495 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1496 (DSLL): Use do_dsll.
1497 (DSLLV): Use do_dsllv.
1498 (DSRA): Use do_dsra.
1499 (DSRL): Use do_dsrl.
1500 (DSRLV): Use do_dsrlv.
1501 (BC1): Move *vr4100 to get the HACK generator working.
1502 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1503 get the HACK generator working.
1504 (MACC) Rename to get the HACK generator working.
1505 (DMACC,MACCS,DMACCS): Add the 64.
1507 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
1509 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1510 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1512 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
1514 * mips/interp.c (DEBUG): Cleanups.
1516 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
1518 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1519 (tx3904sio_tickle): fflush after a stdout character output.
1521 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
1523 * interp.c (sim_close): Uninstall modules.
1525 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
1527 * sim-main.h, interp.c (sim_monitor): Change to global
1530 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1532 * configure.in (vr4100): Only include vr4100 instructions in
1534 * configure: Re-generate.
1535 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1537 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1539 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1540 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1543 * configure.in (sim_default_gen, sim_use_gen): Replace with
1545 (--enable-sim-igen): Delete config option. Always using IGEN.
1546 * configure: Re-generate.
1548 * Makefile.in (gencode): Kill, kill, kill.
1551 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1553 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1554 bit mips16 igen simulator.
1555 * configure: Re-generate.
1557 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1558 as part of vr4100 ISA.
1559 * vr.igen: Mark all instructions as 64 bit only.
1561 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1563 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1566 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
1568 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1569 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
1570 * configure: Re-generate.
1572 * m16.igen (BREAK): Define breakpoint instruction.
1573 (JALX32): Mark instruction as mips16 and not r3900.
1574 * mips.igen (C.cond.fmt): Fix typo in instruction format.
1576 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1578 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1580 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1581 insn as a debug breakpoint.
1583 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1585 (PENDING_SCHED): Clean up trace statement.
1586 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1587 (PENDING_FILL): Delay write by only one cycle.
1588 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1590 * sim-main.c (pending_tick): Clean up trace statements. Add trace
1592 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1594 (pending_tick): Move incrementing of index to FOR statement.
1595 (pending_tick): Only update PENDING_OUT after a write has occured.
1597 * configure.in: Add explicit mips-lsi-* target. Use gencode to
1599 * configure: Re-generate.
1601 * interp.c (sim_engine_run OLD): Delete explicit call to
1602 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1604 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
1606 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1607 interrupt level number to match changed SignalExceptionInterrupt
1610 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
1612 * interp.c: #include "itable.h" if WITH_IGEN.
1613 (get_insn_name): New function.
1614 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1615 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1617 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
1619 * configure: Rebuilt to inhale new common/aclocal.m4.
1621 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
1623 * dv-tx3904sio.c: Include sim-assert.h.
1625 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
1627 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1628 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1629 Reorganize target-specific sim-hardware checks.
1630 * configure: rebuilt.
1631 * interp.c (sim_open): For tx39 target boards, set
1632 OPERATING_ENVIRONMENT, add tx3904sio devices.
1633 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1634 ROM executables. Install dv-sockser into sim-modules list.
1636 * dv-tx3904irc.c: Compiler warning clean-up.
1637 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
1638 frequent hw-trace messages.
1640 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
1642 * vr.igen (MulAcc): Identify as a vr4100 specific function.
1644 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1646 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1648 * vr.igen: New file.
1649 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1650 * mips.igen: Define vr4100 model. Include vr.igen.
1651 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
1653 * mips.igen (check_mf_hilo): Correct check.
1655 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1657 * sim-main.h (interrupt_event): Add prototype.
1659 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1660 register_ptr, register_value.
1661 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1663 * sim-main.h (tracefh): Make extern.
1665 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
1667 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1668 Reduce unnecessarily high timer event frequency.
1669 * dv-tx3904cpu.c: Ditto for interrupt event.
1671 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
1673 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1675 (interrupt_event): Made non-static.
1677 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1678 interchange of configuration values for external vs. internal
1681 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
1683 * mips.igen (BREAK): Moved code to here for
1684 simulator-reserved break instructions.
1685 * gencode.c (build_instruction): Ditto.
1686 * interp.c (signal_exception): Code moved from here. Non-
1687 reserved instructions now use exception vector, rather
1689 * sim-main.h: Moved magic constants to here.
1691 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
1693 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1694 register upon non-zero interrupt event level, clear upon zero
1696 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1697 by passing zero event value.
1698 (*_io_{read,write}_buffer): Endianness fixes.
1699 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1700 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1702 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1703 serial I/O and timer module at base address 0xFFFF0000.
1705 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
1707 * mips.igen (SWC1) : Correct the handling of ReverseEndian
1710 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
1712 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1714 * configure: Update.
1716 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
1718 * dv-tx3904tmr.c: New file - implements tx3904 timer.
1719 * dv-tx3904{irc,cpu}.c: Mild reformatting.
1720 * configure.in: Include tx3904tmr in hw_device list.
1721 * configure: Rebuilt.
1722 * interp.c (sim_open): Instantiate three timer instances.
1723 Fix address typo of tx3904irc instance.
1725 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
1727 * interp.c (signal_exception): SystemCall exception now uses
1728 the exception vector.
1730 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
1732 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1735 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1737 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1739 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
1741 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1743 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1744 sim-main.h. Declare a struct hw_descriptor instead of struct
1745 hw_device_descriptor.
1747 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1749 * mips.igen (do_store_left, do_load_left): Compute nr of left and
1750 right bits and then re-align left hand bytes to correct byte
1751 lanes. Fix incorrect computation in do_store_left when loading
1752 bytes from second word.
1754 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1756 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1757 * interp.c (sim_open): Only create a device tree when HW is
1760 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1761 * interp.c (signal_exception): Ditto.
1763 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
1765 * gencode.c: Mark BEGEZALL as LIKELY.
1767 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
1769 * sim-main.h (ALU32_END): Sign extend 32 bit results.
1770 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1772 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
1774 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1775 modules. Recognize TX39 target with "mips*tx39" pattern.
1776 * configure: Rebuilt.
1777 * sim-main.h (*): Added many macros defining bits in
1778 TX39 control registers.
1779 (SignalInterrupt): Send actual PC instead of NULL.
1780 (SignalNMIReset): New exception type.
1781 * interp.c (board): New variable for future use to identify
1782 a particular board being simulated.
1783 (mips_option_handler,mips_options): Added "--board" option.
1784 (interrupt_event): Send actual PC.
1785 (sim_open): Make memory layout conditional on board setting.
1786 (signal_exception): Initial implementation of hardware interrupt
1787 handling. Accept another break instruction variant for simulator
1789 (decode_coproc): Implement RFE instruction for TX39.
1790 (mips.igen): Decode RFE instruction as such.
1791 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
1792 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
1793 bbegin to implement memory map.
1794 * dv-tx3904cpu.c: New file.
1795 * dv-tx3904irc.c: New file.
1797 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
1799 * mips.igen (check_mt_hilo): Create a separate r3900 version.
1801 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
1803 * tx.igen (madd,maddu): Replace calls to check_op_hilo
1804 with calls to check_div_hilo.
1806 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
1808 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
1809 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
1810 Add special r3900 version of do_mult_hilo.
1811 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
1812 with calls to check_mult_hilo.
1813 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
1814 with calls to check_div_hilo.
1816 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
1818 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
1819 Document a replacement.
1821 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
1823 * interp.c (sim_monitor): Make mon_printf work.
1825 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
1827 * sim-main.h (INSN_NAME): New arg `cpu'.
1829 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
1831 * configure: Regenerated to track ../common/aclocal.m4 changes.
1833 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
1835 * configure: Regenerated to track ../common/aclocal.m4 changes.
1838 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
1840 * acconfig.h: New file.
1841 * configure.in: Reverted change of Apr 24; use sinclude again.
1843 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
1845 * configure: Regenerated to track ../common/aclocal.m4 changes.
1848 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
1850 * configure.in: Don't call sinclude.
1852 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
1854 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
1856 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1858 * mips.igen (ERET): Implement.
1860 * interp.c (decode_coproc): Return sign-extended EPC.
1862 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
1864 * interp.c (signal_exception): Do not ignore Trap.
1865 (signal_exception): On TRAP, restart at exception address.
1866 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
1867 (signal_exception): Update.
1868 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
1869 so that TRAP instructions are caught.
1871 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
1873 * sim-main.h (struct hilo_access, struct hilo_history): Define,
1874 contains HI/LO access history.
1875 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
1876 (HIACCESS, LOACCESS): Delete, replace with
1877 (HIHISTORY, LOHISTORY): New macros.
1878 (CHECKHILO): Delete all, moved to mips.igen
1880 * gencode.c (build_instruction): Do not generate checks for
1881 correct HI/LO register usage.
1883 * interp.c (old_engine_run): Delete checks for correct HI/LO
1886 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
1887 check_mf_cycles): New functions.
1888 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
1889 do_divu, domultx, do_mult, do_multu): Use.
1891 * tx.igen ("madd", "maddu"): Use.
1893 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
1895 * mips.igen (DSRAV): Use function do_dsrav.
1896 (SRAV): Use new function do_srav.
1898 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
1899 (B): Sign extend 11 bit immediate.
1900 (EXT-B*): Shift 16 bit immediate left by 1.
1901 (ADDIU*): Don't sign extend immediate value.
1903 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
1905 * m16run.c (sim_engine_run): Restore CIA after handling an event.
1907 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
1910 * mips.igen (delayslot32, nullify_next_insn): New functions.
1911 (m16.igen): Always include.
1912 (do_*): Add more tracing.
1914 * m16.igen (delayslot16): Add NIA argument, could be called by a
1915 32 bit MIPS16 instruction.
1917 * interp.c (ifetch16): Move function from here.
1918 * sim-main.c (ifetch16): To here.
1920 * sim-main.c (ifetch16, ifetch32): Update to match current
1921 implementations of LH, LW.
1922 (signal_exception): Don't print out incorrect hex value of illegal
1925 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
1927 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
1930 * m16.igen: Implement MIPS16 instructions.
1932 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
1933 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
1934 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
1935 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
1936 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
1937 bodies of corresponding code from 32 bit insn to these. Also used
1938 by MIPS16 versions of functions.
1940 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
1941 (IMEM16): Drop NR argument from macro.
1943 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1945 * Makefile.in (SIM_OBJS): Add sim-main.o.
1947 * sim-main.h (address_translation, load_memory, store_memory,
1948 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
1950 (pr_addr, pr_uword64): Declare.
1951 (sim-main.c): Include when H_REVEALS_MODULE_P.
1953 * interp.c (address_translation, load_memory, store_memory,
1954 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
1956 * sim-main.c: To here. Fix compilation problems.
1958 * configure.in: Enable inlining.
1959 * configure: Re-config.
1961 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
1963 * configure: Regenerated to track ../common/aclocal.m4 changes.
1965 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
1967 * mips.igen: Include tx.igen.
1968 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
1969 * tx.igen: New file, contains MADD and MADDU.
1971 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
1972 the hardwired constant `7'.
1973 (store_memory): Ditto.
1974 (LOADDRMASK): Move definition to sim-main.h.
1976 mips.igen (MTC0): Enable for r3900.
1979 mips.igen (do_load_byte): Delete.
1980 (do_load, do_store, do_load_left, do_load_write, do_store_left,
1981 do_store_right): New functions.
1982 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
1984 configure.in: Let the tx39 use igen again.
1987 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1989 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
1990 not an address sized quantity. Return zero for cache sizes.
1992 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
1994 * mips.igen (r3900): r3900 does not support 64 bit integer
1997 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
1999 * configure.in (mipstx39*-*-*): Use gencode simulator rather
2001 * configure : Rebuild.
2003 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
2005 * configure: Regenerated to track ../common/aclocal.m4 changes.
2007 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2009 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2011 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
2013 * configure: Regenerated to track ../common/aclocal.m4 changes.
2014 * config.in: Regenerated to track ../common/aclocal.m4 changes.
2016 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2018 * configure: Regenerated to track ../common/aclocal.m4 changes.
2020 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
2022 * interp.c (Max, Min): Comment out functions. Not yet used.
2024 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
2026 * configure: Regenerated to track ../common/aclocal.m4 changes.
2028 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
2030 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2031 configurable settings for stand-alone simulator.
2033 * configure.in: Added X11 search, just in case.
2035 * configure: Regenerated.
2037 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
2039 * interp.c (sim_write, sim_read, load_memory, store_memory):
2040 Replace sim_core_*_map with read_map, write_map, exec_map resp.
2042 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
2044 * sim-main.h (GETFCC): Return an unsigned value.
2046 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2048 * mips.igen (DIV): Fix check for -1 / MIN_INT.
2049 (DADD): Result destination is RD not RT.
2051 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
2053 * sim-main.h (HIACCESS, LOACCESS): Always define.
2055 * mdmx.igen (Maxi, Mini): Rename Max, Min.
2057 * interp.c (sim_info): Delete.
2059 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
2061 * interp.c (DECLARE_OPTION_HANDLER): Use it.
2062 (mips_option_handler): New argument `cpu'.
2063 (sim_open): Update call to sim_add_option_table.
2065 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
2067 * mips.igen (CxC1): Add tracing.
2069 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
2071 * sim-main.h (Max, Min): Declare.
2073 * interp.c (Max, Min): New functions.
2075 * mips.igen (BC1): Add tracing.
2077 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
2079 * interp.c Added memory map for stack in vr4100
2081 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
2083 * interp.c (load_memory): Add missing "break"'s.
2085 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2087 * interp.c (sim_store_register, sim_fetch_register): Pass in
2088 length parameter. Return -1.
2090 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
2092 * interp.c: Added hardware init hook, fixed warnings.
2094 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2096 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2098 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
2100 * interp.c (ifetch16): New function.
2102 * sim-main.h (IMEM32): Rename IMEM.
2103 (IMEM16_IMMED): Define.
2105 (DELAY_SLOT): Update.
2107 * m16run.c (sim_engine_run): New file.
2109 * m16.igen: All instructions except LB.
2110 (LB): Call do_load_byte.
2111 * mips.igen (do_load_byte): New function.
2112 (LB): Call do_load_byte.
2114 * mips.igen: Move spec for insn bit size and high bit from here.
2115 * Makefile.in (tmp-igen, tmp-m16): To here.
2117 * m16.dc: New file, decode mips16 instructions.
2119 * Makefile.in (SIM_NO_ALL): Define.
2120 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2122 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
2124 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2125 point unit to 32 bit registers.
2126 * configure: Re-generate.
2128 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2130 * configure.in (sim_use_gen): Make IGEN the default simulator
2131 generator for generic 32 and 64 bit mips targets.
2132 * configure: Re-generate.
2134 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2136 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2139 * interp.c (sim_fetch_register, sim_store_register): Read/write
2140 FGR from correct location.
2141 (sim_open): Set size of FGR's according to
2142 WITH_TARGET_FLOATING_POINT_BITSIZE.
2144 * sim-main.h (FGR): Store floating point registers in a separate
2147 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
2149 * configure: Regenerated to track ../common/aclocal.m4 changes.
2151 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2153 * interp.c (ColdReset): Call PENDING_INVALIDATE.
2155 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2157 * interp.c (pending_tick): New function. Deliver pending writes.
2159 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2160 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2161 it can handle mixed sized quantites and single bits.
2163 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2165 * interp.c (oengine.h): Do not include when building with IGEN.
2166 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2167 (sim_info): Ditto for PROCESSOR_64BIT.
2168 (sim_monitor): Replace ut_reg with unsigned_word.
2169 (*): Ditto for t_reg.
2170 (LOADDRMASK): Define.
2171 (sim_open): Remove defunct check that host FP is IEEE compliant,
2172 using software to emulate floating point.
2173 (value_fpr, ...): Always compile, was conditional on HASFPU.
2175 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2177 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2180 * interp.c (SD, CPU): Define.
2181 (mips_option_handler): Set flags in each CPU.
2182 (interrupt_event): Assume CPU 0 is the one being iterrupted.
2183 (sim_close): Do not clear STATE, deleted anyway.
2184 (sim_write, sim_read): Assume CPU zero's vm should be used for
2186 (sim_create_inferior): Set the PC for all processors.
2187 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2189 (mips16_entry): Pass correct nr of args to store_word, load_word.
2190 (ColdReset): Cold reset all cpu's.
2191 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2192 (sim_monitor, load_memory, store_memory, signal_exception): Use
2193 `CPU' instead of STATE_CPU.
2196 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2199 * sim-main.h (signal_exception): Add sim_cpu arg.
2200 (SignalException*): Pass both SD and CPU to signal_exception.
2201 * interp.c (signal_exception): Update.
2203 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2205 (sync_operation, prefetch, cache_op, store_memory, load_memory,
2206 address_translation): Ditto
2207 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2209 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
2211 * configure: Regenerated to track ../common/aclocal.m4 changes.
2213 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2215 * interp.c (sim_engine_run): Add `nr_cpus' argument.
2217 * mips.igen (model): Map processor names onto BFD name.
2219 * sim-main.h (CPU_CIA): Delete.
2220 (SET_CIA, GET_CIA): Define
2222 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
2224 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2227 * configure.in (default_endian): Configure a big-endian simulator
2229 * configure: Re-generate.
2231 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
2233 * configure: Regenerated to track ../common/aclocal.m4 changes.
2235 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
2237 * interp.c (sim_monitor): Handle Densan monitor outbyte
2238 and inbyte functions.
2240 1997-12-29 Felix Lee <flee@cygnus.com>
2242 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2244 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
2246 * Makefile.in (tmp-igen): Arrange for $zero to always be
2247 reset to zero after every instruction.
2249 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2251 * configure: Regenerated to track ../common/aclocal.m4 changes.
2254 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
2256 * mips.igen (MSUB): Fix to work like MADD.
2257 * gencode.c (MSUB): Similarly.
2259 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
2261 * configure: Regenerated to track ../common/aclocal.m4 changes.
2263 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2265 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2267 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2269 * sim-main.h (sim-fpu.h): Include.
2271 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2272 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2273 using host independant sim_fpu module.
2275 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2277 * interp.c (signal_exception): Report internal errors with SIGABRT
2280 * sim-main.h (C0_CONFIG): New register.
2281 (signal.h): No longer include.
2283 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2285 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
2287 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2289 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2291 * mips.igen: Tag vr5000 instructions.
2292 (ANDI): Was missing mipsIV model, fix assembler syntax.
2293 (do_c_cond_fmt): New function.
2294 (C.cond.fmt): Handle mips I-III which do not support CC field
2296 (bc1): Handle mips IV which do not have a delaed FCC separatly.
2297 (SDR): Mask paddr when BigEndianMem, not the converse as specified
2299 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
2300 vr5000 which saves LO in a GPR separatly.
2302 * configure.in (enable-sim-igen): For vr5000, select vr5000
2303 specific instructions.
2304 * configure: Re-generate.
2306 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
2308 * Makefile.in (SIM_OBJS): Add sim-fpu module.
2310 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2311 fmt_uninterpreted_64 bit cases to switch. Convert to
2314 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2316 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2317 as specified in IV3.2 spec.
2318 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2320 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2322 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2323 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2324 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2325 PENDING_FILL versions of instructions. Simplify.
2327 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2329 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2331 (MTHI, MFHI): Disable code checking HI-LO.
2333 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2335 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2337 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
2339 * gencode.c (build_mips16_operands): Replace IPC with cia.
2341 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2342 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2344 (UndefinedResult): Replace function with macro/function
2346 (sim_engine_run): Don't save PC in IPC.
2348 * sim-main.h (IPC): Delete.
2351 * interp.c (signal_exception, store_word, load_word,
2352 address_translation, load_memory, store_memory, cache_op,
2353 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2354 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2355 current instruction address - cia - argument.
2356 (sim_read, sim_write): Call address_translation directly.
2357 (sim_engine_run): Rename variable vaddr to cia.
2358 (signal_exception): Pass cia to sim_monitor
2360 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2361 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2362 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2364 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2365 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2368 * interp.c (signal_exception): Pass restart address to
2371 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2372 idecode.o): Add dependency.
2374 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2376 (DELAY_SLOT): Update NIA not PC with branch address.
2377 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2379 * mips.igen: Use CIA not PC in branch calculations.
2380 (illegal): Call SignalException.
2381 (BEQ, ADDIU): Fix assembler.
2383 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2385 * m16.igen (JALX): Was missing.
2387 * configure.in (enable-sim-igen): New configuration option.
2388 * configure: Re-generate.
2390 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2392 * interp.c (load_memory, store_memory): Delete parameter RAW.
2393 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2394 bypassing {load,store}_memory.
2396 * sim-main.h (ByteSwapMem): Delete definition.
2398 * Makefile.in (SIM_OBJS): Add sim-memopt module.
2400 * interp.c (sim_do_command, sim_commands): Delete mips specific
2401 commands. Handled by module sim-options.
2403 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2404 (WITH_MODULO_MEMORY): Define.
2406 * interp.c (sim_info): Delete code printing memory size.
2408 * interp.c (mips_size): Nee sim_size, delete function.
2410 (monitor, monitor_base, monitor_size): Delete global variables.
2411 (sim_open, sim_close): Delete code creating monitor and other
2412 memory regions. Use sim-memopts module, via sim_do_commandf, to
2413 manage memory regions.
2414 (load_memory, store_memory): Use sim-core for memory model.
2416 * interp.c (address_translation): Delete all memory map code
2417 except line forcing 32 bit addresses.
2419 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2421 * sim-main.h (WITH_TRACE): Delete definition. Enables common
2424 * interp.c (logfh, logfile): Delete globals.
2425 (sim_open, sim_close): Delete code opening & closing log file.
2426 (mips_option_handler): Delete -l and -n options.
2427 (OPTION mips_options): Ditto.
2429 * interp.c (OPTION mips_options): Rename option trace to dinero.
2430 (mips_option_handler): Update.
2432 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2434 * interp.c (fetch_str): New function.
2435 (sim_monitor): Rewrite using sim_read & sim_write.
2436 (sim_open): Check magic number.
2437 (sim_open): Write monitor vectors into memory using sim_write.
2438 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2439 (sim_read, sim_write): Simplify - transfer data one byte at a
2441 (load_memory, store_memory): Clarify meaning of parameter RAW.
2443 * sim-main.h (isHOST): Defete definition.
2444 (isTARGET): Mark as depreciated.
2445 (address_translation): Delete parameter HOST.
2447 * interp.c (address_translation): Delete parameter HOST.
2449 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2453 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2454 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2456 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
2458 * mips.igen: Add model filter field to records.
2460 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2462 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
2464 interp.c (sim_engine_run): Do not compile function sim_engine_run
2465 when WITH_IGEN == 1.
2467 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2468 target architecture.
2470 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2471 igen. Replace with configuration variables sim_igen_flags /
2474 * m16.igen: New file. Copy mips16 insns here.
2475 * mips.igen: From here.
2477 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2479 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2481 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2483 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
2485 * gencode.c (build_instruction): Follow sim_write's lead in using
2486 BigEndianMem instead of !ByteSwapMem.
2488 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
2490 * configure.in (sim_gen): Dependent on target, select type of
2491 generator. Always select old style generator.
2493 configure: Re-generate.
2495 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2497 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2498 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2499 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2500 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2501 SIM_@sim_gen@_*, set by autoconf.
2503 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2505 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2507 * interp.c (ColdReset): Remove #ifdef HASFPU, check
2508 CURRENT_FLOATING_POINT instead.
2510 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2511 (address_translation): Raise exception InstructionFetch when
2512 translation fails and isINSTRUCTION.
2514 * interp.c (sim_open, sim_write, sim_monitor, store_word,
2515 sim_engine_run): Change type of of vaddr and paddr to
2517 (address_translation, prefetch, load_memory, store_memory,
2518 cache_op): Change type of vAddr and pAddr to address_word.
2520 * gencode.c (build_instruction): Change type of vaddr and paddr to
2523 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
2525 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2526 macro to obtain result of ALU op.
2528 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2530 * interp.c (sim_info): Call profile_print.
2532 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2534 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2536 * sim-main.h (WITH_PROFILE): Do not define, defined in
2537 common/sim-config.h. Use sim-profile module.
2538 (simPROFILE): Delete defintion.
2540 * interp.c (PROFILE): Delete definition.
2541 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2542 (sim_close): Delete code writing profile histogram.
2543 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2545 (sim_engine_run): Delete code profiling the PC.
2547 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2549 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2551 * interp.c (sim_monitor): Make register pointers of type
2554 * sim-main.h: Make registers of type unsigned_word not
2557 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2559 * interp.c (sync_operation): Rename from SyncOperation, make
2560 global, add SD argument.
2561 (prefetch): Rename from Prefetch, make global, add SD argument.
2562 (decode_coproc): Make global.
2564 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2566 * gencode.c (build_instruction): Generate DecodeCoproc not
2567 decode_coproc calls.
2569 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2570 (SizeFGR): Move to sim-main.h
2571 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2572 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2573 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2575 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2576 FP_RM_TOMINF, GETRM): Move to sim-main.h.
2577 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2578 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2579 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2580 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2582 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2584 (sim-alu.h): Include.
2585 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2586 (sim_cia): Typedef to instruction_address.
2588 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
2590 * Makefile.in (interp.o): Rename generated file engine.c to
2595 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
2597 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2599 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2601 * gencode.c (build_instruction): For "FPSQRT", output correct
2602 number of arguments to Recip.
2604 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
2606 * Makefile.in (interp.o): Depends on sim-main.h
2608 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2610 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2611 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2612 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2613 STATE, DSSTATE): Define
2614 (GPR, FGRIDX, ..): Define.
2616 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2617 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2618 (GPR, FGRIDX, ...): Delete macros.
2620 * interp.c: Update names to match defines from sim-main.h
2622 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
2624 * interp.c (sim_monitor): Add SD argument.
2625 (sim_warning): Delete. Replace calls with calls to
2627 (sim_error): Delete. Replace calls with sim_io_error.
2628 (open_trace, writeout32, writeout16, getnum): Add SD argument.
2629 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2630 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2632 (mips_size): Rename from sim_size. Add SD argument.
2634 * interp.c (simulator): Delete global variable.
2635 (callback): Delete global variable.
2636 (mips_option_handler, sim_open, sim_write, sim_read,
2637 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2638 sim_size,sim_monitor): Use sim_io_* not callback->*.
2639 (sim_open): ZALLOC simulator struct.
2640 (PROFILE): Do not define.
2642 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2644 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2645 support.h with corresponding code.
2647 * sim-main.h (word64, uword64), support.h: Move definition to
2649 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2652 * Makefile.in: Update dependencies
2653 * interp.c: Do not include.
2655 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2657 * interp.c (address_translation, load_memory, store_memory,
2658 cache_op): Rename to from AddressTranslation et.al., make global,
2661 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2664 * interp.c (SignalException): Rename to signal_exception, make
2667 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2669 * sim-main.h (SignalException, SignalExceptionInterrupt,
2670 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2671 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2672 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2675 * interp.c, support.h: Use.
2677 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2679 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2680 to value_fpr / store_fpr. Add SD argument.
2681 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2682 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2684 * sim-main.h (ValueFPR, StoreFPR): Define.
2686 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
2688 * interp.c (sim_engine_run): Check consistency between configure
2689 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2692 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2693 (mips_fpu): Configure WITH_FLOATING_POINT.
2694 (mips_endian): Configure WITH_TARGET_ENDIAN.
2695 * configure: Update.
2697 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2699 * configure: Regenerated to track ../common/aclocal.m4 changes.
2701 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
2703 * configure: Regenerated.
2705 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
2707 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2709 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2711 * gencode.c (print_igen_insn_models): Assume certain architectures
2712 include all mips* instructions.
2713 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2716 * Makefile.in (tmp.igen): Add target. Generate igen input from
2719 * gencode.c (FEATURE_IGEN): Define.
2720 (main): Add --igen option. Generate output in igen format.
2721 (process_instructions): Format output according to igen option.
2722 (print_igen_insn_format): New function.
2723 (print_igen_insn_models): New function.
2724 (process_instructions): Only issue warnings and ignore
2725 instructions when no FEATURE_IGEN.
2727 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2729 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2732 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2734 * configure: Regenerated to track ../common/aclocal.m4 changes.
2736 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
2738 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2739 SIM_RESERVED_BITS): Delete, moved to common.
2740 (SIM_EXTRA_CFLAGS): Update.
2742 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2744 * configure.in: Configure non-strict memory alignment.
2745 * configure: Regenerated to track ../common/aclocal.m4 changes.
2747 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
2749 * configure: Regenerated to track ../common/aclocal.m4 changes.
2751 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
2753 * gencode.c (SDBBP,DERET): Added (3900) insns.
2754 (RFE): Turn on for 3900.
2755 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2756 (dsstate): Made global.
2757 (SUBTARGET_R3900): Added.
2758 (CANCELDELAYSLOT): New.
2759 (SignalException): Ignore SystemCall rather than ignore and
2760 terminate. Add DebugBreakPoint handling.
2761 (decode_coproc): New insns RFE, DERET; and new registers Debug
2762 and DEPC protected by SUBTARGET_R3900.
2763 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2765 * Makefile.in,configure.in: Add mips subtarget option.
2766 * configure: Update.
2768 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
2770 * gencode.c: Add r3900 (tx39).
2773 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
2775 * gencode.c (build_instruction): Don't need to subtract 4 for
2778 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
2780 * interp.c: Correct some HASFPU problems.
2782 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
2784 * configure: Regenerated to track ../common/aclocal.m4 changes.
2786 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2788 * interp.c (mips_options): Fix samples option short form, should
2791 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
2793 * interp.c (sim_info): Enable info code. Was just returning.
2795 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2797 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
2800 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
2802 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
2804 (build_instruction): Ditto for LL.
2806 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
2808 * configure: Regenerated to track ../common/aclocal.m4 changes.
2810 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2812 * configure: Regenerated to track ../common/aclocal.m4 changes.
2815 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
2817 * interp.c (sim_open): Add call to sim_analyze_program, update
2820 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
2822 * interp.c (sim_kill): Delete.
2823 (sim_create_inferior): Add ABFD argument. Set PC from same.
2824 (sim_load): Move code initializing trap handlers from here.
2825 (sim_open): To here.
2826 (sim_load): Delete, use sim-hload.c.
2828 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
2830 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2832 * configure: Regenerated to track ../common/aclocal.m4 changes.
2835 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2837 * interp.c (sim_open): Add ABFD argument.
2838 (sim_load): Move call to sim_config from here.
2839 (sim_open): To here. Check return status.
2841 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
2843 * gencode.c (build_instruction): Two arg MADD should
2844 not assign result to $0.
2846 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
2848 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
2849 * sim/mips/configure.in: Regenerate.
2851 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
2853 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
2854 signed8, unsigned8 et.al. types.
2856 * interp.c (SUB_REG_FETCH): Handle both little and big endian
2857 hosts when selecting subreg.
2859 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
2861 * interp.c (sim_engine_run): Reset the ZERO register to zero
2862 regardless of FEATURE_WARN_ZERO.
2863 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
2865 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2867 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
2868 (SignalException): For BreakPoints ignore any mode bits and just
2870 (SignalException): Always set the CAUSE register.
2872 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
2874 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
2875 exception has been taken.
2877 * interp.c: Implement the ERET and mt/f sr instructions.
2879 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
2881 * interp.c (SignalException): Don't bother restarting an
2884 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2886 * interp.c (SignalException): Really take an interrupt.
2887 (interrupt_event): Only deliver interrupts when enabled.
2889 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2891 * interp.c (sim_info): Only print info when verbose.
2892 (sim_info) Use sim_io_printf for output.
2894 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2896 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
2899 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2901 * interp.c (sim_do_command): Check for common commands if a
2902 simulator specific command fails.
2904 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
2906 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
2907 and simBE when DEBUG is defined.
2909 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
2911 * interp.c (interrupt_event): New function. Pass exception event
2912 onto exception handler.
2914 * configure.in: Check for stdlib.h.
2915 * configure: Regenerate.
2917 * gencode.c (build_instruction): Add UNUSED attribute to tempS
2918 variable declaration.
2919 (build_instruction): Initialize memval1.
2920 (build_instruction): Add UNUSED attribute to byte, bigend,
2922 (build_operands): Ditto.
2924 * interp.c: Fix GCC warnings.
2925 (sim_get_quit_code): Delete.
2927 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
2928 * Makefile.in: Ditto.
2929 * configure: Re-generate.
2931 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
2933 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2935 * interp.c (mips_option_handler): New function parse argumes using
2937 (myname): Replace with STATE_MY_NAME.
2938 (sim_open): Delete check for host endianness - performed by
2940 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
2941 (sim_open): Move much of the initialization from here.
2942 (sim_load): To here. After the image has been loaded and
2944 (sim_open): Move ColdReset from here.
2945 (sim_create_inferior): To here.
2946 (sim_open): Make FP check less dependant on host endianness.
2948 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
2950 * interp.c (sim_set_callbacks): Delete.
2952 * interp.c (membank, membank_base, membank_size): Replace with
2953 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
2954 (sim_open): Remove call to callback->init. gdb/run do this.
2958 * sim-main.h (SIM_HAVE_FLATMEM): Define.
2960 * interp.c (big_endian_p): Delete, replaced by
2961 current_target_byte_order.
2963 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2965 * interp.c (host_read_long, host_read_word, host_swap_word,
2966 host_swap_long): Delete. Using common sim-endian.
2967 (sim_fetch_register, sim_store_register): Use H2T.
2968 (pipeline_ticks): Delete. Handled by sim-events.
2970 (sim_engine_run): Update.
2972 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
2974 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
2976 (SignalException): To here. Signal using sim_engine_halt.
2977 (sim_stop_reason): Delete, moved to common.
2979 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
2981 * interp.c (sim_open): Add callback argument.
2982 (sim_set_callbacks): Delete SIM_DESC argument.
2985 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2987 * Makefile.in (SIM_OBJS): Add common modules.
2989 * interp.c (sim_set_callbacks): Also set SD callback.
2990 (set_endianness, xfer_*, swap_*): Delete.
2991 (host_read_word, host_read_long, host_swap_word, host_swap_long):
2992 Change to functions using sim-endian macros.
2993 (control_c, sim_stop): Delete, use common version.
2994 (simulate): Convert into.
2995 (sim_engine_run): This function.
2996 (sim_resume): Delete.
2998 * interp.c (simulation): New variable - the simulator object.
2999 (sim_kind): Delete global - merged into simulation.
3000 (sim_load): Cleanup. Move PC assignment from here.
3001 (sim_create_inferior): To here.
3003 * sim-main.h: New file.
3004 * interp.c (sim-main.h): Include.
3006 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
3008 * configure: Regenerated to track ../common/aclocal.m4 changes.
3010 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
3012 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3014 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
3016 * gencode.c (build_instruction): DIV instructions: check
3017 for division by zero and integer overflow before using
3018 host's division operation.
3020 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
3022 * Makefile.in (SIM_OBJS): Add sim-load.o.
3023 * interp.c: #include bfd.h.
3024 (target_byte_order): Delete.
3025 (sim_kind, myname, big_endian_p): New static locals.
3026 (sim_open): Set sim_kind, myname. Move call to set_endianness to
3027 after argument parsing. Recognize -E arg, set endianness accordingly.
3028 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
3029 load file into simulator. Set PC from bfd.
3030 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
3031 (set_endianness): Use big_endian_p instead of target_byte_order.
3033 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
3035 * interp.c (sim_size): Delete prototype - conflicts with
3036 definition in remote-sim.h. Correct definition.
3038 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3040 * configure: Regenerated to track ../common/aclocal.m4 changes.
3043 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
3045 * interp.c (sim_open): New arg `kind'.
3047 * configure: Regenerated to track ../common/aclocal.m4 changes.
3049 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3051 * configure: Regenerated to track ../common/aclocal.m4 changes.
3053 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
3055 * interp.c (sim_open): Set optind to 0 before calling getopt.
3057 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3059 * configure: Regenerated to track ../common/aclocal.m4 changes.
3061 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
3063 * interp.c : Replace uses of pr_addr with pr_uword64
3064 where the bit length is always 64 independent of SIM_ADDR.
3065 (pr_uword64) : added.
3067 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3069 * configure: Re-generate.
3071 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
3073 * configure: Regenerate to track ../common/aclocal.m4 changes.
3075 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
3077 * interp.c (sim_open): New SIM_DESC result. Argument is now
3079 (other sim_*): New SIM_DESC argument.
3081 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
3083 * interp.c: Fix printing of addresses for non-64-bit targets.
3084 (pr_addr): Add function to print address based on size.
3086 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
3088 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3090 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
3092 * gencode.c (build_mips16_operands): Correct computation of base
3093 address for extended PC relative instruction.
3095 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
3097 * interp.c (mips16_entry): Add support for floating point cases.
3098 (SignalException): Pass floating point cases to mips16_entry.
3099 (ValueFPR): Don't restrict fmt_single and fmt_word to even
3101 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
3103 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3104 and then set the state to fmt_uninterpreted.
3105 (COP_SW): Temporarily set the state to fmt_word while calling
3108 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
3110 * gencode.c (build_instruction): The high order may be set in the
3111 comparison flags at any ISA level, not just ISA 4.
3113 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
3115 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3116 COMMON_{PRE,POST}_CONFIG_FRAG instead.
3117 * configure.in: sinclude ../common/aclocal.m4.
3118 * configure: Regenerated.
3120 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
3122 * configure: Rebuild after change to aclocal.m4.
3124 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
3126 * configure configure.in Makefile.in: Update to new configure
3127 scheme which is more compatible with WinGDB builds.
3128 * configure.in: Improve comment on how to run autoconf.
3129 * configure: Re-run autoconf to get new ../common/aclocal.m4.
3130 * Makefile.in: Use autoconf substitution to install common
3133 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
3135 * gencode.c (build_instruction): Use BigEndianCPU instead of
3138 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
3140 * interp.c (sim_monitor): Make output to stdout visible in
3141 wingdb's I/O log window.
3143 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
3145 * support.h: Undo previous change to SIGTRAP
3148 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
3150 * interp.c (store_word, load_word): New static functions.
3151 (mips16_entry): New static function.
3152 (SignalException): Look for mips16 entry and exit instructions.
3153 (simulate): Use the correct index when setting fpr_state after
3154 doing a pending move.
3156 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
3158 * interp.c: Fix byte-swapping code throughout to work on
3159 both little- and big-endian hosts.
3161 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
3163 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3164 with gdb/config/i386/xm-windows.h.
3166 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
3168 * gencode.c (build_instruction): Work around MSVC++ code gen bug
3169 that messes up arithmetic shifts.
3171 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
3173 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
3174 SIGTRAP and SIGQUIT for _WIN32.
3176 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
3178 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3179 force a 64 bit multiplication.
3180 (build_instruction) [OR]: In mips16 mode, don't do anything if the
3181 destination register is 0, since that is the default mips16 nop
3184 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
3186 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3187 (build_endian_shift): Don't check proc64.
3188 (build_instruction): Always set memval to uword64. Cast op2 to
3189 uword64 when shifting it left in memory instructions. Always use
3190 the same code for stores--don't special case proc64.
3192 * gencode.c (build_mips16_operands): Fix base PC value for PC
3194 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3196 * interp.c (simJALDELAYSLOT): Define.
3197 (JALDELAYSLOT): Define.
3198 (INDELAYSLOT, INJALDELAYSLOT): Define.
3199 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3201 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
3203 * interp.c (sim_open): add flush_cache as a PMON routine
3204 (sim_monitor): handle flush_cache by ignoring it
3206 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
3208 * gencode.c (build_instruction): Use !ByteSwapMem instead of
3210 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3211 (BigEndianMem): Rename to ByteSwapMem and change sense.
3212 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3213 BigEndianMem references to !ByteSwapMem.
3214 (set_endianness): New function, with prototype.
3215 (sim_open): Call set_endianness.
3216 (sim_info): Use simBE instead of BigEndianMem.
3217 (xfer_direct_word, xfer_direct_long, swap_direct_word,
3218 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3219 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3220 ifdefs, keeping the prototype declaration.
3221 (swap_word): Rewrite correctly.
3222 (ColdReset): Delete references to CONFIG. Delete endianness related
3223 code; moved to set_endianness.
3225 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
3227 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3228 * interp.c (CHECKHILO): Define away.
3229 (simSIGINT): New macro.
3230 (membank_size): Increase from 1MB to 2MB.
3231 (control_c): New function.
3232 (sim_resume): Rename parameter signal to signal_number. Add local
3233 variable prev. Call signal before and after simulate.
3234 (sim_stop_reason): Add simSIGINT support.
3235 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3237 (sim_warning): Delete call to SignalException. Do call printf_filtered
3239 (AddressTranslation): Add #ifdef DEBUG around debugging message and
3240 a call to sim_warning.
3242 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
3244 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3245 16 bit instructions.
3247 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
3249 Add support for mips16 (16 bit MIPS implementation):
3250 * gencode.c (inst_type): Add mips16 instruction encoding types.
3251 (GETDATASIZEINSN): Define.
3252 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
3253 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
3255 (MIPS16_DECODE): New table, for mips16 instructions.
3256 (bitmap_val): New static function.
3257 (struct mips16_op): Define.
3258 (mips16_op_table): New table, for mips16 operands.
3259 (build_mips16_operands): New static function.
3260 (process_instructions): If PC is odd, decode a mips16
3261 instruction. Break out instruction handling into new
3262 build_instruction function.
3263 (build_instruction): New static function, broken out of
3264 process_instructions. Check modifiers rather than flags for SHIFT
3265 bit count and m[ft]{hi,lo} direction.
3266 (usage): Pass program name to fprintf.
3267 (main): Remove unused variable this_option_optind. Change
3268 ``*loptarg++'' to ``loptarg++''.
3269 (my_strtoul): Parenthesize && within ||.
3270 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3271 (simulate): If PC is odd, fetch a 16 bit instruction, and
3272 increment PC by 2 rather than 4.
3273 * configure.in: Add case for mips16*-*-*.
3274 * configure: Rebuild.
3276 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
3278 * interp.c: Allow -t to enable tracing in standalone simulator.
3279 Fix garbage output in trace file and error messages.
3281 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
3283 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3284 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3285 * configure.in: Simplify using macros in ../common/aclocal.m4.
3286 * configure: Regenerated.
3287 * tconfig.in: New file.
3289 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
3291 * interp.c: Fix bugs in 64-bit port.
3292 Use ansi function declarations for msvc compiler.
3293 Initialize and test file pointer in trace code.
3294 Prevent duplicate definition of LAST_EMED_REGNUM.
3296 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
3298 * interp.c (xfer_big_long): Prevent unwanted sign extension.
3300 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
3302 * interp.c (SignalException): Check for explicit terminating
3304 * gencode.c: Pass instruction value through SignalException()
3305 calls for Trap, Breakpoint and Syscall.
3307 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3309 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3310 only used on those hosts that provide it.
3311 * configure.in: Add sqrt() to list of functions to be checked for.
3312 * config.in: Re-generated.
3313 * configure: Re-generated.
3315 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
3317 * gencode.c (process_instructions): Call build_endian_shift when
3318 expanding STORE RIGHT, to fix swr.
3319 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3320 clear the high bits.
3321 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3322 Fix float to int conversions to produce signed values.
3324 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
3326 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3327 (process_instructions): Correct handling of nor instruction.
3328 Correct shift count for 32 bit shift instructions. Correct sign
3329 extension for arithmetic shifts to not shift the number of bits in
3330 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
3331 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
3333 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3334 It's OK to have a mult follow a mult. What's not OK is to have a
3335 mult follow an mfhi.
3336 (Convert): Comment out incorrect rounding code.
3338 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
3340 * interp.c (sim_monitor): Improved monitor printf
3341 simulation. Tidied up simulator warnings, and added "--log" option
3342 for directing warning message output.
3343 * gencode.c: Use sim_warning() rather than WARNING macro.
3345 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
3347 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3348 getopt1.o, rather than on gencode.c. Link objects together.
3349 Don't link against -liberty.
3350 (gencode.o, getopt.o, getopt1.o): New targets.
3351 * gencode.c: Include <ctype.h> and "ansidecl.h".
3352 (AND): Undefine after including "ansidecl.h".
3353 (ULONG_MAX): Define if not defined.
3354 (OP_*): Don't define macros; now defined in opcode/mips.h.
3355 (main): Call my_strtoul rather than strtoul.
3356 (my_strtoul): New static function.
3358 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
3360 * gencode.c (process_instructions): Generate word64 and uword64
3361 instead of `long long' and `unsigned long long' data types.
3362 * interp.c: #include sysdep.h to get signals, and define default
3364 * (Convert): Work around for Visual-C++ compiler bug with type
3366 * support.h: Make things compile under Visual-C++ by using
3367 __int64 instead of `long long'. Change many refs to long long
3368 into word64/uword64 typedefs.
3370 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
3372 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3373 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3375 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3376 (AC_PROG_INSTALL): Added.
3377 (AC_PROG_CC): Moved to before configure.host call.
3378 * configure: Rebuilt.
3380 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
3382 * configure.in: Define @SIMCONF@ depending on mips target.
3383 * configure: Rebuild.
3384 * Makefile.in (run): Add @SIMCONF@ to control simulator
3386 * gencode.c: Change LOADDRMASK to 64bit memory model only.
3387 * interp.c: Remove some debugging, provide more detailed error
3388 messages, update memory accesses to use LOADDRMASK.
3390 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
3392 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3393 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
3395 * configure: Rebuild.
3396 * config.in: New file, generated by autoheader.
3397 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
3398 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
3399 HAVE_ANINT and HAVE_AINT, as appropriate.
3400 * Makefile.in (run): Use @LIBS@ rather than -lm.
3401 (interp.o): Depend upon config.h.
3402 (Makefile): Just rebuild Makefile.
3403 (clean): Remove stamp-h.
3404 (mostlyclean): Make the same as clean, not as distclean.
3405 (config.h, stamp-h): New targets.
3407 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3409 * interp.c (ColdReset): Fix boolean test. Make all simulator
3412 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
3414 * interp.c (xfer_direct_word, xfer_direct_long,
3415 swap_direct_word, swap_direct_long, xfer_big_word,
3416 xfer_big_long, xfer_little_word, xfer_little_long,
3417 swap_word,swap_long): Added.
3418 * interp.c (ColdReset): Provide function indirection to
3419 host<->simulated_target transfer routines.
3420 * interp.c (sim_store_register, sim_fetch_register): Updated to
3421 make use of indirected transfer routines.
3423 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
3425 * gencode.c (process_instructions): Ensure FP ABS instruction
3427 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3428 system call support.
3430 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
3432 * interp.c (sim_do_command): Complain if callback structure not
3435 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
3437 * interp.c (Convert): Provide round-to-nearest and round-to-zero
3438 support for Sun hosts.
3439 * Makefile.in (gencode): Ensure the host compiler and libraries
3440 used for cross-hosted build.
3442 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
3444 * interp.c, gencode.c: Some more (TODO) tidying.
3446 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
3448 * gencode.c, interp.c: Replaced explicit long long references with
3449 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3450 * support.h (SET64LO, SET64HI): Macros added.
3452 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
3454 * configure: Regenerate with autoconf 2.7.
3456 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
3458 * interp.c (LoadMemory): Enclose text following #endif in /* */.
3459 * support.h: Remove superfluous "1" from #if.
3460 * support.h (CHECKSIM): Remove stray 'a' at end of line.
3462 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
3464 * interp.c (StoreFPR): Control UndefinedResult() call on
3465 WARN_RESULT manifest.
3467 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
3469 * gencode.c: Tidied instruction decoding, and added FP instruction
3472 * interp.c: Added dineroIII, and BSD profiling support. Also
3473 run-time FP handling.
3475 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
3477 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3478 gencode.c, interp.c, support.h: created.