1 2007-06-26 Richard Sandiford <richard@codesourcery.com>
3 * configure.ac (sim_mipsisa3264_configs): New variable.
4 (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
5 every configuration support all four targets, using the triplet to
7 * configure: Regenerate.
9 2007-06-25 Richard Sandiford <richard@codesourcery.com>
11 * Makefile.in (m16run.o): New rule.
13 2007-05-15 Thiemo Seufer <ths@mips.com>
15 * mips3264r2.igen (DSHD): Fix compile warning.
17 2007-05-14 Thiemo Seufer <ths@mips.com>
19 * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
20 CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
21 NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
22 RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
25 2007-03-01 Thiemo Seufer <ths@mips.com>
27 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
30 2007-02-20 Thiemo Seufer <ths@mips.com>
32 * dsp.igen: Update copyright notice.
33 * dsp2.igen: Fix copyright notice.
35 2007-02-20 Thiemo Seufer <ths@mips.com>
36 Chao-Ying Fu <fu@mips.com>
38 * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
39 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
40 Add dsp2 to sim_igen_machine.
41 * configure: Regenerate.
42 * dsp.igen (do_ph_op): Add MUL support when op = 2.
43 (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
44 (mulq_rs.ph): Use do_ph_mulq.
45 (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
46 * mips.igen: Add dsp2 model and include dsp2.igen.
47 (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
48 for *mips32r2, *mips64r2, *dsp.
49 (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
50 for *mips32r2, *mips64r2, *dsp2.
51 * dsp2.igen: New file for MIPS DSP REV 2 ASE.
53 2007-02-19 Thiemo Seufer <ths@mips.com>
54 Nigel Stephens <nigel@mips.com>
56 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
57 jumps with hazard barrier.
59 2007-02-19 Thiemo Seufer <ths@mips.com>
60 Nigel Stephens <nigel@mips.com>
62 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
63 after each call to sim_io_write.
65 2007-02-19 Thiemo Seufer <ths@mips.com>
66 Nigel Stephens <nigel@mips.com>
68 * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
69 supported by this simulator.
70 (decode_coproc): Recognise additional CP0 Config registers
73 2007-02-19 Thiemo Seufer <ths@mips.com>
74 Nigel Stephens <nigel@mips.com>
75 David Ung <davidu@mips.com>
77 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
78 uninterpreted formats. If fmt is one of the uninterpreted types
79 don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
80 fmt_word, and fmt_uninterpreted_64 like fmt_long.
81 (store_fpr): When writing an invalid odd register, set the
82 matching even register to fmt_unknown, not the following register.
83 * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
84 the the memory window at offset 0 set by --memory-size command
86 (sim_store_register): Handle storing 4 bytes to an 8 byte floating
88 (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
90 (sim_monitor): When returning the memory size to the MIPS
91 application, use the value in STATE_MEM_SIZE, not an arbitrary
93 (cop_lw): Don' mess around with FPR_STATE, just pass
94 fmt_uninterpreted_32 to StoreFPR.
96 (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
98 * mips.igen (not_word_value): Single version for mips32, mips64
101 2007-02-19 Thiemo Seufer <ths@mips.com>
102 Nigel Stephens <nigel@mips.com>
104 * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
107 2007-02-17 Thiemo Seufer <ths@mips.com>
109 * configure.ac (mips*-sde-elf*): Move in front of generic machine
111 * configure: Regenerate.
113 2007-02-17 Thiemo Seufer <ths@mips.com>
115 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
116 Add mdmx to sim_igen_machine.
117 (mipsisa64*-*-*): Likewise. Remove dsp.
118 (mipsisa32*-*-*): Remove dsp.
119 * configure: Regenerate.
121 2007-02-13 Thiemo Seufer <ths@mips.com>
123 * configure.ac: Add mips*-sde-elf* target.
124 * configure: Regenerate.
126 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
128 * acconfig.h: Remove.
129 * config.in, configure: Regenerate.
131 2006-11-07 Thiemo Seufer <ths@mips.com>
133 * dsp.igen (do_w_op): Fix compiler warning.
135 2006-08-29 Thiemo Seufer <ths@mips.com>
136 David Ung <davidu@mips.com>
138 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
140 * configure: Regenerate.
141 * mips.igen (model): Add smartmips.
142 (MADDU): Increment ACX if carry.
143 (do_mult): Clear ACX.
144 (ROR,RORV): Add smartmips.
145 (include): Include smartmips.igen.
146 * sim-main.h (ACX): Set to REGISTERS[89].
147 * smartmips.igen: New file.
149 2006-08-29 Thiemo Seufer <ths@mips.com>
150 David Ung <davidu@mips.com>
152 * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
153 mips3264r2.igen. Add missing dependency rules.
154 * m16e.igen: Support for mips16e save/restore instructions.
156 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
158 * configure: Regenerated.
160 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
162 * configure: Regenerated.
164 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
166 * configure: Regenerated.
168 2006-05-15 Chao-ying Fu <fu@mips.com>
170 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
172 2006-04-18 Nick Clifton <nickc@redhat.com>
174 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
177 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
179 * configure: Regenerate.
181 2005-12-14 Chao-ying Fu <fu@mips.com>
183 * Makefile.in (SIM_OBJS): Add dsp.o.
184 (dsp.o): New dependency.
185 (IGEN_INCLUDE): Add dsp.igen.
186 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
187 mipsisa64*-*-*): Add dsp to sim_igen_machine.
188 * configure: Regenerate.
189 * mips.igen: Add dsp model and include dsp.igen.
190 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
191 because these instructions are extended in DSP ASE.
192 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
193 adding 6 DSP accumulator registers and 1 DSP control register.
194 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
195 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
196 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
197 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
198 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
199 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
200 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
201 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
202 DSPCR_CCOND_SMASK): New define.
203 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
204 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
206 2005-07-08 Ian Lance Taylor <ian@airs.com>
208 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
210 2005-06-16 David Ung <davidu@mips.com>
211 Nigel Stephens <nigel@mips.com>
213 * mips.igen: New mips16e model and include m16e.igen.
214 (check_u64): Add mips16e tag.
215 * m16e.igen: New file for MIPS16e instructions.
216 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
217 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
219 * configure: Regenerate.
221 2005-05-26 David Ung <davidu@mips.com>
223 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
224 tags to all instructions which are applicable to the new ISAs.
225 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
227 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
229 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
231 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
232 * configure: Regenerate.
234 2005-03-23 Mark Kettenis <kettenis@gnu.org>
236 * configure: Regenerate.
238 2005-01-14 Andrew Cagney <cagney@gnu.org>
240 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
241 explicit call to AC_CONFIG_HEADER.
242 * configure: Regenerate.
244 2005-01-12 Andrew Cagney <cagney@gnu.org>
246 * configure.ac: Update to use ../common/common.m4.
247 * configure: Re-generate.
249 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
251 * configure: Regenerated to track ../common/aclocal.m4 changes.
253 2005-01-07 Andrew Cagney <cagney@gnu.org>
255 * configure.ac: Rename configure.in, require autoconf 2.59.
256 * configure: Re-generate.
258 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
260 * configure: Regenerate for ../common/aclocal.m4 update.
262 2004-09-24 Monika Chaddha <monika@acmet.com>
264 Committed by Andrew Cagney.
265 * m16.igen (CMP, CMPI): Fix assembler.
267 2004-08-18 Chris Demetriou <cgd@broadcom.com>
269 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
270 * configure: Regenerate.
272 2004-06-25 Chris Demetriou <cgd@broadcom.com>
274 * configure.in (sim_m16_machine): Include mipsIII.
275 * configure: Regenerate.
277 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
279 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
281 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
283 2004-04-10 Chris Demetriou <cgd@broadcom.com>
285 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
287 2004-04-09 Chris Demetriou <cgd@broadcom.com>
289 * mips.igen (check_fmt): Remove.
290 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
291 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
292 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
293 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
294 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
295 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
296 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
297 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
298 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
299 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
301 2004-04-09 Chris Demetriou <cgd@broadcom.com>
303 * sb1.igen (check_sbx): New function.
304 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
306 2004-03-29 Chris Demetriou <cgd@broadcom.com>
307 Richard Sandiford <rsandifo@redhat.com>
309 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
310 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
311 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
312 separate implementations for mipsIV and mipsV. Use new macros to
313 determine whether the restrictions apply.
315 2004-01-19 Chris Demetriou <cgd@broadcom.com>
317 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
318 (check_mult_hilo): Improve comments.
319 (check_div_hilo): Likewise. Also, fork off a new version
320 to handle mips32/mips64 (since there are no hazards to check
323 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
325 * mips.igen (do_dmultx): Fix check for negative operands.
327 2003-05-16 Ian Lance Taylor <ian@airs.com>
329 * Makefile.in (SHELL): Make sure this is defined.
330 (various): Use $(SHELL) whenever we invoke move-if-change.
332 2003-05-03 Chris Demetriou <cgd@broadcom.com>
334 * cp1.c: Tweak attribution slightly.
337 * mdmx.igen: Likewise.
338 * mips3d.igen: Likewise.
339 * sb1.igen: Likewise.
341 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
343 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
346 2003-02-27 Andrew Cagney <cagney@redhat.com>
348 * interp.c (sim_open): Rename _bfd to bfd.
349 (sim_create_inferior): Ditto.
351 2003-01-14 Chris Demetriou <cgd@broadcom.com>
353 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
355 2003-01-14 Chris Demetriou <cgd@broadcom.com>
357 * mips.igen (EI, DI): Remove.
359 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
361 * Makefile.in (tmp-run-multi): Fix mips16 filter.
363 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
364 Andrew Cagney <ac131313@redhat.com>
365 Gavin Romig-Koch <gavin@redhat.com>
366 Graydon Hoare <graydon@redhat.com>
367 Aldy Hernandez <aldyh@redhat.com>
368 Dave Brolley <brolley@redhat.com>
369 Chris Demetriou <cgd@broadcom.com>
371 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
372 (sim_mach_default): New variable.
373 (mips64vr-*-*, mips64vrel-*-*): New configurations.
374 Add a new simulator generator, MULTI.
375 * configure: Regenerate.
376 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
377 (multi-run.o): New dependency.
378 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
379 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
380 (tmp-multi): Combine them.
381 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
382 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
383 (distclean-extra): New rule.
384 * sim-main.h: Include bfd.h.
385 (MIPS_MACH): New macro.
386 * mips.igen (vr4120, vr5400, vr5500): New models.
387 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
388 * vr.igen: Replace with new version.
390 2003-01-04 Chris Demetriou <cgd@broadcom.com>
392 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
393 * configure: Regenerate.
395 2002-12-31 Chris Demetriou <cgd@broadcom.com>
397 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
398 * mips.igen: Remove all invocations of check_branch_bug and
401 2002-12-16 Chris Demetriou <cgd@broadcom.com>
403 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
405 2002-07-30 Chris Demetriou <cgd@broadcom.com>
407 * mips.igen (do_load_double, do_store_double): New functions.
408 (LDC1, SDC1): Rename to...
409 (LDC1b, SDC1b): respectively.
410 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
412 2002-07-29 Michael Snyder <msnyder@redhat.com>
414 * cp1.c (fp_recip2): Modify initialization expression so that
415 GCC will recognize it as constant.
417 2002-06-18 Chris Demetriou <cgd@broadcom.com>
419 * mdmx.c (SD_): Delete.
420 (Unpredictable): Re-define, for now, to directly invoke
421 unpredictable_action().
422 (mdmx_acc_op): Fix error in .ob immediate handling.
424 2002-06-18 Andrew Cagney <cagney@redhat.com>
426 * interp.c (sim_firmware_command): Initialize `address'.
428 2002-06-16 Andrew Cagney <ac131313@redhat.com>
430 * configure: Regenerated to track ../common/aclocal.m4 changes.
432 2002-06-14 Chris Demetriou <cgd@broadcom.com>
433 Ed Satterthwaite <ehs@broadcom.com>
435 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
436 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
437 * mips.igen: Include mips3d.igen.
438 (mips3d): New model name for MIPS-3D ASE instructions.
439 (CVT.W.fmt): Don't use this instruction for word (source) format
441 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
442 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
443 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
444 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
445 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
446 (RSquareRoot1, RSquareRoot2): New macros.
447 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
448 (fp_rsqrt2): New functions.
449 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
450 * configure: Regenerate.
452 2002-06-13 Chris Demetriou <cgd@broadcom.com>
453 Ed Satterthwaite <ehs@broadcom.com>
455 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
456 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
457 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
458 (convert): Note that this function is not used for paired-single
460 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
461 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
462 (check_fmt_p): Enable paired-single support.
463 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
464 (PUU.PS): New instructions.
465 (CVT.S.fmt): Don't use this instruction for paired-single format
467 * sim-main.h (FP_formats): New value 'fmt_ps.'
468 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
469 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
471 2002-06-12 Chris Demetriou <cgd@broadcom.com>
473 * mips.igen: Fix formatting of function calls in
476 2002-06-12 Chris Demetriou <cgd@broadcom.com>
478 * mips.igen (MOVN, MOVZ): Trace result.
479 (TNEI): Print "tnei" as the opcode name in traces.
480 (CEIL.W): Add disassembly string for traces.
481 (RSQRT.fmt): Make location of disassembly string consistent
482 with other instructions.
484 2002-06-12 Chris Demetriou <cgd@broadcom.com>
486 * mips.igen (X): Delete unused function.
488 2002-06-08 Andrew Cagney <cagney@redhat.com>
490 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
492 2002-06-07 Chris Demetriou <cgd@broadcom.com>
493 Ed Satterthwaite <ehs@broadcom.com>
495 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
496 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
497 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
498 (fp_nmsub): New prototypes.
499 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
500 (NegMultiplySub): New defines.
501 * mips.igen (RSQRT.fmt): Use RSquareRoot().
502 (MADD.D, MADD.S): Replace with...
503 (MADD.fmt): New instruction.
504 (MSUB.D, MSUB.S): Replace with...
505 (MSUB.fmt): New instruction.
506 (NMADD.D, NMADD.S): Replace with...
507 (NMADD.fmt): New instruction.
508 (NMSUB.D, MSUB.S): Replace with...
509 (NMSUB.fmt): New instruction.
511 2002-06-07 Chris Demetriou <cgd@broadcom.com>
512 Ed Satterthwaite <ehs@broadcom.com>
514 * cp1.c: Fix more comment spelling and formatting.
515 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
516 (denorm_mode): New function.
517 (fpu_unary, fpu_binary): Round results after operation, collect
518 status from rounding operations, and update the FCSR.
519 (convert): Collect status from integer conversions and rounding
520 operations, and update the FCSR. Adjust NaN values that result
521 from conversions. Convert to use sim_io_eprintf rather than
522 fprintf, and remove some debugging code.
523 * cp1.h (fenr_FS): New define.
525 2002-06-07 Chris Demetriou <cgd@broadcom.com>
527 * cp1.c (convert): Remove unusable debugging code, and move MIPS
528 rounding mode to sim FP rounding mode flag conversion code into...
529 (rounding_mode): New function.
531 2002-06-07 Chris Demetriou <cgd@broadcom.com>
533 * cp1.c: Clean up formatting of a few comments.
534 (value_fpr): Reformat switch statement.
536 2002-06-06 Chris Demetriou <cgd@broadcom.com>
537 Ed Satterthwaite <ehs@broadcom.com>
540 * sim-main.h: Include cp1.h.
541 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
542 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
543 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
544 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
545 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
546 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
547 * cp1.c: Don't include sim-fpu.h; already included by
548 sim-main.h. Clean up formatting of some comments.
549 (NaN, Equal, Less): Remove.
550 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
551 (fp_cmp): New functions.
552 * mips.igen (do_c_cond_fmt): Remove.
553 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
554 Compare. Add result tracing.
555 (CxC1): Remove, replace with...
556 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
557 (DMxC1): Remove, replace with...
558 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
559 (MxC1): Remove, replace with...
560 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
562 2002-06-04 Chris Demetriou <cgd@broadcom.com>
564 * sim-main.h (FGRIDX): Remove, replace all uses with...
565 (FGR_BASE): New macro.
566 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
567 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
568 (NR_FGR, FGR): Likewise.
569 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
570 * mips.igen: Likewise.
572 2002-06-04 Chris Demetriou <cgd@broadcom.com>
574 * cp1.c: Add an FSF Copyright notice to this file.
576 2002-06-04 Chris Demetriou <cgd@broadcom.com>
577 Ed Satterthwaite <ehs@broadcom.com>
579 * cp1.c (Infinity): Remove.
580 * sim-main.h (Infinity): Likewise.
582 * cp1.c (fp_unary, fp_binary): New functions.
583 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
584 (fp_sqrt): New functions, implemented in terms of the above.
585 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
586 (Recip, SquareRoot): Remove (replaced by functions above).
587 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
588 (fp_recip, fp_sqrt): New prototypes.
589 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
590 (Recip, SquareRoot): Replace prototypes with #defines which
591 invoke the functions above.
593 2002-06-03 Chris Demetriou <cgd@broadcom.com>
595 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
596 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
597 file, remove PARAMS from prototypes.
598 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
599 simulator state arguments.
600 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
601 pass simulator state arguments.
602 * cp1.c (SD): Redefine as CPU_STATE(cpu).
603 (store_fpr, convert): Remove 'sd' argument.
604 (value_fpr): Likewise. Convert to use 'SD' instead.
606 2002-06-03 Chris Demetriou <cgd@broadcom.com>
608 * cp1.c (Min, Max): Remove #if 0'd functions.
609 * sim-main.h (Min, Max): Remove.
611 2002-06-03 Chris Demetriou <cgd@broadcom.com>
613 * cp1.c: fix formatting of switch case and default labels.
614 * interp.c: Likewise.
615 * sim-main.c: Likewise.
617 2002-06-03 Chris Demetriou <cgd@broadcom.com>
619 * cp1.c: Clean up comments which describe FP formats.
620 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
622 2002-06-03 Chris Demetriou <cgd@broadcom.com>
623 Ed Satterthwaite <ehs@broadcom.com>
625 * configure.in (mipsisa64sb1*-*-*): New target for supporting
626 Broadcom SiByte SB-1 processor configurations.
627 * configure: Regenerate.
628 * sb1.igen: New file.
629 * mips.igen: Include sb1.igen.
631 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
632 * mdmx.igen: Add "sb1" model to all appropriate functions and
634 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
635 (ob_func, ob_acc): Reference the above.
636 (qh_acc): Adjust to keep the same size as ob_acc.
637 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
638 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
640 2002-06-03 Chris Demetriou <cgd@broadcom.com>
642 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
644 2002-06-02 Chris Demetriou <cgd@broadcom.com>
645 Ed Satterthwaite <ehs@broadcom.com>
647 * mips.igen (mdmx): New (pseudo-)model.
648 * mdmx.c, mdmx.igen: New files.
649 * Makefile.in (SIM_OBJS): Add mdmx.o.
650 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
652 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
653 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
654 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
655 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
656 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
657 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
658 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
659 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
660 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
661 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
662 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
663 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
664 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
665 (qh_fmtsel): New macros.
666 (_sim_cpu): New member "acc".
667 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
668 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
670 2002-05-01 Chris Demetriou <cgd@broadcom.com>
672 * interp.c: Use 'deprecated' rather than 'depreciated.'
673 * sim-main.h: Likewise.
675 2002-05-01 Chris Demetriou <cgd@broadcom.com>
677 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
678 which wouldn't compile anyway.
679 * sim-main.h (unpredictable_action): New function prototype.
680 (Unpredictable): Define to call igen function unpredictable().
681 (NotWordValue): New macro to call igen function not_word_value().
682 (UndefinedResult): Remove.
683 * interp.c (undefined_result): Remove.
684 (unpredictable_action): New function.
685 * mips.igen (not_word_value, unpredictable): New functions.
686 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
687 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
688 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
689 NotWordValue() to check for unpredictable inputs, then
690 Unpredictable() to handle them.
692 2002-02-24 Chris Demetriou <cgd@broadcom.com>
694 * mips.igen: Fix formatting of calls to Unpredictable().
696 2002-04-20 Andrew Cagney <ac131313@redhat.com>
698 * interp.c (sim_open): Revert previous change.
700 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
702 * interp.c (sim_open): Disable chunk of code that wrote code in
703 vector table entries.
705 2002-03-19 Chris Demetriou <cgd@broadcom.com>
707 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
708 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
711 2002-03-19 Chris Demetriou <cgd@broadcom.com>
713 * cp1.c: Fix many formatting issues.
715 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
717 * cp1.c (fpu_format_name): New function to replace...
718 (DOFMT): This. Delete, and update all callers.
719 (fpu_rounding_mode_name): New function to replace...
720 (RMMODE): This. Delete, and update all callers.
722 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
724 * interp.c: Move FPU support routines from here to...
725 * cp1.c: Here. New file.
726 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
729 2002-03-12 Chris Demetriou <cgd@broadcom.com>
731 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
732 * mips.igen (mips32, mips64): New models, add to all instructions
733 and functions as appropriate.
734 (loadstore_ea, check_u64): New variant for model mips64.
735 (check_fmt_p): New variant for models mipsV and mips64, remove
736 mipsV model marking fro other variant.
739 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
740 for mips32 and mips64.
741 (DCLO, DCLZ): New instructions for mips64.
743 2002-03-07 Chris Demetriou <cgd@broadcom.com>
745 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
746 immediate or code as a hex value with the "%#lx" format.
747 (ANDI): Likewise, and fix printed instruction name.
749 2002-03-05 Chris Demetriou <cgd@broadcom.com>
751 * sim-main.h (UndefinedResult, Unpredictable): New macros
752 which currently do nothing.
754 2002-03-05 Chris Demetriou <cgd@broadcom.com>
756 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
757 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
758 (status_CU3): New definitions.
760 * sim-main.h (ExceptionCause): Add new values for MIPS32
761 and MIPS64: MDMX, MCheck, CacheErr. Update comments
762 for DebugBreakPoint and NMIReset to note their status in
764 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
765 (SignalExceptionCacheErr): New exception macros.
767 2002-03-05 Chris Demetriou <cgd@broadcom.com>
769 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
770 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
772 (SignalExceptionCoProcessorUnusable): Take as argument the
773 unusable coprocessor number.
775 2002-03-05 Chris Demetriou <cgd@broadcom.com>
777 * mips.igen: Fix formatting of all SignalException calls.
779 2002-03-05 Chris Demetriou <cgd@broadcom.com>
781 * sim-main.h (SIGNEXTEND): Remove.
783 2002-03-04 Chris Demetriou <cgd@broadcom.com>
785 * mips.igen: Remove gencode comment from top of file, fix
786 spelling in another comment.
788 2002-03-04 Chris Demetriou <cgd@broadcom.com>
790 * mips.igen (check_fmt, check_fmt_p): New functions to check
791 whether specific floating point formats are usable.
792 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
793 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
794 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
795 Use the new functions.
796 (do_c_cond_fmt): Remove format checks...
797 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
799 2002-03-03 Chris Demetriou <cgd@broadcom.com>
801 * mips.igen: Fix formatting of check_fpu calls.
803 2002-03-03 Chris Demetriou <cgd@broadcom.com>
805 * mips.igen (FLOOR.L.fmt): Store correct destination register.
807 2002-03-03 Chris Demetriou <cgd@broadcom.com>
809 * mips.igen: Remove whitespace at end of lines.
811 2002-03-02 Chris Demetriou <cgd@broadcom.com>
813 * mips.igen (loadstore_ea): New function to do effective
814 address calculations.
815 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
816 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
817 CACHE): Use loadstore_ea to do effective address computations.
819 2002-03-02 Chris Demetriou <cgd@broadcom.com>
821 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
822 * mips.igen (LL, CxC1, MxC1): Likewise.
824 2002-03-02 Chris Demetriou <cgd@broadcom.com>
826 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
827 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
828 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
829 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
830 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
831 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
832 Don't split opcode fields by hand, use the opcode field values
835 2002-03-01 Chris Demetriou <cgd@broadcom.com>
837 * mips.igen (do_divu): Fix spacing.
839 * mips.igen (do_dsllv): Move to be right before DSLLV,
840 to match the rest of the do_<shift> functions.
842 2002-03-01 Chris Demetriou <cgd@broadcom.com>
844 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
845 DSRL32, do_dsrlv): Trace inputs and results.
847 2002-03-01 Chris Demetriou <cgd@broadcom.com>
849 * mips.igen (CACHE): Provide instruction-printing string.
851 * interp.c (signal_exception): Comment tokens after #endif.
853 2002-02-28 Chris Demetriou <cgd@broadcom.com>
855 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
856 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
857 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
858 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
859 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
860 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
861 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
862 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
864 2002-02-28 Chris Demetriou <cgd@broadcom.com>
866 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
867 instruction-printing string.
868 (LWU): Use '64' as the filter flag.
870 2002-02-28 Chris Demetriou <cgd@broadcom.com>
872 * mips.igen (SDXC1): Fix instruction-printing string.
874 2002-02-28 Chris Demetriou <cgd@broadcom.com>
876 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
879 2002-02-27 Chris Demetriou <cgd@broadcom.com>
881 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
884 2002-02-27 Chris Demetriou <cgd@broadcom.com>
886 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
887 add a comma) so that it more closely match the MIPS ISA
888 documentation opcode partitioning.
889 (PREF): Put useful names on opcode fields, and include
890 instruction-printing string.
892 2002-02-27 Chris Demetriou <cgd@broadcom.com>
894 * mips.igen (check_u64): New function which in the future will
895 check whether 64-bit instructions are usable and signal an
896 exception if not. Currently a no-op.
897 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
898 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
899 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
900 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
902 * mips.igen (check_fpu): New function which in the future will
903 check whether FPU instructions are usable and signal an exception
904 if not. Currently a no-op.
905 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
906 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
907 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
908 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
909 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
910 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
911 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
912 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
914 2002-02-27 Chris Demetriou <cgd@broadcom.com>
916 * mips.igen (do_load_left, do_load_right): Move to be immediately
918 (do_store_left, do_store_right): Move to be immediately following
921 2002-02-27 Chris Demetriou <cgd@broadcom.com>
923 * mips.igen (mipsV): New model name. Also, add it to
924 all instructions and functions where it is appropriate.
926 2002-02-18 Chris Demetriou <cgd@broadcom.com>
928 * mips.igen: For all functions and instructions, list model
929 names that support that instruction one per line.
931 2002-02-11 Chris Demetriou <cgd@broadcom.com>
933 * mips.igen: Add some additional comments about supported
934 models, and about which instructions go where.
935 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
936 order as is used in the rest of the file.
938 2002-02-11 Chris Demetriou <cgd@broadcom.com>
940 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
941 indicating that ALU32_END or ALU64_END are there to check
943 (DADD): Likewise, but also remove previous comment about
946 2002-02-10 Chris Demetriou <cgd@broadcom.com>
948 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
949 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
950 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
951 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
952 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
953 fields (i.e., add and move commas) so that they more closely
954 match the MIPS ISA documentation opcode partitioning.
956 2002-02-10 Chris Demetriou <cgd@broadcom.com>
958 * mips.igen (ADDI): Print immediate value.
960 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
961 (SLL): Print "nop" specially, and don't run the code
962 that does the shift for the "nop" case.
964 2001-11-17 Fred Fish <fnf@redhat.com>
966 * sim-main.h (float_operation): Move enum declaration outside
967 of _sim_cpu struct declaration.
969 2001-04-12 Jim Blandy <jimb@redhat.com>
971 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
972 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
974 * sim-main.h (COCIDX): Remove definition; this isn't supported by
975 PENDING_FILL, and you can get the intended effect gracefully by
976 calling PENDING_SCHED directly.
978 2001-02-23 Ben Elliston <bje@redhat.com>
980 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
981 already defined elsewhere.
983 2001-02-19 Ben Elliston <bje@redhat.com>
985 * sim-main.h (sim_monitor): Return an int.
986 * interp.c (sim_monitor): Add return values.
987 (signal_exception): Handle error conditions from sim_monitor.
989 2001-02-08 Ben Elliston <bje@redhat.com>
991 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
992 (store_memory): Likewise, pass cia to sim_core_write*.
994 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
996 On advice from Chris G. Demetriou <cgd@sibyte.com>:
997 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
999 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
1001 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1002 * Makefile.in: Don't delete *.igen when cleaning directory.
1004 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
1006 * m16.igen (break): Call SignalException not sim_engine_halt.
1008 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
1010 From Jason Eckhardt:
1011 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1013 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
1015 * mips.igen (MxC1, DMxC1): Fix printf formatting.
1017 2000-05-24 Michael Hayes <mhayes@cygnus.com>
1019 * mips.igen (do_dmultx): Fix typo.
1021 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
1023 * configure: Regenerated to track ../common/aclocal.m4 changes.
1025 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
1027 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1029 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
1031 * sim-main.h (GPR_CLEAR): Define macro.
1033 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
1035 * interp.c (decode_coproc): Output long using %lx and not %s.
1037 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
1039 * interp.c (sim_open): Sort & extend dummy memory regions for
1040 --board=jmr3904 for eCos.
1042 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
1044 * configure: Regenerated.
1046 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
1048 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1049 calls, conditional on the simulator being in verbose mode.
1051 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
1053 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1054 cache don't get ReservedInstruction traps.
1056 1999-11-29 Mark Salter <msalter@cygnus.com>
1058 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1059 to clear status bits in sdisr register. This is how the hardware works.
1061 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1062 being used by cygmon.
1064 1999-11-11 Andrew Haley <aph@cygnus.com>
1066 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1069 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
1071 * mips.igen (MULT): Correct previous mis-applied patch.
1073 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
1075 * mips.igen (delayslot32): Handle sequence like
1076 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1077 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1078 (MULT): Actually pass the third register...
1080 1999-09-03 Mark Salter <msalter@cygnus.com>
1082 * interp.c (sim_open): Added more memory aliases for additional
1083 hardware being touched by cygmon on jmr3904 board.
1085 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1087 * configure: Regenerated to track ../common/aclocal.m4 changes.
1089 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
1091 * interp.c (sim_store_register): Handle case where client - GDB -
1092 specifies that a 4 byte register is 8 bytes in size.
1093 (sim_fetch_register): Ditto.
1095 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
1097 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1098 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1099 (idt_monitor_base): Base address for IDT monitor traps.
1100 (pmon_monitor_base): Ditto for PMON.
1101 (lsipmon_monitor_base): Ditto for LSI PMON.
1102 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1103 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1104 (sim_firmware_command): New function.
1105 (mips_option_handler): Call it for OPTION_FIRMWARE.
1106 (sim_open): Allocate memory for idt_monitor region. If "--board"
1107 option was given, add no monitor by default. Add BREAK hooks only if
1108 monitors are also there.
1110 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
1112 * interp.c (sim_monitor): Flush output before reading input.
1114 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
1116 * tconfig.in (SIM_HANDLES_LMA): Always define.
1118 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
1120 From Mark Salter <msalter@cygnus.com>:
1121 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
1122 (sim_open): Add setup for BSP board.
1124 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
1126 * mips.igen (MULT, MULTU): Add syntax for two operand version.
1127 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
1128 them as unimplemented.
1130 1999-05-08 Felix Lee <flee@cygnus.com>
1132 * configure: Regenerated to track ../common/aclocal.m4 changes.
1134 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
1136 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1138 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
1140 * configure.in: Any mips64vr5*-*-* target should have
1141 -DTARGET_ENABLE_FR=1.
1142 (default_endian): Any mips64vr*el-*-* target should default to
1144 * configure: Re-generate.
1146 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
1148 * mips.igen (ldl): Extend from _16_, not 32.
1150 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
1152 * interp.c (sim_store_register): Force registers written to by GDB
1153 into an un-interpreted state.
1155 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
1157 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1158 CPU, start periodic background I/O polls.
1159 (tx3904sio_poll): New function: periodic I/O poller.
1161 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
1163 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1165 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
1167 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1170 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
1172 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1173 (load_word): Call SIM_CORE_SIGNAL hook on error.
1174 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1175 starting. For exception dispatching, pass PC instead of NULL_CIA.
1176 (decode_coproc): Use COP0_BADVADDR to store faulting address.
1177 * sim-main.h (COP0_BADVADDR): Define.
1178 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1179 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1180 (_sim_cpu): Add exc_* fields to store register value snapshots.
1181 * mips.igen (*): Replace memory-related SignalException* calls
1182 with references to SIM_CORE_SIGNAL hook.
1184 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1186 * sim-main.c (*): Minor warning cleanups.
1188 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
1190 * m16.igen (DADDIU5): Correct type-o.
1192 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
1194 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1197 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
1199 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1201 (interp.o): Add dependency on itable.h
1202 (oengine.c, gencode): Delete remaining references.
1203 (BUILT_SRC_FROM_GEN): Clean up.
1205 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
1208 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1209 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1210 tmp-run-hack) : New.
1211 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1212 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1213 Drop the "64" qualifier to get the HACK generator working.
1214 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
1215 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1216 qualifier to get the hack generator working.
1217 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1218 (DSLL): Use do_dsll.
1219 (DSLLV): Use do_dsllv.
1220 (DSRA): Use do_dsra.
1221 (DSRL): Use do_dsrl.
1222 (DSRLV): Use do_dsrlv.
1223 (BC1): Move *vr4100 to get the HACK generator working.
1224 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1225 get the HACK generator working.
1226 (MACC) Rename to get the HACK generator working.
1227 (DMACC,MACCS,DMACCS): Add the 64.
1229 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
1231 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1232 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1234 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
1236 * mips/interp.c (DEBUG): Cleanups.
1238 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
1240 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1241 (tx3904sio_tickle): fflush after a stdout character output.
1243 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
1245 * interp.c (sim_close): Uninstall modules.
1247 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
1249 * sim-main.h, interp.c (sim_monitor): Change to global
1252 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1254 * configure.in (vr4100): Only include vr4100 instructions in
1256 * configure: Re-generate.
1257 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1259 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1261 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1262 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1265 * configure.in (sim_default_gen, sim_use_gen): Replace with
1267 (--enable-sim-igen): Delete config option. Always using IGEN.
1268 * configure: Re-generate.
1270 * Makefile.in (gencode): Kill, kill, kill.
1273 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1275 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1276 bit mips16 igen simulator.
1277 * configure: Re-generate.
1279 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1280 as part of vr4100 ISA.
1281 * vr.igen: Mark all instructions as 64 bit only.
1283 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1285 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1288 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
1290 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1291 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
1292 * configure: Re-generate.
1294 * m16.igen (BREAK): Define breakpoint instruction.
1295 (JALX32): Mark instruction as mips16 and not r3900.
1296 * mips.igen (C.cond.fmt): Fix typo in instruction format.
1298 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1300 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1302 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1303 insn as a debug breakpoint.
1305 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1307 (PENDING_SCHED): Clean up trace statement.
1308 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1309 (PENDING_FILL): Delay write by only one cycle.
1310 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1312 * sim-main.c (pending_tick): Clean up trace statements. Add trace
1314 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1316 (pending_tick): Move incrementing of index to FOR statement.
1317 (pending_tick): Only update PENDING_OUT after a write has occured.
1319 * configure.in: Add explicit mips-lsi-* target. Use gencode to
1321 * configure: Re-generate.
1323 * interp.c (sim_engine_run OLD): Delete explicit call to
1324 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1326 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
1328 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1329 interrupt level number to match changed SignalExceptionInterrupt
1332 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
1334 * interp.c: #include "itable.h" if WITH_IGEN.
1335 (get_insn_name): New function.
1336 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1337 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1339 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
1341 * configure: Rebuilt to inhale new common/aclocal.m4.
1343 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
1345 * dv-tx3904sio.c: Include sim-assert.h.
1347 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
1349 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1350 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1351 Reorganize target-specific sim-hardware checks.
1352 * configure: rebuilt.
1353 * interp.c (sim_open): For tx39 target boards, set
1354 OPERATING_ENVIRONMENT, add tx3904sio devices.
1355 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1356 ROM executables. Install dv-sockser into sim-modules list.
1358 * dv-tx3904irc.c: Compiler warning clean-up.
1359 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
1360 frequent hw-trace messages.
1362 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
1364 * vr.igen (MulAcc): Identify as a vr4100 specific function.
1366 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1368 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1370 * vr.igen: New file.
1371 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1372 * mips.igen: Define vr4100 model. Include vr.igen.
1373 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
1375 * mips.igen (check_mf_hilo): Correct check.
1377 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1379 * sim-main.h (interrupt_event): Add prototype.
1381 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1382 register_ptr, register_value.
1383 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1385 * sim-main.h (tracefh): Make extern.
1387 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
1389 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1390 Reduce unnecessarily high timer event frequency.
1391 * dv-tx3904cpu.c: Ditto for interrupt event.
1393 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
1395 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1397 (interrupt_event): Made non-static.
1399 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1400 interchange of configuration values for external vs. internal
1403 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
1405 * mips.igen (BREAK): Moved code to here for
1406 simulator-reserved break instructions.
1407 * gencode.c (build_instruction): Ditto.
1408 * interp.c (signal_exception): Code moved from here. Non-
1409 reserved instructions now use exception vector, rather
1411 * sim-main.h: Moved magic constants to here.
1413 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
1415 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1416 register upon non-zero interrupt event level, clear upon zero
1418 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1419 by passing zero event value.
1420 (*_io_{read,write}_buffer): Endianness fixes.
1421 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1422 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1424 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1425 serial I/O and timer module at base address 0xFFFF0000.
1427 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
1429 * mips.igen (SWC1) : Correct the handling of ReverseEndian
1432 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
1434 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1436 * configure: Update.
1438 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
1440 * dv-tx3904tmr.c: New file - implements tx3904 timer.
1441 * dv-tx3904{irc,cpu}.c: Mild reformatting.
1442 * configure.in: Include tx3904tmr in hw_device list.
1443 * configure: Rebuilt.
1444 * interp.c (sim_open): Instantiate three timer instances.
1445 Fix address typo of tx3904irc instance.
1447 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
1449 * interp.c (signal_exception): SystemCall exception now uses
1450 the exception vector.
1452 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
1454 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1457 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1459 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1461 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
1463 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1465 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1466 sim-main.h. Declare a struct hw_descriptor instead of struct
1467 hw_device_descriptor.
1469 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1471 * mips.igen (do_store_left, do_load_left): Compute nr of left and
1472 right bits and then re-align left hand bytes to correct byte
1473 lanes. Fix incorrect computation in do_store_left when loading
1474 bytes from second word.
1476 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1478 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1479 * interp.c (sim_open): Only create a device tree when HW is
1482 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1483 * interp.c (signal_exception): Ditto.
1485 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
1487 * gencode.c: Mark BEGEZALL as LIKELY.
1489 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
1491 * sim-main.h (ALU32_END): Sign extend 32 bit results.
1492 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1494 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
1496 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1497 modules. Recognize TX39 target with "mips*tx39" pattern.
1498 * configure: Rebuilt.
1499 * sim-main.h (*): Added many macros defining bits in
1500 TX39 control registers.
1501 (SignalInterrupt): Send actual PC instead of NULL.
1502 (SignalNMIReset): New exception type.
1503 * interp.c (board): New variable for future use to identify
1504 a particular board being simulated.
1505 (mips_option_handler,mips_options): Added "--board" option.
1506 (interrupt_event): Send actual PC.
1507 (sim_open): Make memory layout conditional on board setting.
1508 (signal_exception): Initial implementation of hardware interrupt
1509 handling. Accept another break instruction variant for simulator
1511 (decode_coproc): Implement RFE instruction for TX39.
1512 (mips.igen): Decode RFE instruction as such.
1513 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
1514 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
1515 bbegin to implement memory map.
1516 * dv-tx3904cpu.c: New file.
1517 * dv-tx3904irc.c: New file.
1519 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
1521 * mips.igen (check_mt_hilo): Create a separate r3900 version.
1523 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
1525 * tx.igen (madd,maddu): Replace calls to check_op_hilo
1526 with calls to check_div_hilo.
1528 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
1530 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
1531 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
1532 Add special r3900 version of do_mult_hilo.
1533 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
1534 with calls to check_mult_hilo.
1535 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
1536 with calls to check_div_hilo.
1538 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
1540 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
1541 Document a replacement.
1543 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
1545 * interp.c (sim_monitor): Make mon_printf work.
1547 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
1549 * sim-main.h (INSN_NAME): New arg `cpu'.
1551 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
1553 * configure: Regenerated to track ../common/aclocal.m4 changes.
1555 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
1557 * configure: Regenerated to track ../common/aclocal.m4 changes.
1560 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
1562 * acconfig.h: New file.
1563 * configure.in: Reverted change of Apr 24; use sinclude again.
1565 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
1567 * configure: Regenerated to track ../common/aclocal.m4 changes.
1570 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
1572 * configure.in: Don't call sinclude.
1574 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
1576 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
1578 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1580 * mips.igen (ERET): Implement.
1582 * interp.c (decode_coproc): Return sign-extended EPC.
1584 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
1586 * interp.c (signal_exception): Do not ignore Trap.
1587 (signal_exception): On TRAP, restart at exception address.
1588 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
1589 (signal_exception): Update.
1590 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
1591 so that TRAP instructions are caught.
1593 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
1595 * sim-main.h (struct hilo_access, struct hilo_history): Define,
1596 contains HI/LO access history.
1597 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
1598 (HIACCESS, LOACCESS): Delete, replace with
1599 (HIHISTORY, LOHISTORY): New macros.
1600 (CHECKHILO): Delete all, moved to mips.igen
1602 * gencode.c (build_instruction): Do not generate checks for
1603 correct HI/LO register usage.
1605 * interp.c (old_engine_run): Delete checks for correct HI/LO
1608 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
1609 check_mf_cycles): New functions.
1610 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
1611 do_divu, domultx, do_mult, do_multu): Use.
1613 * tx.igen ("madd", "maddu"): Use.
1615 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
1617 * mips.igen (DSRAV): Use function do_dsrav.
1618 (SRAV): Use new function do_srav.
1620 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
1621 (B): Sign extend 11 bit immediate.
1622 (EXT-B*): Shift 16 bit immediate left by 1.
1623 (ADDIU*): Don't sign extend immediate value.
1625 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
1627 * m16run.c (sim_engine_run): Restore CIA after handling an event.
1629 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
1632 * mips.igen (delayslot32, nullify_next_insn): New functions.
1633 (m16.igen): Always include.
1634 (do_*): Add more tracing.
1636 * m16.igen (delayslot16): Add NIA argument, could be called by a
1637 32 bit MIPS16 instruction.
1639 * interp.c (ifetch16): Move function from here.
1640 * sim-main.c (ifetch16): To here.
1642 * sim-main.c (ifetch16, ifetch32): Update to match current
1643 implementations of LH, LW.
1644 (signal_exception): Don't print out incorrect hex value of illegal
1647 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
1649 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
1652 * m16.igen: Implement MIPS16 instructions.
1654 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
1655 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
1656 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
1657 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
1658 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
1659 bodies of corresponding code from 32 bit insn to these. Also used
1660 by MIPS16 versions of functions.
1662 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
1663 (IMEM16): Drop NR argument from macro.
1665 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1667 * Makefile.in (SIM_OBJS): Add sim-main.o.
1669 * sim-main.h (address_translation, load_memory, store_memory,
1670 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
1672 (pr_addr, pr_uword64): Declare.
1673 (sim-main.c): Include when H_REVEALS_MODULE_P.
1675 * interp.c (address_translation, load_memory, store_memory,
1676 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
1678 * sim-main.c: To here. Fix compilation problems.
1680 * configure.in: Enable inlining.
1681 * configure: Re-config.
1683 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
1685 * configure: Regenerated to track ../common/aclocal.m4 changes.
1687 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
1689 * mips.igen: Include tx.igen.
1690 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
1691 * tx.igen: New file, contains MADD and MADDU.
1693 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
1694 the hardwired constant `7'.
1695 (store_memory): Ditto.
1696 (LOADDRMASK): Move definition to sim-main.h.
1698 mips.igen (MTC0): Enable for r3900.
1701 mips.igen (do_load_byte): Delete.
1702 (do_load, do_store, do_load_left, do_load_write, do_store_left,
1703 do_store_right): New functions.
1704 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
1706 configure.in: Let the tx39 use igen again.
1709 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1711 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
1712 not an address sized quantity. Return zero for cache sizes.
1714 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
1716 * mips.igen (r3900): r3900 does not support 64 bit integer
1719 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
1721 * configure.in (mipstx39*-*-*): Use gencode simulator rather
1723 * configure : Rebuild.
1725 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
1727 * configure: Regenerated to track ../common/aclocal.m4 changes.
1729 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1731 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
1733 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
1735 * configure: Regenerated to track ../common/aclocal.m4 changes.
1736 * config.in: Regenerated to track ../common/aclocal.m4 changes.
1738 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
1740 * configure: Regenerated to track ../common/aclocal.m4 changes.
1742 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
1744 * interp.c (Max, Min): Comment out functions. Not yet used.
1746 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
1748 * configure: Regenerated to track ../common/aclocal.m4 changes.
1750 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
1752 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
1753 configurable settings for stand-alone simulator.
1755 * configure.in: Added X11 search, just in case.
1757 * configure: Regenerated.
1759 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
1761 * interp.c (sim_write, sim_read, load_memory, store_memory):
1762 Replace sim_core_*_map with read_map, write_map, exec_map resp.
1764 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
1766 * sim-main.h (GETFCC): Return an unsigned value.
1768 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1770 * mips.igen (DIV): Fix check for -1 / MIN_INT.
1771 (DADD): Result destination is RD not RT.
1773 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1775 * sim-main.h (HIACCESS, LOACCESS): Always define.
1777 * mdmx.igen (Maxi, Mini): Rename Max, Min.
1779 * interp.c (sim_info): Delete.
1781 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
1783 * interp.c (DECLARE_OPTION_HANDLER): Use it.
1784 (mips_option_handler): New argument `cpu'.
1785 (sim_open): Update call to sim_add_option_table.
1787 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
1789 * mips.igen (CxC1): Add tracing.
1791 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
1793 * sim-main.h (Max, Min): Declare.
1795 * interp.c (Max, Min): New functions.
1797 * mips.igen (BC1): Add tracing.
1799 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
1801 * interp.c Added memory map for stack in vr4100
1803 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
1805 * interp.c (load_memory): Add missing "break"'s.
1807 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
1809 * interp.c (sim_store_register, sim_fetch_register): Pass in
1810 length parameter. Return -1.
1812 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
1814 * interp.c: Added hardware init hook, fixed warnings.
1816 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1818 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
1820 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
1822 * interp.c (ifetch16): New function.
1824 * sim-main.h (IMEM32): Rename IMEM.
1825 (IMEM16_IMMED): Define.
1827 (DELAY_SLOT): Update.
1829 * m16run.c (sim_engine_run): New file.
1831 * m16.igen: All instructions except LB.
1832 (LB): Call do_load_byte.
1833 * mips.igen (do_load_byte): New function.
1834 (LB): Call do_load_byte.
1836 * mips.igen: Move spec for insn bit size and high bit from here.
1837 * Makefile.in (tmp-igen, tmp-m16): To here.
1839 * m16.dc: New file, decode mips16 instructions.
1841 * Makefile.in (SIM_NO_ALL): Define.
1842 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
1844 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
1846 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
1847 point unit to 32 bit registers.
1848 * configure: Re-generate.
1850 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1852 * configure.in (sim_use_gen): Make IGEN the default simulator
1853 generator for generic 32 and 64 bit mips targets.
1854 * configure: Re-generate.
1856 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1858 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
1861 * interp.c (sim_fetch_register, sim_store_register): Read/write
1862 FGR from correct location.
1863 (sim_open): Set size of FGR's according to
1864 WITH_TARGET_FLOATING_POINT_BITSIZE.
1866 * sim-main.h (FGR): Store floating point registers in a separate
1869 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
1871 * configure: Regenerated to track ../common/aclocal.m4 changes.
1873 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1875 * interp.c (ColdReset): Call PENDING_INVALIDATE.
1877 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
1879 * interp.c (pending_tick): New function. Deliver pending writes.
1881 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
1882 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
1883 it can handle mixed sized quantites and single bits.
1885 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
1887 * interp.c (oengine.h): Do not include when building with IGEN.
1888 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
1889 (sim_info): Ditto for PROCESSOR_64BIT.
1890 (sim_monitor): Replace ut_reg with unsigned_word.
1891 (*): Ditto for t_reg.
1892 (LOADDRMASK): Define.
1893 (sim_open): Remove defunct check that host FP is IEEE compliant,
1894 using software to emulate floating point.
1895 (value_fpr, ...): Always compile, was conditional on HASFPU.
1897 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
1899 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
1902 * interp.c (SD, CPU): Define.
1903 (mips_option_handler): Set flags in each CPU.
1904 (interrupt_event): Assume CPU 0 is the one being iterrupted.
1905 (sim_close): Do not clear STATE, deleted anyway.
1906 (sim_write, sim_read): Assume CPU zero's vm should be used for
1908 (sim_create_inferior): Set the PC for all processors.
1909 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
1911 (mips16_entry): Pass correct nr of args to store_word, load_word.
1912 (ColdReset): Cold reset all cpu's.
1913 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
1914 (sim_monitor, load_memory, store_memory, signal_exception): Use
1915 `CPU' instead of STATE_CPU.
1918 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
1921 * sim-main.h (signal_exception): Add sim_cpu arg.
1922 (SignalException*): Pass both SD and CPU to signal_exception.
1923 * interp.c (signal_exception): Update.
1925 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
1927 (sync_operation, prefetch, cache_op, store_memory, load_memory,
1928 address_translation): Ditto
1929 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
1931 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
1933 * configure: Regenerated to track ../common/aclocal.m4 changes.
1935 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1937 * interp.c (sim_engine_run): Add `nr_cpus' argument.
1939 * mips.igen (model): Map processor names onto BFD name.
1941 * sim-main.h (CPU_CIA): Delete.
1942 (SET_CIA, GET_CIA): Define
1944 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
1946 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
1949 * configure.in (default_endian): Configure a big-endian simulator
1951 * configure: Re-generate.
1953 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
1955 * configure: Regenerated to track ../common/aclocal.m4 changes.
1957 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
1959 * interp.c (sim_monitor): Handle Densan monitor outbyte
1960 and inbyte functions.
1962 1997-12-29 Felix Lee <flee@cygnus.com>
1964 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
1966 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
1968 * Makefile.in (tmp-igen): Arrange for $zero to always be
1969 reset to zero after every instruction.
1971 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
1973 * configure: Regenerated to track ../common/aclocal.m4 changes.
1976 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
1978 * mips.igen (MSUB): Fix to work like MADD.
1979 * gencode.c (MSUB): Similarly.
1981 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
1983 * configure: Regenerated to track ../common/aclocal.m4 changes.
1985 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
1987 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
1989 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1991 * sim-main.h (sim-fpu.h): Include.
1993 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
1994 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
1995 using host independant sim_fpu module.
1997 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
1999 * interp.c (signal_exception): Report internal errors with SIGABRT
2002 * sim-main.h (C0_CONFIG): New register.
2003 (signal.h): No longer include.
2005 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2007 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
2009 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2011 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2013 * mips.igen: Tag vr5000 instructions.
2014 (ANDI): Was missing mipsIV model, fix assembler syntax.
2015 (do_c_cond_fmt): New function.
2016 (C.cond.fmt): Handle mips I-III which do not support CC field
2018 (bc1): Handle mips IV which do not have a delaed FCC separatly.
2019 (SDR): Mask paddr when BigEndianMem, not the converse as specified
2021 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
2022 vr5000 which saves LO in a GPR separatly.
2024 * configure.in (enable-sim-igen): For vr5000, select vr5000
2025 specific instructions.
2026 * configure: Re-generate.
2028 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
2030 * Makefile.in (SIM_OBJS): Add sim-fpu module.
2032 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2033 fmt_uninterpreted_64 bit cases to switch. Convert to
2036 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2038 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2039 as specified in IV3.2 spec.
2040 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2042 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2044 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2045 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2046 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2047 PENDING_FILL versions of instructions. Simplify.
2049 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2051 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2053 (MTHI, MFHI): Disable code checking HI-LO.
2055 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2057 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2059 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
2061 * gencode.c (build_mips16_operands): Replace IPC with cia.
2063 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2064 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2066 (UndefinedResult): Replace function with macro/function
2068 (sim_engine_run): Don't save PC in IPC.
2070 * sim-main.h (IPC): Delete.
2073 * interp.c (signal_exception, store_word, load_word,
2074 address_translation, load_memory, store_memory, cache_op,
2075 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2076 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2077 current instruction address - cia - argument.
2078 (sim_read, sim_write): Call address_translation directly.
2079 (sim_engine_run): Rename variable vaddr to cia.
2080 (signal_exception): Pass cia to sim_monitor
2082 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2083 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2084 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2086 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2087 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2090 * interp.c (signal_exception): Pass restart address to
2093 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2094 idecode.o): Add dependency.
2096 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2098 (DELAY_SLOT): Update NIA not PC with branch address.
2099 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2101 * mips.igen: Use CIA not PC in branch calculations.
2102 (illegal): Call SignalException.
2103 (BEQ, ADDIU): Fix assembler.
2105 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2107 * m16.igen (JALX): Was missing.
2109 * configure.in (enable-sim-igen): New configuration option.
2110 * configure: Re-generate.
2112 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2114 * interp.c (load_memory, store_memory): Delete parameter RAW.
2115 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2116 bypassing {load,store}_memory.
2118 * sim-main.h (ByteSwapMem): Delete definition.
2120 * Makefile.in (SIM_OBJS): Add sim-memopt module.
2122 * interp.c (sim_do_command, sim_commands): Delete mips specific
2123 commands. Handled by module sim-options.
2125 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2126 (WITH_MODULO_MEMORY): Define.
2128 * interp.c (sim_info): Delete code printing memory size.
2130 * interp.c (mips_size): Nee sim_size, delete function.
2132 (monitor, monitor_base, monitor_size): Delete global variables.
2133 (sim_open, sim_close): Delete code creating monitor and other
2134 memory regions. Use sim-memopts module, via sim_do_commandf, to
2135 manage memory regions.
2136 (load_memory, store_memory): Use sim-core for memory model.
2138 * interp.c (address_translation): Delete all memory map code
2139 except line forcing 32 bit addresses.
2141 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2143 * sim-main.h (WITH_TRACE): Delete definition. Enables common
2146 * interp.c (logfh, logfile): Delete globals.
2147 (sim_open, sim_close): Delete code opening & closing log file.
2148 (mips_option_handler): Delete -l and -n options.
2149 (OPTION mips_options): Ditto.
2151 * interp.c (OPTION mips_options): Rename option trace to dinero.
2152 (mips_option_handler): Update.
2154 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2156 * interp.c (fetch_str): New function.
2157 (sim_monitor): Rewrite using sim_read & sim_write.
2158 (sim_open): Check magic number.
2159 (sim_open): Write monitor vectors into memory using sim_write.
2160 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2161 (sim_read, sim_write): Simplify - transfer data one byte at a
2163 (load_memory, store_memory): Clarify meaning of parameter RAW.
2165 * sim-main.h (isHOST): Defete definition.
2166 (isTARGET): Mark as depreciated.
2167 (address_translation): Delete parameter HOST.
2169 * interp.c (address_translation): Delete parameter HOST.
2171 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2175 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2176 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2178 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
2180 * mips.igen: Add model filter field to records.
2182 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2184 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
2186 interp.c (sim_engine_run): Do not compile function sim_engine_run
2187 when WITH_IGEN == 1.
2189 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2190 target architecture.
2192 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2193 igen. Replace with configuration variables sim_igen_flags /
2196 * m16.igen: New file. Copy mips16 insns here.
2197 * mips.igen: From here.
2199 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2201 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2203 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2205 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
2207 * gencode.c (build_instruction): Follow sim_write's lead in using
2208 BigEndianMem instead of !ByteSwapMem.
2210 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
2212 * configure.in (sim_gen): Dependent on target, select type of
2213 generator. Always select old style generator.
2215 configure: Re-generate.
2217 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2219 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2220 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2221 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2222 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2223 SIM_@sim_gen@_*, set by autoconf.
2225 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2227 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2229 * interp.c (ColdReset): Remove #ifdef HASFPU, check
2230 CURRENT_FLOATING_POINT instead.
2232 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2233 (address_translation): Raise exception InstructionFetch when
2234 translation fails and isINSTRUCTION.
2236 * interp.c (sim_open, sim_write, sim_monitor, store_word,
2237 sim_engine_run): Change type of of vaddr and paddr to
2239 (address_translation, prefetch, load_memory, store_memory,
2240 cache_op): Change type of vAddr and pAddr to address_word.
2242 * gencode.c (build_instruction): Change type of vaddr and paddr to
2245 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
2247 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2248 macro to obtain result of ALU op.
2250 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2252 * interp.c (sim_info): Call profile_print.
2254 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2256 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2258 * sim-main.h (WITH_PROFILE): Do not define, defined in
2259 common/sim-config.h. Use sim-profile module.
2260 (simPROFILE): Delete defintion.
2262 * interp.c (PROFILE): Delete definition.
2263 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2264 (sim_close): Delete code writing profile histogram.
2265 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2267 (sim_engine_run): Delete code profiling the PC.
2269 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2271 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2273 * interp.c (sim_monitor): Make register pointers of type
2276 * sim-main.h: Make registers of type unsigned_word not
2279 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2281 * interp.c (sync_operation): Rename from SyncOperation, make
2282 global, add SD argument.
2283 (prefetch): Rename from Prefetch, make global, add SD argument.
2284 (decode_coproc): Make global.
2286 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2288 * gencode.c (build_instruction): Generate DecodeCoproc not
2289 decode_coproc calls.
2291 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2292 (SizeFGR): Move to sim-main.h
2293 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2294 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2295 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2297 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2298 FP_RM_TOMINF, GETRM): Move to sim-main.h.
2299 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2300 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2301 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2302 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2304 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2306 (sim-alu.h): Include.
2307 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2308 (sim_cia): Typedef to instruction_address.
2310 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
2312 * Makefile.in (interp.o): Rename generated file engine.c to
2317 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
2319 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2321 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2323 * gencode.c (build_instruction): For "FPSQRT", output correct
2324 number of arguments to Recip.
2326 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
2328 * Makefile.in (interp.o): Depends on sim-main.h
2330 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2332 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2333 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2334 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2335 STATE, DSSTATE): Define
2336 (GPR, FGRIDX, ..): Define.
2338 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2339 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2340 (GPR, FGRIDX, ...): Delete macros.
2342 * interp.c: Update names to match defines from sim-main.h
2344 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
2346 * interp.c (sim_monitor): Add SD argument.
2347 (sim_warning): Delete. Replace calls with calls to
2349 (sim_error): Delete. Replace calls with sim_io_error.
2350 (open_trace, writeout32, writeout16, getnum): Add SD argument.
2351 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2352 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2354 (mips_size): Rename from sim_size. Add SD argument.
2356 * interp.c (simulator): Delete global variable.
2357 (callback): Delete global variable.
2358 (mips_option_handler, sim_open, sim_write, sim_read,
2359 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2360 sim_size,sim_monitor): Use sim_io_* not callback->*.
2361 (sim_open): ZALLOC simulator struct.
2362 (PROFILE): Do not define.
2364 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2366 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2367 support.h with corresponding code.
2369 * sim-main.h (word64, uword64), support.h: Move definition to
2371 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2374 * Makefile.in: Update dependencies
2375 * interp.c: Do not include.
2377 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2379 * interp.c (address_translation, load_memory, store_memory,
2380 cache_op): Rename to from AddressTranslation et.al., make global,
2383 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2386 * interp.c (SignalException): Rename to signal_exception, make
2389 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2391 * sim-main.h (SignalException, SignalExceptionInterrupt,
2392 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2393 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2394 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2397 * interp.c, support.h: Use.
2399 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2401 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2402 to value_fpr / store_fpr. Add SD argument.
2403 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2404 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2406 * sim-main.h (ValueFPR, StoreFPR): Define.
2408 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
2410 * interp.c (sim_engine_run): Check consistency between configure
2411 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2414 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2415 (mips_fpu): Configure WITH_FLOATING_POINT.
2416 (mips_endian): Configure WITH_TARGET_ENDIAN.
2417 * configure: Update.
2419 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2421 * configure: Regenerated to track ../common/aclocal.m4 changes.
2423 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
2425 * configure: Regenerated.
2427 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
2429 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2431 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2433 * gencode.c (print_igen_insn_models): Assume certain architectures
2434 include all mips* instructions.
2435 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2438 * Makefile.in (tmp.igen): Add target. Generate igen input from
2441 * gencode.c (FEATURE_IGEN): Define.
2442 (main): Add --igen option. Generate output in igen format.
2443 (process_instructions): Format output according to igen option.
2444 (print_igen_insn_format): New function.
2445 (print_igen_insn_models): New function.
2446 (process_instructions): Only issue warnings and ignore
2447 instructions when no FEATURE_IGEN.
2449 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2451 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2454 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2456 * configure: Regenerated to track ../common/aclocal.m4 changes.
2458 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
2460 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2461 SIM_RESERVED_BITS): Delete, moved to common.
2462 (SIM_EXTRA_CFLAGS): Update.
2464 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2466 * configure.in: Configure non-strict memory alignment.
2467 * configure: Regenerated to track ../common/aclocal.m4 changes.
2469 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
2471 * configure: Regenerated to track ../common/aclocal.m4 changes.
2473 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
2475 * gencode.c (SDBBP,DERET): Added (3900) insns.
2476 (RFE): Turn on for 3900.
2477 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2478 (dsstate): Made global.
2479 (SUBTARGET_R3900): Added.
2480 (CANCELDELAYSLOT): New.
2481 (SignalException): Ignore SystemCall rather than ignore and
2482 terminate. Add DebugBreakPoint handling.
2483 (decode_coproc): New insns RFE, DERET; and new registers Debug
2484 and DEPC protected by SUBTARGET_R3900.
2485 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2487 * Makefile.in,configure.in: Add mips subtarget option.
2488 * configure: Update.
2490 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
2492 * gencode.c: Add r3900 (tx39).
2495 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
2497 * gencode.c (build_instruction): Don't need to subtract 4 for
2500 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
2502 * interp.c: Correct some HASFPU problems.
2504 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
2506 * configure: Regenerated to track ../common/aclocal.m4 changes.
2508 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2510 * interp.c (mips_options): Fix samples option short form, should
2513 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
2515 * interp.c (sim_info): Enable info code. Was just returning.
2517 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2519 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
2522 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
2524 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
2526 (build_instruction): Ditto for LL.
2528 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
2530 * configure: Regenerated to track ../common/aclocal.m4 changes.
2532 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2534 * configure: Regenerated to track ../common/aclocal.m4 changes.
2537 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
2539 * interp.c (sim_open): Add call to sim_analyze_program, update
2542 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
2544 * interp.c (sim_kill): Delete.
2545 (sim_create_inferior): Add ABFD argument. Set PC from same.
2546 (sim_load): Move code initializing trap handlers from here.
2547 (sim_open): To here.
2548 (sim_load): Delete, use sim-hload.c.
2550 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
2552 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2554 * configure: Regenerated to track ../common/aclocal.m4 changes.
2557 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2559 * interp.c (sim_open): Add ABFD argument.
2560 (sim_load): Move call to sim_config from here.
2561 (sim_open): To here. Check return status.
2563 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
2565 * gencode.c (build_instruction): Two arg MADD should
2566 not assign result to $0.
2568 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
2570 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
2571 * sim/mips/configure.in: Regenerate.
2573 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
2575 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
2576 signed8, unsigned8 et.al. types.
2578 * interp.c (SUB_REG_FETCH): Handle both little and big endian
2579 hosts when selecting subreg.
2581 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
2583 * interp.c (sim_engine_run): Reset the ZERO register to zero
2584 regardless of FEATURE_WARN_ZERO.
2585 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
2587 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2589 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
2590 (SignalException): For BreakPoints ignore any mode bits and just
2592 (SignalException): Always set the CAUSE register.
2594 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
2596 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
2597 exception has been taken.
2599 * interp.c: Implement the ERET and mt/f sr instructions.
2601 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
2603 * interp.c (SignalException): Don't bother restarting an
2606 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2608 * interp.c (SignalException): Really take an interrupt.
2609 (interrupt_event): Only deliver interrupts when enabled.
2611 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2613 * interp.c (sim_info): Only print info when verbose.
2614 (sim_info) Use sim_io_printf for output.
2616 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2618 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
2621 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2623 * interp.c (sim_do_command): Check for common commands if a
2624 simulator specific command fails.
2626 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
2628 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
2629 and simBE when DEBUG is defined.
2631 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
2633 * interp.c (interrupt_event): New function. Pass exception event
2634 onto exception handler.
2636 * configure.in: Check for stdlib.h.
2637 * configure: Regenerate.
2639 * gencode.c (build_instruction): Add UNUSED attribute to tempS
2640 variable declaration.
2641 (build_instruction): Initialize memval1.
2642 (build_instruction): Add UNUSED attribute to byte, bigend,
2644 (build_operands): Ditto.
2646 * interp.c: Fix GCC warnings.
2647 (sim_get_quit_code): Delete.
2649 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
2650 * Makefile.in: Ditto.
2651 * configure: Re-generate.
2653 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
2655 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2657 * interp.c (mips_option_handler): New function parse argumes using
2659 (myname): Replace with STATE_MY_NAME.
2660 (sim_open): Delete check for host endianness - performed by
2662 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
2663 (sim_open): Move much of the initialization from here.
2664 (sim_load): To here. After the image has been loaded and
2666 (sim_open): Move ColdReset from here.
2667 (sim_create_inferior): To here.
2668 (sim_open): Make FP check less dependant on host endianness.
2670 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
2672 * interp.c (sim_set_callbacks): Delete.
2674 * interp.c (membank, membank_base, membank_size): Replace with
2675 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
2676 (sim_open): Remove call to callback->init. gdb/run do this.
2680 * sim-main.h (SIM_HAVE_FLATMEM): Define.
2682 * interp.c (big_endian_p): Delete, replaced by
2683 current_target_byte_order.
2685 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2687 * interp.c (host_read_long, host_read_word, host_swap_word,
2688 host_swap_long): Delete. Using common sim-endian.
2689 (sim_fetch_register, sim_store_register): Use H2T.
2690 (pipeline_ticks): Delete. Handled by sim-events.
2692 (sim_engine_run): Update.
2694 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
2696 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
2698 (SignalException): To here. Signal using sim_engine_halt.
2699 (sim_stop_reason): Delete, moved to common.
2701 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
2703 * interp.c (sim_open): Add callback argument.
2704 (sim_set_callbacks): Delete SIM_DESC argument.
2707 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2709 * Makefile.in (SIM_OBJS): Add common modules.
2711 * interp.c (sim_set_callbacks): Also set SD callback.
2712 (set_endianness, xfer_*, swap_*): Delete.
2713 (host_read_word, host_read_long, host_swap_word, host_swap_long):
2714 Change to functions using sim-endian macros.
2715 (control_c, sim_stop): Delete, use common version.
2716 (simulate): Convert into.
2717 (sim_engine_run): This function.
2718 (sim_resume): Delete.
2720 * interp.c (simulation): New variable - the simulator object.
2721 (sim_kind): Delete global - merged into simulation.
2722 (sim_load): Cleanup. Move PC assignment from here.
2723 (sim_create_inferior): To here.
2725 * sim-main.h: New file.
2726 * interp.c (sim-main.h): Include.
2728 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
2730 * configure: Regenerated to track ../common/aclocal.m4 changes.
2732 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
2734 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
2736 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
2738 * gencode.c (build_instruction): DIV instructions: check
2739 for division by zero and integer overflow before using
2740 host's division operation.
2742 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
2744 * Makefile.in (SIM_OBJS): Add sim-load.o.
2745 * interp.c: #include bfd.h.
2746 (target_byte_order): Delete.
2747 (sim_kind, myname, big_endian_p): New static locals.
2748 (sim_open): Set sim_kind, myname. Move call to set_endianness to
2749 after argument parsing. Recognize -E arg, set endianness accordingly.
2750 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
2751 load file into simulator. Set PC from bfd.
2752 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
2753 (set_endianness): Use big_endian_p instead of target_byte_order.
2755 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
2757 * interp.c (sim_size): Delete prototype - conflicts with
2758 definition in remote-sim.h. Correct definition.
2760 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2762 * configure: Regenerated to track ../common/aclocal.m4 changes.
2765 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
2767 * interp.c (sim_open): New arg `kind'.
2769 * configure: Regenerated to track ../common/aclocal.m4 changes.
2771 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2773 * configure: Regenerated to track ../common/aclocal.m4 changes.
2775 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
2777 * interp.c (sim_open): Set optind to 0 before calling getopt.
2779 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2781 * configure: Regenerated to track ../common/aclocal.m4 changes.
2783 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
2785 * interp.c : Replace uses of pr_addr with pr_uword64
2786 where the bit length is always 64 independent of SIM_ADDR.
2787 (pr_uword64) : added.
2789 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2791 * configure: Re-generate.
2793 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
2795 * configure: Regenerate to track ../common/aclocal.m4 changes.
2797 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
2799 * interp.c (sim_open): New SIM_DESC result. Argument is now
2801 (other sim_*): New SIM_DESC argument.
2803 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
2805 * interp.c: Fix printing of addresses for non-64-bit targets.
2806 (pr_addr): Add function to print address based on size.
2808 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
2810 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
2812 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
2814 * gencode.c (build_mips16_operands): Correct computation of base
2815 address for extended PC relative instruction.
2817 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
2819 * interp.c (mips16_entry): Add support for floating point cases.
2820 (SignalException): Pass floating point cases to mips16_entry.
2821 (ValueFPR): Don't restrict fmt_single and fmt_word to even
2823 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
2825 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
2826 and then set the state to fmt_uninterpreted.
2827 (COP_SW): Temporarily set the state to fmt_word while calling
2830 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
2832 * gencode.c (build_instruction): The high order may be set in the
2833 comparison flags at any ISA level, not just ISA 4.
2835 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
2837 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
2838 COMMON_{PRE,POST}_CONFIG_FRAG instead.
2839 * configure.in: sinclude ../common/aclocal.m4.
2840 * configure: Regenerated.
2842 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
2844 * configure: Rebuild after change to aclocal.m4.
2846 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
2848 * configure configure.in Makefile.in: Update to new configure
2849 scheme which is more compatible with WinGDB builds.
2850 * configure.in: Improve comment on how to run autoconf.
2851 * configure: Re-run autoconf to get new ../common/aclocal.m4.
2852 * Makefile.in: Use autoconf substitution to install common
2855 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
2857 * gencode.c (build_instruction): Use BigEndianCPU instead of
2860 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
2862 * interp.c (sim_monitor): Make output to stdout visible in
2863 wingdb's I/O log window.
2865 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
2867 * support.h: Undo previous change to SIGTRAP
2870 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
2872 * interp.c (store_word, load_word): New static functions.
2873 (mips16_entry): New static function.
2874 (SignalException): Look for mips16 entry and exit instructions.
2875 (simulate): Use the correct index when setting fpr_state after
2876 doing a pending move.
2878 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
2880 * interp.c: Fix byte-swapping code throughout to work on
2881 both little- and big-endian hosts.
2883 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
2885 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
2886 with gdb/config/i386/xm-windows.h.
2888 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
2890 * gencode.c (build_instruction): Work around MSVC++ code gen bug
2891 that messes up arithmetic shifts.
2893 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
2895 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
2896 SIGTRAP and SIGQUIT for _WIN32.
2898 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
2900 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
2901 force a 64 bit multiplication.
2902 (build_instruction) [OR]: In mips16 mode, don't do anything if the
2903 destination register is 0, since that is the default mips16 nop
2906 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
2908 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
2909 (build_endian_shift): Don't check proc64.
2910 (build_instruction): Always set memval to uword64. Cast op2 to
2911 uword64 when shifting it left in memory instructions. Always use
2912 the same code for stores--don't special case proc64.
2914 * gencode.c (build_mips16_operands): Fix base PC value for PC
2916 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
2918 * interp.c (simJALDELAYSLOT): Define.
2919 (JALDELAYSLOT): Define.
2920 (INDELAYSLOT, INJALDELAYSLOT): Define.
2921 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
2923 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
2925 * interp.c (sim_open): add flush_cache as a PMON routine
2926 (sim_monitor): handle flush_cache by ignoring it
2928 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
2930 * gencode.c (build_instruction): Use !ByteSwapMem instead of
2932 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
2933 (BigEndianMem): Rename to ByteSwapMem and change sense.
2934 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
2935 BigEndianMem references to !ByteSwapMem.
2936 (set_endianness): New function, with prototype.
2937 (sim_open): Call set_endianness.
2938 (sim_info): Use simBE instead of BigEndianMem.
2939 (xfer_direct_word, xfer_direct_long, swap_direct_word,
2940 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
2941 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
2942 ifdefs, keeping the prototype declaration.
2943 (swap_word): Rewrite correctly.
2944 (ColdReset): Delete references to CONFIG. Delete endianness related
2945 code; moved to set_endianness.
2947 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
2949 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
2950 * interp.c (CHECKHILO): Define away.
2951 (simSIGINT): New macro.
2952 (membank_size): Increase from 1MB to 2MB.
2953 (control_c): New function.
2954 (sim_resume): Rename parameter signal to signal_number. Add local
2955 variable prev. Call signal before and after simulate.
2956 (sim_stop_reason): Add simSIGINT support.
2957 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
2959 (sim_warning): Delete call to SignalException. Do call printf_filtered
2961 (AddressTranslation): Add #ifdef DEBUG around debugging message and
2962 a call to sim_warning.
2964 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
2966 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
2967 16 bit instructions.
2969 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
2971 Add support for mips16 (16 bit MIPS implementation):
2972 * gencode.c (inst_type): Add mips16 instruction encoding types.
2973 (GETDATASIZEINSN): Define.
2974 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
2975 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
2977 (MIPS16_DECODE): New table, for mips16 instructions.
2978 (bitmap_val): New static function.
2979 (struct mips16_op): Define.
2980 (mips16_op_table): New table, for mips16 operands.
2981 (build_mips16_operands): New static function.
2982 (process_instructions): If PC is odd, decode a mips16
2983 instruction. Break out instruction handling into new
2984 build_instruction function.
2985 (build_instruction): New static function, broken out of
2986 process_instructions. Check modifiers rather than flags for SHIFT
2987 bit count and m[ft]{hi,lo} direction.
2988 (usage): Pass program name to fprintf.
2989 (main): Remove unused variable this_option_optind. Change
2990 ``*loptarg++'' to ``loptarg++''.
2991 (my_strtoul): Parenthesize && within ||.
2992 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
2993 (simulate): If PC is odd, fetch a 16 bit instruction, and
2994 increment PC by 2 rather than 4.
2995 * configure.in: Add case for mips16*-*-*.
2996 * configure: Rebuild.
2998 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
3000 * interp.c: Allow -t to enable tracing in standalone simulator.
3001 Fix garbage output in trace file and error messages.
3003 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
3005 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3006 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3007 * configure.in: Simplify using macros in ../common/aclocal.m4.
3008 * configure: Regenerated.
3009 * tconfig.in: New file.
3011 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
3013 * interp.c: Fix bugs in 64-bit port.
3014 Use ansi function declarations for msvc compiler.
3015 Initialize and test file pointer in trace code.
3016 Prevent duplicate definition of LAST_EMED_REGNUM.
3018 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
3020 * interp.c (xfer_big_long): Prevent unwanted sign extension.
3022 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
3024 * interp.c (SignalException): Check for explicit terminating
3026 * gencode.c: Pass instruction value through SignalException()
3027 calls for Trap, Breakpoint and Syscall.
3029 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3031 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3032 only used on those hosts that provide it.
3033 * configure.in: Add sqrt() to list of functions to be checked for.
3034 * config.in: Re-generated.
3035 * configure: Re-generated.
3037 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
3039 * gencode.c (process_instructions): Call build_endian_shift when
3040 expanding STORE RIGHT, to fix swr.
3041 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3042 clear the high bits.
3043 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3044 Fix float to int conversions to produce signed values.
3046 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
3048 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3049 (process_instructions): Correct handling of nor instruction.
3050 Correct shift count for 32 bit shift instructions. Correct sign
3051 extension for arithmetic shifts to not shift the number of bits in
3052 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
3053 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
3055 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3056 It's OK to have a mult follow a mult. What's not OK is to have a
3057 mult follow an mfhi.
3058 (Convert): Comment out incorrect rounding code.
3060 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
3062 * interp.c (sim_monitor): Improved monitor printf
3063 simulation. Tidied up simulator warnings, and added "--log" option
3064 for directing warning message output.
3065 * gencode.c: Use sim_warning() rather than WARNING macro.
3067 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
3069 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3070 getopt1.o, rather than on gencode.c. Link objects together.
3071 Don't link against -liberty.
3072 (gencode.o, getopt.o, getopt1.o): New targets.
3073 * gencode.c: Include <ctype.h> and "ansidecl.h".
3074 (AND): Undefine after including "ansidecl.h".
3075 (ULONG_MAX): Define if not defined.
3076 (OP_*): Don't define macros; now defined in opcode/mips.h.
3077 (main): Call my_strtoul rather than strtoul.
3078 (my_strtoul): New static function.
3080 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
3082 * gencode.c (process_instructions): Generate word64 and uword64
3083 instead of `long long' and `unsigned long long' data types.
3084 * interp.c: #include sysdep.h to get signals, and define default
3086 * (Convert): Work around for Visual-C++ compiler bug with type
3088 * support.h: Make things compile under Visual-C++ by using
3089 __int64 instead of `long long'. Change many refs to long long
3090 into word64/uword64 typedefs.
3092 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
3094 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3095 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3097 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3098 (AC_PROG_INSTALL): Added.
3099 (AC_PROG_CC): Moved to before configure.host call.
3100 * configure: Rebuilt.
3102 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
3104 * configure.in: Define @SIMCONF@ depending on mips target.
3105 * configure: Rebuild.
3106 * Makefile.in (run): Add @SIMCONF@ to control simulator
3108 * gencode.c: Change LOADDRMASK to 64bit memory model only.
3109 * interp.c: Remove some debugging, provide more detailed error
3110 messages, update memory accesses to use LOADDRMASK.
3112 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
3114 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3115 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
3117 * configure: Rebuild.
3118 * config.in: New file, generated by autoheader.
3119 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
3120 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
3121 HAVE_ANINT and HAVE_AINT, as appropriate.
3122 * Makefile.in (run): Use @LIBS@ rather than -lm.
3123 (interp.o): Depend upon config.h.
3124 (Makefile): Just rebuild Makefile.
3125 (clean): Remove stamp-h.
3126 (mostlyclean): Make the same as clean, not as distclean.
3127 (config.h, stamp-h): New targets.
3129 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3131 * interp.c (ColdReset): Fix boolean test. Make all simulator
3134 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
3136 * interp.c (xfer_direct_word, xfer_direct_long,
3137 swap_direct_word, swap_direct_long, xfer_big_word,
3138 xfer_big_long, xfer_little_word, xfer_little_long,
3139 swap_word,swap_long): Added.
3140 * interp.c (ColdReset): Provide function indirection to
3141 host<->simulated_target transfer routines.
3142 * interp.c (sim_store_register, sim_fetch_register): Updated to
3143 make use of indirected transfer routines.
3145 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
3147 * gencode.c (process_instructions): Ensure FP ABS instruction
3149 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3150 system call support.
3152 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
3154 * interp.c (sim_do_command): Complain if callback structure not
3157 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
3159 * interp.c (Convert): Provide round-to-nearest and round-to-zero
3160 support for Sun hosts.
3161 * Makefile.in (gencode): Ensure the host compiler and libraries
3162 used for cross-hosted build.
3164 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
3166 * interp.c, gencode.c: Some more (TODO) tidying.
3168 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
3170 * gencode.c, interp.c: Replaced explicit long long references with
3171 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3172 * support.h (SET64LO, SET64HI): Macros added.
3174 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
3176 * configure: Regenerate with autoconf 2.7.
3178 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
3180 * interp.c (LoadMemory): Enclose text following #endif in /* */.
3181 * support.h: Remove superfluous "1" from #if.
3182 * support.h (CHECKSIM): Remove stray 'a' at end of line.
3184 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
3186 * interp.c (StoreFPR): Control UndefinedResult() call on
3187 WARN_RESULT manifest.
3189 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
3191 * gencode.c: Tidied instruction decoding, and added FP instruction
3194 * interp.c: Added dineroIII, and BSD profiling support. Also
3195 run-time FP handling.
3197 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
3199 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3200 gencode.c, interp.c, support.h: created.