1 2021-06-18 Mike Frysinger <vapier@gentoo.org>
3 * interp.c: Include sim-signal.h.
5 2021-06-17 Mike Frysinger <vapier@gentoo.org>
7 * configure.ac: Delete SIM_AC_OPTION_ENDIAN call.
8 * aclocal.m4, configure: Regenerate.
10 2021-06-16 Mike Frysinger <vapier@gentoo.org>
12 * interp.c (dotrace): Make comment const.
13 * sim-main.h (dotrace): Likewise. Add ATTRIBUTE_PRINTF.
15 2021-06-16 Mike Frysinger <vapier@gentoo.org>
17 * interp.c (sim_monitor): Change ap type to address_word*.
18 (_P, P): New macros. Rewrite dynamic printf logic to use these.
20 2021-06-16 Mike Frysinger <vapier@gentoo.org>
22 * dv-tx3904sio.c (tx3904sio_fifo_push): Change next_buf to
25 2021-06-16 Mike Frysinger <vapier@gentoo.org>
27 * dv-tx3904irc.c (tx3904irc_io_write_buffer): Initialize
30 2021-06-16 Mike Frysinger <vapier@gentoo.org>
32 * configure: Regenerate.
34 2021-06-16 Mike Frysinger <vapier@gentoo.org>
36 * interp.c (sim_open): Change %lx to %x and PRIx macros.
38 2021-06-16 Mike Frysinger <vapier@gentoo.org>
40 * configure: Regenerate.
43 2021-06-15 Mike Frysinger <vapier@gentoo.org>
45 * config.in, configure: Regenerate.
47 2021-06-12 Mike Frysinger <vapier@gentoo.org>
49 * configure.ac: Delete call to SIM_AC_OPTION_ALIGNMENT.
51 2021-06-12 Mike Frysinger <vapier@gentoo.org>
53 * aclocal.m4, config.in, configure: Regenerate.
55 2021-06-12 Mike Frysinger <vapier@gentoo.org>
57 * configure.ac: Delete call to AC_CHECK_FUNCS.
58 * config.in, configure: Regenerate.
60 2021-06-08 Mike Frysinger <vapier@gentoo.org>
62 * Makefile.in: Replace $(IGEN) with $(IGEN_RUN) and ../igen/igen
65 2021-05-29 Mike Frysinger <vapier@gentoo.org>
67 * interp.c [!HAVE_DV_SOCKSER] (sockser_addr): Define to NULL.
69 2021-05-22 Faraz Shahbazker <fshahbazker@wavecomp.com>
71 * interp.c (sim_open): Add shadow mappings from 32-bit
72 address space to 64-bit sign-extended address space.
74 2021-05-22 Faraz Shahbazker <fshahbazker@wavecomp.com>
76 * interp.c (sim_create_inferior): Only truncate sign extension
77 bits for 32-bit target models.
79 2021-05-17 Mike Frysinger <vapier@gentoo.org>
81 * sim-main.h (SIM_HAVE_COMMON_SIM_STATE): Delete.
83 2021-05-17 Mike Frysinger <vapier@gentoo.org>
85 * interp.c (sim_open): Switch to sim_state_alloc_extra.
86 * micromips.igen: Change SD to mips_sim_state.
87 * micromipsrun.c (sim_engine_run): Likewise.
88 * sim-main.h (SIM_HAVE_COMMON_SIM_STATE): Define.
89 (watch_options_install): Delete.
90 (struct swatch): Delete.
91 (struct sim_state): Delete.
92 (struct mips_sim_state): New struct.
93 (MIPS_SIM_STATE): Define.
95 2021-05-16 Mike Frysinger <vapier@gentoo.org>
97 * interp.c: Replace config.h include with defs.h.
98 * cp1.c, dsp.c, dv-tx3904cpu.c, dv-tx3904irc.c, dv-tx3904sio.c,
99 dv-tx3904tmr.c, m16run.c, mdmx.c, micromipsrun.c, sim-main.c:
102 2021-05-16 Mike Frysinger <vapier@gentoo.org>
104 * config.in, configure: Regenerate.
106 2021-05-14 Mike Frysinger <vapier@gentoo.org>
108 * interp.c: Update include path.
110 2021-05-04 Mike Frysinger <vapier@gentoo.org>
112 * dv-tx3904sio.c: Include stdlib.h.
114 2021-05-04 Mike Frysinger <vapier@gentoo.org>
116 * configure.ac (hw_extra_devices): Inline contents into
117 SIM_AC_OPTION_HARDWARE and delete.
118 * configure: Regenerate.
120 2021-05-04 Mike Frysinger <vapier@gentoo.org>
122 * Makefile.in (SIM_IGEN_OBJ): Change @mips_igen_engine@ to engine.o.
123 (MIPS_EXTRA_LIB, SIM_EXTRA_LIBS): Delete.
124 * configure.ac (mips_igen_engine, mips_extra_libs): Delete.
125 * configure: Regenerate.
127 2021-05-04 Mike Frysinger <vapier@gentoo.org>
129 * mdmx.c (qh_acc): Change 2nd AccAddAQH to AccAddLQH.
131 2021-05-04 Mike Frysinger <vapier@gentoo.org>
133 * configure: Regenerate.
135 2021-05-01 Mike Frysinger <vapier@gentoo.org>
137 * cp1.c (store_fcr): Mark static.
139 2021-05-01 Mike Frysinger <vapier@gentoo.org>
141 * config.in, configure: Regenerate.
143 2021-04-23 Mike Frysinger <vapier@gentoo.org>
145 * configure.ac (hw_enabled): Delete.
146 (SIM_AC_OPTION_HARDWARE): Delete first two args.
147 * configure: Regenerate.
149 2021-04-22 Tom Tromey <tom@tromey.com>
151 * configure, config.in: Rebuild.
153 2021-04-22 Tom Tromey <tom@tromey.com>
155 * Makefile.in (interp.o, m16run.o, micromipsrun.o, multi-run.o):
157 (SIM_EXTRA_DEPS): New variable.
159 2021-04-22 Tom Tromey <tom@tromey.com>
161 * configure: Rebuild.
163 2021-04-21 Mike Frysinger <vapier@gentoo.org>
165 * aclocal.m4: Regenerate.
167 2021-04-21 Simon Marchi <simon.marchi@polymtl.ca>
169 * configure: Regenerate.
171 2021-04-18 Mike Frysinger <vapier@gentoo.org>
173 * configure: Regenerate.
175 2021-04-12 Mike Frysinger <vapier@gentoo.org>
177 * interp.c (sim_open): Delete 3rd arg to sim_cpu_alloc_all.
179 2021-04-08 Simon Marchi <simon.marchi@polymtl.ca>
181 * Makefile.in: Set ASAN_OPTIONS when running igen.
183 2021-04-04 Steve Ellcey <sellcey@mips.com>
184 Faraz Shahbazker <fshahbazker@wavecomp.com>
186 * interp.c (sim_monitor): Add switch entries for unlink (13),
187 lseek (14), and stat (15).
189 2021-04-02 Mike Frysinger <vapier@gentoo.org>
191 * Makefile.in (../igen/igen): Delete rule.
192 (tmp-igen, tmp-m16, tmp-micromips): Delete ../igen make.
194 2021-04-02 Mike Frysinger <vapier@gentoo.org>
196 * aclocal.m4, configure: Regenerate.
198 2021-02-28 Mike Frysinger <vapier@gentoo.org>
200 * configure: Regenerate.
202 2021-02-27 Mike Frysinger <vapier@gentoo.org>
204 * Makefile.in (SIM_EXTRA_ALL): Delete.
207 2021-02-21 Mike Frysinger <vapier@gentoo.org>
209 * configure.ac (AC_CONFIG_MACRO_DIRS): Replace common with m4.
210 * aclocal.m4, configure: Regenerate.
212 2021-02-13 Mike Frysinger <vapier@gentoo.org>
214 * configure.ac: Replace sinclude with AC_CONFIG_MACRO_DIRS.
215 * aclocal.m4, configure: Regenerate.
217 2021-02-06 Mike Frysinger <vapier@gentoo.org>
219 * interp.c (sim_open): Delete call to STATE_WATCHPOINTS.
221 2021-02-06 Mike Frysinger <vapier@gentoo.org>
223 * configure: Regenerate.
225 2021-01-30 Mike Frysinger <vapier@gentoo.org>
227 * interp.c (sim_open): Delete STATE_WATCHPOINTS (sd)->sizeof_pc.
229 2021-01-11 Mike Frysinger <vapier@gentoo.org>
231 * config.in, configure: Regenerate.
232 * interp.c: Delete HAVE_STRING_H, HAVE_STRINGS_H, HAVE_STDLIB_H,
233 and strings.h include.
235 2021-01-09 Mike Frysinger <vapier@gentoo.org>
237 * configure: Regenerate.
239 2021-01-09 Mike Frysinger <vapier@gentoo.org>
241 * configure.ac (SIM_AC_OPTION_WARNINGS): Pass "no".
242 * configure: Regenerate.
244 2021-01-08 Mike Frysinger <vapier@gentoo.org>
246 * configure: Regenerate.
248 2021-01-04 Mike Frysinger <vapier@gentoo.org>
250 * configure: Regenerate.
252 2020-12-31 Pavel I. Kryukov <kryukov@frtk.ru> (tiny change)
254 * sim-main.c: Include <stdlib.h>.
256 2020-12-14 Pavel I. Kryukov <kryukov@frtk.ru> (tiny change)
258 * cp1.c: Include <stdlib.h>.
260 2020-07-29 Simon Marchi <simon.marchi@efficios.com>
262 * configure: Re-generate.
264 2017-09-06 John Baldwin <jhb@FreeBSD.org>
266 * configure: Regenerate.
268 2016-11-11 Mike Frysinger <vapier@gentoo.org>
271 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Define CPU to cpu
274 2016-11-11 Mike Frysinger <vapier@gentoo.org>
277 * mips.igen (check_u64): Enable for `r3900'.
279 2016-02-05 Mike Frysinger <vapier@gentoo.org>
281 * configure.ac (sim_engine_run): Change sd->base.prog_bfd to
283 * configure: Regenerate.
285 2016-01-18 Andrew Bennett <andrew.bennett@imgtec.com>
286 Maciej W. Rozycki <macro@imgtec.com>
289 * micromips.igen (delayslot_micromips): Enable for `micromips32',
290 `micromips64' and `micromipsdsp' only.
291 (process_isa_mode): Enable for `micromips32' and `micromips64' only.
292 (do_micromips_jalr, do_micromips_jal): Likewise.
293 (compute_movep_src_reg): Likewise.
294 (compute_andi16_imm): Likewise.
295 (convert_fmt_micromips): Likewise.
296 (convert_fmt_micromips_cvt_d): Likewise.
297 (convert_fmt_micromips_cvt_s): Likewise.
298 (FMT_MICROMIPS): Likewise.
299 (FMT_MICROMIPS_CVT_D): Likewise.
300 (FMT_MICROMIPS_CVT_S): Likewise.
302 2016-01-12 Mike Frysinger <vapier@gentoo.org>
304 * interp.c: Include elf-bfd.h.
305 (sim_create_inferior): Truncate pc to 32-bits when EI_CLASS is
308 2016-01-10 Mike Frysinger <vapier@gentoo.org>
310 * config.in, configure: Regenerate.
312 2016-01-10 Mike Frysinger <vapier@gentoo.org>
314 * configure: Regenerate.
316 2016-01-10 Mike Frysinger <vapier@gentoo.org>
318 * configure: Regenerate.
320 2016-01-10 Mike Frysinger <vapier@gentoo.org>
322 * configure: Regenerate.
324 2016-01-10 Mike Frysinger <vapier@gentoo.org>
326 * configure: Regenerate.
328 2016-01-10 Mike Frysinger <vapier@gentoo.org>
330 * configure.ac (SIM_AC_OPTION_SMP): Delete call.
331 * configure: Regenerate.
333 2016-01-10 Mike Frysinger <vapier@gentoo.org>
335 * configure.ac (SIM_AC_OPTION_INLINE): Delete call.
336 * configure: Regenerate.
338 2016-01-10 Mike Frysinger <vapier@gentoo.org>
340 * configure: Regenerate.
342 2016-01-10 Mike Frysinger <vapier@gentoo.org>
344 * configure: Regenerate.
346 2016-01-09 Mike Frysinger <vapier@gentoo.org>
348 * config.in, configure: Regenerate.
350 2016-01-06 Mike Frysinger <vapier@gentoo.org>
352 * interp.c (sim_open): Mark argv const.
353 (sim_create_inferior): Mark argv and env const.
355 2016-01-04 Mike Frysinger <vapier@gentoo.org>
357 * configure: Regenerate.
359 2016-01-03 Mike Frysinger <vapier@gentoo.org>
361 * interp.c (sim_open): Update sim_parse_args comment.
363 2016-01-03 Mike Frysinger <vapier@gentoo.org>
365 * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
366 * configure: Regenerate.
368 2016-01-02 Mike Frysinger <vapier@gentoo.org>
370 * configure.ac (mips_endian): Change LITTLE_ENDIAN to LITTLE.
371 (default_endian): Likewise. Change BIG_ENDIAN to BIG.
372 * configure: Regenerate.
373 * sim-main.h (BigEndianMem): Change BIG_ENDIAN to BFD_ENDIAN_BIG.
375 2016-01-02 Mike Frysinger <vapier@gentoo.org>
377 * dv-tx3904cpu.c (CPU, SD): Delete.
379 2015-12-30 Mike Frysinger <vapier@gentoo.org>
381 * wrapper.c (mips_reg_store, mips_reg_fetch): Define.
382 (sim_open): Call CPU_REG_FETCH/CPU_REG_STORE.
383 (sim_store_register): Rename to ...
384 (mips_reg_store): ... this. Delete local cpu var.
385 Update sim_io_eprintf calls.
386 (sim_fetch_register): Rename to ...
387 (mips_reg_fetch): ... this. Delete local cpu var.
388 Update sim_io_eprintf calls.
390 2015-12-27 Mike Frysinger <vapier@gentoo.org>
392 * Makefile.in (SIM_OBJS): Delete sim-hload.o.
394 2015-12-26 Mike Frysinger <vapier@gentoo.org>
396 * config.in, configure: Regenerate.
398 2015-12-26 Mike Frysinger <vapier@gentoo.org>
400 * interp.c (sim_write, sim_read): Delete.
401 (store_word): Delete call to AddressTranslation and set paddr=vaddr.
402 (load_word): Likewise.
403 * micromips.igen (cache): Likewise.
404 * mips.igen (do_ll, do_lld, do_sc, do_scd, do_suxc1_32, do_swc1,
405 do_swxc1, cache, do_load, do_load_left, do_load_right, do_store,
406 do_store_left, do_store_right, do_load_double, do_store_double):
408 (do_pref): Delete call to AddressTranslation and stub out Prefetch.
409 (do_prefx): Likewise.
410 * sim-main.c (address_translation, prefetch): Delete.
411 (ifetch32, ifetch16): Delete call to AddressTranslation and set
413 * sim-main.h (Uncached, CachedNoncoherent, CachedCoherent, Cached,
414 address_translation, AddressTranslation, prefetch, Prefetch): Delete.
415 (LoadMemory, StoreMemory): Delete CCA arg.
417 2015-12-24 Mike Frysinger <vapier@gentoo.org>
419 * configure.ac (SIM_SUBTARGET): Drop -DTARGET_TX3904=1.
420 * configure: Regenerated.
422 2015-12-24 Mike Frysinger <vapier@gentoo.org>
424 * sim-main.h (SIM_QUIET_NAN_NEGATED): Move from tconfig.h.
427 2015-12-24 Mike Frysinger <vapier@gentoo.org>
429 * tconfig.h (SIM_HANDLES_LMA): Delete.
431 2015-12-24 Mike Frysinger <vapier@gentoo.org>
433 * sim-main.h (WITH_WATCHPOINTS): Delete.
435 2015-12-24 Mike Frysinger <vapier@gentoo.org>
437 * interp.c [SIM_HAVE_FLATMEM] (sim_open): Delete flatmem code.
439 2015-12-24 Mike Frysinger <vapier@gentoo.org>
441 * tconfig.h (SIM_HAVE_SIMCACHE): Delete.
443 2015-12-15 Dominik Vogt <vogt@linux.vnet.ibm.com>
445 * micromips.igen (process_isa_mode): Fix left shift of negative
448 2015-11-17 Mike Frysinger <vapier@gentoo.org>
450 * sim-main.h (WITH_MODULO_MEMORY): Delete.
452 2015-11-15 Mike Frysinger <vapier@gentoo.org>
454 * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
456 2015-11-14 Mike Frysinger <vapier@gentoo.org>
458 * interp.c (sim_close): Rename to ...
459 (mips_sim_close): ... this. Delete calls to sim_module_uninstall and
461 * sim-main.h (mips_sim_close): Declare.
462 (SIM_CLOSE_HOOK): Define.
464 2015-09-25 Andrew Bennett <andrew.bennett@imgtec.com>
465 Ali Lown <ali.lown@imgtec.com>
467 * Makefile.in (tmp-micromips): New rule.
468 (tmp-mach-multi): Add support for micromips.
469 * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
470 that works for both mips64 and micromips64.
471 (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
473 Add build support for micromips.
474 * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
475 do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
476 do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
477 do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
478 do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
479 do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
480 do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
481 do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
482 Refactored instruction code to use these functions.
483 * dsp2.igen: Refactored instruction code to use the new functions.
484 * interp.c (decode_coproc): Refactored to work with any instruction
486 (isa_mode): New variable
487 (RSVD_INSTRUCTION): Changed to 0x00000039.
488 * m16.igen (BREAK16): Refactored instruction to use do_break16.
489 (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
490 * micromips.dc: New file.
491 * micromips.igen: New file.
492 * micromips16.dc: New file.
493 * micromipsdsp.igen: New file.
494 * micromipsrun.c: New file.
495 * mips.igen (do_swc1): Changed to work with any instruction encoding.
496 (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
497 do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo,
498 do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu,
499 do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu,
500 do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub,
501 do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo,
502 do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc,
503 do_scd, do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu,
504 do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt,
505 do_add_fmt, do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1,
506 do_cvt_d_fmt, do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl,
507 do_cvt_s_pu, do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt,
508 do_luxc1_32, do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b,
509 do_mov_fmt, do_movtf, do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt,
510 do_mtc1b, do_mul_fmt, do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps,
511 do_plu_ps, do_pul_ps, do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt,
512 do_prefx, do_sdc1, do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt,
513 do_swc1, do_swxc1, do_trunc_fmt): New functions, refactored from existing
515 Refactored instruction code to use these functions.
516 (RSVD): Changed to use new reserved instruction.
517 (loadstore_ea, not_word_value, unpredictable, check_mt_hilo,
518 check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32,
519 do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double,
520 do_store_double): Added micromips32 and micromips64 models.
521 Added include for micromips.igen and micromipsdsp.igen
522 Add micromips32 and micromips64 models.
523 (DecodeCoproc): Updated to use new macro definition.
524 * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
525 do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
526 do_seb, do_seh do_rdhwr, do_wsbh): New functions.
527 Refactored instruction code to use these functions.
528 * sim-main.h (CP0_operation): New enum.
529 (DecodeCoproc): Updated macro.
530 (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
531 MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16,
532 MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and
533 ISA_MODE_MICROMIPS): New defines.
534 (sim_state): Add isa_mode field.
536 2015-06-23 Mike Frysinger <vapier@gentoo.org>
538 * configure: Regenerate.
540 2015-06-12 Mike Frysinger <vapier@gentoo.org>
542 * configure.ac: Change configure.in to configure.ac.
543 * configure: Regenerate.
545 2015-06-12 Mike Frysinger <vapier@gentoo.org>
547 * configure: Regenerate.
549 2015-06-12 Mike Frysinger <vapier@gentoo.org>
551 * interp.c [TRACE]: Delete.
552 (TRACE): Change to WITH_TRACE_ANY_P.
553 [!WITH_TRACE_ANY_P] (open_trace): Define.
554 (mips_option_handler, open_trace, sim_close, dotrace):
555 Change defined(TRACE) to WITH_TRACE_ANY_P.
556 (sim_open): Delete TRACE ifdef check.
557 * sim-main.c (load_memory): Delete TRACE ifdef check.
558 (store_memory): Likewise.
559 * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
560 [!WITH_TRACE_ANY_P] (dotrace): Define.
562 2015-04-18 Mike Frysinger <vapier@gentoo.org>
564 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
567 2015-04-18 Mike Frysinger <vapier@gentoo.org>
569 * sim-main.h (SIM_CPU): Delete.
571 2015-04-18 Mike Frysinger <vapier@gentoo.org>
573 * sim-main.h (sim_cia): Delete.
575 2015-04-17 Mike Frysinger <vapier@gentoo.org>
577 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
579 * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
580 (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
581 * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
582 CIA_SET to CPU_PC_SET.
583 * sim-main.h (CIA_GET, CIA_SET): Delete.
585 2015-04-15 Mike Frysinger <vapier@gentoo.org>
587 * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
588 * sim-main.h (STATE_CPU): Delete.
590 2015-04-13 Mike Frysinger <vapier@gentoo.org>
592 * configure: Regenerate.
594 2015-04-13 Mike Frysinger <vapier@gentoo.org>
596 * Makefile.in (SIM_OBJS): Add sim-cpu.o.
597 * interp.c (mips_pc_get, mips_pc_set): New functions.
598 (sim_open): Declare new local var i. Call sim_cpu_alloc_all.
599 Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
600 (sim_pc_get): Delete.
601 * sim-main.h (SIM_CPU): Define.
602 (struct sim_state): Change cpu to an array of pointers.
605 2015-04-13 Mike Frysinger <vapier@gentoo.org>
607 * interp.c (mips_option_handler, open_trace, sim_close,
608 sim_write, sim_read, sim_store_register, sim_fetch_register,
609 sim_create_inferior, pr_addr, pr_uword64): Convert old style
611 (sim_open): Convert old style prototype. Change casts with
612 sim_write to unsigned char *.
613 (fetch_str): Change null to unsigned char, and change cast to
615 (sim_monitor): Change c & ch to unsigned char. Change cast to
618 2015-04-12 Mike Frysinger <vapier@gentoo.org>
620 * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
622 2015-04-06 Mike Frysinger <vapier@gentoo.org>
624 * Makefile.in (SIM_OBJS): Delete sim-engine.o.
626 2015-04-01 Mike Frysinger <vapier@gentoo.org>
628 * tconfig.h (SIM_HAVE_PROFILE): Delete.
630 2015-03-31 Mike Frysinger <vapier@gentoo.org>
632 * config.in, configure: Regenerate.
634 2015-03-24 Mike Frysinger <vapier@gentoo.org>
636 * interp.c (sim_pc_get): New function.
638 2015-03-24 Mike Frysinger <vapier@gentoo.org>
640 * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
641 * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
643 2015-03-24 Mike Frysinger <vapier@gentoo.org>
645 * configure: Regenerate.
647 2015-03-23 Mike Frysinger <vapier@gentoo.org>
649 * configure: Regenerate.
651 2015-03-23 Mike Frysinger <vapier@gentoo.org>
653 * configure: Regenerate.
654 * configure.ac (mips_extra_objs): Delete.
655 * Makefile.in (MIPS_EXTRA_OBJS): Delete.
656 (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
658 2015-03-23 Mike Frysinger <vapier@gentoo.org>
660 * configure: Regenerate.
661 * configure.ac: Delete sim_hw checks for dv-sockser.
663 2015-03-16 Mike Frysinger <vapier@gentoo.org>
665 * config.in, configure: Regenerate.
666 * tconfig.in: Rename file ...
667 * tconfig.h: ... here.
669 2015-03-15 Mike Frysinger <vapier@gentoo.org>
671 * tconfig.in: Delete includes.
672 [HAVE_DV_SOCKSER]: Delete.
674 2015-03-14 Mike Frysinger <vapier@gentoo.org>
676 * Makefile.in (SIM_RUN_OBJS): Delete.
678 2015-03-14 Mike Frysinger <vapier@gentoo.org>
680 * configure.ac (AC_CHECK_HEADERS): Delete.
681 * aclocal.m4, configure: Regenerate.
683 2014-08-19 Alan Modra <amodra@gmail.com>
685 * configure: Regenerate.
687 2014-08-15 Roland McGrath <mcgrathr@google.com>
689 * configure: Regenerate.
690 * config.in: Regenerate.
692 2014-03-04 Mike Frysinger <vapier@gentoo.org>
694 * configure: Regenerate.
696 2013-09-23 Alan Modra <amodra@gmail.com>
698 * configure: Regenerate.
700 2013-06-03 Mike Frysinger <vapier@gentoo.org>
702 * aclocal.m4, configure: Regenerate.
704 2013-05-10 Freddie Chopin <freddie_chopin@op.pl>
706 * configure: Rebuild.
708 2013-03-26 Mike Frysinger <vapier@gentoo.org>
710 * configure: Regenerate.
712 2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
714 * configure.ac: Address use of dv-sockser.o.
715 * tconfig.in: Conditionalize use of dv_sockser_install.
716 * configure: Regenerated.
717 * config.in: Regenerated.
719 2012-10-04 Chao-ying Fu <fu@mips.com>
720 Steve Ellcey <sellcey@mips.com>
722 * mips/mips3264r2.igen (rdhwr): New.
724 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
726 * configure.ac: Always link against dv-sockser.o.
727 * configure: Regenerate.
729 2012-06-15 Joel Brobecker <brobecker@adacore.com>
731 * config.in, configure: Regenerate.
733 2012-05-18 Nick Clifton <nickc@redhat.com>
736 * interp.c: Include config.h before system header files.
738 2012-03-24 Mike Frysinger <vapier@gentoo.org>
740 * aclocal.m4, config.in, configure: Regenerate.
742 2011-12-03 Mike Frysinger <vapier@gentoo.org>
744 * aclocal.m4: New file.
745 * configure: Regenerate.
747 2011-10-19 Mike Frysinger <vapier@gentoo.org>
749 * configure: Regenerate after common/acinclude.m4 update.
751 2011-10-17 Mike Frysinger <vapier@gentoo.org>
753 * configure.ac: Change include to common/acinclude.m4.
755 2011-10-17 Mike Frysinger <vapier@gentoo.org>
757 * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
758 call. Replace common.m4 include with SIM_AC_COMMON.
759 * configure: Regenerate.
761 2011-07-08 Hans-Peter Nilsson <hp@axis.com>
763 * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
765 (tmp-mach-multi): Exit early when igen fails.
767 2011-07-05 Mike Frysinger <vapier@gentoo.org>
769 * interp.c (sim_do_command): Delete.
771 2011-02-14 Mike Frysinger <vapier@gentoo.org>
773 * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
774 (tx3904sio_fifo_reset): Likewise.
775 * interp.c (sim_monitor): Likewise.
777 2010-04-14 Mike Frysinger <vapier@gentoo.org>
779 * interp.c (sim_write): Add const to buffer arg.
781 2010-01-18 Masaki Muranaka <monaka@monami-software.com> (tiny change)
783 * interp.c: Don't include sysdep.h
785 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
787 * configure: Regenerate.
789 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
791 * config.in: Regenerate.
792 * configure: Likewise.
794 * configure: Regenerate.
796 2008-07-11 Hans-Peter Nilsson <hp@axis.com>
798 * configure: Regenerate to track ../common/common.m4 changes.
801 2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
802 Daniel Jacobowitz <dan@codesourcery.com>
803 Joseph Myers <joseph@codesourcery.com>
805 * configure: Regenerate.
807 2007-10-22 Richard Sandiford <rsandifo@nildram.co.uk>
809 * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
810 that unconditionally allows fmt_ps.
811 (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
812 (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
813 (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
814 filter from 64,f to 32,f.
815 (PREFX): Change filter from 64 to 32.
816 (LDXC1, LUXC1): Provide separate mips32r2 implementations
817 that use do_load_double instead of do_load. Make both LUXC1
818 versions unpredictable if SizeFGR () != 64.
819 (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
820 instead of do_store. Remove unused variable. Make both SUXC1
821 versions unpredictable if SizeFGR () != 64.
823 2007-10-07 Richard Sandiford <rsandifo@nildram.co.uk>
825 * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
826 (sc, swxc1): Likewise. Also fix big-endian and reverse-endian
827 shifts for that case.
829 2007-09-04 Nick Clifton <nickc@redhat.com>
831 * interp.c (options enum): Add OPTION_INFO_MEMORY.
832 (display_mem_info): New static variable.
833 (mips_option_handler): Handle OPTION_INFO_MEMORY.
834 (mips_options): Add info-memory and memory-info.
835 (sim_open): After processing the command line and board
836 specification, check display_mem_info. If it is set then
837 call the real handler for the --memory-info command line
840 2007-08-24 Joel Brobecker <brobecker@adacore.com>
842 * configure.ac: Change license of multi-run.c to GPL version 3.
843 * configure: Regenerate.
845 2007-06-28 Richard Sandiford <richard@codesourcery.com>
847 * configure.ac, configure: Revert last patch.
849 2007-06-26 Richard Sandiford <richard@codesourcery.com>
851 * configure.ac (sim_mipsisa3264_configs): New variable.
852 (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
853 every configuration support all four targets, using the triplet to
854 determine the default.
855 * configure: Regenerate.
857 2007-06-25 Richard Sandiford <richard@codesourcery.com>
859 * Makefile.in (m16run.o): New rule.
861 2007-05-15 Thiemo Seufer <ths@mips.com>
863 * mips3264r2.igen (DSHD): Fix compile warning.
865 2007-05-14 Thiemo Seufer <ths@mips.com>
867 * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
868 CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
869 NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
870 RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
873 2007-03-01 Thiemo Seufer <ths@mips.com>
875 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
878 2007-02-20 Thiemo Seufer <ths@mips.com>
880 * dsp.igen: Update copyright notice.
881 * dsp2.igen: Fix copyright notice.
883 2007-02-20 Thiemo Seufer <ths@mips.com>
884 Chao-Ying Fu <fu@mips.com>
886 * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
887 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
888 Add dsp2 to sim_igen_machine.
889 * configure: Regenerate.
890 * dsp.igen (do_ph_op): Add MUL support when op = 2.
891 (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
892 (mulq_rs.ph): Use do_ph_mulq.
893 (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
894 * mips.igen: Add dsp2 model and include dsp2.igen.
895 (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
896 for *mips32r2, *mips64r2, *dsp.
897 (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
898 for *mips32r2, *mips64r2, *dsp2.
899 * dsp2.igen: New file for MIPS DSP REV 2 ASE.
901 2007-02-19 Thiemo Seufer <ths@mips.com>
902 Nigel Stephens <nigel@mips.com>
904 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
905 jumps with hazard barrier.
907 2007-02-19 Thiemo Seufer <ths@mips.com>
908 Nigel Stephens <nigel@mips.com>
910 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
911 after each call to sim_io_write.
913 2007-02-19 Thiemo Seufer <ths@mips.com>
914 Nigel Stephens <nigel@mips.com>
916 * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
917 supported by this simulator.
918 (decode_coproc): Recognise additional CP0 Config registers
921 2007-02-19 Thiemo Seufer <ths@mips.com>
922 Nigel Stephens <nigel@mips.com>
923 David Ung <davidu@mips.com>
925 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
926 uninterpreted formats. If fmt is one of the uninterpreted types
927 don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
928 fmt_word, and fmt_uninterpreted_64 like fmt_long.
929 (store_fpr): When writing an invalid odd register, set the
930 matching even register to fmt_unknown, not the following register.
931 * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
932 the the memory window at offset 0 set by --memory-size command
934 (sim_store_register): Handle storing 4 bytes to an 8 byte floating
936 (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
938 (sim_monitor): When returning the memory size to the MIPS
939 application, use the value in STATE_MEM_SIZE, not an arbitrary
941 (cop_lw): Don' mess around with FPR_STATE, just pass
942 fmt_uninterpreted_32 to StoreFPR.
944 (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
946 * mips.igen (not_word_value): Single version for mips32, mips64
949 2007-02-19 Thiemo Seufer <ths@mips.com>
950 Nigel Stephens <nigel@mips.com>
952 * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
955 2007-02-17 Thiemo Seufer <ths@mips.com>
957 * configure.ac (mips*-sde-elf*): Move in front of generic machine
959 * configure: Regenerate.
961 2007-02-17 Thiemo Seufer <ths@mips.com>
963 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
964 Add mdmx to sim_igen_machine.
965 (mipsisa64*-*-*): Likewise. Remove dsp.
966 (mipsisa32*-*-*): Remove dsp.
967 * configure: Regenerate.
969 2007-02-13 Thiemo Seufer <ths@mips.com>
971 * configure.ac: Add mips*-sde-elf* target.
972 * configure: Regenerate.
974 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
976 * acconfig.h: Remove.
977 * config.in, configure: Regenerate.
979 2006-11-07 Thiemo Seufer <ths@mips.com>
981 * dsp.igen (do_w_op): Fix compiler warning.
983 2006-08-29 Thiemo Seufer <ths@mips.com>
984 David Ung <davidu@mips.com>
986 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
988 * configure: Regenerate.
989 * mips.igen (model): Add smartmips.
990 (MADDU): Increment ACX if carry.
991 (do_mult): Clear ACX.
992 (ROR,RORV): Add smartmips.
993 (include): Include smartmips.igen.
994 * sim-main.h (ACX): Set to REGISTERS[89].
995 * smartmips.igen: New file.
997 2006-08-29 Thiemo Seufer <ths@mips.com>
998 David Ung <davidu@mips.com>
1000 * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
1001 mips3264r2.igen. Add missing dependency rules.
1002 * m16e.igen: Support for mips16e save/restore instructions.
1004 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
1006 * configure: Regenerated.
1008 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
1010 * configure: Regenerated.
1012 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
1014 * configure: Regenerated.
1016 2006-05-15 Chao-ying Fu <fu@mips.com>
1018 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
1020 2006-04-18 Nick Clifton <nickc@redhat.com>
1022 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
1025 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
1027 * configure: Regenerate.
1029 2005-12-14 Chao-ying Fu <fu@mips.com>
1031 * Makefile.in (SIM_OBJS): Add dsp.o.
1032 (dsp.o): New dependency.
1033 (IGEN_INCLUDE): Add dsp.igen.
1034 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
1035 mipsisa64*-*-*): Add dsp to sim_igen_machine.
1036 * configure: Regenerate.
1037 * mips.igen: Add dsp model and include dsp.igen.
1038 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
1039 because these instructions are extended in DSP ASE.
1040 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
1041 adding 6 DSP accumulator registers and 1 DSP control register.
1042 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
1043 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
1044 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
1045 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
1046 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
1047 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
1048 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
1049 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
1050 DSPCR_CCOND_SMASK): New define.
1051 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
1052 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
1054 2005-07-08 Ian Lance Taylor <ian@airs.com>
1056 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
1058 2005-06-16 David Ung <davidu@mips.com>
1059 Nigel Stephens <nigel@mips.com>
1061 * mips.igen: New mips16e model and include m16e.igen.
1062 (check_u64): Add mips16e tag.
1063 * m16e.igen: New file for MIPS16e instructions.
1064 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
1065 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
1067 * configure: Regenerate.
1069 2005-05-26 David Ung <davidu@mips.com>
1071 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
1072 tags to all instructions which are applicable to the new ISAs.
1073 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
1075 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
1077 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
1079 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
1080 * configure: Regenerate.
1082 2005-03-23 Mark Kettenis <kettenis@gnu.org>
1084 * configure: Regenerate.
1086 2005-01-14 Andrew Cagney <cagney@gnu.org>
1088 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
1089 explicit call to AC_CONFIG_HEADER.
1090 * configure: Regenerate.
1092 2005-01-12 Andrew Cagney <cagney@gnu.org>
1094 * configure.ac: Update to use ../common/common.m4.
1095 * configure: Re-generate.
1097 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
1099 * configure: Regenerated to track ../common/aclocal.m4 changes.
1101 2005-01-07 Andrew Cagney <cagney@gnu.org>
1103 * configure.ac: Rename configure.in, require autoconf 2.59.
1104 * configure: Re-generate.
1106 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
1108 * configure: Regenerate for ../common/aclocal.m4 update.
1110 2004-09-24 Monika Chaddha <monika@acmet.com>
1112 Committed by Andrew Cagney.
1113 * m16.igen (CMP, CMPI): Fix assembler.
1115 2004-08-18 Chris Demetriou <cgd@broadcom.com>
1117 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
1118 * configure: Regenerate.
1120 2004-06-25 Chris Demetriou <cgd@broadcom.com>
1122 * configure.in (sim_m16_machine): Include mipsIII.
1123 * configure: Regenerate.
1125 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
1127 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
1129 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
1131 2004-04-10 Chris Demetriou <cgd@broadcom.com>
1133 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
1135 2004-04-09 Chris Demetriou <cgd@broadcom.com>
1137 * mips.igen (check_fmt): Remove.
1138 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
1139 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
1140 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
1141 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
1142 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
1143 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
1144 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1145 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
1146 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
1147 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
1149 2004-04-09 Chris Demetriou <cgd@broadcom.com>
1151 * sb1.igen (check_sbx): New function.
1152 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
1154 2004-03-29 Chris Demetriou <cgd@broadcom.com>
1155 Richard Sandiford <rsandifo@redhat.com>
1157 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
1158 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
1159 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
1160 separate implementations for mipsIV and mipsV. Use new macros to
1161 determine whether the restrictions apply.
1163 2004-01-19 Chris Demetriou <cgd@broadcom.com>
1165 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
1166 (check_mult_hilo): Improve comments.
1167 (check_div_hilo): Likewise. Also, fork off a new version
1168 to handle mips32/mips64 (since there are no hazards to check
1171 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
1173 * mips.igen (do_dmultx): Fix check for negative operands.
1175 2003-05-16 Ian Lance Taylor <ian@airs.com>
1177 * Makefile.in (SHELL): Make sure this is defined.
1178 (various): Use $(SHELL) whenever we invoke move-if-change.
1180 2003-05-03 Chris Demetriou <cgd@broadcom.com>
1182 * cp1.c: Tweak attribution slightly.
1185 * mdmx.igen: Likewise.
1186 * mips3d.igen: Likewise.
1187 * sb1.igen: Likewise.
1189 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
1191 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
1194 2003-02-27 Andrew Cagney <cagney@redhat.com>
1196 * interp.c (sim_open): Rename _bfd to bfd.
1197 (sim_create_inferior): Ditto.
1199 2003-01-14 Chris Demetriou <cgd@broadcom.com>
1201 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
1203 2003-01-14 Chris Demetriou <cgd@broadcom.com>
1205 * mips.igen (EI, DI): Remove.
1207 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
1209 * Makefile.in (tmp-run-multi): Fix mips16 filter.
1211 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
1212 Andrew Cagney <ac131313@redhat.com>
1213 Gavin Romig-Koch <gavin@redhat.com>
1214 Graydon Hoare <graydon@redhat.com>
1215 Aldy Hernandez <aldyh@redhat.com>
1216 Dave Brolley <brolley@redhat.com>
1217 Chris Demetriou <cgd@broadcom.com>
1219 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
1220 (sim_mach_default): New variable.
1221 (mips64vr-*-*, mips64vrel-*-*): New configurations.
1222 Add a new simulator generator, MULTI.
1223 * configure: Regenerate.
1224 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
1225 (multi-run.o): New dependency.
1226 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
1227 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
1228 (tmp-multi): Combine them.
1229 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
1230 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
1231 (distclean-extra): New rule.
1232 * sim-main.h: Include bfd.h.
1233 (MIPS_MACH): New macro.
1234 * mips.igen (vr4120, vr5400, vr5500): New models.
1235 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
1236 * vr.igen: Replace with new version.
1238 2003-01-04 Chris Demetriou <cgd@broadcom.com>
1240 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
1241 * configure: Regenerate.
1243 2002-12-31 Chris Demetriou <cgd@broadcom.com>
1245 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
1246 * mips.igen: Remove all invocations of check_branch_bug and
1249 2002-12-16 Chris Demetriou <cgd@broadcom.com>
1251 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
1253 2002-07-30 Chris Demetriou <cgd@broadcom.com>
1255 * mips.igen (do_load_double, do_store_double): New functions.
1256 (LDC1, SDC1): Rename to...
1257 (LDC1b, SDC1b): respectively.
1258 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
1260 2002-07-29 Michael Snyder <msnyder@redhat.com>
1262 * cp1.c (fp_recip2): Modify initialization expression so that
1263 GCC will recognize it as constant.
1265 2002-06-18 Chris Demetriou <cgd@broadcom.com>
1267 * mdmx.c (SD_): Delete.
1268 (Unpredictable): Re-define, for now, to directly invoke
1269 unpredictable_action().
1270 (mdmx_acc_op): Fix error in .ob immediate handling.
1272 2002-06-18 Andrew Cagney <cagney@redhat.com>
1274 * interp.c (sim_firmware_command): Initialize `address'.
1276 2002-06-16 Andrew Cagney <ac131313@redhat.com>
1278 * configure: Regenerated to track ../common/aclocal.m4 changes.
1280 2002-06-14 Chris Demetriou <cgd@broadcom.com>
1281 Ed Satterthwaite <ehs@broadcom.com>
1283 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
1284 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
1285 * mips.igen: Include mips3d.igen.
1286 (mips3d): New model name for MIPS-3D ASE instructions.
1287 (CVT.W.fmt): Don't use this instruction for word (source) format
1289 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
1290 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
1291 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
1292 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
1293 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
1294 (RSquareRoot1, RSquareRoot2): New macros.
1295 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
1296 (fp_rsqrt2): New functions.
1297 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
1298 * configure: Regenerate.
1300 2002-06-13 Chris Demetriou <cgd@broadcom.com>
1301 Ed Satterthwaite <ehs@broadcom.com>
1303 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
1304 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
1305 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
1306 (convert): Note that this function is not used for paired-single
1308 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
1309 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
1310 (check_fmt_p): Enable paired-single support.
1311 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
1312 (PUU.PS): New instructions.
1313 (CVT.S.fmt): Don't use this instruction for paired-single format
1315 * sim-main.h (FP_formats): New value 'fmt_ps.'
1316 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
1317 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
1319 2002-06-12 Chris Demetriou <cgd@broadcom.com>
1321 * mips.igen: Fix formatting of function calls in
1324 2002-06-12 Chris Demetriou <cgd@broadcom.com>
1326 * mips.igen (MOVN, MOVZ): Trace result.
1327 (TNEI): Print "tnei" as the opcode name in traces.
1328 (CEIL.W): Add disassembly string for traces.
1329 (RSQRT.fmt): Make location of disassembly string consistent
1330 with other instructions.
1332 2002-06-12 Chris Demetriou <cgd@broadcom.com>
1334 * mips.igen (X): Delete unused function.
1336 2002-06-08 Andrew Cagney <cagney@redhat.com>
1338 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
1340 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1341 Ed Satterthwaite <ehs@broadcom.com>
1343 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
1344 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
1345 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
1346 (fp_nmsub): New prototypes.
1347 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
1348 (NegMultiplySub): New defines.
1349 * mips.igen (RSQRT.fmt): Use RSquareRoot().
1350 (MADD.D, MADD.S): Replace with...
1351 (MADD.fmt): New instruction.
1352 (MSUB.D, MSUB.S): Replace with...
1353 (MSUB.fmt): New instruction.
1354 (NMADD.D, NMADD.S): Replace with...
1355 (NMADD.fmt): New instruction.
1356 (NMSUB.D, MSUB.S): Replace with...
1357 (NMSUB.fmt): New instruction.
1359 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1360 Ed Satterthwaite <ehs@broadcom.com>
1362 * cp1.c: Fix more comment spelling and formatting.
1363 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
1364 (denorm_mode): New function.
1365 (fpu_unary, fpu_binary): Round results after operation, collect
1366 status from rounding operations, and update the FCSR.
1367 (convert): Collect status from integer conversions and rounding
1368 operations, and update the FCSR. Adjust NaN values that result
1369 from conversions. Convert to use sim_io_eprintf rather than
1370 fprintf, and remove some debugging code.
1371 * cp1.h (fenr_FS): New define.
1373 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1375 * cp1.c (convert): Remove unusable debugging code, and move MIPS
1376 rounding mode to sim FP rounding mode flag conversion code into...
1377 (rounding_mode): New function.
1379 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1381 * cp1.c: Clean up formatting of a few comments.
1382 (value_fpr): Reformat switch statement.
1384 2002-06-06 Chris Demetriou <cgd@broadcom.com>
1385 Ed Satterthwaite <ehs@broadcom.com>
1388 * sim-main.h: Include cp1.h.
1389 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
1390 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
1391 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
1392 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
1393 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
1394 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
1395 * cp1.c: Don't include sim-fpu.h; already included by
1396 sim-main.h. Clean up formatting of some comments.
1397 (NaN, Equal, Less): Remove.
1398 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
1399 (fp_cmp): New functions.
1400 * mips.igen (do_c_cond_fmt): Remove.
1401 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
1402 Compare. Add result tracing.
1403 (CxC1): Remove, replace with...
1404 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
1405 (DMxC1): Remove, replace with...
1406 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
1407 (MxC1): Remove, replace with...
1408 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
1410 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1412 * sim-main.h (FGRIDX): Remove, replace all uses with...
1413 (FGR_BASE): New macro.
1414 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
1415 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
1416 (NR_FGR, FGR): Likewise.
1417 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
1418 * mips.igen: Likewise.
1420 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1422 * cp1.c: Add an FSF Copyright notice to this file.
1424 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1425 Ed Satterthwaite <ehs@broadcom.com>
1427 * cp1.c (Infinity): Remove.
1428 * sim-main.h (Infinity): Likewise.
1430 * cp1.c (fp_unary, fp_binary): New functions.
1431 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
1432 (fp_sqrt): New functions, implemented in terms of the above.
1433 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1434 (Recip, SquareRoot): Remove (replaced by functions above).
1435 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
1436 (fp_recip, fp_sqrt): New prototypes.
1437 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1438 (Recip, SquareRoot): Replace prototypes with #defines which
1439 invoke the functions above.
1441 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1443 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
1444 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
1445 file, remove PARAMS from prototypes.
1446 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
1447 simulator state arguments.
1448 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
1449 pass simulator state arguments.
1450 * cp1.c (SD): Redefine as CPU_STATE(cpu).
1451 (store_fpr, convert): Remove 'sd' argument.
1452 (value_fpr): Likewise. Convert to use 'SD' instead.
1454 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1456 * cp1.c (Min, Max): Remove #if 0'd functions.
1457 * sim-main.h (Min, Max): Remove.
1459 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1461 * cp1.c: fix formatting of switch case and default labels.
1462 * interp.c: Likewise.
1463 * sim-main.c: Likewise.
1465 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1467 * cp1.c: Clean up comments which describe FP formats.
1468 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
1470 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1471 Ed Satterthwaite <ehs@broadcom.com>
1473 * configure.in (mipsisa64sb1*-*-*): New target for supporting
1474 Broadcom SiByte SB-1 processor configurations.
1475 * configure: Regenerate.
1476 * sb1.igen: New file.
1477 * mips.igen: Include sb1.igen.
1479 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
1480 * mdmx.igen: Add "sb1" model to all appropriate functions and
1482 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
1483 (ob_func, ob_acc): Reference the above.
1484 (qh_acc): Adjust to keep the same size as ob_acc.
1485 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
1486 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
1488 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1490 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1492 2002-06-02 Chris Demetriou <cgd@broadcom.com>
1493 Ed Satterthwaite <ehs@broadcom.com>
1495 * mips.igen (mdmx): New (pseudo-)model.
1496 * mdmx.c, mdmx.igen: New files.
1497 * Makefile.in (SIM_OBJS): Add mdmx.o.
1498 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
1500 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
1501 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
1502 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
1503 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
1504 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
1505 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
1506 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
1507 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
1508 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
1509 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
1510 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
1511 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
1512 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
1513 (qh_fmtsel): New macros.
1514 (_sim_cpu): New member "acc".
1515 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
1516 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
1518 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1520 * interp.c: Use 'deprecated' rather than 'depreciated.'
1521 * sim-main.h: Likewise.
1523 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1525 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
1526 which wouldn't compile anyway.
1527 * sim-main.h (unpredictable_action): New function prototype.
1528 (Unpredictable): Define to call igen function unpredictable().
1529 (NotWordValue): New macro to call igen function not_word_value().
1530 (UndefinedResult): Remove.
1531 * interp.c (undefined_result): Remove.
1532 (unpredictable_action): New function.
1533 * mips.igen (not_word_value, unpredictable): New functions.
1534 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
1535 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
1536 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
1537 NotWordValue() to check for unpredictable inputs, then
1538 Unpredictable() to handle them.
1540 2002-02-24 Chris Demetriou <cgd@broadcom.com>
1542 * mips.igen: Fix formatting of calls to Unpredictable().
1544 2002-04-20 Andrew Cagney <ac131313@redhat.com>
1546 * interp.c (sim_open): Revert previous change.
1548 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
1550 * interp.c (sim_open): Disable chunk of code that wrote code in
1551 vector table entries.
1553 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1555 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1556 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1559 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1561 * cp1.c: Fix many formatting issues.
1563 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1565 * cp1.c (fpu_format_name): New function to replace...
1566 (DOFMT): This. Delete, and update all callers.
1567 (fpu_rounding_mode_name): New function to replace...
1568 (RMMODE): This. Delete, and update all callers.
1570 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1572 * interp.c: Move FPU support routines from here to...
1573 * cp1.c: Here. New file.
1574 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1575 (cp1.o): New target.
1577 2002-03-12 Chris Demetriou <cgd@broadcom.com>
1579 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1580 * mips.igen (mips32, mips64): New models, add to all instructions
1581 and functions as appropriate.
1582 (loadstore_ea, check_u64): New variant for model mips64.
1583 (check_fmt_p): New variant for models mipsV and mips64, remove
1584 mipsV model marking fro other variant.
1587 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1588 for mips32 and mips64.
1589 (DCLO, DCLZ): New instructions for mips64.
1591 2002-03-07 Chris Demetriou <cgd@broadcom.com>
1593 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1594 immediate or code as a hex value with the "%#lx" format.
1595 (ANDI): Likewise, and fix printed instruction name.
1597 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1599 * sim-main.h (UndefinedResult, Unpredictable): New macros
1600 which currently do nothing.
1602 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1604 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1605 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1606 (status_CU3): New definitions.
1608 * sim-main.h (ExceptionCause): Add new values for MIPS32
1609 and MIPS64: MDMX, MCheck, CacheErr. Update comments
1610 for DebugBreakPoint and NMIReset to note their status in
1612 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1613 (SignalExceptionCacheErr): New exception macros.
1615 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1617 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1618 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1620 (SignalExceptionCoProcessorUnusable): Take as argument the
1621 unusable coprocessor number.
1623 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1625 * mips.igen: Fix formatting of all SignalException calls.
1627 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1629 * sim-main.h (SIGNEXTEND): Remove.
1631 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1633 * mips.igen: Remove gencode comment from top of file, fix
1634 spelling in another comment.
1636 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1638 * mips.igen (check_fmt, check_fmt_p): New functions to check
1639 whether specific floating point formats are usable.
1640 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1641 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1642 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1643 Use the new functions.
1644 (do_c_cond_fmt): Remove format checks...
1645 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1647 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1649 * mips.igen: Fix formatting of check_fpu calls.
1651 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1653 * mips.igen (FLOOR.L.fmt): Store correct destination register.
1655 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1657 * mips.igen: Remove whitespace at end of lines.
1659 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1661 * mips.igen (loadstore_ea): New function to do effective
1662 address calculations.
1663 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1664 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1665 CACHE): Use loadstore_ea to do effective address computations.
1667 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1669 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1670 * mips.igen (LL, CxC1, MxC1): Likewise.
1672 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1674 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1675 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1676 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1677 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1678 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1679 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1680 Don't split opcode fields by hand, use the opcode field values
1683 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1685 * mips.igen (do_divu): Fix spacing.
1687 * mips.igen (do_dsllv): Move to be right before DSLLV,
1688 to match the rest of the do_<shift> functions.
1690 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1692 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1693 DSRL32, do_dsrlv): Trace inputs and results.
1695 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1697 * mips.igen (CACHE): Provide instruction-printing string.
1699 * interp.c (signal_exception): Comment tokens after #endif.
1701 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1703 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1704 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1705 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1706 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1707 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1708 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1709 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1710 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1712 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1714 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1715 instruction-printing string.
1716 (LWU): Use '64' as the filter flag.
1718 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1720 * mips.igen (SDXC1): Fix instruction-printing string.
1722 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1724 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1725 filter flags "32,f".
1727 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1729 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1732 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1734 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1735 add a comma) so that it more closely match the MIPS ISA
1736 documentation opcode partitioning.
1737 (PREF): Put useful names on opcode fields, and include
1738 instruction-printing string.
1740 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1742 * mips.igen (check_u64): New function which in the future will
1743 check whether 64-bit instructions are usable and signal an
1744 exception if not. Currently a no-op.
1745 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1746 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1747 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1748 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1750 * mips.igen (check_fpu): New function which in the future will
1751 check whether FPU instructions are usable and signal an exception
1752 if not. Currently a no-op.
1753 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1754 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1755 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1756 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1757 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1758 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1759 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1760 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1762 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1764 * mips.igen (do_load_left, do_load_right): Move to be immediately
1766 (do_store_left, do_store_right): Move to be immediately following
1769 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1771 * mips.igen (mipsV): New model name. Also, add it to
1772 all instructions and functions where it is appropriate.
1774 2002-02-18 Chris Demetriou <cgd@broadcom.com>
1776 * mips.igen: For all functions and instructions, list model
1777 names that support that instruction one per line.
1779 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1781 * mips.igen: Add some additional comments about supported
1782 models, and about which instructions go where.
1783 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1784 order as is used in the rest of the file.
1786 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1788 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1789 indicating that ALU32_END or ALU64_END are there to check
1791 (DADD): Likewise, but also remove previous comment about
1794 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1796 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1797 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1798 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1799 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1800 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1801 fields (i.e., add and move commas) so that they more closely
1802 match the MIPS ISA documentation opcode partitioning.
1804 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1806 * mips.igen (ADDI): Print immediate value.
1807 (BREAK): Print code.
1808 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1809 (SLL): Print "nop" specially, and don't run the code
1810 that does the shift for the "nop" case.
1812 2001-11-17 Fred Fish <fnf@redhat.com>
1814 * sim-main.h (float_operation): Move enum declaration outside
1815 of _sim_cpu struct declaration.
1817 2001-04-12 Jim Blandy <jimb@redhat.com>
1819 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1820 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
1822 * sim-main.h (COCIDX): Remove definition; this isn't supported by
1823 PENDING_FILL, and you can get the intended effect gracefully by
1824 calling PENDING_SCHED directly.
1826 2001-02-23 Ben Elliston <bje@redhat.com>
1828 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1829 already defined elsewhere.
1831 2001-02-19 Ben Elliston <bje@redhat.com>
1833 * sim-main.h (sim_monitor): Return an int.
1834 * interp.c (sim_monitor): Add return values.
1835 (signal_exception): Handle error conditions from sim_monitor.
1837 2001-02-08 Ben Elliston <bje@redhat.com>
1839 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1840 (store_memory): Likewise, pass cia to sim_core_write*.
1842 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
1844 On advice from Chris G. Demetriou <cgd@sibyte.com>:
1845 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1847 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
1849 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1850 * Makefile.in: Don't delete *.igen when cleaning directory.
1852 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
1854 * m16.igen (break): Call SignalException not sim_engine_halt.
1856 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
1858 From Jason Eckhardt:
1859 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1861 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
1863 * mips.igen (MxC1, DMxC1): Fix printf formatting.
1865 2000-05-24 Michael Hayes <mhayes@cygnus.com>
1867 * mips.igen (do_dmultx): Fix typo.
1869 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
1871 * configure: Regenerated to track ../common/aclocal.m4 changes.
1873 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
1875 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1877 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
1879 * sim-main.h (GPR_CLEAR): Define macro.
1881 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
1883 * interp.c (decode_coproc): Output long using %lx and not %s.
1885 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
1887 * interp.c (sim_open): Sort & extend dummy memory regions for
1888 --board=jmr3904 for eCos.
1890 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
1892 * configure: Regenerated.
1894 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
1896 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1897 calls, conditional on the simulator being in verbose mode.
1899 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
1901 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1902 cache don't get ReservedInstruction traps.
1904 1999-11-29 Mark Salter <msalter@cygnus.com>
1906 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1907 to clear status bits in sdisr register. This is how the hardware works.
1909 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1910 being used by cygmon.
1912 1999-11-11 Andrew Haley <aph@cygnus.com>
1914 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1917 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
1919 * mips.igen (MULT): Correct previous mis-applied patch.
1921 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
1923 * mips.igen (delayslot32): Handle sequence like
1924 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1925 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1926 (MULT): Actually pass the third register...
1928 1999-09-03 Mark Salter <msalter@cygnus.com>
1930 * interp.c (sim_open): Added more memory aliases for additional
1931 hardware being touched by cygmon on jmr3904 board.
1933 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1935 * configure: Regenerated to track ../common/aclocal.m4 changes.
1937 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
1939 * interp.c (sim_store_register): Handle case where client - GDB -
1940 specifies that a 4 byte register is 8 bytes in size.
1941 (sim_fetch_register): Ditto.
1943 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
1945 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1946 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1947 (idt_monitor_base): Base address for IDT monitor traps.
1948 (pmon_monitor_base): Ditto for PMON.
1949 (lsipmon_monitor_base): Ditto for LSI PMON.
1950 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1951 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1952 (sim_firmware_command): New function.
1953 (mips_option_handler): Call it for OPTION_FIRMWARE.
1954 (sim_open): Allocate memory for idt_monitor region. If "--board"
1955 option was given, add no monitor by default. Add BREAK hooks only if
1956 monitors are also there.
1958 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
1960 * interp.c (sim_monitor): Flush output before reading input.
1962 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
1964 * tconfig.in (SIM_HANDLES_LMA): Always define.
1966 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
1968 From Mark Salter <msalter@cygnus.com>:
1969 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
1970 (sim_open): Add setup for BSP board.
1972 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
1974 * mips.igen (MULT, MULTU): Add syntax for two operand version.
1975 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
1976 them as unimplemented.
1978 1999-05-08 Felix Lee <flee@cygnus.com>
1980 * configure: Regenerated to track ../common/aclocal.m4 changes.
1982 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
1984 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1986 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
1988 * configure.in: Any mips64vr5*-*-* target should have
1989 -DTARGET_ENABLE_FR=1.
1990 (default_endian): Any mips64vr*el-*-* target should default to
1992 * configure: Re-generate.
1994 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
1996 * mips.igen (ldl): Extend from _16_, not 32.
1998 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
2000 * interp.c (sim_store_register): Force registers written to by GDB
2001 into an un-interpreted state.
2003 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
2005 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
2006 CPU, start periodic background I/O polls.
2007 (tx3904sio_poll): New function: periodic I/O poller.
2009 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
2011 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
2013 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
2015 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
2018 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
2020 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
2021 (load_word): Call SIM_CORE_SIGNAL hook on error.
2022 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
2023 starting. For exception dispatching, pass PC instead of NULL_CIA.
2024 (decode_coproc): Use COP0_BADVADDR to store faulting address.
2025 * sim-main.h (COP0_BADVADDR): Define.
2026 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
2027 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
2028 (_sim_cpu): Add exc_* fields to store register value snapshots.
2029 * mips.igen (*): Replace memory-related SignalException* calls
2030 with references to SIM_CORE_SIGNAL hook.
2032 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
2034 * sim-main.c (*): Minor warning cleanups.
2036 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
2038 * m16.igen (DADDIU5): Correct type-o.
2040 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
2042 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
2045 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
2047 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
2049 (interp.o): Add dependency on itable.h
2050 (oengine.c, gencode): Delete remaining references.
2051 (BUILT_SRC_FROM_GEN): Clean up.
2053 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
2056 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
2057 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
2058 tmp-run-hack) : New.
2059 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
2060 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
2061 Drop the "64" qualifier to get the HACK generator working.
2062 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
2063 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
2064 qualifier to get the hack generator working.
2065 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
2066 (DSLL): Use do_dsll.
2067 (DSLLV): Use do_dsllv.
2068 (DSRA): Use do_dsra.
2069 (DSRL): Use do_dsrl.
2070 (DSRLV): Use do_dsrlv.
2071 (BC1): Move *vr4100 to get the HACK generator working.
2072 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
2073 get the HACK generator working.
2074 (MACC) Rename to get the HACK generator working.
2075 (DMACC,MACCS,DMACCS): Add the 64.
2077 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
2079 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
2080 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
2082 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
2084 * mips/interp.c (DEBUG): Cleanups.
2086 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
2088 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
2089 (tx3904sio_tickle): fflush after a stdout character output.
2091 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
2093 * interp.c (sim_close): Uninstall modules.
2095 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
2097 * sim-main.h, interp.c (sim_monitor): Change to global
2100 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2102 * configure.in (vr4100): Only include vr4100 instructions in
2104 * configure: Re-generate.
2105 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
2107 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
2109 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
2110 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
2113 * configure.in (sim_default_gen, sim_use_gen): Replace with
2115 (--enable-sim-igen): Delete config option. Always using IGEN.
2116 * configure: Re-generate.
2118 * Makefile.in (gencode): Kill, kill, kill.
2121 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
2123 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
2124 bit mips16 igen simulator.
2125 * configure: Re-generate.
2127 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
2128 as part of vr4100 ISA.
2129 * vr.igen: Mark all instructions as 64 bit only.
2131 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2133 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
2136 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
2138 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
2139 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
2140 * configure: Re-generate.
2142 * m16.igen (BREAK): Define breakpoint instruction.
2143 (JALX32): Mark instruction as mips16 and not r3900.
2144 * mips.igen (C.cond.fmt): Fix typo in instruction format.
2146 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
2148 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
2150 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
2151 insn as a debug breakpoint.
2153 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
2155 (PENDING_SCHED): Clean up trace statement.
2156 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
2157 (PENDING_FILL): Delay write by only one cycle.
2158 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
2160 * sim-main.c (pending_tick): Clean up trace statements. Add trace
2162 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
2164 (pending_tick): Move incrementing of index to FOR statement.
2165 (pending_tick): Only update PENDING_OUT after a write has occured.
2167 * configure.in: Add explicit mips-lsi-* target. Use gencode to
2169 * configure: Re-generate.
2171 * interp.c (sim_engine_run OLD): Delete explicit call to
2172 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
2174 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
2176 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
2177 interrupt level number to match changed SignalExceptionInterrupt
2180 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
2182 * interp.c: #include "itable.h" if WITH_IGEN.
2183 (get_insn_name): New function.
2184 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
2185 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
2187 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
2189 * configure: Rebuilt to inhale new common/aclocal.m4.
2191 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
2193 * dv-tx3904sio.c: Include sim-assert.h.
2195 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
2197 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
2198 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
2199 Reorganize target-specific sim-hardware checks.
2200 * configure: rebuilt.
2201 * interp.c (sim_open): For tx39 target boards, set
2202 OPERATING_ENVIRONMENT, add tx3904sio devices.
2203 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
2204 ROM executables. Install dv-sockser into sim-modules list.
2206 * dv-tx3904irc.c: Compiler warning clean-up.
2207 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
2208 frequent hw-trace messages.
2210 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
2212 * vr.igen (MulAcc): Identify as a vr4100 specific function.
2214 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2216 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
2218 * vr.igen: New file.
2219 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
2220 * mips.igen: Define vr4100 model. Include vr.igen.
2221 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
2223 * mips.igen (check_mf_hilo): Correct check.
2225 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
2227 * sim-main.h (interrupt_event): Add prototype.
2229 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
2230 register_ptr, register_value.
2231 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
2233 * sim-main.h (tracefh): Make extern.
2235 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
2237 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
2238 Reduce unnecessarily high timer event frequency.
2239 * dv-tx3904cpu.c: Ditto for interrupt event.
2241 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
2243 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
2245 (interrupt_event): Made non-static.
2247 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
2248 interchange of configuration values for external vs. internal
2251 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
2253 * mips.igen (BREAK): Moved code to here for
2254 simulator-reserved break instructions.
2255 * gencode.c (build_instruction): Ditto.
2256 * interp.c (signal_exception): Code moved from here. Non-
2257 reserved instructions now use exception vector, rather
2259 * sim-main.h: Moved magic constants to here.
2261 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
2263 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
2264 register upon non-zero interrupt event level, clear upon zero
2266 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
2267 by passing zero event value.
2268 (*_io_{read,write}_buffer): Endianness fixes.
2269 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
2270 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
2272 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
2273 serial I/O and timer module at base address 0xFFFF0000.
2275 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
2277 * mips.igen (SWC1) : Correct the handling of ReverseEndian
2280 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
2282 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
2284 * configure: Update.
2286 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
2288 * dv-tx3904tmr.c: New file - implements tx3904 timer.
2289 * dv-tx3904{irc,cpu}.c: Mild reformatting.
2290 * configure.in: Include tx3904tmr in hw_device list.
2291 * configure: Rebuilt.
2292 * interp.c (sim_open): Instantiate three timer instances.
2293 Fix address typo of tx3904irc instance.
2295 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
2297 * interp.c (signal_exception): SystemCall exception now uses
2298 the exception vector.
2300 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
2302 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
2305 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
2307 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
2309 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
2311 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
2313 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
2314 sim-main.h. Declare a struct hw_descriptor instead of struct
2315 hw_device_descriptor.
2317 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
2319 * mips.igen (do_store_left, do_load_left): Compute nr of left and
2320 right bits and then re-align left hand bytes to correct byte
2321 lanes. Fix incorrect computation in do_store_left when loading
2322 bytes from second word.
2324 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2326 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
2327 * interp.c (sim_open): Only create a device tree when HW is
2330 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
2331 * interp.c (signal_exception): Ditto.
2333 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
2335 * gencode.c: Mark BEGEZALL as LIKELY.
2337 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
2339 * sim-main.h (ALU32_END): Sign extend 32 bit results.
2340 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
2342 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
2344 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
2345 modules. Recognize TX39 target with "mips*tx39" pattern.
2346 * configure: Rebuilt.
2347 * sim-main.h (*): Added many macros defining bits in
2348 TX39 control registers.
2349 (SignalInterrupt): Send actual PC instead of NULL.
2350 (SignalNMIReset): New exception type.
2351 * interp.c (board): New variable for future use to identify
2352 a particular board being simulated.
2353 (mips_option_handler,mips_options): Added "--board" option.
2354 (interrupt_event): Send actual PC.
2355 (sim_open): Make memory layout conditional on board setting.
2356 (signal_exception): Initial implementation of hardware interrupt
2357 handling. Accept another break instruction variant for simulator
2359 (decode_coproc): Implement RFE instruction for TX39.
2360 (mips.igen): Decode RFE instruction as such.
2361 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
2362 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
2363 bbegin to implement memory map.
2364 * dv-tx3904cpu.c: New file.
2365 * dv-tx3904irc.c: New file.
2367 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
2369 * mips.igen (check_mt_hilo): Create a separate r3900 version.
2371 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
2373 * tx.igen (madd,maddu): Replace calls to check_op_hilo
2374 with calls to check_div_hilo.
2376 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
2378 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
2379 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
2380 Add special r3900 version of do_mult_hilo.
2381 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
2382 with calls to check_mult_hilo.
2383 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
2384 with calls to check_div_hilo.
2386 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
2388 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
2389 Document a replacement.
2391 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
2393 * interp.c (sim_monitor): Make mon_printf work.
2395 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
2397 * sim-main.h (INSN_NAME): New arg `cpu'.
2399 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
2401 * configure: Regenerated to track ../common/aclocal.m4 changes.
2403 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
2405 * configure: Regenerated to track ../common/aclocal.m4 changes.
2408 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
2410 * acconfig.h: New file.
2411 * configure.in: Reverted change of Apr 24; use sinclude again.
2413 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
2415 * configure: Regenerated to track ../common/aclocal.m4 changes.
2418 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
2420 * configure.in: Don't call sinclude.
2422 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
2424 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
2426 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2428 * mips.igen (ERET): Implement.
2430 * interp.c (decode_coproc): Return sign-extended EPC.
2432 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
2434 * interp.c (signal_exception): Do not ignore Trap.
2435 (signal_exception): On TRAP, restart at exception address.
2436 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
2437 (signal_exception): Update.
2438 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
2439 so that TRAP instructions are caught.
2441 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
2443 * sim-main.h (struct hilo_access, struct hilo_history): Define,
2444 contains HI/LO access history.
2445 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
2446 (HIACCESS, LOACCESS): Delete, replace with
2447 (HIHISTORY, LOHISTORY): New macros.
2448 (CHECKHILO): Delete all, moved to mips.igen
2450 * gencode.c (build_instruction): Do not generate checks for
2451 correct HI/LO register usage.
2453 * interp.c (old_engine_run): Delete checks for correct HI/LO
2456 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
2457 check_mf_cycles): New functions.
2458 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
2459 do_divu, domultx, do_mult, do_multu): Use.
2461 * tx.igen ("madd", "maddu"): Use.
2463 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
2465 * mips.igen (DSRAV): Use function do_dsrav.
2466 (SRAV): Use new function do_srav.
2468 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
2469 (B): Sign extend 11 bit immediate.
2470 (EXT-B*): Shift 16 bit immediate left by 1.
2471 (ADDIU*): Don't sign extend immediate value.
2473 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2475 * m16run.c (sim_engine_run): Restore CIA after handling an event.
2477 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
2480 * mips.igen (delayslot32, nullify_next_insn): New functions.
2481 (m16.igen): Always include.
2482 (do_*): Add more tracing.
2484 * m16.igen (delayslot16): Add NIA argument, could be called by a
2485 32 bit MIPS16 instruction.
2487 * interp.c (ifetch16): Move function from here.
2488 * sim-main.c (ifetch16): To here.
2490 * sim-main.c (ifetch16, ifetch32): Update to match current
2491 implementations of LH, LW.
2492 (signal_exception): Don't print out incorrect hex value of illegal
2495 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2497 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
2500 * m16.igen: Implement MIPS16 instructions.
2502 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
2503 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
2504 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
2505 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
2506 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
2507 bodies of corresponding code from 32 bit insn to these. Also used
2508 by MIPS16 versions of functions.
2510 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
2511 (IMEM16): Drop NR argument from macro.
2513 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2515 * Makefile.in (SIM_OBJS): Add sim-main.o.
2517 * sim-main.h (address_translation, load_memory, store_memory,
2518 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
2520 (pr_addr, pr_uword64): Declare.
2521 (sim-main.c): Include when H_REVEALS_MODULE_P.
2523 * interp.c (address_translation, load_memory, store_memory,
2524 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
2526 * sim-main.c: To here. Fix compilation problems.
2528 * configure.in: Enable inlining.
2529 * configure: Re-config.
2531 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2533 * configure: Regenerated to track ../common/aclocal.m4 changes.
2535 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2537 * mips.igen: Include tx.igen.
2538 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
2539 * tx.igen: New file, contains MADD and MADDU.
2541 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
2542 the hardwired constant `7'.
2543 (store_memory): Ditto.
2544 (LOADDRMASK): Move definition to sim-main.h.
2546 mips.igen (MTC0): Enable for r3900.
2549 mips.igen (do_load_byte): Delete.
2550 (do_load, do_store, do_load_left, do_load_write, do_store_left,
2551 do_store_right): New functions.
2552 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2554 configure.in: Let the tx39 use igen again.
2557 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
2559 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2560 not an address sized quantity. Return zero for cache sizes.
2562 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
2564 * mips.igen (r3900): r3900 does not support 64 bit integer
2567 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
2569 * configure.in (mipstx39*-*-*): Use gencode simulator rather
2571 * configure : Rebuild.
2573 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
2575 * configure: Regenerated to track ../common/aclocal.m4 changes.
2577 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2579 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2581 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
2583 * configure: Regenerated to track ../common/aclocal.m4 changes.
2584 * config.in: Regenerated to track ../common/aclocal.m4 changes.
2586 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2588 * configure: Regenerated to track ../common/aclocal.m4 changes.
2590 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
2592 * interp.c (Max, Min): Comment out functions. Not yet used.
2594 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
2596 * configure: Regenerated to track ../common/aclocal.m4 changes.
2598 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
2600 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2601 configurable settings for stand-alone simulator.
2603 * configure.in: Added X11 search, just in case.
2605 * configure: Regenerated.
2607 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
2609 * interp.c (sim_write, sim_read, load_memory, store_memory):
2610 Replace sim_core_*_map with read_map, write_map, exec_map resp.
2612 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
2614 * sim-main.h (GETFCC): Return an unsigned value.
2616 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2618 * mips.igen (DIV): Fix check for -1 / MIN_INT.
2619 (DADD): Result destination is RD not RT.
2621 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
2623 * sim-main.h (HIACCESS, LOACCESS): Always define.
2625 * mdmx.igen (Maxi, Mini): Rename Max, Min.
2627 * interp.c (sim_info): Delete.
2629 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
2631 * interp.c (DECLARE_OPTION_HANDLER): Use it.
2632 (mips_option_handler): New argument `cpu'.
2633 (sim_open): Update call to sim_add_option_table.
2635 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
2637 * mips.igen (CxC1): Add tracing.
2639 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
2641 * sim-main.h (Max, Min): Declare.
2643 * interp.c (Max, Min): New functions.
2645 * mips.igen (BC1): Add tracing.
2647 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
2649 * interp.c Added memory map for stack in vr4100
2651 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
2653 * interp.c (load_memory): Add missing "break"'s.
2655 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2657 * interp.c (sim_store_register, sim_fetch_register): Pass in
2658 length parameter. Return -1.
2660 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
2662 * interp.c: Added hardware init hook, fixed warnings.
2664 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2666 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2668 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
2670 * interp.c (ifetch16): New function.
2672 * sim-main.h (IMEM32): Rename IMEM.
2673 (IMEM16_IMMED): Define.
2675 (DELAY_SLOT): Update.
2677 * m16run.c (sim_engine_run): New file.
2679 * m16.igen: All instructions except LB.
2680 (LB): Call do_load_byte.
2681 * mips.igen (do_load_byte): New function.
2682 (LB): Call do_load_byte.
2684 * mips.igen: Move spec for insn bit size and high bit from here.
2685 * Makefile.in (tmp-igen, tmp-m16): To here.
2687 * m16.dc: New file, decode mips16 instructions.
2689 * Makefile.in (SIM_NO_ALL): Define.
2690 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2692 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
2694 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2695 point unit to 32 bit registers.
2696 * configure: Re-generate.
2698 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2700 * configure.in (sim_use_gen): Make IGEN the default simulator
2701 generator for generic 32 and 64 bit mips targets.
2702 * configure: Re-generate.
2704 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2706 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2709 * interp.c (sim_fetch_register, sim_store_register): Read/write
2710 FGR from correct location.
2711 (sim_open): Set size of FGR's according to
2712 WITH_TARGET_FLOATING_POINT_BITSIZE.
2714 * sim-main.h (FGR): Store floating point registers in a separate
2717 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
2719 * configure: Regenerated to track ../common/aclocal.m4 changes.
2721 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2723 * interp.c (ColdReset): Call PENDING_INVALIDATE.
2725 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2727 * interp.c (pending_tick): New function. Deliver pending writes.
2729 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2730 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2731 it can handle mixed sized quantites and single bits.
2733 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2735 * interp.c (oengine.h): Do not include when building with IGEN.
2736 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2737 (sim_info): Ditto for PROCESSOR_64BIT.
2738 (sim_monitor): Replace ut_reg with unsigned_word.
2739 (*): Ditto for t_reg.
2740 (LOADDRMASK): Define.
2741 (sim_open): Remove defunct check that host FP is IEEE compliant,
2742 using software to emulate floating point.
2743 (value_fpr, ...): Always compile, was conditional on HASFPU.
2745 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2747 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2750 * interp.c (SD, CPU): Define.
2751 (mips_option_handler): Set flags in each CPU.
2752 (interrupt_event): Assume CPU 0 is the one being iterrupted.
2753 (sim_close): Do not clear STATE, deleted anyway.
2754 (sim_write, sim_read): Assume CPU zero's vm should be used for
2756 (sim_create_inferior): Set the PC for all processors.
2757 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2759 (mips16_entry): Pass correct nr of args to store_word, load_word.
2760 (ColdReset): Cold reset all cpu's.
2761 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2762 (sim_monitor, load_memory, store_memory, signal_exception): Use
2763 `CPU' instead of STATE_CPU.
2766 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2769 * sim-main.h (signal_exception): Add sim_cpu arg.
2770 (SignalException*): Pass both SD and CPU to signal_exception.
2771 * interp.c (signal_exception): Update.
2773 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2775 (sync_operation, prefetch, cache_op, store_memory, load_memory,
2776 address_translation): Ditto
2777 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2779 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
2781 * configure: Regenerated to track ../common/aclocal.m4 changes.
2783 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2785 * interp.c (sim_engine_run): Add `nr_cpus' argument.
2787 * mips.igen (model): Map processor names onto BFD name.
2789 * sim-main.h (CPU_CIA): Delete.
2790 (SET_CIA, GET_CIA): Define
2792 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
2794 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2797 * configure.in (default_endian): Configure a big-endian simulator
2799 * configure: Re-generate.
2801 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
2803 * configure: Regenerated to track ../common/aclocal.m4 changes.
2805 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
2807 * interp.c (sim_monitor): Handle Densan monitor outbyte
2808 and inbyte functions.
2810 1997-12-29 Felix Lee <flee@cygnus.com>
2812 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2814 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
2816 * Makefile.in (tmp-igen): Arrange for $zero to always be
2817 reset to zero after every instruction.
2819 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2821 * configure: Regenerated to track ../common/aclocal.m4 changes.
2824 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
2826 * mips.igen (MSUB): Fix to work like MADD.
2827 * gencode.c (MSUB): Similarly.
2829 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
2831 * configure: Regenerated to track ../common/aclocal.m4 changes.
2833 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2835 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2837 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2839 * sim-main.h (sim-fpu.h): Include.
2841 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2842 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2843 using host independant sim_fpu module.
2845 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2847 * interp.c (signal_exception): Report internal errors with SIGABRT
2850 * sim-main.h (C0_CONFIG): New register.
2851 (signal.h): No longer include.
2853 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2855 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
2857 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2859 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2861 * mips.igen: Tag vr5000 instructions.
2862 (ANDI): Was missing mipsIV model, fix assembler syntax.
2863 (do_c_cond_fmt): New function.
2864 (C.cond.fmt): Handle mips I-III which do not support CC field
2866 (bc1): Handle mips IV which do not have a delaed FCC separatly.
2867 (SDR): Mask paddr when BigEndianMem, not the converse as specified
2869 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
2870 vr5000 which saves LO in a GPR separatly.
2872 * configure.in (enable-sim-igen): For vr5000, select vr5000
2873 specific instructions.
2874 * configure: Re-generate.
2876 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
2878 * Makefile.in (SIM_OBJS): Add sim-fpu module.
2880 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2881 fmt_uninterpreted_64 bit cases to switch. Convert to
2884 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2886 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2887 as specified in IV3.2 spec.
2888 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2890 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2892 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2893 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2894 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2895 PENDING_FILL versions of instructions. Simplify.
2897 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2899 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2901 (MTHI, MFHI): Disable code checking HI-LO.
2903 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2905 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2907 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
2909 * gencode.c (build_mips16_operands): Replace IPC with cia.
2911 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2912 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2914 (UndefinedResult): Replace function with macro/function
2916 (sim_engine_run): Don't save PC in IPC.
2918 * sim-main.h (IPC): Delete.
2921 * interp.c (signal_exception, store_word, load_word,
2922 address_translation, load_memory, store_memory, cache_op,
2923 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2924 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2925 current instruction address - cia - argument.
2926 (sim_read, sim_write): Call address_translation directly.
2927 (sim_engine_run): Rename variable vaddr to cia.
2928 (signal_exception): Pass cia to sim_monitor
2930 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2931 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2932 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2934 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2935 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2938 * interp.c (signal_exception): Pass restart address to
2941 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2942 idecode.o): Add dependency.
2944 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2946 (DELAY_SLOT): Update NIA not PC with branch address.
2947 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2949 * mips.igen: Use CIA not PC in branch calculations.
2950 (illegal): Call SignalException.
2951 (BEQ, ADDIU): Fix assembler.
2953 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2955 * m16.igen (JALX): Was missing.
2957 * configure.in (enable-sim-igen): New configuration option.
2958 * configure: Re-generate.
2960 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2962 * interp.c (load_memory, store_memory): Delete parameter RAW.
2963 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2964 bypassing {load,store}_memory.
2966 * sim-main.h (ByteSwapMem): Delete definition.
2968 * Makefile.in (SIM_OBJS): Add sim-memopt module.
2970 * interp.c (sim_do_command, sim_commands): Delete mips specific
2971 commands. Handled by module sim-options.
2973 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2974 (WITH_MODULO_MEMORY): Define.
2976 * interp.c (sim_info): Delete code printing memory size.
2978 * interp.c (mips_size): Nee sim_size, delete function.
2980 (monitor, monitor_base, monitor_size): Delete global variables.
2981 (sim_open, sim_close): Delete code creating monitor and other
2982 memory regions. Use sim-memopts module, via sim_do_commandf, to
2983 manage memory regions.
2984 (load_memory, store_memory): Use sim-core for memory model.
2986 * interp.c (address_translation): Delete all memory map code
2987 except line forcing 32 bit addresses.
2989 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2991 * sim-main.h (WITH_TRACE): Delete definition. Enables common
2994 * interp.c (logfh, logfile): Delete globals.
2995 (sim_open, sim_close): Delete code opening & closing log file.
2996 (mips_option_handler): Delete -l and -n options.
2997 (OPTION mips_options): Ditto.
2999 * interp.c (OPTION mips_options): Rename option trace to dinero.
3000 (mips_option_handler): Update.
3002 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
3004 * interp.c (fetch_str): New function.
3005 (sim_monitor): Rewrite using sim_read & sim_write.
3006 (sim_open): Check magic number.
3007 (sim_open): Write monitor vectors into memory using sim_write.
3008 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
3009 (sim_read, sim_write): Simplify - transfer data one byte at a
3011 (load_memory, store_memory): Clarify meaning of parameter RAW.
3013 * sim-main.h (isHOST): Defete definition.
3014 (isTARGET): Mark as depreciated.
3015 (address_translation): Delete parameter HOST.
3017 * interp.c (address_translation): Delete parameter HOST.
3019 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
3023 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
3024 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
3026 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
3028 * mips.igen: Add model filter field to records.
3030 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
3032 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
3034 interp.c (sim_engine_run): Do not compile function sim_engine_run
3035 when WITH_IGEN == 1.
3037 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
3038 target architecture.
3040 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
3041 igen. Replace with configuration variables sim_igen_flags /
3044 * m16.igen: New file. Copy mips16 insns here.
3045 * mips.igen: From here.
3047 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
3049 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
3051 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
3053 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
3055 * gencode.c (build_instruction): Follow sim_write's lead in using
3056 BigEndianMem instead of !ByteSwapMem.
3058 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
3060 * configure.in (sim_gen): Dependent on target, select type of
3061 generator. Always select old style generator.
3063 configure: Re-generate.
3065 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
3067 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
3068 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
3069 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
3070 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
3071 SIM_@sim_gen@_*, set by autoconf.
3073 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
3075 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
3077 * interp.c (ColdReset): Remove #ifdef HASFPU, check
3078 CURRENT_FLOATING_POINT instead.
3080 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
3081 (address_translation): Raise exception InstructionFetch when
3082 translation fails and isINSTRUCTION.
3084 * interp.c (sim_open, sim_write, sim_monitor, store_word,
3085 sim_engine_run): Change type of of vaddr and paddr to
3087 (address_translation, prefetch, load_memory, store_memory,
3088 cache_op): Change type of vAddr and pAddr to address_word.
3090 * gencode.c (build_instruction): Change type of vaddr and paddr to
3093 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
3095 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
3096 macro to obtain result of ALU op.
3098 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
3100 * interp.c (sim_info): Call profile_print.
3102 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
3104 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
3106 * sim-main.h (WITH_PROFILE): Do not define, defined in
3107 common/sim-config.h. Use sim-profile module.
3108 (simPROFILE): Delete defintion.
3110 * interp.c (PROFILE): Delete definition.
3111 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
3112 (sim_close): Delete code writing profile histogram.
3113 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
3115 (sim_engine_run): Delete code profiling the PC.
3117 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
3119 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
3121 * interp.c (sim_monitor): Make register pointers of type
3124 * sim-main.h: Make registers of type unsigned_word not
3127 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
3129 * interp.c (sync_operation): Rename from SyncOperation, make
3130 global, add SD argument.
3131 (prefetch): Rename from Prefetch, make global, add SD argument.
3132 (decode_coproc): Make global.
3134 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
3136 * gencode.c (build_instruction): Generate DecodeCoproc not
3137 decode_coproc calls.
3139 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
3140 (SizeFGR): Move to sim-main.h
3141 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
3142 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
3143 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
3145 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
3146 FP_RM_TOMINF, GETRM): Move to sim-main.h.
3147 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
3148 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
3149 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
3150 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
3152 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
3154 (sim-alu.h): Include.
3155 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
3156 (sim_cia): Typedef to instruction_address.
3158 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
3160 * Makefile.in (interp.o): Rename generated file engine.c to
3165 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
3167 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
3169 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
3171 * gencode.c (build_instruction): For "FPSQRT", output correct
3172 number of arguments to Recip.
3174 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
3176 * Makefile.in (interp.o): Depends on sim-main.h
3178 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
3180 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
3181 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
3182 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
3183 STATE, DSSTATE): Define
3184 (GPR, FGRIDX, ..): Define.
3186 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
3187 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
3188 (GPR, FGRIDX, ...): Delete macros.
3190 * interp.c: Update names to match defines from sim-main.h
3192 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
3194 * interp.c (sim_monitor): Add SD argument.
3195 (sim_warning): Delete. Replace calls with calls to
3197 (sim_error): Delete. Replace calls with sim_io_error.
3198 (open_trace, writeout32, writeout16, getnum): Add SD argument.
3199 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
3200 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
3202 (mips_size): Rename from sim_size. Add SD argument.
3204 * interp.c (simulator): Delete global variable.
3205 (callback): Delete global variable.
3206 (mips_option_handler, sim_open, sim_write, sim_read,
3207 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
3208 sim_size,sim_monitor): Use sim_io_* not callback->*.
3209 (sim_open): ZALLOC simulator struct.
3210 (PROFILE): Do not define.
3212 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3214 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
3215 support.h with corresponding code.
3217 * sim-main.h (word64, uword64), support.h: Move definition to
3219 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
3222 * Makefile.in: Update dependencies
3223 * interp.c: Do not include.
3225 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3227 * interp.c (address_translation, load_memory, store_memory,
3228 cache_op): Rename to from AddressTranslation et.al., make global,
3231 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
3234 * interp.c (SignalException): Rename to signal_exception, make
3237 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
3239 * sim-main.h (SignalException, SignalExceptionInterrupt,
3240 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
3241 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
3242 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
3245 * interp.c, support.h: Use.
3247 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
3249 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
3250 to value_fpr / store_fpr. Add SD argument.
3251 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
3252 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
3254 * sim-main.h (ValueFPR, StoreFPR): Define.
3256 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
3258 * interp.c (sim_engine_run): Check consistency between configure
3259 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
3262 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
3263 (mips_fpu): Configure WITH_FLOATING_POINT.
3264 (mips_endian): Configure WITH_TARGET_ENDIAN.
3265 * configure: Update.
3267 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
3269 * configure: Regenerated to track ../common/aclocal.m4 changes.
3271 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
3273 * configure: Regenerated.
3275 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
3277 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
3279 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3281 * gencode.c (print_igen_insn_models): Assume certain architectures
3282 include all mips* instructions.
3283 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
3286 * Makefile.in (tmp.igen): Add target. Generate igen input from
3289 * gencode.c (FEATURE_IGEN): Define.
3290 (main): Add --igen option. Generate output in igen format.
3291 (process_instructions): Format output according to igen option.
3292 (print_igen_insn_format): New function.
3293 (print_igen_insn_models): New function.
3294 (process_instructions): Only issue warnings and ignore
3295 instructions when no FEATURE_IGEN.
3297 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
3299 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
3302 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
3304 * configure: Regenerated to track ../common/aclocal.m4 changes.
3306 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
3308 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
3309 SIM_RESERVED_BITS): Delete, moved to common.
3310 (SIM_EXTRA_CFLAGS): Update.
3312 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
3314 * configure.in: Configure non-strict memory alignment.
3315 * configure: Regenerated to track ../common/aclocal.m4 changes.
3317 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
3319 * configure: Regenerated to track ../common/aclocal.m4 changes.
3321 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
3323 * gencode.c (SDBBP,DERET): Added (3900) insns.
3324 (RFE): Turn on for 3900.
3325 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
3326 (dsstate): Made global.
3327 (SUBTARGET_R3900): Added.
3328 (CANCELDELAYSLOT): New.
3329 (SignalException): Ignore SystemCall rather than ignore and
3330 terminate. Add DebugBreakPoint handling.
3331 (decode_coproc): New insns RFE, DERET; and new registers Debug
3332 and DEPC protected by SUBTARGET_R3900.
3333 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
3335 * Makefile.in,configure.in: Add mips subtarget option.
3336 * configure: Update.
3338 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
3340 * gencode.c: Add r3900 (tx39).
3343 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
3345 * gencode.c (build_instruction): Don't need to subtract 4 for
3348 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
3350 * interp.c: Correct some HASFPU problems.
3352 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
3354 * configure: Regenerated to track ../common/aclocal.m4 changes.
3356 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
3358 * interp.c (mips_options): Fix samples option short form, should
3361 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
3363 * interp.c (sim_info): Enable info code. Was just returning.
3365 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
3367 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
3370 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
3372 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
3374 (build_instruction): Ditto for LL.
3376 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
3378 * configure: Regenerated to track ../common/aclocal.m4 changes.
3380 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3382 * configure: Regenerated to track ../common/aclocal.m4 changes.
3385 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
3387 * interp.c (sim_open): Add call to sim_analyze_program, update
3390 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
3392 * interp.c (sim_kill): Delete.
3393 (sim_create_inferior): Add ABFD argument. Set PC from same.
3394 (sim_load): Move code initializing trap handlers from here.
3395 (sim_open): To here.
3396 (sim_load): Delete, use sim-hload.c.
3398 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
3400 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3402 * configure: Regenerated to track ../common/aclocal.m4 changes.
3405 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3407 * interp.c (sim_open): Add ABFD argument.
3408 (sim_load): Move call to sim_config from here.
3409 (sim_open): To here. Check return status.
3411 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
3413 * gencode.c (build_instruction): Two arg MADD should
3414 not assign result to $0.
3416 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
3418 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
3419 * sim/mips/configure.in: Regenerate.
3421 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
3423 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
3424 signed8, unsigned8 et.al. types.
3426 * interp.c (SUB_REG_FETCH): Handle both little and big endian
3427 hosts when selecting subreg.
3429 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
3431 * interp.c (sim_engine_run): Reset the ZERO register to zero
3432 regardless of FEATURE_WARN_ZERO.
3433 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
3435 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
3437 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
3438 (SignalException): For BreakPoints ignore any mode bits and just
3440 (SignalException): Always set the CAUSE register.
3442 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
3444 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
3445 exception has been taken.
3447 * interp.c: Implement the ERET and mt/f sr instructions.
3449 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
3451 * interp.c (SignalException): Don't bother restarting an
3454 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3456 * interp.c (SignalException): Really take an interrupt.
3457 (interrupt_event): Only deliver interrupts when enabled.
3459 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
3461 * interp.c (sim_info): Only print info when verbose.
3462 (sim_info) Use sim_io_printf for output.
3464 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3466 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
3469 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3471 * interp.c (sim_do_command): Check for common commands if a
3472 simulator specific command fails.
3474 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
3476 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
3477 and simBE when DEBUG is defined.
3479 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
3481 * interp.c (interrupt_event): New function. Pass exception event
3482 onto exception handler.
3484 * configure.in: Check for stdlib.h.
3485 * configure: Regenerate.
3487 * gencode.c (build_instruction): Add UNUSED attribute to tempS
3488 variable declaration.
3489 (build_instruction): Initialize memval1.
3490 (build_instruction): Add UNUSED attribute to byte, bigend,
3492 (build_operands): Ditto.
3494 * interp.c: Fix GCC warnings.
3495 (sim_get_quit_code): Delete.
3497 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
3498 * Makefile.in: Ditto.
3499 * configure: Re-generate.
3501 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
3503 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
3505 * interp.c (mips_option_handler): New function parse argumes using
3507 (myname): Replace with STATE_MY_NAME.
3508 (sim_open): Delete check for host endianness - performed by
3510 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
3511 (sim_open): Move much of the initialization from here.
3512 (sim_load): To here. After the image has been loaded and
3514 (sim_open): Move ColdReset from here.
3515 (sim_create_inferior): To here.
3516 (sim_open): Make FP check less dependant on host endianness.
3518 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
3520 * interp.c (sim_set_callbacks): Delete.
3522 * interp.c (membank, membank_base, membank_size): Replace with
3523 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
3524 (sim_open): Remove call to callback->init. gdb/run do this.
3528 * sim-main.h (SIM_HAVE_FLATMEM): Define.
3530 * interp.c (big_endian_p): Delete, replaced by
3531 current_target_byte_order.
3533 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
3535 * interp.c (host_read_long, host_read_word, host_swap_word,
3536 host_swap_long): Delete. Using common sim-endian.
3537 (sim_fetch_register, sim_store_register): Use H2T.
3538 (pipeline_ticks): Delete. Handled by sim-events.
3540 (sim_engine_run): Update.
3542 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
3544 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3546 (SignalException): To here. Signal using sim_engine_halt.
3547 (sim_stop_reason): Delete, moved to common.
3549 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
3551 * interp.c (sim_open): Add callback argument.
3552 (sim_set_callbacks): Delete SIM_DESC argument.
3555 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
3557 * Makefile.in (SIM_OBJS): Add common modules.
3559 * interp.c (sim_set_callbacks): Also set SD callback.
3560 (set_endianness, xfer_*, swap_*): Delete.
3561 (host_read_word, host_read_long, host_swap_word, host_swap_long):
3562 Change to functions using sim-endian macros.
3563 (control_c, sim_stop): Delete, use common version.
3564 (simulate): Convert into.
3565 (sim_engine_run): This function.
3566 (sim_resume): Delete.
3568 * interp.c (simulation): New variable - the simulator object.
3569 (sim_kind): Delete global - merged into simulation.
3570 (sim_load): Cleanup. Move PC assignment from here.
3571 (sim_create_inferior): To here.
3573 * sim-main.h: New file.
3574 * interp.c (sim-main.h): Include.
3576 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
3578 * configure: Regenerated to track ../common/aclocal.m4 changes.
3580 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
3582 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3584 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
3586 * gencode.c (build_instruction): DIV instructions: check
3587 for division by zero and integer overflow before using
3588 host's division operation.
3590 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
3592 * Makefile.in (SIM_OBJS): Add sim-load.o.
3593 * interp.c: #include bfd.h.
3594 (target_byte_order): Delete.
3595 (sim_kind, myname, big_endian_p): New static locals.
3596 (sim_open): Set sim_kind, myname. Move call to set_endianness to
3597 after argument parsing. Recognize -E arg, set endianness accordingly.
3598 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
3599 load file into simulator. Set PC from bfd.
3600 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
3601 (set_endianness): Use big_endian_p instead of target_byte_order.
3603 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
3605 * interp.c (sim_size): Delete prototype - conflicts with
3606 definition in remote-sim.h. Correct definition.
3608 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3610 * configure: Regenerated to track ../common/aclocal.m4 changes.
3613 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
3615 * interp.c (sim_open): New arg `kind'.
3617 * configure: Regenerated to track ../common/aclocal.m4 changes.
3619 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3621 * configure: Regenerated to track ../common/aclocal.m4 changes.
3623 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
3625 * interp.c (sim_open): Set optind to 0 before calling getopt.
3627 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3629 * configure: Regenerated to track ../common/aclocal.m4 changes.
3631 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
3633 * interp.c : Replace uses of pr_addr with pr_uword64
3634 where the bit length is always 64 independent of SIM_ADDR.
3635 (pr_uword64) : added.
3637 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3639 * configure: Re-generate.
3641 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
3643 * configure: Regenerate to track ../common/aclocal.m4 changes.
3645 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
3647 * interp.c (sim_open): New SIM_DESC result. Argument is now
3649 (other sim_*): New SIM_DESC argument.
3651 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
3653 * interp.c: Fix printing of addresses for non-64-bit targets.
3654 (pr_addr): Add function to print address based on size.
3656 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
3658 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3660 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
3662 * gencode.c (build_mips16_operands): Correct computation of base
3663 address for extended PC relative instruction.
3665 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
3667 * interp.c (mips16_entry): Add support for floating point cases.
3668 (SignalException): Pass floating point cases to mips16_entry.
3669 (ValueFPR): Don't restrict fmt_single and fmt_word to even
3671 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
3673 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3674 and then set the state to fmt_uninterpreted.
3675 (COP_SW): Temporarily set the state to fmt_word while calling
3678 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
3680 * gencode.c (build_instruction): The high order may be set in the
3681 comparison flags at any ISA level, not just ISA 4.
3683 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
3685 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3686 COMMON_{PRE,POST}_CONFIG_FRAG instead.
3687 * configure.in: sinclude ../common/aclocal.m4.
3688 * configure: Regenerated.
3690 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
3692 * configure: Rebuild after change to aclocal.m4.
3694 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
3696 * configure configure.in Makefile.in: Update to new configure
3697 scheme which is more compatible with WinGDB builds.
3698 * configure.in: Improve comment on how to run autoconf.
3699 * configure: Re-run autoconf to get new ../common/aclocal.m4.
3700 * Makefile.in: Use autoconf substitution to install common
3703 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
3705 * gencode.c (build_instruction): Use BigEndianCPU instead of
3708 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
3710 * interp.c (sim_monitor): Make output to stdout visible in
3711 wingdb's I/O log window.
3713 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
3715 * support.h: Undo previous change to SIGTRAP
3718 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
3720 * interp.c (store_word, load_word): New static functions.
3721 (mips16_entry): New static function.
3722 (SignalException): Look for mips16 entry and exit instructions.
3723 (simulate): Use the correct index when setting fpr_state after
3724 doing a pending move.
3726 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
3728 * interp.c: Fix byte-swapping code throughout to work on
3729 both little- and big-endian hosts.
3731 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
3733 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3734 with gdb/config/i386/xm-windows.h.
3736 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
3738 * gencode.c (build_instruction): Work around MSVC++ code gen bug
3739 that messes up arithmetic shifts.
3741 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
3743 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
3744 SIGTRAP and SIGQUIT for _WIN32.
3746 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
3748 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3749 force a 64 bit multiplication.
3750 (build_instruction) [OR]: In mips16 mode, don't do anything if the
3751 destination register is 0, since that is the default mips16 nop
3754 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
3756 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3757 (build_endian_shift): Don't check proc64.
3758 (build_instruction): Always set memval to uword64. Cast op2 to
3759 uword64 when shifting it left in memory instructions. Always use
3760 the same code for stores--don't special case proc64.
3762 * gencode.c (build_mips16_operands): Fix base PC value for PC
3764 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3766 * interp.c (simJALDELAYSLOT): Define.
3767 (JALDELAYSLOT): Define.
3768 (INDELAYSLOT, INJALDELAYSLOT): Define.
3769 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3771 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
3773 * interp.c (sim_open): add flush_cache as a PMON routine
3774 (sim_monitor): handle flush_cache by ignoring it
3776 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
3778 * gencode.c (build_instruction): Use !ByteSwapMem instead of
3780 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3781 (BigEndianMem): Rename to ByteSwapMem and change sense.
3782 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3783 BigEndianMem references to !ByteSwapMem.
3784 (set_endianness): New function, with prototype.
3785 (sim_open): Call set_endianness.
3786 (sim_info): Use simBE instead of BigEndianMem.
3787 (xfer_direct_word, xfer_direct_long, swap_direct_word,
3788 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3789 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3790 ifdefs, keeping the prototype declaration.
3791 (swap_word): Rewrite correctly.
3792 (ColdReset): Delete references to CONFIG. Delete endianness related
3793 code; moved to set_endianness.
3795 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
3797 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3798 * interp.c (CHECKHILO): Define away.
3799 (simSIGINT): New macro.
3800 (membank_size): Increase from 1MB to 2MB.
3801 (control_c): New function.
3802 (sim_resume): Rename parameter signal to signal_number. Add local
3803 variable prev. Call signal before and after simulate.
3804 (sim_stop_reason): Add simSIGINT support.
3805 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3807 (sim_warning): Delete call to SignalException. Do call printf_filtered
3809 (AddressTranslation): Add #ifdef DEBUG around debugging message and
3810 a call to sim_warning.
3812 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
3814 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3815 16 bit instructions.
3817 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
3819 Add support for mips16 (16 bit MIPS implementation):
3820 * gencode.c (inst_type): Add mips16 instruction encoding types.
3821 (GETDATASIZEINSN): Define.
3822 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
3823 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
3825 (MIPS16_DECODE): New table, for mips16 instructions.
3826 (bitmap_val): New static function.
3827 (struct mips16_op): Define.
3828 (mips16_op_table): New table, for mips16 operands.
3829 (build_mips16_operands): New static function.
3830 (process_instructions): If PC is odd, decode a mips16
3831 instruction. Break out instruction handling into new
3832 build_instruction function.
3833 (build_instruction): New static function, broken out of
3834 process_instructions. Check modifiers rather than flags for SHIFT
3835 bit count and m[ft]{hi,lo} direction.
3836 (usage): Pass program name to fprintf.
3837 (main): Remove unused variable this_option_optind. Change
3838 ``*loptarg++'' to ``loptarg++''.
3839 (my_strtoul): Parenthesize && within ||.
3840 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3841 (simulate): If PC is odd, fetch a 16 bit instruction, and
3842 increment PC by 2 rather than 4.
3843 * configure.in: Add case for mips16*-*-*.
3844 * configure: Rebuild.
3846 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
3848 * interp.c: Allow -t to enable tracing in standalone simulator.
3849 Fix garbage output in trace file and error messages.
3851 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
3853 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3854 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3855 * configure.in: Simplify using macros in ../common/aclocal.m4.
3856 * configure: Regenerated.
3857 * tconfig.in: New file.
3859 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
3861 * interp.c: Fix bugs in 64-bit port.
3862 Use ansi function declarations for msvc compiler.
3863 Initialize and test file pointer in trace code.
3864 Prevent duplicate definition of LAST_EMED_REGNUM.
3866 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
3868 * interp.c (xfer_big_long): Prevent unwanted sign extension.
3870 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
3872 * interp.c (SignalException): Check for explicit terminating
3874 * gencode.c: Pass instruction value through SignalException()
3875 calls for Trap, Breakpoint and Syscall.
3877 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3879 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3880 only used on those hosts that provide it.
3881 * configure.in: Add sqrt() to list of functions to be checked for.
3882 * config.in: Re-generated.
3883 * configure: Re-generated.
3885 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
3887 * gencode.c (process_instructions): Call build_endian_shift when
3888 expanding STORE RIGHT, to fix swr.
3889 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3890 clear the high bits.
3891 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3892 Fix float to int conversions to produce signed values.
3894 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
3896 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3897 (process_instructions): Correct handling of nor instruction.
3898 Correct shift count for 32 bit shift instructions. Correct sign
3899 extension for arithmetic shifts to not shift the number of bits in
3900 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
3901 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
3903 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3904 It's OK to have a mult follow a mult. What's not OK is to have a
3905 mult follow an mfhi.
3906 (Convert): Comment out incorrect rounding code.
3908 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
3910 * interp.c (sim_monitor): Improved monitor printf
3911 simulation. Tidied up simulator warnings, and added "--log" option
3912 for directing warning message output.
3913 * gencode.c: Use sim_warning() rather than WARNING macro.
3915 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
3917 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3918 getopt1.o, rather than on gencode.c. Link objects together.
3919 Don't link against -liberty.
3920 (gencode.o, getopt.o, getopt1.o): New targets.
3921 * gencode.c: Include <ctype.h> and "ansidecl.h".
3922 (AND): Undefine after including "ansidecl.h".
3923 (ULONG_MAX): Define if not defined.
3924 (OP_*): Don't define macros; now defined in opcode/mips.h.
3925 (main): Call my_strtoul rather than strtoul.
3926 (my_strtoul): New static function.
3928 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
3930 * gencode.c (process_instructions): Generate word64 and uword64
3931 instead of `long long' and `unsigned long long' data types.
3932 * interp.c: #include sysdep.h to get signals, and define default
3934 * (Convert): Work around for Visual-C++ compiler bug with type
3936 * support.h: Make things compile under Visual-C++ by using
3937 __int64 instead of `long long'. Change many refs to long long
3938 into word64/uword64 typedefs.
3940 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
3942 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3943 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3945 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3946 (AC_PROG_INSTALL): Added.
3947 (AC_PROG_CC): Moved to before configure.host call.
3948 * configure: Rebuilt.
3950 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
3952 * configure.in: Define @SIMCONF@ depending on mips target.
3953 * configure: Rebuild.
3954 * Makefile.in (run): Add @SIMCONF@ to control simulator
3956 * gencode.c: Change LOADDRMASK to 64bit memory model only.
3957 * interp.c: Remove some debugging, provide more detailed error
3958 messages, update memory accesses to use LOADDRMASK.
3960 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
3962 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3963 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
3965 * configure: Rebuild.
3966 * config.in: New file, generated by autoheader.
3967 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
3968 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
3969 HAVE_ANINT and HAVE_AINT, as appropriate.
3970 * Makefile.in (run): Use @LIBS@ rather than -lm.
3971 (interp.o): Depend upon config.h.
3972 (Makefile): Just rebuild Makefile.
3973 (clean): Remove stamp-h.
3974 (mostlyclean): Make the same as clean, not as distclean.
3975 (config.h, stamp-h): New targets.
3977 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3979 * interp.c (ColdReset): Fix boolean test. Make all simulator
3982 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
3984 * interp.c (xfer_direct_word, xfer_direct_long,
3985 swap_direct_word, swap_direct_long, xfer_big_word,
3986 xfer_big_long, xfer_little_word, xfer_little_long,
3987 swap_word,swap_long): Added.
3988 * interp.c (ColdReset): Provide function indirection to
3989 host<->simulated_target transfer routines.
3990 * interp.c (sim_store_register, sim_fetch_register): Updated to
3991 make use of indirected transfer routines.
3993 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
3995 * gencode.c (process_instructions): Ensure FP ABS instruction
3997 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3998 system call support.
4000 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
4002 * interp.c (sim_do_command): Complain if callback structure not
4005 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
4007 * interp.c (Convert): Provide round-to-nearest and round-to-zero
4008 support for Sun hosts.
4009 * Makefile.in (gencode): Ensure the host compiler and libraries
4010 used for cross-hosted build.
4012 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
4014 * interp.c, gencode.c: Some more (TODO) tidying.
4016 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
4018 * gencode.c, interp.c: Replaced explicit long long references with
4019 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
4020 * support.h (SET64LO, SET64HI): Macros added.
4022 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
4024 * configure: Regenerate with autoconf 2.7.
4026 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
4028 * interp.c (LoadMemory): Enclose text following #endif in /* */.
4029 * support.h: Remove superfluous "1" from #if.
4030 * support.h (CHECKSIM): Remove stray 'a' at end of line.
4032 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
4034 * interp.c (StoreFPR): Control UndefinedResult() call on
4035 WARN_RESULT manifest.
4037 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
4039 * gencode.c: Tidied instruction decoding, and added FP instruction
4042 * interp.c: Added dineroIII, and BSD profiling support. Also
4043 run-time FP handling.
4045 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
4047 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
4048 gencode.c, interp.c, support.h: created.