sim/mips/ChangeLog

   1 2021-04-22  Tom Tromey  <tom@tromey.com>
   2
   3         * configure, config.in: Rebuild.
   4
   5 2021-04-22  Tom Tromey  <tom@tromey.com>
   6
   7         * Makefile.in (interp.o, m16run.o, micromipsrun.o, multi-run.o):
   8         Remove.
   9         (SIM_EXTRA_DEPS): New variable.
  10
  11 2021-04-22  Tom Tromey  <tom@tromey.com>
  12
  13         * configure: Rebuild.
  14
  15 2021-04-21  Mike Frysinger  <vapier@gentoo.org>
  16
  17         * aclocal.m4: Regenerate.
  18
  19 2021-04-21  Simon Marchi  <simon.marchi@polymtl.ca>
  20
  21         * configure: Regenerate.
  22
  23 2021-04-18  Mike Frysinger  <vapier@gentoo.org>
  24
  25         * configure: Regenerate.
  26
  27 2021-04-12  Mike Frysinger  <vapier@gentoo.org>
  28
  29         * interp.c (sim_open): Delete 3rd arg to sim_cpu_alloc_all.
  30
  31 2021-04-08  Simon Marchi  <simon.marchi@polymtl.ca>
  32
  33         * Makefile.in: Set ASAN_OPTIONS when running igen.
  34
  35 2021-04-04  Steve Ellcey  <sellcey@mips.com>
  36             Faraz Shahbazker  <fshahbazker@wavecomp.com>
  37
  38         * interp.c (sim_monitor): Add switch entries for unlink (13),
  39         lseek (14), and stat (15).
  40
  41 2021-04-02  Mike Frysinger  <vapier@gentoo.org>
  42
  43         * Makefile.in (../igen/igen): Delete rule.
  44         (tmp-igen, tmp-m16, tmp-micromips): Delete ../igen make.
  45
  46 2021-04-02  Mike Frysinger  <vapier@gentoo.org>
  47
  48         * aclocal.m4, configure: Regenerate.
  49
  50 2021-02-28  Mike Frysinger  <vapier@gentoo.org>
  51
  52         * configure: Regenerate.
  53
  54 2021-02-27  Mike Frysinger  <vapier@gentoo.org>
  55
  56         * Makefile.in (SIM_EXTRA_ALL): Delete.
  57         (all): New target.
  58
  59 2021-02-21  Mike Frysinger  <vapier@gentoo.org>
  60
  61         * configure.ac (AC_CONFIG_MACRO_DIRS): Replace common with m4.
  62         * aclocal.m4, configure: Regenerate.
  63
  64 2021-02-13  Mike Frysinger  <vapier@gentoo.org>
  65
  66         * configure.ac: Replace sinclude with AC_CONFIG_MACRO_DIRS.
  67         * aclocal.m4, configure: Regenerate.
  68
  69 2021-02-06  Mike Frysinger  <vapier@gentoo.org>
  70
  71         * interp.c (sim_open): Delete call to STATE_WATCHPOINTS.
  72
  73 2021-02-06  Mike Frysinger  <vapier@gentoo.org>
  74
  75         * configure: Regenerate.
  76
  77 2021-01-30  Mike Frysinger  <vapier@gentoo.org>
  78
  79         * interp.c (sim_open): Delete STATE_WATCHPOINTS (sd)->sizeof_pc.
  80
  81 2021-01-11  Mike Frysinger  <vapier@gentoo.org>
  82
  83         * config.in, configure: Regenerate.
  84         * interp.c: Delete HAVE_STRING_H, HAVE_STRINGS_H, HAVE_STDLIB_H,
  85         and strings.h include.
  86
  87 2021-01-09  Mike Frysinger  <vapier@gentoo.org>
  88
  89         * configure: Regenerate.
  90
  91 2021-01-09  Mike Frysinger  <vapier@gentoo.org>
  92
  93         * configure.ac (SIM_AC_OPTION_WARNINGS): Pass "no".
  94         * configure: Regenerate.
  95
  96 2021-01-08  Mike Frysinger  <vapier@gentoo.org>
  97
  98         * configure: Regenerate.
  99
 100 2021-01-04  Mike Frysinger  <vapier@gentoo.org>
 101
 102         * configure: Regenerate.
 103
 104 2020-12-31  Pavel I. Kryukov  <kryukov@frtk.ru>  (tiny change)
 105
 106         *  sim-main.c: Include <stdlib.h>.
 107
 108 2020-12-14  Pavel I. Kryukov  <kryukov@frtk.ru>  (tiny change)
 109
 110         * cp1.c: Include <stdlib.h>.
 111
 112 2020-07-29  Simon Marchi  <simon.marchi@efficios.com>
 113
 114         * configure: Re-generate.
 115
 116 2017-09-06  John Baldwin  <jhb@FreeBSD.org>
 117
 118         * configure: Regenerate.
 119
 120 2016-11-11  Mike Frysinger  <vapier@gentoo.org>
 121
 122         PR sim/20808
 123         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Define CPU to cpu
 124         and SD to sd.
 125
 126 2016-11-11  Mike Frysinger  <vapier@gentoo.org>
 127
 128         PR sim/20809
 129         * mips.igen (check_u64): Enable for `r3900'.
 130
 131 2016-02-05  Mike Frysinger  <vapier@gentoo.org>
 132
 133         * configure.ac (sim_engine_run): Change sd->base.prog_bfd to
 134         STATE_PROG_BFD (sd).
 135         * configure: Regenerate.
 136
 137 2016-01-18  Andrew Bennett  <andrew.bennett@imgtec.com>
 138             Maciej W. Rozycki  <macro@imgtec.com>
 139
 140         PR sim/19441
 141         * micromips.igen (delayslot_micromips): Enable for `micromips32',
 142         `micromips64' and `micromipsdsp' only.
 143         (process_isa_mode): Enable for `micromips32' and `micromips64' only.
 144         (do_micromips_jalr, do_micromips_jal): Likewise.
 145         (compute_movep_src_reg): Likewise.
 146         (compute_andi16_imm): Likewise.
 147         (convert_fmt_micromips): Likewise.
 148         (convert_fmt_micromips_cvt_d): Likewise.
 149         (convert_fmt_micromips_cvt_s): Likewise.
 150         (FMT_MICROMIPS): Likewise.
 151         (FMT_MICROMIPS_CVT_D): Likewise.
 152         (FMT_MICROMIPS_CVT_S): Likewise.
 153
 154 2016-01-12  Mike Frysinger  <vapier@gentoo.org>
 155
 156         * interp.c: Include elf-bfd.h.
 157         (sim_create_inferior): Truncate pc to 32-bits when EI_CLASS is
 158         ELFCLASS32.
 159
 160 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 161
 162         * config.in, configure: Regenerate.
 163
 164 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 165
 166         * configure: Regenerate.
 167
 168 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 169
 170         * configure: Regenerate.
 171
 172 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 173
 174         * configure: Regenerate.
 175
 176 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 177
 178         * configure: Regenerate.
 179
 180 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 181
 182         * configure.ac (SIM_AC_OPTION_SMP): Delete call.
 183         * configure: Regenerate.
 184
 185 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 186
 187         * configure.ac (SIM_AC_OPTION_INLINE): Delete call.
 188         * configure: Regenerate.
 189
 190 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 191
 192         * configure: Regenerate.
 193
 194 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 195
 196         * configure: Regenerate.
 197
 198 2016-01-09  Mike Frysinger  <vapier@gentoo.org>
 199
 200         * config.in, configure: Regenerate.
 201
 202 2016-01-06  Mike Frysinger  <vapier@gentoo.org>
 203
 204         * interp.c (sim_open): Mark argv const.
 205         (sim_create_inferior): Mark argv and env const.
 206
 207 2016-01-04  Mike Frysinger  <vapier@gentoo.org>
 208
 209         * configure: Regenerate.
 210
 211 2016-01-03  Mike Frysinger  <vapier@gentoo.org>
 212
 213         * interp.c (sim_open): Update sim_parse_args comment.
 214
 215 2016-01-03  Mike Frysinger  <vapier@gentoo.org>
 216
 217         * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
 218         * configure: Regenerate.
 219
 220 2016-01-02  Mike Frysinger  <vapier@gentoo.org>
 221
 222         * configure.ac (mips_endian): Change LITTLE_ENDIAN to LITTLE.
 223         (default_endian): Likewise.  Change BIG_ENDIAN to BIG.
 224         * configure: Regenerate.
 225         * sim-main.h (BigEndianMem): Change BIG_ENDIAN to BFD_ENDIAN_BIG.
 226
 227 2016-01-02  Mike Frysinger  <vapier@gentoo.org>
 228
 229         * dv-tx3904cpu.c (CPU, SD): Delete.
 230
 231 2015-12-30  Mike Frysinger  <vapier@gentoo.org>
 232
 233         * wrapper.c (mips_reg_store, mips_reg_fetch): Define.
 234         (sim_open): Call CPU_REG_FETCH/CPU_REG_STORE.
 235         (sim_store_register): Rename to ...
 236         (mips_reg_store): ... this.  Delete local cpu var.
 237         Update sim_io_eprintf calls.
 238         (sim_fetch_register): Rename to ...
 239         (mips_reg_fetch): ... this.  Delete local cpu var.
 240         Update sim_io_eprintf calls.
 241
 242 2015-12-27  Mike Frysinger  <vapier@gentoo.org>
 243
 244         * Makefile.in (SIM_OBJS): Delete sim-hload.o.
 245
 246 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 247
 248         * config.in, configure: Regenerate.
 249
 250 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 251
 252         * interp.c (sim_write, sim_read): Delete.
 253         (store_word): Delete call to AddressTranslation and set paddr=vaddr.
 254         (load_word): Likewise.
 255         * micromips.igen (cache): Likewise.
 256         * mips.igen (do_ll, do_lld, do_sc, do_scd, do_suxc1_32, do_swc1,
 257         do_swxc1, cache, do_load, do_load_left, do_load_right, do_store,
 258         do_store_left, do_store_right, do_load_double, do_store_double):
 259         Likewise.
 260         (do_pref): Delete call to AddressTranslation and stub out Prefetch.
 261         (do_prefx): Likewise.
 262         * sim-main.c (address_translation, prefetch): Delete.
 263         (ifetch32, ifetch16): Delete call to AddressTranslation and set
 264         paddr=vaddr.
 265         * sim-main.h (Uncached, CachedNoncoherent, CachedCoherent, Cached,
 266         address_translation, AddressTranslation, prefetch, Prefetch): Delete.
 267         (LoadMemory, StoreMemory): Delete CCA arg.
 268
 269 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 270
 271         * configure.ac (SIM_SUBTARGET): Drop -DTARGET_TX3904=1.
 272         * configure: Regenerated.
 273
 274 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 275
 276         * sim-main.h (SIM_QUIET_NAN_NEGATED): Move from tconfig.h.
 277         * tconfig.h: Delete.
 278
 279 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 280
 281         * tconfig.h (SIM_HANDLES_LMA): Delete.
 282
 283 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 284
 285         * sim-main.h (WITH_WATCHPOINTS): Delete.
 286
 287 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 288
 289         * interp.c [SIM_HAVE_FLATMEM] (sim_open): Delete flatmem code.
 290
 291 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 292
 293         * tconfig.h (SIM_HAVE_SIMCACHE): Delete.
 294
 295 2015-12-15  Dominik Vogt  <vogt@linux.vnet.ibm.com>
 296
 297         * micromips.igen (process_isa_mode): Fix left shift of negative
 298         value.
 299
 300 2015-11-17  Mike Frysinger  <vapier@gentoo.org>
 301
 302         * sim-main.h (WITH_MODULO_MEMORY): Delete.
 303
 304 2015-11-15  Mike Frysinger  <vapier@gentoo.org>
 305
 306         * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
 307
 308 2015-11-14  Mike Frysinger  <vapier@gentoo.org>
 309
 310         * interp.c (sim_close): Rename to ...
 311         (mips_sim_close): ... this.  Delete calls to sim_module_uninstall and
 312         sim_io_shutdown.
 313         * sim-main.h (mips_sim_close): Declare.
 314         (SIM_CLOSE_HOOK): Define.
 315
 316 2015-09-25  Andrew Bennett  <andrew.bennett@imgtec.com>
 317             Ali Lown  <ali.lown@imgtec.com>
 318
 319         * Makefile.in (tmp-micromips): New rule.
 320         (tmp-mach-multi): Add support for micromips.
 321         * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
 322         that works for both mips64 and micromips64.
 323         (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
 324         micromips32.
 325         Add build support for micromips.
 326         * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
 327         do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
 328         do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
 329         do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
 330         do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
 331         do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
 332         do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
 333         do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
 334         Refactored instruction code to use these functions.
 335         * dsp2.igen: Refactored instruction code to use the new functions.
 336         * interp.c (decode_coproc): Refactored to work with any instruction
 337         encoding.
 338         (isa_mode): New variable
 339         (RSVD_INSTRUCTION): Changed to 0x00000039.
 340         * m16.igen (BREAK16): Refactored instruction to use do_break16.
 341         (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
 342         * micromips.dc: New file.
 343         * micromips.igen: New file.
 344         * micromips16.dc: New file.
 345         * micromipsdsp.igen: New file.
 346         * micromipsrun.c: New file.
 347         * mips.igen (do_swc1): Changed to work with any instruction encoding.
 348         (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
 349         do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo,
 350         do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu,
 351         do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu,
 352         do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub,
 353         do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo,
 354         do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc,
 355         do_scd, do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu,
 356         do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt,
 357         do_add_fmt, do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1,
 358         do_cvt_d_fmt, do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl,
 359         do_cvt_s_pu, do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt,
 360         do_luxc1_32, do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b,
 361         do_mov_fmt, do_movtf, do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt,
 362         do_mtc1b, do_mul_fmt, do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps,
 363         do_plu_ps, do_pul_ps, do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt,
 364         do_prefx, do_sdc1, do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt,
 365         do_swc1, do_swxc1, do_trunc_fmt): New functions, refactored from existing
 366         instructions.
 367         Refactored instruction code to use these functions.
 368         (RSVD): Changed to use new reserved instruction.
 369         (loadstore_ea, not_word_value, unpredictable, check_mt_hilo,
 370         check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32,
 371         do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double,
 372         do_store_double):  Added micromips32 and micromips64 models.
 373         Added include for micromips.igen and micromipsdsp.igen
 374         Add micromips32 and micromips64 models.
 375         (DecodeCoproc): Updated to use new macro definition.
 376         * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
 377         do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
 378         do_seb, do_seh do_rdhwr, do_wsbh): New functions.
 379         Refactored instruction code to use these functions.
 380         * sim-main.h (CP0_operation): New enum.
 381         (DecodeCoproc): Updated macro.
 382         (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
 383         MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16,
 384         MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and
 385         ISA_MODE_MICROMIPS): New defines.
 386         (sim_state): Add isa_mode field.
 387
 388 2015-06-23  Mike Frysinger  <vapier@gentoo.org>
 389
 390         * configure: Regenerate.
 391
 392 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 393
 394         * configure.ac: Change configure.in to configure.ac.
 395         * configure: Regenerate.
 396
 397 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 398
 399         * configure: Regenerate.
 400
 401 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 402
 403         * interp.c [TRACE]: Delete.
 404         (TRACE): Change to WITH_TRACE_ANY_P.
 405         [!WITH_TRACE_ANY_P] (open_trace): Define.
 406         (mips_option_handler, open_trace, sim_close, dotrace):
 407         Change defined(TRACE) to WITH_TRACE_ANY_P.
 408         (sim_open): Delete TRACE ifdef check.
 409         * sim-main.c (load_memory): Delete TRACE ifdef check.
 410         (store_memory): Likewise.
 411         * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
 412         [!WITH_TRACE_ANY_P] (dotrace): Define.
 413
 414 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 415
 416         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
 417         comments.
 418
 419 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 420
 421         * sim-main.h (SIM_CPU): Delete.
 422
 423 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 424
 425         * sim-main.h (sim_cia): Delete.
 426
 427 2015-04-17  Mike Frysinger  <vapier@gentoo.org>
 428
 429         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
 430         PU_PC_GET.
 431         * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
 432         (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
 433         * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
 434         CIA_SET to CPU_PC_SET.
 435         * sim-main.h (CIA_GET, CIA_SET): Delete.
 436
 437 2015-04-15  Mike Frysinger  <vapier@gentoo.org>
 438
 439         * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
 440         * sim-main.h (STATE_CPU): Delete.
 441
 442 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 443
 444         * configure: Regenerate.
 445
 446 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 447
 448         * Makefile.in (SIM_OBJS): Add sim-cpu.o.
 449         * interp.c (mips_pc_get, mips_pc_set): New functions.
 450         (sim_open): Declare new local var i.  Call sim_cpu_alloc_all.
 451         Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
 452         (sim_pc_get): Delete.
 453         * sim-main.h (SIM_CPU): Define.
 454         (struct sim_state): Change cpu to an array of pointers.
 455         (STATE_CPU): Drop &.
 456
 457 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 458
 459         * interp.c (mips_option_handler, open_trace, sim_close,
 460         sim_write, sim_read, sim_store_register, sim_fetch_register,
 461         sim_create_inferior, pr_addr, pr_uword64): Convert old style
 462         prototypes.
 463         (sim_open): Convert old style prototype.  Change casts with
 464         sim_write to unsigned char *.
 465         (fetch_str): Change null to unsigned char, and change cast to
 466         unsigned char *.
 467         (sim_monitor): Change c & ch to unsigned char.  Change cast to
 468         unsigned char *.
 469
 470 2015-04-12  Mike Frysinger  <vapier@gentoo.org>
 471
 472         * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
 473
 474 2015-04-06  Mike Frysinger  <vapier@gentoo.org>
 475
 476         * Makefile.in (SIM_OBJS): Delete sim-engine.o.
 477
 478 2015-04-01  Mike Frysinger  <vapier@gentoo.org>
 479
 480         * tconfig.h (SIM_HAVE_PROFILE): Delete.
 481
 482 2015-03-31  Mike Frysinger  <vapier@gentoo.org>
 483
 484         * config.in, configure: Regenerate.
 485
 486 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 487
 488         * interp.c (sim_pc_get): New function.
 489
 490 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 491
 492         * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
 493         * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
 494
 495 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 496
 497         * configure: Regenerate.
 498
 499 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 500
 501         * configure: Regenerate.
 502
 503 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 504
 505         * configure: Regenerate.
 506         * configure.ac (mips_extra_objs): Delete.
 507         * Makefile.in (MIPS_EXTRA_OBJS): Delete.
 508         (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
 509
 510 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 511
 512         * configure: Regenerate.
 513         * configure.ac: Delete sim_hw checks for dv-sockser.
 514
 515 2015-03-16  Mike Frysinger  <vapier@gentoo.org>
 516
 517         * config.in, configure: Regenerate.
 518         * tconfig.in: Rename file ...
 519         * tconfig.h: ... here.
 520
 521 2015-03-15  Mike Frysinger  <vapier@gentoo.org>
 522
 523         * tconfig.in: Delete includes.
 524         [HAVE_DV_SOCKSER]: Delete.
 525
 526 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
 527
 528         * Makefile.in (SIM_RUN_OBJS): Delete.
 529
 530 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
 531
 532         * configure.ac (AC_CHECK_HEADERS): Delete.
 533         * aclocal.m4, configure: Regenerate.
 534
 535 2014-08-19  Alan Modra  <amodra@gmail.com>
 536
 537         * configure: Regenerate.
 538
 539 2014-08-15  Roland McGrath  <mcgrathr@google.com>
 540
 541         * configure: Regenerate.
 542         * config.in: Regenerate.
 543
 544 2014-03-04  Mike Frysinger  <vapier@gentoo.org>
 545
 546         * configure: Regenerate.
 547
 548 2013-09-23  Alan Modra  <amodra@gmail.com>
 549
 550         * configure: Regenerate.
 551
 552 2013-06-03  Mike Frysinger  <vapier@gentoo.org>
 553
 554         * aclocal.m4, configure: Regenerate.
 555
 556 2013-05-10  Freddie Chopin  <freddie_chopin@op.pl>
 557
 558         * configure: Rebuild.
 559
 560 2013-03-26  Mike Frysinger  <vapier@gentoo.org>
 561
 562         * configure: Regenerate.
 563
 564 2013-03-23  Joel Sherrill  <joel.sherrill@oarcorp.com>
 565
 566         * configure.ac: Address use of dv-sockser.o.
 567         * tconfig.in: Conditionalize use of dv_sockser_install.
 568         * configure: Regenerated.
 569         * config.in: Regenerated.
 570
 571 2012-10-04  Chao-ying Fu  <fu@mips.com>
 572             Steve Ellcey  <sellcey@mips.com>
 573
 574         * mips/mips3264r2.igen (rdhwr): New.
 575
 576 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
 577
 578         * configure.ac: Always link against dv-sockser.o.
 579         * configure: Regenerate.
 580
 581 2012-06-15  Joel Brobecker  <brobecker@adacore.com>
 582
 583         * config.in, configure: Regenerate.
 584
 585 2012-05-18  Nick Clifton  <nickc@redhat.com>
 586
 587         PR 14072
 588         * interp.c: Include config.h before system header files.
 589
 590 2012-03-24  Mike Frysinger  <vapier@gentoo.org>
 591
 592         * aclocal.m4, config.in, configure: Regenerate.
 593
 594 2011-12-03  Mike Frysinger  <vapier@gentoo.org>
 595
 596         * aclocal.m4: New file.
 597         * configure: Regenerate.
 598
 599 2011-10-19  Mike Frysinger  <vapier@gentoo.org>
 600
 601         * configure: Regenerate after common/acinclude.m4 update.
 602
 603 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 604
 605         * configure.ac: Change include to common/acinclude.m4.
 606
 607 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 608
 609         * configure.ac: Change AC_PREREQ to 2.64.  Delete AC_CONFIG_HEADER
 610         call.  Replace common.m4 include with SIM_AC_COMMON.
 611         * configure: Regenerate.
 612
 613 2011-07-08  Hans-Peter Nilsson  <hp@axis.com>
 614
 615         * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
 616         $(SIM_EXTRA_DEPS).
 617         (tmp-mach-multi): Exit early when igen fails.
 618
 619 2011-07-05  Mike Frysinger  <vapier@gentoo.org>
 620
 621         * interp.c (sim_do_command): Delete.
 622
 623 2011-02-14  Mike Frysinger  <vapier@gentoo.org>
 624
 625         * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
 626         (tx3904sio_fifo_reset): Likewise.
 627         * interp.c (sim_monitor): Likewise.
 628
 629 2010-04-14  Mike Frysinger  <vapier@gentoo.org>
 630
 631         * interp.c (sim_write): Add const to buffer arg.
 632
 633 2010-01-18  Masaki Muranaka  <monaka@monami-software.com>  (tiny change)
 634
 635         * interp.c: Don't include sysdep.h
 636
 637 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 638
 639         * configure: Regenerate.
 640
 641 2009-08-22  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 642
 643         * config.in: Regenerate.
 644         * configure: Likewise.
 645
 646         * configure: Regenerate.
 647
 648 2008-07-11  Hans-Peter Nilsson  <hp@axis.com>
 649
 650         * configure: Regenerate to track ../common/common.m4 changes.
 651         * config.in: Ditto.
 652
 653 2008-06-06  Vladimir Prus  <vladimir@codesourcery.com>
 654             Daniel Jacobowitz  <dan@codesourcery.com>
 655             Joseph Myers  <joseph@codesourcery.com>
 656
 657         * configure: Regenerate.
 658
 659 2007-10-22  Richard Sandiford  <rsandifo@nildram.co.uk>
 660
 661         * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
 662         that unconditionally allows fmt_ps.
 663         (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
 664         (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
 665         (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
 666         filter from 64,f to 32,f.
 667         (PREFX): Change filter from 64 to 32.
 668         (LDXC1, LUXC1): Provide separate mips32r2 implementations
 669         that use do_load_double instead of do_load.  Make both LUXC1
 670         versions unpredictable if SizeFGR () != 64.
 671         (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
 672         instead of do_store.  Remove unused variable.  Make both SUXC1
 673         versions unpredictable if SizeFGR () != 64.
 674
 675 2007-10-07  Richard Sandiford  <rsandifo@nildram.co.uk>
 676
 677         * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
 678         (sc, swxc1): Likewise.  Also fix big-endian and reverse-endian
 679         shifts for that case.
 680
 681 2007-09-04  Nick Clifton  <nickc@redhat.com>
 682
 683         * interp.c (options enum): Add OPTION_INFO_MEMORY.
 684         (display_mem_info): New static variable.
 685         (mips_option_handler): Handle OPTION_INFO_MEMORY.
 686         (mips_options): Add info-memory and memory-info.
 687         (sim_open): After processing the command line and board
 688         specification, check display_mem_info.  If it is set then
 689         call the real handler for the --memory-info command line
 690         switch.
 691
 692 2007-08-24  Joel Brobecker  <brobecker@adacore.com>
 693
 694         * configure.ac: Change license of multi-run.c to GPL version 3.
 695         * configure: Regenerate.
 696
 697 2007-06-28  Richard Sandiford  <richard@codesourcery.com>
 698
 699         * configure.ac, configure: Revert last patch.
 700
 701 2007-06-26  Richard Sandiford  <richard@codesourcery.com>
 702
 703         * configure.ac (sim_mipsisa3264_configs): New variable.
 704         (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
 705         every configuration support all four targets, using the triplet to
 706         determine the default.
 707         * configure: Regenerate.
 708
 709 2007-06-25  Richard Sandiford  <richard@codesourcery.com>
 710
 711         * Makefile.in (m16run.o): New rule.
 712
 713 2007-05-15  Thiemo Seufer  <ths@mips.com>
 714
 715         * mips3264r2.igen (DSHD): Fix compile warning.
 716
 717 2007-05-14  Thiemo Seufer  <ths@mips.com>
 718
 719         * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
 720         CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
 721         NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
 722         RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
 723         for mips32r2.
 724
 725 2007-03-01  Thiemo Seufer  <ths@mips.com>
 726
 727         * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
 728         and mips64.
 729
 730 2007-02-20  Thiemo Seufer  <ths@mips.com>
 731
 732         * dsp.igen: Update copyright notice.
 733         * dsp2.igen: Fix copyright notice.
 734
 735 2007-02-20  Thiemo Seufer  <ths@mips.com>
 736             Chao-Ying Fu  <fu@mips.com>
 737
 738         * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
 739         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 740         Add dsp2 to sim_igen_machine.
 741         * configure: Regenerate.
 742         * dsp.igen (do_ph_op): Add MUL support when op = 2.
 743         (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
 744         (mulq_rs.ph): Use do_ph_mulq.
 745         (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
 746         * mips.igen: Add dsp2 model and include dsp2.igen.
 747         (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
 748         for *mips32r2, *mips64r2, *dsp.
 749         (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
 750         for *mips32r2, *mips64r2, *dsp2.
 751         * dsp2.igen: New file for MIPS DSP REV 2 ASE.
 752
 753 2007-02-19  Thiemo Seufer  <ths@mips.com>
 754             Nigel Stephens  <nigel@mips.com>
 755
 756         * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
 757         jumps with hazard barrier.
 758
 759 2007-02-19  Thiemo Seufer  <ths@mips.com>
 760             Nigel Stephens  <nigel@mips.com>
 761
 762         * interp.c (sim_monitor): Flush stdout and stderr file descriptors
 763         after each call to sim_io_write.
 764
 765 2007-02-19  Thiemo Seufer  <ths@mips.com>
 766             Nigel Stephens  <nigel@mips.com>
 767
 768         * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
 769         supported by this simulator.
 770         (decode_coproc): Recognise additional CP0 Config registers
 771         correctly.
 772
 773 2007-02-19  Thiemo Seufer  <ths@mips.com>
 774             Nigel Stephens  <nigel@mips.com>
 775             David Ung  <davidu@mips.com>
 776
 777         * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
 778         uninterpreted formats. If fmt is one of the uninterpreted types
 779         don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
 780         fmt_word, and fmt_uninterpreted_64 like fmt_long.
 781         (store_fpr): When writing an invalid odd register, set the
 782         matching even register to fmt_unknown, not the following register.
 783         * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
 784         the the memory window at offset 0 set by --memory-size command
 785         line option.
 786         (sim_store_register): Handle storing 4 bytes to an 8 byte floating
 787         point register.
 788         (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
 789         register.
 790         (sim_monitor): When returning the memory size to the MIPS
 791         application, use the value in STATE_MEM_SIZE, not an arbitrary
 792         hardcoded value.
 793         (cop_lw): Don' mess around with FPR_STATE, just pass
 794         fmt_uninterpreted_32 to StoreFPR.
 795         (cop_sw): Similarly.
 796         (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
 797         (cop_sd): Similarly.
 798         * mips.igen (not_word_value): Single version for mips32, mips64
 799         and mips16.
 800
 801 2007-02-19  Thiemo Seufer <ths@mips.com>
 802             Nigel Stephens  <nigel@mips.com>
 803
 804         * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
 805         MBytes.
 806
 807 2007-02-17  Thiemo Seufer  <ths@mips.com>
 808
 809         * configure.ac (mips*-sde-elf*): Move in front of generic machine
 810         configuration.
 811         * configure: Regenerate.
 812
 813 2007-02-17  Thiemo Seufer  <ths@mips.com>
 814
 815         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 816         Add mdmx to sim_igen_machine.
 817         (mipsisa64*-*-*): Likewise. Remove dsp.
 818         (mipsisa32*-*-*): Remove dsp.
 819         * configure: Regenerate.
 820
 821 2007-02-13  Thiemo Seufer  <ths@mips.com>
 822
 823         * configure.ac: Add mips*-sde-elf* target.
 824         * configure: Regenerate.
 825
 826 2006-12-21  Hans-Peter Nilsson  <hp@axis.com>
 827
 828         * acconfig.h: Remove.
 829         * config.in, configure: Regenerate.
 830
 831 2006-11-07  Thiemo Seufer  <ths@mips.com>
 832
 833         * dsp.igen (do_w_op): Fix compiler warning.
 834
 835 2006-08-29  Thiemo Seufer  <ths@mips.com>
 836             David Ung  <davidu@mips.com>
 837
 838         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
 839         sim_igen_machine.
 840         * configure: Regenerate.
 841         * mips.igen (model): Add smartmips.
 842         (MADDU): Increment ACX if carry.
 843         (do_mult): Clear ACX.
 844         (ROR,RORV): Add smartmips.
 845         (include): Include smartmips.igen.
 846         * sim-main.h (ACX): Set to REGISTERS[89].
 847         * smartmips.igen: New file.
 848
 849 2006-08-29  Thiemo Seufer  <ths@mips.com>
 850             David Ung  <davidu@mips.com>
 851
 852         * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
 853         mips3264r2.igen. Add missing dependency rules.
 854         * m16e.igen: Support for mips16e save/restore instructions.
 855
 856 2006-06-13  Richard Earnshaw  <rearnsha@arm.com>
 857
 858         * configure: Regenerated.
 859
 860 2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
 861
 862         * configure: Regenerated.
 863
 864 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
 865
 866         * configure: Regenerated.
 867
 868 2006-05-15 Chao-ying Fu  <fu@mips.com>
 869
 870         * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
 871
 872 2006-04-18  Nick Clifton  <nickc@redhat.com>
 873
 874         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
 875         statement.
 876
 877 2006-03-29  Hans-Peter Nilsson  <hp@axis.com>
 878
 879         * configure: Regenerate.
 880
 881 2005-12-14  Chao-ying Fu  <fu@mips.com>
 882
 883         * Makefile.in (SIM_OBJS): Add dsp.o.
 884         (dsp.o): New dependency.
 885         (IGEN_INCLUDE): Add dsp.igen.
 886         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
 887         mipsisa64*-*-*): Add dsp to sim_igen_machine.
 888         * configure: Regenerate.
 889         * mips.igen: Add dsp model and include dsp.igen.
 890         (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
 891         because these instructions are extended in DSP ASE.
 892         * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
 893         adding 6 DSP accumulator registers and 1 DSP control register.
 894         (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
 895         AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
 896         DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
 897         DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
 898         DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
 899         DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
 900         DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
 901         DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
 902         DSPCR_CCOND_SMASK): New define.
 903         (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
 904         * dsp.c, dsp.igen: New files for MIPS DSP ASE.
 905
 906 2005-07-08  Ian Lance Taylor  <ian@airs.com>
 907
 908         * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
 909
 910 2005-06-16  David Ung  <davidu@mips.com>
 911             Nigel Stephens  <nigel@mips.com>
 912
 913         * mips.igen: New mips16e model and include m16e.igen.
 914         (check_u64): Add mips16e tag.
 915         * m16e.igen: New file for MIPS16e instructions.
 916         * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
 917         mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
 918         models.
 919         * configure: Regenerate.
 920
 921 2005-05-26  David Ung  <davidu@mips.com>
 922
 923         * mips.igen (mips32r2, mips64r2): New ISA models.  Add new model
 924         tags to all instructions which are applicable to the new ISAs.
 925         (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
 926         vr.igen.
 927         * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
 928         instructions.
 929         * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
 930         to mips.igen.
 931         * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
 932         * configure: Regenerate.
 933
 934 2005-03-23  Mark Kettenis  <kettenis@gnu.org>
 935
 936         * configure: Regenerate.
 937
 938 2005-01-14  Andrew Cagney  <cagney@gnu.org>
 939
 940         * configure.ac: Sinclude aclocal.m4 before common.m4.  Add
 941         explicit call to AC_CONFIG_HEADER.
 942         * configure: Regenerate.
 943
 944 2005-01-12  Andrew Cagney  <cagney@gnu.org>
 945
 946         * configure.ac: Update to use ../common/common.m4.
 947         * configure: Re-generate.
 948
 949 2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>
 950
 951         * configure: Regenerated to track ../common/aclocal.m4 changes.
 952
 953 2005-01-07  Andrew Cagney  <cagney@gnu.org>
 954
 955         * configure.ac: Rename configure.in, require autoconf 2.59.
 956         * configure: Re-generate.
 957
 958 2004-12-08  Hans-Peter Nilsson  <hp@axis.com>
 959
 960         * configure: Regenerate for ../common/aclocal.m4 update.
 961
 962 2004-09-24  Monika Chaddha  <monika@acmet.com>
 963
 964         Committed by Andrew Cagney.
 965         * m16.igen (CMP, CMPI): Fix assembler.
 966
 967 2004-08-18  Chris Demetriou  <cgd@broadcom.com>
 968
 969         * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
 970         * configure: Regenerate.
 971
 972 2004-06-25  Chris Demetriou  <cgd@broadcom.com>
 973
 974         * configure.in (sim_m16_machine): Include mipsIII.
 975         * configure: Regenerate.
 976
 977 2004-05-11  Maciej W. Rozycki  <macro@ds2.pg.gda.pl>
 978
 979         * mips/interp.c (decode_coproc): Sign-extend the address retrieved
 980         from COP0_BADVADDR.
 981         * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
 982
 983 2004-04-10  Chris Demetriou  <cgd@broadcom.com>
 984
 985         * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
 986
 987 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 988
 989         * mips.igen (check_fmt): Remove.
 990         (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
 991         (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
 992         (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
 993         (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
 994         (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
 995         (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
 996         (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
 997         (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
 998         (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
 999         (C.cnd.fmta): Remove incorrect call to check_fmt_p.
1000
1001 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
1002
1003         * sb1.igen (check_sbx): New function.
1004         (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
1005
1006 2004-03-29  Chris Demetriou  <cgd@broadcom.com>
1007             Richard Sandiford  <rsandifo@redhat.com>
1008
1009         * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
1010         (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
1011         * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
1012         separate implementations for mipsIV and mipsV.  Use new macros to
1013         determine whether the restrictions apply.
1014
1015 2004-01-19  Chris Demetriou  <cgd@broadcom.com>
1016
1017         * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
1018         (check_mult_hilo): Improve comments.
1019         (check_div_hilo): Likewise.  Also, fork off a new version
1020         to handle mips32/mips64 (since there are no hazards to check
1021         in MIPS32/MIPS64).
1022
1023 2003-06-17  Richard Sandiford  <rsandifo@redhat.com>
1024
1025         * mips.igen (do_dmultx): Fix check for negative operands.
1026
1027 2003-05-16  Ian Lance Taylor  <ian@airs.com>
1028
1029         * Makefile.in (SHELL): Make sure this is defined.
1030         (various): Use $(SHELL) whenever we invoke move-if-change.
1031
1032 2003-05-03  Chris Demetriou  <cgd@broadcom.com>
1033
1034         * cp1.c: Tweak attribution slightly.
1035         * cp1.h: Likewise.
1036         * mdmx.c: Likewise.
1037         * mdmx.igen: Likewise.
1038         * mips3d.igen: Likewise.
1039         * sb1.igen: Likewise.
1040
1041 2003-04-15  Richard Sandiford  <rsandifo@redhat.com>
1042
1043         * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
1044         unsigned operands.
1045
1046 2003-02-27  Andrew Cagney  <cagney@redhat.com>
1047
1048         * interp.c (sim_open): Rename _bfd to bfd.
1049         (sim_create_inferior): Ditto.
1050
1051 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
1052
1053         * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
1054
1055 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
1056
1057         * mips.igen (EI, DI): Remove.
1058
1059 2003-01-05  Richard Sandiford  <rsandifo@redhat.com>
1060
1061         * Makefile.in (tmp-run-multi): Fix mips16 filter.
1062
1063 2003-01-04  Richard Sandiford  <rsandifo@redhat.com>
1064             Andrew Cagney  <ac131313@redhat.com>
1065             Gavin Romig-Koch  <gavin@redhat.com>
1066             Graydon Hoare  <graydon@redhat.com>
1067             Aldy Hernandez  <aldyh@redhat.com>
1068             Dave Brolley  <brolley@redhat.com>
1069             Chris Demetriou  <cgd@broadcom.com>
1070
1071         * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
1072         (sim_mach_default): New variable.
1073         (mips64vr-*-*, mips64vrel-*-*): New configurations.
1074         Add a new simulator generator, MULTI.
1075         * configure: Regenerate.
1076         * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
1077         (multi-run.o): New dependency.
1078         (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
1079         (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
1080         (tmp-multi): Combine them.
1081         (BUILT_SRC_FROM_MULTI): New variable.  Depend on tmp-multi.
1082         (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
1083         (distclean-extra): New rule.
1084         * sim-main.h: Include bfd.h.
1085         (MIPS_MACH): New macro.
1086         * mips.igen (vr4120, vr5400, vr5500): New models.
1087         (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
1088         * vr.igen: Replace with new version.
1089
1090 2003-01-04  Chris Demetriou  <cgd@broadcom.com>
1091
1092         * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
1093         * configure: Regenerate.
1094
1095 2002-12-31  Chris Demetriou  <cgd@broadcom.com>
1096
1097         * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
1098         * mips.igen: Remove all invocations of check_branch_bug and
1099         mark_branch_bug.
1100
1101 2002-12-16  Chris Demetriou  <cgd@broadcom.com>
1102
1103         * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
1104
1105 2002-07-30  Chris Demetriou  <cgd@broadcom.com>
1106
1107         * mips.igen (do_load_double, do_store_double): New functions.
1108         (LDC1, SDC1): Rename to...
1109         (LDC1b, SDC1b): respectively.
1110         (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
1111
1112 2002-07-29  Michael Snyder  <msnyder@redhat.com>
1113
1114         * cp1.c (fp_recip2): Modify initialization expression so that
1115         GCC will recognize it as constant.
1116
1117 2002-06-18  Chris Demetriou  <cgd@broadcom.com>
1118
1119         * mdmx.c (SD_): Delete.
1120         (Unpredictable): Re-define, for now, to directly invoke
1121         unpredictable_action().
1122         (mdmx_acc_op): Fix error in .ob immediate handling.
1123
1124 2002-06-18  Andrew Cagney  <cagney@redhat.com>
1125
1126         * interp.c (sim_firmware_command): Initialize `address'.
1127
1128 2002-06-16  Andrew Cagney  <ac131313@redhat.com>
1129
1130         * configure: Regenerated to track ../common/aclocal.m4 changes.
1131
1132 2002-06-14  Chris Demetriou  <cgd@broadcom.com>
1133             Ed Satterthwaite  <ehs@broadcom.com>
1134
1135         * mips3d.igen: New file which contains MIPS-3D ASE instructions.
1136         * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
1137         * mips.igen: Include mips3d.igen.
1138         (mips3d): New model name for MIPS-3D ASE instructions.
1139         (CVT.W.fmt): Don't use this instruction for word (source) format
1140         instructions.
1141         * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
1142         (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
1143         (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
1144         (NR_FRAC_GUARD, IMPLICIT_1): New macros.
1145         * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
1146         (RSquareRoot1, RSquareRoot2): New macros.
1147         (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
1148         (fp_rsqrt2): New functions.
1149         * configure.in: Add MIPS-3D support to mipsisa64 simulator.
1150         * configure: Regenerate.
1151
1152 2002-06-13  Chris Demetriou  <cgd@broadcom.com>
1153             Ed Satterthwaite  <ehs@broadcom.com>
1154
1155         * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
1156         (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
1157         (fp_inv_sqrt, fpu_format_name): Add paired-single support.
1158         (convert): Note that this function is not used for paired-single
1159         format conversions.
1160         (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
1161         * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
1162         (check_fmt_p): Enable paired-single support.
1163         (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
1164         (PUU.PS): New instructions.
1165         (CVT.S.fmt): Don't use this instruction for paired-single format
1166         destinations.
1167         * sim-main.h (FP_formats): New value 'fmt_ps.'
1168         (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
1169         (PSLower, PSUpper, PackPS, ConvertPS): New macros.
1170
1171 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1172
1173         * mips.igen: Fix formatting of function calls in
1174         many FP operations.
1175
1176 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1177
1178         * mips.igen (MOVN, MOVZ): Trace result.
1179         (TNEI): Print "tnei" as the opcode name in traces.
1180         (CEIL.W): Add disassembly string for traces.
1181         (RSQRT.fmt): Make location of disassembly string consistent
1182         with other instructions.
1183
1184 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1185
1186         * mips.igen (X): Delete unused function.
1187
1188 2002-06-08  Andrew Cagney  <cagney@redhat.com>
1189
1190         * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
1191
1192 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1193             Ed Satterthwaite  <ehs@broadcom.com>
1194
1195         * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
1196         (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
1197         * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
1198         (fp_nmsub): New prototypes.
1199         (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
1200         (NegMultiplySub): New defines.
1201         * mips.igen (RSQRT.fmt): Use RSquareRoot().
1202         (MADD.D, MADD.S): Replace with...
1203         (MADD.fmt): New instruction.
1204         (MSUB.D, MSUB.S): Replace with...
1205         (MSUB.fmt): New instruction.
1206         (NMADD.D, NMADD.S): Replace with...
1207         (NMADD.fmt): New instruction.
1208         (NMSUB.D, MSUB.S): Replace with...
1209         (NMSUB.fmt): New instruction.
1210
1211 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1212             Ed Satterthwaite  <ehs@broadcom.com>
1213
1214         * cp1.c: Fix more comment spelling and formatting.
1215         (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
1216         (denorm_mode): New function.
1217         (fpu_unary, fpu_binary): Round results after operation, collect
1218         status from rounding operations, and update the FCSR.
1219         (convert): Collect status from integer conversions and rounding
1220         operations, and update the FCSR.  Adjust NaN values that result
1221         from conversions.  Convert to use sim_io_eprintf rather than
1222         fprintf, and remove some debugging code.
1223         * cp1.h (fenr_FS): New define.
1224
1225 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1226
1227         * cp1.c (convert): Remove unusable debugging code, and move MIPS
1228         rounding mode to sim FP rounding mode flag conversion code into...
1229         (rounding_mode): New function.
1230
1231 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1232
1233         * cp1.c: Clean up formatting of a few comments.
1234         (value_fpr): Reformat switch statement.
1235
1236 2002-06-06  Chris Demetriou  <cgd@broadcom.com>
1237             Ed Satterthwaite  <ehs@broadcom.com>
1238
1239         * cp1.h: New file.
1240         * sim-main.h: Include cp1.h.
1241         (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
1242         (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
1243         (FP_RM_TOMINF, GETRM): Remove.  Moved to cp1.h.
1244         (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
1245         (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
1246         (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
1247         * cp1.c: Don't include sim-fpu.h; already included by
1248         sim-main.h.  Clean up formatting of some comments.
1249         (NaN, Equal, Less): Remove.
1250         (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
1251         (fp_cmp): New functions.
1252         * mips.igen (do_c_cond_fmt): Remove.
1253         (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
1254         Compare.  Add result tracing.
1255         (CxC1): Remove, replace with...
1256         (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
1257         (DMxC1): Remove, replace with...
1258         (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
1259         (MxC1): Remove, replace with...
1260         (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
1261
1262 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1263
1264         * sim-main.h (FGRIDX): Remove, replace all uses with...
1265         (FGR_BASE): New macro.
1266         (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
1267         (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
1268         (NR_FGR, FGR): Likewise.
1269         * interp.c: Replace all uses of FGRIDX with FGR_BASE.
1270         * mips.igen: Likewise.
1271
1272 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1273
1274         * cp1.c: Add an FSF Copyright notice to this file.
1275
1276 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1277             Ed Satterthwaite  <ehs@broadcom.com>
1278
1279         * cp1.c (Infinity): Remove.
1280         * sim-main.h (Infinity): Likewise.
1281
1282         * cp1.c (fp_unary, fp_binary): New functions.
1283         (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
1284         (fp_sqrt): New functions, implemented in terms of the above.
1285         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1286         (Recip, SquareRoot): Remove (replaced by functions above).
1287         * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
1288         (fp_recip, fp_sqrt): New prototypes.
1289         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1290         (Recip, SquareRoot): Replace prototypes with #defines which
1291         invoke the functions above.
1292
1293 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1294
1295         * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
1296         (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
1297         file, remove PARAMS from prototypes.
1298         (value_fpr, store_fpr, convert): Likewise.  Use SIM_STATE to provide
1299         simulator state arguments.
1300         (ValueFPR, StoreFPR, Convert): Move lower in file.  Use SIM_ARGS to
1301         pass simulator state arguments.
1302         * cp1.c (SD): Redefine as CPU_STATE(cpu).
1303         (store_fpr, convert): Remove 'sd' argument.
1304         (value_fpr): Likewise.  Convert to use 'SD' instead.
1305
1306 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1307
1308         * cp1.c (Min, Max): Remove #if 0'd functions.
1309         * sim-main.h (Min, Max): Remove.
1310
1311 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1312
1313         * cp1.c: fix formatting of switch case and default labels.
1314         * interp.c: Likewise.
1315         * sim-main.c: Likewise.
1316
1317 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1318
1319         * cp1.c: Clean up comments which describe FP formats.
1320          (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
1321
1322 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1323             Ed Satterthwaite  <ehs@broadcom.com>
1324
1325         * configure.in (mipsisa64sb1*-*-*): New target for supporting
1326         Broadcom SiByte SB-1 processor configurations.
1327         * configure: Regenerate.
1328         * sb1.igen: New file.
1329         * mips.igen: Include sb1.igen.
1330         (sb1): New model.
1331         * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
1332         * mdmx.igen: Add "sb1" model to all appropriate functions and
1333         instructions.
1334         * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
1335         (ob_func, ob_acc): Reference the above.
1336         (qh_acc): Adjust to keep the same size as ob_acc.
1337         * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
1338         (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
1339
1340 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1341
1342         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1343
1344 2002-06-02  Chris Demetriou  <cgd@broadcom.com>
1345             Ed Satterthwaite  <ehs@broadcom.com>
1346
1347         * mips.igen (mdmx): New (pseudo-)model.
1348         * mdmx.c, mdmx.igen: New files.
1349         * Makefile.in (SIM_OBJS): Add mdmx.o.
1350         * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
1351         New typedefs.
1352         (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
1353         (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
1354         (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
1355         (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
1356         (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
1357         (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
1358         (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
1359         (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
1360         (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
1361         (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
1362         (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
1363         (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
1364         (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
1365         (qh_fmtsel): New macros.
1366         (_sim_cpu): New member "acc".
1367         (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
1368         (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
1369
1370 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
1371
1372         * interp.c: Use 'deprecated' rather than 'depreciated.'
1373         * sim-main.h: Likewise.
1374
1375 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
1376
1377         * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
1378         which wouldn't compile anyway.
1379         * sim-main.h (unpredictable_action): New function prototype.
1380         (Unpredictable): Define to call igen function unpredictable().
1381         (NotWordValue): New macro to call igen function not_word_value().
1382         (UndefinedResult): Remove.
1383         * interp.c (undefined_result): Remove.
1384         (unpredictable_action): New function.
1385         * mips.igen (not_word_value, unpredictable): New functions.
1386         (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
1387         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
1388         (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
1389         NotWordValue() to check for unpredictable inputs, then
1390         Unpredictable() to handle them.
1391
1392 2002-02-24  Chris Demetriou  <cgd@broadcom.com>
1393
1394         * mips.igen: Fix formatting of calls to Unpredictable().
1395
1396 2002-04-20  Andrew Cagney  <ac131313@redhat.com>
1397
1398         * interp.c (sim_open): Revert previous change.
1399
1400 2002-04-18  Alexandre Oliva  <aoliva@redhat.com>
1401
1402         * interp.c (sim_open): Disable chunk of code that wrote code in
1403         vector table entries.
1404
1405 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
1406
1407         * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1408         (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1409         unused definitions.
1410
1411 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
1412
1413         * cp1.c: Fix many formatting issues.
1414
1415 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
1416
1417         * cp1.c (fpu_format_name): New function to replace...
1418         (DOFMT): This.  Delete, and update all callers.
1419         (fpu_rounding_mode_name): New function to replace...
1420         (RMMODE): This.  Delete, and update all callers.
1421
1422 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
1423
1424         * interp.c: Move FPU support routines from here to...
1425         * cp1.c: Here.  New file.
1426         * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1427         (cp1.o): New target.
1428
1429 2002-03-12  Chris Demetriou  <cgd@broadcom.com>
1430
1431         * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1432         * mips.igen (mips32, mips64): New models, add to all instructions
1433         and functions as appropriate.
1434         (loadstore_ea, check_u64): New variant for model mips64.
1435         (check_fmt_p): New variant for models mipsV and mips64, remove
1436         mipsV model marking fro other variant.
1437         (SLL) Rename to...
1438         (SLLa) this.
1439         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1440         for mips32 and mips64.
1441         (DCLO, DCLZ): New instructions for mips64.
1442
1443 2002-03-07  Chris Demetriou  <cgd@broadcom.com>
1444
1445         * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1446         immediate or code as a hex value with the "%#lx" format.
1447         (ANDI): Likewise, and fix printed instruction name.
1448
1449 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1450
1451         * sim-main.h (UndefinedResult, Unpredictable): New macros
1452         which currently do nothing.
1453
1454 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1455
1456         * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1457         (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1458         (status_CU3): New definitions.
1459
1460         * sim-main.h (ExceptionCause): Add new values for MIPS32
1461         and MIPS64: MDMX, MCheck, CacheErr.  Update comments
1462         for DebugBreakPoint and NMIReset to note their status in
1463         MIPS32 and MIPS64.
1464         (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1465         (SignalExceptionCacheErr): New exception macros.
1466
1467 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1468
1469         * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1470         * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1471         is always enabled.
1472         (SignalExceptionCoProcessorUnusable): Take as argument the
1473         unusable coprocessor number.
1474
1475 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1476
1477         * mips.igen: Fix formatting of all SignalException calls.
1478
1479 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1480
1481         * sim-main.h (SIGNEXTEND): Remove.
1482
1483 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1484
1485         * mips.igen: Remove gencode comment from top of file, fix
1486         spelling in another comment.
1487
1488 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1489
1490         * mips.igen (check_fmt, check_fmt_p): New functions to check
1491         whether specific floating point formats are usable.
1492         (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1493         (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1494         (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1495         Use the new functions.
1496         (do_c_cond_fmt): Remove format checks...
1497         (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1498
1499 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1500
1501         * mips.igen: Fix formatting of check_fpu calls.
1502
1503 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1504
1505         * mips.igen (FLOOR.L.fmt): Store correct destination register.
1506
1507 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1508
1509         * mips.igen: Remove whitespace at end of lines.
1510
1511 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1512
1513         * mips.igen (loadstore_ea): New function to do effective
1514         address calculations.
1515         (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1516         do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1517         CACHE): Use loadstore_ea to do effective address computations.
1518
1519 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1520
1521         * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1522         * mips.igen (LL, CxC1, MxC1): Likewise.
1523
1524 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1525
1526         * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1527         CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1528         FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1529         MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1530         NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1531         SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1532         Don't split opcode fields by hand, use the opcode field values
1533         provided by igen.
1534
1535 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1536
1537         * mips.igen (do_divu): Fix spacing.
1538
1539         * mips.igen (do_dsllv): Move to be right before DSLLV,
1540         to match the rest of the do_<shift> functions.
1541
1542 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1543
1544         * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1545         DSRL32, do_dsrlv): Trace inputs and results.
1546
1547 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1548
1549         * mips.igen (CACHE): Provide instruction-printing string.
1550
1551         * interp.c (signal_exception): Comment tokens after #endif.
1552
1553 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1554
1555         * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1556         (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1557         NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1558         ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1559         CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1560         C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1561         SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1562         LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1563
1564 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1565
1566         * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1567         instruction-printing string.
1568         (LWU): Use '64' as the filter flag.
1569
1570 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1571
1572         * mips.igen (SDXC1): Fix instruction-printing string.
1573
1574 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1575
1576         * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1577         filter flags "32,f".
1578
1579 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1580
1581         * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1582         as the filter flag.
1583
1584 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1585
1586         * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1587         add a comma) so that it more closely match the MIPS ISA
1588         documentation opcode partitioning.
1589         (PREF): Put useful names on opcode fields, and include
1590         instruction-printing string.
1591
1592 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1593
1594         * mips.igen (check_u64): New function which in the future will
1595         check whether 64-bit instructions are usable and signal an
1596         exception if not.  Currently a no-op.
1597         (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1598         DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1599         DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1600         LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1601
1602         * mips.igen (check_fpu): New function which in the future will
1603         check whether FPU instructions are usable and signal an exception
1604         if not.  Currently a no-op.
1605         (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1606         CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1607         CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1608         LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1609         MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1610         NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1611         ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1612         SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1613
1614 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1615
1616         * mips.igen (do_load_left, do_load_right): Move to be immediately
1617         following do_load.
1618         (do_store_left, do_store_right): Move to be immediately following
1619         do_store.
1620
1621 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1622
1623         * mips.igen (mipsV): New model name.  Also, add it to
1624         all instructions and functions where it is appropriate.
1625
1626 2002-02-18  Chris Demetriou  <cgd@broadcom.com>
1627
1628         * mips.igen: For all functions and instructions, list model
1629         names that support that instruction one per line.
1630
1631 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1632
1633         * mips.igen: Add some additional comments about supported
1634         models, and about which instructions go where.
1635         (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1636         order as is used in the rest of the file.
1637
1638 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1639
1640         * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1641         indicating that ALU32_END or ALU64_END are there to check
1642         for overflow.
1643         (DADD): Likewise, but also remove previous comment about
1644         overflow checking.
1645
1646 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1647
1648         * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1649         DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1650         JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1651         SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1652         ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1653         fields (i.e., add and move commas) so that they more closely
1654         match the MIPS ISA documentation opcode partitioning.
1655
1656 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1657
1658         * mips.igen (ADDI): Print immediate value.
1659         (BREAK): Print code.
1660         (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1661         (SLL): Print "nop" specially, and don't run the code
1662         that does the shift for the "nop" case.
1663
1664 2001-11-17  Fred Fish  <fnf@redhat.com>
1665
1666         * sim-main.h (float_operation): Move enum declaration outside
1667         of _sim_cpu struct declaration.
1668
1669 2001-04-12  Jim Blandy  <jimb@redhat.com>
1670
1671         * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1672         PENDING_FILL.  Use PENDING_SCHED directly to handle the pending
1673         set of the FCSR.
1674         * sim-main.h (COCIDX): Remove definition; this isn't supported by
1675         PENDING_FILL, and you can get the intended effect gracefully by
1676         calling PENDING_SCHED directly.
1677
1678 2001-02-23  Ben Elliston  <bje@redhat.com>
1679
1680         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1681         already defined elsewhere.
1682
1683 2001-02-19  Ben Elliston  <bje@redhat.com>
1684
1685         * sim-main.h (sim_monitor): Return an int.
1686         * interp.c (sim_monitor): Add return values.
1687         (signal_exception): Handle error conditions from sim_monitor.
1688
1689 2001-02-08  Ben Elliston  <bje@redhat.com>
1690
1691         * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1692         (store_memory): Likewise, pass cia to sim_core_write*.
1693
1694 2000-10-19  Frank Ch. Eigler  <fche@redhat.com>
1695
1696         On advice from Chris G. Demetriou <cgd@sibyte.com>:
1697         * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1698
1699 Thu Jul 27 22:02:05 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1700
1701         From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1702         * Makefile.in: Don't delete *.igen when cleaning directory.
1703
1704 Wed Jul 19 18:50:51 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1705
1706         * m16.igen (break): Call SignalException not sim_engine_halt.
1707
1708 Mon Jul  3 11:13:20 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1709
1710         From Jason Eckhardt:
1711         * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1712
1713 Tue Jun 13 20:52:07 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1714
1715         * mips.igen (MxC1, DMxC1): Fix printf formatting.
1716
1717 2000-05-24  Michael Hayes  <mhayes@cygnus.com>
1718
1719         * mips.igen (do_dmultx): Fix typo.
1720
1721 Tue May 23 21:39:23 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1722
1723         * configure: Regenerated to track ../common/aclocal.m4 changes.
1724
1725 Fri Apr 28 20:48:36 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1726
1727         * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1728
1729 2000-04-12  Frank Ch. Eigler  <fche@redhat.com>
1730
1731         * sim-main.h (GPR_CLEAR): Define macro.
1732
1733 Mon Apr 10 00:07:09 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1734
1735         * interp.c (decode_coproc): Output long using %lx and not %s.
1736
1737 2000-03-21  Frank Ch. Eigler  <fche@redhat.com>
1738
1739         * interp.c (sim_open): Sort & extend dummy memory regions for
1740         --board=jmr3904 for eCos.
1741
1742 2000-03-02  Frank Ch. Eigler  <fche@redhat.com>
1743
1744         * configure: Regenerated.
1745
1746 Tue Feb  8 18:35:01 2000  Donald Lindsay  <dlindsay@hound.cygnus.com>
1747
1748         * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1749         calls, conditional on the simulator being in verbose mode.
1750
1751 Fri Feb  4 09:45:15 2000  Donald Lindsay  <dlindsay@cygnus.com>
1752
1753         * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1754         cache don't get ReservedInstruction traps.
1755
1756 1999-11-29  Mark Salter  <msalter@cygnus.com>
1757
1758         * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1759         to clear status bits in sdisr register. This is how the hardware works.
1760
1761         * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1762         being used by cygmon.
1763
1764 1999-11-11  Andrew Haley  <aph@cygnus.com>
1765
1766         * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1767         instructions.
1768
1769 Thu Sep  9 15:12:08 1999  Geoffrey Keating  <geoffk@cygnus.com>
1770
1771         * mips.igen (MULT): Correct previous mis-applied patch.
1772
1773 Tue Sep  7 13:34:54 1999  Geoffrey Keating  <geoffk@cygnus.com>
1774
1775         * mips.igen (delayslot32): Handle sequence like
1776         mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1777         correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1778         (MULT): Actually pass the third register...
1779
1780 1999-09-03  Mark Salter  <msalter@cygnus.com>
1781
1782         * interp.c (sim_open): Added more memory aliases for additional
1783         hardware being touched by cygmon on jmr3904 board.
1784
1785 Thu Sep  2 18:15:53 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1786
1787         * configure: Regenerated to track ../common/aclocal.m4 changes.
1788
1789 Tue Jul 27 16:36:51 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1790
1791         * interp.c (sim_store_register): Handle case where client - GDB -
1792         specifies that a 4 byte register is 8 bytes in size.
1793         (sim_fetch_register): Ditto.
1794
1795 1999-07-14  Frank Ch. Eigler  <fche@cygnus.com>
1796
1797         Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1798         * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1799         (idt_monitor_base): Base address for IDT monitor traps.
1800         (pmon_monitor_base): Ditto for PMON.
1801         (lsipmon_monitor_base): Ditto for LSI PMON.
1802         (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1803         (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1804         (sim_firmware_command): New function.
1805         (mips_option_handler): Call it for OPTION_FIRMWARE.
1806         (sim_open): Allocate memory for idt_monitor region.  If "--board"
1807         option was given, add no monitor by default.  Add BREAK hooks only if
1808         monitors are also there.
1809
1810 Mon Jul 12 00:02:27 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1811
1812         * interp.c (sim_monitor): Flush output before reading input.
1813
1814 Sun Jul 11 19:28:11 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1815
1816         * tconfig.in (SIM_HANDLES_LMA): Always define.
1817
1818 Thu Jul  8 16:06:59 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1819
1820         From Mark Salter <msalter@cygnus.com>:
1821         * interp.c (BOARD_BSP): Define.  Add to list of possible boards.
1822         (sim_open): Add setup for BSP board.
1823
1824 Wed Jul  7 12:45:58 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1825
1826         * mips.igen (MULT, MULTU): Add syntax for two operand version.
1827         (DMFC0, DMTC0): Recognize.  Call DecodeCoproc which will report
1828         them as unimplemented.
1829
1830 1999-05-08  Felix Lee  <flee@cygnus.com>
1831
1832         * configure: Regenerated to track ../common/aclocal.m4 changes.
1833
1834 1999-04-21  Frank Ch. Eigler  <fche@cygnus.com>
1835
1836         * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1837
1838 Thu Apr 15 14:15:17 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1839
1840         * configure.in: Any mips64vr5*-*-* target should have
1841         -DTARGET_ENABLE_FR=1.
1842         (default_endian): Any mips64vr*el-*-* target should default to
1843         LITTLE_ENDIAN.
1844         * configure: Re-generate.
1845
1846 1999-02-19  Gavin Romig-Koch  <gavin@cygnus.com>
1847
1848         * mips.igen (ldl): Extend from _16_, not 32.
1849
1850 Wed Jan 27 18:51:38 1999  Andrew Cagney  <cagney@chook.cygnus.com>
1851
1852         * interp.c (sim_store_register): Force registers written to by GDB
1853         into an un-interpreted state.
1854
1855 1999-02-05  Frank Ch. Eigler  <fche@cygnus.com>
1856
1857         * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1858         CPU, start periodic background I/O polls.
1859         (tx3904sio_poll): New function: periodic I/O poller.
1860
1861 1998-12-30  Frank Ch. Eigler  <fche@cygnus.com>
1862
1863         * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1864
1865 Tue Dec 29 16:03:53 1998  Rainer Orth  <ro@TechFak.Uni-Bielefeld.DE>
1866
1867         * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1868         case statement.
1869
1870 1998-12-29  Frank Ch. Eigler  <fche@cygnus.com>
1871
1872         * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1873         (load_word): Call SIM_CORE_SIGNAL hook on error.
1874         (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1875         starting.  For exception dispatching, pass PC instead of NULL_CIA.
1876         (decode_coproc): Use COP0_BADVADDR to store faulting address.
1877         * sim-main.h (COP0_BADVADDR): Define.
1878         (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1879         (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1880         (_sim_cpu): Add exc_* fields to store register value snapshots.
1881         * mips.igen (*): Replace memory-related SignalException* calls
1882         with references to SIM_CORE_SIGNAL hook.
1883
1884         * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1885         fix.
1886         * sim-main.c (*): Minor warning cleanups.
1887
1888 1998-12-24  Gavin Romig-Koch  <gavin@cygnus.com>
1889
1890         * m16.igen (DADDIU5): Correct type-o.
1891
1892 Mon Dec 21 10:34:48 1998  Andrew Cagney  <cagney@chook>
1893
1894         * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1895         variables.
1896
1897 Wed Dec 16 18:20:28 1998  Andrew Cagney  <cagney@chook>
1898
1899         * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1900         to include path.
1901         (interp.o): Add dependency on itable.h
1902         (oengine.c, gencode): Delete remaining references.
1903         (BUILT_SRC_FROM_GEN): Clean up.
1904
1905 1998-12-16  Gavin Romig-Koch  <gavin@cygnus.com>
1906
1907         * vr4run.c: New.
1908         * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1909         tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1910         tmp-run-hack) : New.
1911         * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1912         DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1913         Drop the "64" qualifier to get the HACK generator working.
1914         Use IMMEDIATE rather than IMMED.  Use SHAMT rather than SHIFT.
1915         * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1916         qualifier to get the hack generator working.
1917         (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1918         (DSLL): Use do_dsll.
1919         (DSLLV): Use do_dsllv.
1920         (DSRA): Use do_dsra.
1921         (DSRL): Use do_dsrl.
1922         (DSRLV): Use do_dsrlv.
1923         (BC1): Move *vr4100 to get the HACK generator working.
1924         (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1925         get the HACK generator working.
1926         (MACC) Rename to get the HACK generator working.
1927         (DMACC,MACCS,DMACCS): Add the 64.
1928
1929 1998-12-12  Gavin Romig-Koch  <gavin@cygnus.com>
1930
1931         * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1932         * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1933
1934 1998-12-11  Gavin Romig-Koch  <gavin@cygnus.com>
1935
1936     * mips/interp.c (DEBUG): Cleanups.
1937
1938 1998-12-10  Frank Ch. Eigler  <fche@cygnus.com>
1939
1940         * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1941         (tx3904sio_tickle): fflush after a stdout character output.
1942
1943 1998-12-03  Frank Ch. Eigler  <fche@cygnus.com>
1944
1945         * interp.c (sim_close): Uninstall modules.
1946
1947 Wed Nov 25 13:41:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1948
1949         * sim-main.h, interp.c (sim_monitor): Change to global
1950         function.
1951
1952 Wed Nov 25 17:33:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1953
1954         * configure.in (vr4100): Only include vr4100 instructions in
1955         simulator.
1956         * configure: Re-generate.
1957         * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1958
1959 Mon Nov 23 18:20:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1960
1961         * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1962         * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1963         true alternative.
1964
1965         * configure.in (sim_default_gen, sim_use_gen): Replace with
1966         sim_gen.
1967         (--enable-sim-igen): Delete config option. Always using IGEN.
1968         * configure: Re-generate.
1969
1970         * Makefile.in (gencode): Kill, kill, kill.
1971         * gencode.c: Ditto.
1972
1973 Mon Nov 23 18:07:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1974
1975         * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1976         bit mips16 igen simulator.
1977         * configure: Re-generate.
1978
1979         * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1980         as part of vr4100 ISA.
1981         * vr.igen: Mark all instructions as 64 bit only.
1982
1983 Mon Nov 23 17:07:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1984
1985         * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1986         Pacify GCC.
1987
1988 Mon Nov 23 13:23:40 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1989
1990         * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1991         mipsIII/mips16 igen simulator.  Fix sim_gen VS sim_igen typos.
1992         * configure: Re-generate.
1993
1994         * m16.igen (BREAK): Define breakpoint instruction.
1995         (JALX32): Mark instruction as mips16 and not r3900.
1996         * mips.igen (C.cond.fmt): Fix typo in instruction format.
1997
1998         * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1999
2000 Sat Nov  7 09:54:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2001
2002         * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
2003         insn as a debug breakpoint.
2004
2005         * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
2006         pending.slot_size.
2007         (PENDING_SCHED): Clean up trace statement.
2008         (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
2009         (PENDING_FILL): Delay write by only one cycle.
2010         (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
2011
2012         * sim-main.c (pending_tick): Clean up trace statements. Add trace
2013         of pending writes.
2014         (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
2015         32 & 64.
2016         (pending_tick): Move incrementing of index to FOR statement.
2017         (pending_tick): Only update PENDING_OUT after a write has occured.
2018
2019         * configure.in: Add explicit mips-lsi-* target.  Use gencode to
2020         build simulator.
2021         * configure: Re-generate.
2022
2023         * interp.c (sim_engine_run OLD): Delete explicit call to
2024         PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
2025
2026 Sat Oct 30 09:49:10 1998  Frank Ch. Eigler  <fche@cygnus.com>
2027
2028         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
2029         interrupt level number to match changed SignalExceptionInterrupt
2030         macro.
2031
2032 Fri Oct  9 18:02:25 1998  Doug Evans  <devans@canuck.cygnus.com>
2033
2034         * interp.c: #include "itable.h" if WITH_IGEN.
2035         (get_insn_name): New function.
2036         (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
2037         * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
2038
2039 Mon Sep 14 12:36:44 1998  Frank Ch. Eigler  <fche@cygnus.com>
2040
2041         * configure: Rebuilt to inhale new common/aclocal.m4.
2042
2043 Tue Sep  1 15:39:18 1998  Frank Ch. Eigler  <fche@cygnus.com>
2044
2045         * dv-tx3904sio.c: Include sim-assert.h.
2046
2047 Tue Aug 25 12:49:46 1998  Frank Ch. Eigler  <fche@cygnus.com>
2048
2049         * dv-tx3904sio.c: New file: tx3904 serial I/O module.
2050         * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
2051         Reorganize target-specific sim-hardware checks.
2052         * configure: rebuilt.
2053         * interp.c (sim_open): For tx39 target boards, set
2054         OPERATING_ENVIRONMENT, add tx3904sio devices.
2055         * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
2056         ROM executables.  Install dv-sockser into sim-modules list.
2057
2058         * dv-tx3904irc.c: Compiler warning clean-up.
2059         * dv-tx3904tmr.c: Compiler warning clean-up.  Remove particularly
2060         frequent hw-trace messages.
2061
2062 Fri Jul 31 18:14:16 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2063
2064         * vr.igen (MulAcc): Identify as a vr4100 specific function.
2065
2066 Sat Jul 25 16:03:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2067
2068         * Makefile.in (IGEN_INCLUDE): Add vr.igen.
2069
2070         * vr.igen: New file.
2071         (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
2072         * mips.igen: Define vr4100 model. Include vr.igen.
2073 Mon Jun 29 09:21:07 1998  Gavin Koch  <gavin@cygnus.com>
2074
2075         * mips.igen (check_mf_hilo): Correct check.
2076
2077 Wed Jun 17 12:20:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2078
2079         * sim-main.h (interrupt_event): Add prototype.
2080
2081         * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
2082         register_ptr, register_value.
2083         (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
2084
2085         * sim-main.h (tracefh): Make extern.
2086
2087 Tue Jun 16 14:39:00 1998  Frank Ch. Eigler  <fche@cygnus.com>
2088
2089         * dv-tx3904tmr.c: Deschedule timer event after dispatching.
2090         Reduce unnecessarily high timer event frequency.
2091         * dv-tx3904cpu.c: Ditto for interrupt event.
2092
2093 Wed Jun 10 13:22:32 1998  Frank Ch. Eigler  <fche@cygnus.com>
2094
2095         * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
2096         to allay warnings.
2097         (interrupt_event): Made non-static.
2098
2099         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
2100         interchange of configuration values for external vs. internal
2101         clock dividers.
2102
2103 Tue Jun  9 12:46:24 1998  Ian Carmichael  <iancarm@cygnus.com>
2104
2105         * mips.igen (BREAK): Moved code to here for
2106         simulator-reserved break instructions.
2107         * gencode.c (build_instruction): Ditto.
2108         * interp.c (signal_exception): Code moved from here.  Non-
2109         reserved instructions now use exception vector, rather
2110         than halting sim.
2111         * sim-main.h: Moved magic constants to here.
2112
2113 Tue Jun  9 12:29:50 1998  Frank Ch. Eigler  <fche@cygnus.com>
2114
2115         * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
2116         register upon non-zero interrupt event level, clear upon zero
2117         event value.
2118         * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
2119         by passing zero event value.
2120         (*_io_{read,write}_buffer): Endianness fixes.
2121         * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
2122         (deliver_*_tick): Reduce sim event interval to 75% of count interval.
2123
2124         * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
2125         serial I/O and timer module at base address 0xFFFF0000.
2126
2127 Tue Jun  9 11:52:29 1998  Gavin Koch  <gavin@cygnus.com>
2128
2129         * mips.igen (SWC1) : Correct the handling of ReverseEndian
2130         and BigEndianCPU.
2131
2132 Tue Jun  9 11:40:57 1998  Gavin Koch  <gavin@cygnus.com>
2133
2134         * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
2135         parts.
2136         * configure: Update.
2137
2138 Thu Jun  4 15:37:33 1998  Frank Ch. Eigler  <fche@cygnus.com>
2139
2140         * dv-tx3904tmr.c: New file - implements tx3904 timer.
2141         * dv-tx3904{irc,cpu}.c: Mild reformatting.
2142         * configure.in: Include tx3904tmr in hw_device list.
2143         * configure: Rebuilt.
2144         * interp.c (sim_open): Instantiate three timer instances.
2145         Fix address typo of tx3904irc instance.
2146
2147 Tue Jun  2 15:48:02 1998  Ian Carmichael  <iancarm@cygnus.com>
2148
2149         * interp.c (signal_exception): SystemCall exception now uses
2150         the exception vector.
2151
2152 Mon Jun  1 18:18:26 1998  Frank Ch. Eigler  <fche@cygnus.com>
2153
2154         * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
2155         to allay warnings.
2156
2157 Fri May 29 11:40:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2158
2159         * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
2160
2161 Mon May 25 20:47:45 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2162
2163         * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
2164
2165         * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
2166         sim-main.h. Declare a struct hw_descriptor instead of struct
2167         hw_device_descriptor.
2168
2169 Mon May 25 12:41:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2170
2171         * mips.igen (do_store_left, do_load_left): Compute nr of left and
2172         right bits and then re-align left hand bytes to correct byte
2173         lanes.  Fix incorrect computation in do_store_left when loading
2174         bytes from second word.
2175
2176 Fri May 22 13:34:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2177
2178         * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
2179         * interp.c (sim_open): Only create a device tree when HW is
2180         enabled.
2181
2182         * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
2183         * interp.c (signal_exception): Ditto.
2184
2185 Thu May 21 14:24:11 1998  Gavin Koch  <gavin@cygnus.com>
2186
2187         * gencode.c: Mark BEGEZALL as LIKELY.
2188
2189 Thu May 21 18:57:19 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2190
2191         * sim-main.h (ALU32_END): Sign extend 32 bit results.
2192         * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
2193
2194 Mon May 18 18:22:42 1998  Frank Ch. Eigler  <fche@cygnus.com>
2195
2196         * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
2197         modules.  Recognize TX39 target with "mips*tx39" pattern.
2198         * configure: Rebuilt.
2199         * sim-main.h (*): Added many macros defining bits in
2200         TX39 control registers.
2201         (SignalInterrupt): Send actual PC instead of NULL.
2202         (SignalNMIReset): New exception type.
2203         * interp.c (board): New variable for future use to identify
2204         a particular board being simulated.
2205         (mips_option_handler,mips_options): Added "--board" option.
2206         (interrupt_event): Send actual PC.
2207         (sim_open): Make memory layout conditional on board setting.
2208         (signal_exception): Initial implementation of hardware interrupt
2209         handling.  Accept another break instruction variant for simulator
2210         exit.
2211         (decode_coproc): Implement RFE instruction for TX39.
2212         (mips.igen): Decode RFE instruction as such.
2213         * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
2214         * interp.c: Define "jmr3904" and "jmr3904debug" board types and
2215         bbegin to implement memory map.
2216         * dv-tx3904cpu.c: New file.
2217         * dv-tx3904irc.c: New file.
2218
2219 Wed May 13 14:40:11 1998  Gavin Koch  <gavin@cygnus.com>
2220
2221         * mips.igen (check_mt_hilo): Create a separate r3900 version.
2222
2223 Wed May 13 14:11:46 1998  Gavin Koch  <gavin@cygnus.com>
2224
2225         * tx.igen (madd,maddu):  Replace calls to check_op_hilo
2226         with calls to check_div_hilo.
2227
2228 Wed May 13 09:59:27 1998  Gavin Koch  <gavin@cygnus.com>
2229
2230         * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
2231         Replace check_op_hilo with check_mult_hilo and check_div_hilo.
2232         Add special r3900 version of do_mult_hilo.
2233         (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
2234         with calls to check_mult_hilo.
2235         (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
2236         with calls to check_div_hilo.
2237
2238 Tue May 12 15:22:11 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2239
2240         * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
2241         Document a replacement.
2242
2243 Fri May  8 17:48:19 1998  Ian Carmichael  <iancarm@cygnus.com>
2244
2245         * interp.c (sim_monitor): Make mon_printf work.
2246
2247 Wed May  6 19:42:19 1998  Doug Evans  <devans@canuck.cygnus.com>
2248
2249         * sim-main.h (INSN_NAME): New arg `cpu'.
2250
2251 Tue Apr 28 18:33:31 1998  Geoffrey Noer  <noer@cygnus.com>
2252
2253         * configure: Regenerated to track ../common/aclocal.m4 changes.
2254
2255 Sun Apr 26 15:31:55 1998  Tom Tromey  <tromey@creche>
2256
2257         * configure: Regenerated to track ../common/aclocal.m4 changes.
2258         * config.in: Ditto.
2259
2260 Sun Apr 26 15:20:01 1998  Tom Tromey  <tromey@cygnus.com>
2261
2262         * acconfig.h: New file.
2263         * configure.in: Reverted change of Apr 24; use sinclude again.
2264
2265 Fri Apr 24 14:16:40 1998  Tom Tromey  <tromey@creche>
2266
2267         * configure: Regenerated to track ../common/aclocal.m4 changes.
2268         * config.in: Ditto.
2269
2270 Fri Apr 24 11:19:20 1998  Tom Tromey  <tromey@cygnus.com>
2271
2272         * configure.in: Don't call sinclude.
2273
2274 Fri Apr 24 11:35:01 1998  Andrew Cagney  <cagney@chook.cygnus.com>
2275
2276         * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
2277
2278 Tue Apr 21 11:59:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2279
2280         * mips.igen (ERET): Implement.
2281
2282         * interp.c (decode_coproc): Return sign-extended EPC.
2283
2284         * mips.igen (ANDI, LUI, MFC0): Add tracing code.
2285
2286         * interp.c (signal_exception): Do not ignore Trap.
2287         (signal_exception): On TRAP, restart at exception address.
2288         (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
2289         (signal_exception): Update.
2290         (sim_open): Patch V_COMMON interrupt vector with an abort sequence
2291         so that TRAP instructions are caught.
2292
2293 Mon Apr 20 11:26:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2294
2295         * sim-main.h (struct hilo_access, struct hilo_history): Define,
2296         contains HI/LO access history.
2297         (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
2298         (HIACCESS, LOACCESS): Delete, replace with
2299         (HIHISTORY, LOHISTORY): New macros.
2300         (CHECKHILO): Delete all, moved to mips.igen
2301
2302         * gencode.c (build_instruction): Do not generate checks for
2303         correct HI/LO register usage.
2304
2305         * interp.c (old_engine_run): Delete checks for correct HI/LO
2306         register usage.
2307
2308         * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
2309         check_mf_cycles): New functions.
2310         (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
2311         do_divu, domultx, do_mult, do_multu): Use.
2312
2313         * tx.igen ("madd", "maddu"): Use.
2314
2315 Wed Apr 15 18:31:54 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2316
2317         * mips.igen (DSRAV): Use function do_dsrav.
2318         (SRAV): Use new function do_srav.
2319
2320         * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
2321         (B): Sign extend 11 bit immediate.
2322         (EXT-B*): Shift 16 bit immediate left by 1.
2323         (ADDIU*): Don't sign extend immediate value.
2324
2325 Wed Apr 15 10:32:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2326
2327         * m16run.c (sim_engine_run): Restore CIA after handling an event.
2328
2329         * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
2330         functions.
2331
2332         * mips.igen (delayslot32, nullify_next_insn): New functions.
2333         (m16.igen): Always include.
2334         (do_*): Add more tracing.
2335
2336         * m16.igen (delayslot16): Add NIA argument, could be called by a
2337         32 bit MIPS16 instruction.
2338
2339         * interp.c (ifetch16): Move function from here.
2340         * sim-main.c (ifetch16): To here.
2341
2342         * sim-main.c (ifetch16, ifetch32): Update to match current
2343         implementations of LH, LW.
2344         (signal_exception): Don't print out incorrect hex value of illegal
2345         instruction.
2346
2347 Wed Apr 15 00:17:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2348
2349         * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
2350         instruction.
2351
2352         * m16.igen: Implement MIPS16 instructions.
2353
2354         * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
2355         do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
2356         do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
2357         do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
2358         do_srl, do_srlv, do_subu, do_xor, do_xori): New functions.  Move
2359         bodies of corresponding code from 32 bit insn to these.  Also used
2360         by MIPS16 versions of functions.
2361
2362         * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
2363         (IMEM16): Drop NR argument from macro.
2364
2365 Sat Apr  4 22:39:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2366
2367         * Makefile.in (SIM_OBJS): Add sim-main.o.
2368
2369         * sim-main.h (address_translation, load_memory, store_memory,
2370         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
2371         as INLINE_SIM_MAIN.
2372         (pr_addr, pr_uword64): Declare.
2373         (sim-main.c): Include when H_REVEALS_MODULE_P.
2374
2375         * interp.c (address_translation, load_memory, store_memory,
2376         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
2377         from here.
2378         * sim-main.c: To here. Fix compilation problems.
2379
2380         * configure.in: Enable inlining.
2381         * configure: Re-config.
2382
2383 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2384
2385         * configure: Regenerated to track ../common/aclocal.m4 changes.
2386
2387 Fri Apr  3 04:32:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2388
2389         * mips.igen: Include tx.igen.
2390         * Makefile.in (IGEN_INCLUDE): Add tx.igen.
2391         * tx.igen: New file, contains MADD and MADDU.
2392
2393         * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
2394         the hardwired constant `7'.
2395         (store_memory): Ditto.
2396         (LOADDRMASK): Move definition to sim-main.h.
2397
2398         mips.igen (MTC0): Enable for r3900.
2399         (ADDU): Add trace.
2400
2401         mips.igen (do_load_byte): Delete.
2402         (do_load, do_store, do_load_left, do_load_write, do_store_left,
2403         do_store_right): New functions.
2404         (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2405
2406         configure.in: Let the tx39 use igen again.
2407         configure: Update.
2408
2409 Thu Apr  2 10:59:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2410
2411         * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2412         not an address sized quantity.  Return zero for cache sizes.
2413
2414 Wed Apr  1 23:47:53 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2415
2416         * mips.igen (r3900): r3900 does not support 64 bit integer
2417         operations.
2418
2419 Mon Mar 30 14:46:05 1998  Gavin Koch  <gavin@cygnus.com>
2420
2421         * configure.in (mipstx39*-*-*): Use gencode simulator rather
2422         than igen one.
2423         * configure : Rebuild.
2424
2425 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2426
2427         * configure: Regenerated to track ../common/aclocal.m4 changes.
2428
2429 Fri Mar 27 15:01:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2430
2431         * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2432
2433 Wed Mar 25 16:44:27 1998  Ian Carmichael  <iancarm@cygnus.com>
2434
2435         * configure: Regenerated to track ../common/aclocal.m4 changes.
2436         * config.in: Regenerated to track ../common/aclocal.m4 changes.
2437
2438 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2439
2440         * configure: Regenerated to track ../common/aclocal.m4 changes.
2441
2442 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2443
2444         * interp.c (Max, Min): Comment out functions. Not yet used.
2445
2446 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2447
2448         * configure: Regenerated to track ../common/aclocal.m4 changes.
2449
2450 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
2451
2452         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2453         configurable settings for stand-alone simulator.
2454
2455         * configure.in: Added X11 search, just in case.
2456
2457         * configure: Regenerated.
2458
2459 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2460
2461         * interp.c (sim_write, sim_read, load_memory, store_memory):
2462         Replace sim_core_*_map with read_map, write_map, exec_map resp.
2463
2464 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2465
2466         * sim-main.h (GETFCC): Return an unsigned value.
2467
2468 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2469
2470         * mips.igen (DIV): Fix check for -1 / MIN_INT.
2471         (DADD): Result destination is RD not RT.
2472
2473 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2474
2475         * sim-main.h (HIACCESS, LOACCESS): Always define.
2476
2477         * mdmx.igen (Maxi, Mini): Rename Max, Min.
2478
2479         * interp.c (sim_info): Delete.
2480
2481 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
2482
2483         * interp.c (DECLARE_OPTION_HANDLER): Use it.
2484         (mips_option_handler): New argument `cpu'.
2485         (sim_open): Update call to sim_add_option_table.
2486
2487 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2488
2489         * mips.igen (CxC1): Add tracing.
2490
2491 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2492
2493         * sim-main.h (Max, Min): Declare.
2494
2495         * interp.c (Max, Min): New functions.
2496
2497         * mips.igen (BC1): Add tracing.
2498
2499 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
2500
2501         * interp.c Added memory map for stack in vr4100
2502
2503 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
2504
2505         * interp.c (load_memory): Add missing "break"'s.
2506
2507 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2508
2509         * interp.c (sim_store_register, sim_fetch_register): Pass in
2510         length parameter.  Return -1.
2511
2512 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
2513
2514         * interp.c: Added hardware init hook, fixed warnings.
2515
2516 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2517
2518         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2519
2520 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2521
2522         * interp.c (ifetch16): New function.
2523
2524         * sim-main.h (IMEM32): Rename IMEM.
2525         (IMEM16_IMMED): Define.
2526         (IMEM16): Define.
2527         (DELAY_SLOT): Update.
2528
2529         * m16run.c (sim_engine_run): New file.
2530
2531         * m16.igen: All instructions except LB.
2532         (LB): Call do_load_byte.
2533         * mips.igen (do_load_byte): New function.
2534         (LB): Call do_load_byte.
2535
2536         * mips.igen: Move spec for insn bit size and high bit from here.
2537         * Makefile.in (tmp-igen, tmp-m16): To here.
2538
2539         * m16.dc: New file, decode mips16 instructions.
2540
2541         * Makefile.in (SIM_NO_ALL): Define.
2542         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2543
2544 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2545
2546         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2547         point unit to 32 bit registers.
2548         * configure: Re-generate.
2549
2550 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2551
2552         * configure.in (sim_use_gen): Make IGEN the default simulator
2553         generator for generic 32 and 64 bit mips targets.
2554         * configure: Re-generate.
2555
2556 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2557
2558         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2559         bitsize.
2560
2561         * interp.c (sim_fetch_register, sim_store_register): Read/write
2562         FGR from correct location.
2563         (sim_open): Set size of FGR's according to
2564         WITH_TARGET_FLOATING_POINT_BITSIZE.
2565
2566         * sim-main.h (FGR): Store floating point registers in a separate
2567         array.
2568
2569 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2570
2571         * configure: Regenerated to track ../common/aclocal.m4 changes.
2572
2573 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2574
2575         * interp.c (ColdReset): Call PENDING_INVALIDATE.
2576
2577         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2578
2579         * interp.c (pending_tick): New function.  Deliver pending writes.
2580
2581         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2582         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2583         it can handle mixed sized quantites and single bits.
2584
2585 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2586
2587         * interp.c (oengine.h): Do not include when building with IGEN.
2588         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2589         (sim_info): Ditto for PROCESSOR_64BIT.
2590         (sim_monitor): Replace ut_reg with unsigned_word.
2591         (*): Ditto for t_reg.
2592         (LOADDRMASK): Define.
2593         (sim_open): Remove defunct check that host FP is IEEE compliant,
2594         using software to emulate floating point.
2595         (value_fpr, ...): Always compile, was conditional on HASFPU.
2596
2597 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2598
2599         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2600         size.
2601
2602         * interp.c (SD, CPU): Define.
2603         (mips_option_handler): Set flags in each CPU.
2604         (interrupt_event): Assume CPU 0 is the one being iterrupted.
2605         (sim_close): Do not clear STATE, deleted anyway.
2606         (sim_write, sim_read): Assume CPU zero's vm should be used for
2607         data transfers.
2608         (sim_create_inferior): Set the PC for all processors.
2609         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2610         argument.
2611         (mips16_entry): Pass correct nr of args to store_word, load_word.
2612         (ColdReset): Cold reset all cpu's.
2613         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2614         (sim_monitor, load_memory, store_memory, signal_exception): Use
2615         `CPU' instead of STATE_CPU.
2616
2617
2618         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2619         SD or CPU_.
2620
2621         * sim-main.h (signal_exception): Add sim_cpu arg.
2622         (SignalException*): Pass both SD and CPU to signal_exception.
2623         * interp.c (signal_exception): Update.
2624
2625         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2626         Ditto
2627         (sync_operation, prefetch, cache_op, store_memory, load_memory,
2628         address_translation): Ditto
2629         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2630
2631 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2632
2633         * configure: Regenerated to track ../common/aclocal.m4 changes.
2634
2635 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2636
2637         * interp.c (sim_engine_run): Add `nr_cpus' argument.
2638
2639         * mips.igen (model): Map processor names onto BFD name.
2640
2641         * sim-main.h (CPU_CIA): Delete.
2642         (SET_CIA, GET_CIA): Define
2643
2644 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2645
2646         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2647         regiser.
2648
2649         * configure.in (default_endian): Configure a big-endian simulator
2650         by default.
2651         * configure: Re-generate.
2652
2653 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
2654
2655         * configure: Regenerated to track ../common/aclocal.m4 changes.
2656
2657 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
2658
2659         * interp.c (sim_monitor): Handle Densan monitor outbyte
2660         and inbyte functions.
2661
2662 1997-12-29  Felix Lee  <flee@cygnus.com>
2663
2664         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2665
2666 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
2667
2668         * Makefile.in (tmp-igen): Arrange for $zero to always be
2669         reset to zero after every instruction.
2670
2671 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2672
2673         * configure: Regenerated to track ../common/aclocal.m4 changes.
2674         * config.in: Ditto.
2675
2676 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
2677
2678         * mips.igen (MSUB): Fix to work like MADD.
2679         * gencode.c (MSUB): Similarly.
2680
2681 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
2682
2683         * configure: Regenerated to track ../common/aclocal.m4 changes.
2684
2685 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2686
2687         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2688
2689 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2690
2691         * sim-main.h (sim-fpu.h): Include.
2692
2693         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2694         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2695         using host independant sim_fpu module.
2696
2697 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2698
2699         * interp.c (signal_exception): Report internal errors with SIGABRT
2700         not SIGQUIT.
2701
2702         * sim-main.h (C0_CONFIG): New register.
2703         (signal.h): No longer include.
2704
2705         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2706
2707 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
2708
2709         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2710
2711 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2712
2713         * mips.igen: Tag vr5000 instructions.
2714         (ANDI): Was missing mipsIV model, fix assembler syntax.
2715         (do_c_cond_fmt): New function.
2716         (C.cond.fmt): Handle mips I-III which do not support CC field
2717         separatly.
2718         (bc1): Handle mips IV which do not have a delaed FCC separatly.
2719         (SDR): Mask paddr when BigEndianMem, not the converse as specified
2720         in IV3.2 spec.
2721         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
2722         vr5000 which saves LO in a GPR separatly.
2723
2724         * configure.in (enable-sim-igen): For vr5000, select vr5000
2725         specific instructions.
2726         * configure: Re-generate.
2727
2728 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2729
2730         * Makefile.in (SIM_OBJS): Add sim-fpu module.
2731
2732         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2733         fmt_uninterpreted_64 bit cases to switch.  Convert to
2734         fmt_formatted,
2735
2736         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2737
2738         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2739         as specified in IV3.2 spec.
2740         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2741
2742 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2743
2744         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2745         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2746         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2747         PENDING_FILL versions of instructions.  Simplify.
2748         (X): New function.
2749         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2750         instructions.
2751         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2752         a signed value.
2753         (MTHI, MFHI): Disable code checking HI-LO.
2754
2755         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2756         global.
2757         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2758
2759 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2760
2761         * gencode.c (build_mips16_operands): Replace IPC with cia.
2762
2763         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2764         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2765         IPC to `cia'.
2766         (UndefinedResult): Replace function with macro/function
2767         combination.
2768         (sim_engine_run): Don't save PC in IPC.
2769
2770         * sim-main.h (IPC): Delete.
2771
2772
2773         * interp.c (signal_exception, store_word, load_word,
2774         address_translation, load_memory, store_memory, cache_op,
2775         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2776         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2777         current instruction address - cia - argument.
2778         (sim_read, sim_write): Call address_translation directly.
2779         (sim_engine_run): Rename variable vaddr to cia.
2780         (signal_exception): Pass cia to sim_monitor
2781
2782         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2783         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2784         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2785
2786         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2787         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2788         SIM_ASSERT.
2789
2790         * interp.c (signal_exception): Pass restart address to
2791         sim_engine_restart.
2792
2793         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2794         idecode.o): Add dependency.
2795
2796         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2797         Delete definitions
2798         (DELAY_SLOT): Update NIA not PC with branch address.
2799         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2800
2801         * mips.igen: Use CIA not PC in branch calculations.
2802         (illegal): Call SignalException.
2803         (BEQ, ADDIU): Fix assembler.
2804
2805 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2806
2807         * m16.igen (JALX): Was missing.
2808
2809         * configure.in (enable-sim-igen): New configuration option.
2810         * configure: Re-generate.
2811
2812         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2813
2814         * interp.c (load_memory, store_memory): Delete parameter RAW.
2815         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2816         bypassing {load,store}_memory.
2817
2818         * sim-main.h (ByteSwapMem): Delete definition.
2819
2820         * Makefile.in (SIM_OBJS): Add sim-memopt module.
2821
2822         * interp.c (sim_do_command, sim_commands): Delete mips specific
2823         commands.  Handled by module sim-options.
2824
2825         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2826         (WITH_MODULO_MEMORY): Define.
2827
2828         * interp.c (sim_info): Delete code printing memory size.
2829
2830         * interp.c (mips_size): Nee sim_size, delete function.
2831         (power2): Delete.
2832         (monitor, monitor_base, monitor_size): Delete global variables.
2833         (sim_open, sim_close): Delete code creating monitor and other
2834         memory regions.  Use sim-memopts module, via sim_do_commandf, to
2835         manage memory regions.
2836         (load_memory, store_memory): Use sim-core for memory model.
2837
2838         * interp.c (address_translation): Delete all memory map code
2839         except line forcing 32 bit addresses.
2840
2841 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2842
2843         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
2844         trace options.
2845
2846         * interp.c (logfh, logfile): Delete globals.
2847         (sim_open, sim_close): Delete code opening & closing log file.
2848         (mips_option_handler): Delete -l and -n options.
2849         (OPTION mips_options): Ditto.
2850
2851         * interp.c (OPTION mips_options): Rename option trace to dinero.
2852         (mips_option_handler): Update.
2853
2854 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2855
2856         * interp.c (fetch_str): New function.
2857         (sim_monitor): Rewrite using sim_read & sim_write.
2858         (sim_open): Check magic number.
2859         (sim_open): Write monitor vectors into memory using sim_write.
2860         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2861         (sim_read, sim_write): Simplify - transfer data one byte at a
2862         time.
2863         (load_memory, store_memory): Clarify meaning of parameter RAW.
2864
2865         * sim-main.h (isHOST): Defete definition.
2866         (isTARGET): Mark as depreciated.
2867         (address_translation): Delete parameter HOST.
2868
2869         * interp.c (address_translation): Delete parameter HOST.
2870
2871 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2872
2873         * mips.igen:
2874
2875         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2876         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2877
2878 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2879
2880         * mips.igen: Add model filter field to records.
2881
2882 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2883
2884         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
2885
2886         interp.c (sim_engine_run): Do not compile function sim_engine_run
2887         when WITH_IGEN == 1.
2888
2889         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2890         target architecture.
2891
2892         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2893         igen. Replace with configuration variables sim_igen_flags /
2894         sim_m16_flags.
2895
2896         * m16.igen: New file.  Copy mips16 insns here.
2897         * mips.igen: From here.
2898
2899 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2900
2901         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2902         to top.
2903         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2904
2905 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
2906
2907         * gencode.c (build_instruction): Follow sim_write's lead in using
2908         BigEndianMem instead of !ByteSwapMem.
2909
2910 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2911
2912         * configure.in (sim_gen): Dependent on target, select type of
2913         generator.  Always select old style generator.
2914
2915         configure: Re-generate.
2916
2917         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2918         targets.
2919         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2920         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2921         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2922         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2923         SIM_@sim_gen@_*, set by autoconf.
2924
2925 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2926
2927         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2928
2929         * interp.c (ColdReset): Remove #ifdef HASFPU, check
2930         CURRENT_FLOATING_POINT instead.
2931
2932         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2933         (address_translation): Raise exception InstructionFetch when
2934         translation fails and isINSTRUCTION.
2935
2936         * interp.c (sim_open, sim_write, sim_monitor, store_word,
2937         sim_engine_run): Change type of of vaddr and paddr to
2938         address_word.
2939         (address_translation, prefetch, load_memory, store_memory,
2940         cache_op): Change type of vAddr and pAddr to address_word.
2941
2942         * gencode.c (build_instruction): Change type of vaddr and paddr to
2943         address_word.
2944
2945 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2946
2947         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2948         macro to obtain result of ALU op.
2949
2950 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2951
2952         * interp.c (sim_info): Call profile_print.
2953
2954 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2955
2956         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2957
2958         * sim-main.h (WITH_PROFILE): Do not define, defined in
2959         common/sim-config.h.  Use sim-profile module.
2960         (simPROFILE): Delete defintion.
2961
2962         * interp.c (PROFILE): Delete definition.
2963         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2964         (sim_close): Delete code writing profile histogram.
2965         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2966         Delete.
2967         (sim_engine_run): Delete code profiling the PC.
2968
2969 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2970
2971         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2972
2973         * interp.c (sim_monitor): Make register pointers of type
2974         unsigned_word*.
2975
2976         * sim-main.h: Make registers of type unsigned_word not
2977         signed_word.
2978
2979 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2980
2981         * interp.c (sync_operation): Rename from SyncOperation, make
2982         global, add SD argument.
2983         (prefetch): Rename from Prefetch, make global, add SD argument.
2984         (decode_coproc): Make global.
2985
2986         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2987
2988         * gencode.c (build_instruction): Generate DecodeCoproc not
2989         decode_coproc calls.
2990
2991         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2992         (SizeFGR): Move to sim-main.h
2993         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2994         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2995         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2996         sim-main.h.
2997         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2998         FP_RM_TOMINF, GETRM): Move to sim-main.h.
2999         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
3000         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
3001         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
3002         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
3003
3004         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
3005         exception.
3006         (sim-alu.h): Include.
3007         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
3008         (sim_cia): Typedef to instruction_address.
3009
3010 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3011
3012         * Makefile.in (interp.o): Rename generated file engine.c to
3013         oengine.c.
3014
3015         * interp.c: Update.
3016
3017 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3018
3019         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
3020
3021 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3022
3023         * gencode.c (build_instruction): For "FPSQRT", output correct
3024         number of arguments to Recip.
3025
3026 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3027
3028         * Makefile.in (interp.o): Depends on sim-main.h
3029
3030         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
3031
3032         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
3033         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
3034         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
3035         STATE, DSSTATE): Define
3036         (GPR, FGRIDX, ..): Define.
3037
3038         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
3039         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
3040         (GPR, FGRIDX, ...): Delete macros.
3041
3042         * interp.c: Update names to match defines from sim-main.h
3043
3044 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3045
3046         * interp.c (sim_monitor): Add SD argument.
3047         (sim_warning): Delete.  Replace calls with calls to
3048         sim_io_eprintf.
3049         (sim_error): Delete. Replace calls with sim_io_error.
3050         (open_trace, writeout32, writeout16, getnum): Add SD argument.
3051         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
3052         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
3053         argument.
3054         (mips_size): Rename from sim_size. Add SD argument.
3055
3056         * interp.c (simulator): Delete global variable.
3057         (callback): Delete global variable.
3058         (mips_option_handler, sim_open, sim_write, sim_read,
3059         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
3060         sim_size,sim_monitor): Use sim_io_* not callback->*.
3061         (sim_open): ZALLOC simulator struct.
3062         (PROFILE): Do not define.
3063
3064 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3065
3066         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
3067         support.h with corresponding code.
3068
3069         * sim-main.h (word64, uword64), support.h: Move definition to
3070         sim-main.h.
3071         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
3072
3073         * support.h: Delete
3074         * Makefile.in: Update dependencies
3075         * interp.c: Do not include.
3076
3077 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3078
3079         * interp.c (address_translation, load_memory, store_memory,
3080         cache_op): Rename to from AddressTranslation et.al., make global,
3081         add SD argument
3082
3083         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
3084         CacheOp): Define.
3085
3086         * interp.c (SignalException): Rename to signal_exception, make
3087         global.
3088
3089         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
3090
3091         * sim-main.h (SignalException, SignalExceptionInterrupt,
3092         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
3093         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
3094         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
3095         Define.
3096
3097         * interp.c, support.h: Use.
3098
3099 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3100
3101         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
3102         to value_fpr / store_fpr. Add SD argument.
3103         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
3104         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
3105
3106         * sim-main.h (ValueFPR, StoreFPR): Define.
3107
3108 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3109
3110         * interp.c (sim_engine_run): Check consistency between configure
3111         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
3112         and HASFPU.
3113
3114         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
3115         (mips_fpu): Configure WITH_FLOATING_POINT.
3116         (mips_endian): Configure WITH_TARGET_ENDIAN.
3117         * configure: Update.
3118
3119 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3120
3121         * configure: Regenerated to track ../common/aclocal.m4 changes.
3122
3123 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
3124
3125         * configure: Regenerated.
3126
3127 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
3128
3129         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
3130
3131 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3132
3133         * gencode.c (print_igen_insn_models): Assume certain architectures
3134         include all mips* instructions.
3135         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
3136         instruction.
3137
3138         * Makefile.in (tmp.igen): Add target. Generate igen input from
3139         gencode file.
3140
3141         * gencode.c (FEATURE_IGEN): Define.
3142         (main): Add --igen option.  Generate output in igen format.
3143         (process_instructions): Format output according to igen option.
3144         (print_igen_insn_format): New function.
3145         (print_igen_insn_models): New function.
3146         (process_instructions): Only issue warnings and ignore
3147         instructions when no FEATURE_IGEN.
3148
3149 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3150
3151         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
3152         MIPS targets.
3153
3154 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3155
3156         * configure: Regenerated to track ../common/aclocal.m4 changes.
3157
3158 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3159
3160         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
3161         SIM_RESERVED_BITS): Delete, moved to common.
3162         (SIM_EXTRA_CFLAGS): Update.
3163
3164 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3165
3166         * configure.in: Configure non-strict memory alignment.
3167         * configure: Regenerated to track ../common/aclocal.m4 changes.
3168
3169 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3170
3171         * configure: Regenerated to track ../common/aclocal.m4 changes.
3172
3173 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
3174
3175         * gencode.c (SDBBP,DERET): Added (3900) insns.
3176         (RFE): Turn on for 3900.
3177         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
3178         (dsstate): Made global.
3179         (SUBTARGET_R3900): Added.
3180         (CANCELDELAYSLOT): New.
3181         (SignalException): Ignore SystemCall rather than ignore and
3182         terminate.  Add DebugBreakPoint handling.
3183         (decode_coproc): New insns RFE, DERET; and new registers Debug
3184         and DEPC protected by SUBTARGET_R3900.
3185         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
3186         bits explicitly.
3187         * Makefile.in,configure.in: Add mips subtarget option.
3188         * configure: Update.
3189
3190 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
3191
3192         * gencode.c: Add r3900 (tx39).
3193
3194
3195 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
3196
3197         * gencode.c (build_instruction): Don't need to subtract 4 for
3198         JALR, just 2.
3199
3200 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
3201
3202         * interp.c: Correct some HASFPU problems.
3203
3204 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3205
3206         * configure: Regenerated to track ../common/aclocal.m4 changes.
3207
3208 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3209
3210         * interp.c (mips_options): Fix samples option short form, should
3211         be `x'.
3212
3213 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3214
3215         * interp.c (sim_info): Enable info code.  Was just returning.
3216
3217 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3218
3219         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
3220         MFC0.
3221
3222 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3223
3224         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
3225         constants.
3226         (build_instruction): Ditto for LL.
3227
3228 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
3229
3230         * configure: Regenerated to track ../common/aclocal.m4 changes.
3231
3232 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3233
3234         * configure: Regenerated to track ../common/aclocal.m4 changes.
3235         * config.in: Ditto.
3236
3237 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3238
3239         * interp.c (sim_open): Add call to sim_analyze_program, update
3240         call to sim_config.
3241
3242 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3243
3244         * interp.c (sim_kill): Delete.
3245         (sim_create_inferior): Add ABFD argument. Set PC from same.
3246         (sim_load): Move code initializing trap handlers from here.
3247         (sim_open): To here.
3248         (sim_load): Delete, use sim-hload.c.
3249
3250         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
3251
3252 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3253
3254         * configure: Regenerated to track ../common/aclocal.m4 changes.
3255         * config.in: Ditto.
3256
3257 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3258
3259         * interp.c (sim_open): Add ABFD argument.
3260         (sim_load): Move call to sim_config from here.
3261         (sim_open): To here.  Check return status.
3262
3263 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
3264
3265         * gencode.c (build_instruction): Two arg MADD should
3266         not assign result to $0.
3267
3268 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
3269
3270         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
3271         * sim/mips/configure.in: Regenerate.
3272
3273 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
3274
3275         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
3276         signed8, unsigned8 et.al. types.
3277
3278         * interp.c (SUB_REG_FETCH): Handle both little and big endian
3279         hosts when selecting subreg.
3280
3281 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
3282
3283         * interp.c (sim_engine_run): Reset the ZERO register to zero
3284         regardless of FEATURE_WARN_ZERO.
3285         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
3286
3287 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3288
3289         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
3290         (SignalException): For BreakPoints ignore any mode bits and just
3291         save the PC.
3292         (SignalException): Always set the CAUSE register.
3293
3294 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3295
3296         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
3297         exception has been taken.
3298
3299         * interp.c: Implement the ERET and mt/f sr instructions.
3300
3301 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3302
3303         * interp.c (SignalException): Don't bother restarting an
3304         interrupt.
3305
3306 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3307
3308         * interp.c (SignalException): Really take an interrupt.
3309         (interrupt_event): Only deliver interrupts when enabled.
3310
3311 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3312
3313         * interp.c (sim_info): Only print info when verbose.
3314         (sim_info) Use sim_io_printf for output.
3315
3316 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3317
3318         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
3319         mips architectures.
3320
3321 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3322
3323         * interp.c (sim_do_command): Check for common commands if a
3324         simulator specific command fails.
3325
3326 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
3327
3328         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
3329         and simBE when DEBUG is defined.
3330
3331 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3332
3333         * interp.c (interrupt_event): New function.  Pass exception event
3334         onto exception handler.
3335
3336         * configure.in: Check for stdlib.h.
3337         * configure: Regenerate.
3338
3339         * gencode.c (build_instruction): Add UNUSED attribute to tempS
3340         variable declaration.
3341         (build_instruction): Initialize memval1.
3342         (build_instruction): Add UNUSED attribute to byte, bigend,
3343         reverse.
3344         (build_operands): Ditto.
3345
3346         * interp.c: Fix GCC warnings.
3347         (sim_get_quit_code): Delete.
3348
3349         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
3350         * Makefile.in: Ditto.
3351         * configure: Re-generate.
3352
3353         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
3354
3355 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3356
3357         * interp.c (mips_option_handler): New function parse argumes using
3358         sim-options.
3359         (myname): Replace with STATE_MY_NAME.
3360         (sim_open): Delete check for host endianness - performed by
3361         sim_config.
3362         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
3363         (sim_open): Move much of the initialization from here.
3364         (sim_load): To here.  After the image has been loaded and
3365         endianness set.
3366         (sim_open): Move ColdReset from here.
3367         (sim_create_inferior): To here.
3368         (sim_open): Make FP check less dependant on host endianness.
3369
3370         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
3371         run.
3372         * interp.c (sim_set_callbacks): Delete.
3373
3374         * interp.c (membank, membank_base, membank_size): Replace with
3375         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
3376         (sim_open): Remove call to callback->init. gdb/run do this.
3377
3378         * interp.c: Update
3379
3380         * sim-main.h (SIM_HAVE_FLATMEM): Define.
3381
3382         * interp.c (big_endian_p): Delete, replaced by
3383         current_target_byte_order.
3384
3385 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3386
3387         * interp.c (host_read_long, host_read_word, host_swap_word,
3388         host_swap_long): Delete. Using common sim-endian.
3389         (sim_fetch_register, sim_store_register): Use H2T.
3390         (pipeline_ticks): Delete.  Handled by sim-events.
3391         (sim_info): Update.
3392         (sim_engine_run): Update.
3393
3394 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3395
3396         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3397         reason from here.
3398         (SignalException): To here. Signal using sim_engine_halt.
3399         (sim_stop_reason): Delete, moved to common.
3400
3401 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
3402
3403         * interp.c (sim_open): Add callback argument.
3404         (sim_set_callbacks): Delete SIM_DESC argument.
3405         (sim_size): Ditto.
3406
3407 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3408
3409         * Makefile.in (SIM_OBJS): Add common modules.
3410
3411         * interp.c (sim_set_callbacks): Also set SD callback.
3412         (set_endianness, xfer_*, swap_*): Delete.
3413         (host_read_word, host_read_long, host_swap_word, host_swap_long):
3414         Change to functions using sim-endian macros.
3415         (control_c, sim_stop): Delete, use common version.
3416         (simulate): Convert into.
3417         (sim_engine_run): This function.
3418         (sim_resume): Delete.
3419
3420         * interp.c (simulation): New variable - the simulator object.
3421         (sim_kind): Delete global - merged into simulation.
3422         (sim_load): Cleanup.  Move PC assignment from here.
3423         (sim_create_inferior): To here.
3424
3425         * sim-main.h: New file.
3426         * interp.c (sim-main.h): Include.
3427
3428 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
3429
3430         * configure: Regenerated to track ../common/aclocal.m4 changes.
3431
3432 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
3433
3434         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3435
3436 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
3437
3438         * gencode.c (build_instruction): DIV instructions: check
3439         for division by zero and integer overflow before using
3440         host's division operation.
3441
3442 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
3443
3444         * Makefile.in (SIM_OBJS): Add sim-load.o.
3445         * interp.c: #include bfd.h.
3446         (target_byte_order): Delete.
3447         (sim_kind, myname, big_endian_p): New static locals.
3448         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
3449         after argument parsing.  Recognize -E arg, set endianness accordingly.
3450         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
3451         load file into simulator.  Set PC from bfd.
3452         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
3453         (set_endianness): Use big_endian_p instead of target_byte_order.
3454
3455 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3456
3457         * interp.c (sim_size): Delete prototype - conflicts with
3458         definition in remote-sim.h.  Correct definition.
3459
3460 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3461
3462         * configure: Regenerated to track ../common/aclocal.m4 changes.
3463         * config.in: Ditto.
3464
3465 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
3466
3467         * interp.c (sim_open): New arg `kind'.
3468
3469         * configure: Regenerated to track ../common/aclocal.m4 changes.
3470
3471 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3472
3473         * configure: Regenerated to track ../common/aclocal.m4 changes.
3474
3475 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
3476
3477         * interp.c (sim_open): Set optind to 0 before calling getopt.
3478
3479 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3480
3481         * configure: Regenerated to track ../common/aclocal.m4 changes.
3482
3483 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
3484
3485         * interp.c : Replace uses of pr_addr with pr_uword64
3486         where the bit length is always 64 independent of SIM_ADDR.
3487         (pr_uword64) : added.
3488
3489 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3490
3491         * configure: Re-generate.
3492
3493 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
3494
3495         * configure: Regenerate to track ../common/aclocal.m4 changes.
3496
3497 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
3498
3499         * interp.c (sim_open): New SIM_DESC result.  Argument is now
3500         in argv form.
3501         (other sim_*): New SIM_DESC argument.
3502
3503 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
3504
3505         * interp.c: Fix printing of addresses for non-64-bit targets.
3506         (pr_addr): Add function to print address based on size.
3507
3508 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
3509
3510         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3511
3512 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
3513
3514         * gencode.c (build_mips16_operands): Correct computation of base
3515         address for extended PC relative instruction.
3516
3517 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
3518
3519         * interp.c (mips16_entry): Add support for floating point cases.
3520         (SignalException): Pass floating point cases to mips16_entry.
3521         (ValueFPR): Don't restrict fmt_single and fmt_word to even
3522         registers.
3523         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
3524         or fmt_word.
3525         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3526         and then set the state to fmt_uninterpreted.
3527         (COP_SW): Temporarily set the state to fmt_word while calling
3528         ValueFPR.
3529
3530 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
3531
3532         * gencode.c (build_instruction): The high order may be set in the
3533         comparison flags at any ISA level, not just ISA 4.
3534
3535 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
3536
3537         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3538         COMMON_{PRE,POST}_CONFIG_FRAG instead.
3539         * configure.in: sinclude ../common/aclocal.m4.
3540         * configure: Regenerated.
3541
3542 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
3543
3544         * configure: Rebuild after change to aclocal.m4.
3545
3546 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
3547
3548         * configure configure.in Makefile.in:  Update to new configure
3549         scheme which is more compatible with WinGDB builds.
3550         * configure.in:  Improve comment on how to run autoconf.
3551         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
3552         * Makefile.in:  Use autoconf substitution to install common
3553         makefile fragment.
3554
3555 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
3556
3557         * gencode.c (build_instruction): Use BigEndianCPU instead of
3558         ByteSwapMem.
3559
3560 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
3561
3562         * interp.c (sim_monitor): Make output to stdout visible in
3563         wingdb's I/O log window.
3564
3565 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
3566
3567         * support.h: Undo previous change to SIGTRAP
3568         and SIGQUIT values.
3569
3570 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
3571
3572         * interp.c (store_word, load_word): New static functions.
3573         (mips16_entry): New static function.
3574         (SignalException): Look for mips16 entry and exit instructions.
3575         (simulate): Use the correct index when setting fpr_state after
3576         doing a pending move.
3577
3578 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
3579
3580         * interp.c: Fix byte-swapping code throughout to work on
3581         both little- and big-endian hosts.
3582
3583 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
3584
3585         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3586         with gdb/config/i386/xm-windows.h.
3587
3588 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
3589
3590         * gencode.c (build_instruction): Work around MSVC++ code gen bug
3591         that messes up arithmetic shifts.
3592
3593 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
3594
3595         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
3596         SIGTRAP and SIGQUIT for _WIN32.
3597
3598 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
3599
3600         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3601         force a 64 bit multiplication.
3602         (build_instruction) [OR]: In mips16 mode, don't do anything if the
3603         destination register is 0, since that is the default mips16 nop
3604         instruction.
3605
3606 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
3607
3608         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3609         (build_endian_shift): Don't check proc64.
3610         (build_instruction): Always set memval to uword64.  Cast op2 to
3611         uword64 when shifting it left in memory instructions.  Always use
3612         the same code for stores--don't special case proc64.
3613
3614         * gencode.c (build_mips16_operands): Fix base PC value for PC
3615         relative operands.
3616         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3617         jal instruction.
3618         * interp.c (simJALDELAYSLOT): Define.
3619         (JALDELAYSLOT): Define.
3620         (INDELAYSLOT, INJALDELAYSLOT): Define.
3621         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3622
3623 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
3624
3625         * interp.c (sim_open): add flush_cache as a PMON routine
3626         (sim_monitor): handle flush_cache by ignoring it
3627
3628 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
3629
3630         * gencode.c (build_instruction): Use !ByteSwapMem instead of
3631         BigEndianMem.
3632         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3633         (BigEndianMem): Rename to ByteSwapMem and change sense.
3634         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3635         BigEndianMem references to !ByteSwapMem.
3636         (set_endianness): New function, with prototype.
3637         (sim_open): Call set_endianness.
3638         (sim_info): Use simBE instead of BigEndianMem.
3639         (xfer_direct_word, xfer_direct_long, swap_direct_word,
3640         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3641         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3642         ifdefs, keeping the prototype declaration.
3643         (swap_word): Rewrite correctly.
3644         (ColdReset): Delete references to CONFIG.  Delete endianness related
3645         code; moved to set_endianness.
3646
3647 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
3648
3649         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3650         * interp.c (CHECKHILO): Define away.
3651         (simSIGINT): New macro.
3652         (membank_size): Increase from 1MB to 2MB.
3653         (control_c): New function.
3654         (sim_resume): Rename parameter signal to signal_number.  Add local
3655         variable prev.  Call signal before and after simulate.
3656         (sim_stop_reason): Add simSIGINT support.
3657         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3658         functions always.
3659         (sim_warning): Delete call to SignalException.  Do call printf_filtered
3660         if logfh is NULL.
3661         (AddressTranslation): Add #ifdef DEBUG around debugging message and
3662         a call to sim_warning.
3663
3664 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
3665
3666         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3667         16 bit instructions.
3668
3669 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3670
3671         Add support for mips16 (16 bit MIPS implementation):
3672         * gencode.c (inst_type): Add mips16 instruction encoding types.
3673         (GETDATASIZEINSN): Define.
3674         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
3675         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
3676         mtlo.
3677         (MIPS16_DECODE): New table, for mips16 instructions.
3678         (bitmap_val): New static function.
3679         (struct mips16_op): Define.
3680         (mips16_op_table): New table, for mips16 operands.
3681         (build_mips16_operands): New static function.
3682         (process_instructions): If PC is odd, decode a mips16
3683         instruction.  Break out instruction handling into new
3684         build_instruction function.
3685         (build_instruction): New static function, broken out of
3686         process_instructions.  Check modifiers rather than flags for SHIFT
3687         bit count and m[ft]{hi,lo} direction.
3688         (usage): Pass program name to fprintf.
3689         (main): Remove unused variable this_option_optind.  Change
3690         ``*loptarg++'' to ``loptarg++''.
3691         (my_strtoul): Parenthesize && within ||.
3692         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3693         (simulate): If PC is odd, fetch a 16 bit instruction, and
3694         increment PC by 2 rather than 4.
3695         * configure.in: Add case for mips16*-*-*.
3696         * configure: Rebuild.
3697
3698 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
3699
3700         * interp.c: Allow -t to enable tracing in standalone simulator.
3701         Fix garbage output in trace file and error messages.
3702
3703 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
3704
3705         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3706         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3707         * configure.in: Simplify using macros in ../common/aclocal.m4.
3708         * configure: Regenerated.
3709         * tconfig.in: New file.
3710
3711 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
3712
3713         * interp.c: Fix bugs in 64-bit port.
3714         Use ansi function declarations for msvc compiler.
3715         Initialize and test file pointer in trace code.
3716         Prevent duplicate definition of LAST_EMED_REGNUM.
3717
3718 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
3719
3720         * interp.c (xfer_big_long): Prevent unwanted sign extension.
3721
3722 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
3723
3724         * interp.c (SignalException): Check for explicit terminating
3725         breakpoint value.
3726         * gencode.c: Pass instruction value through SignalException()
3727         calls for Trap, Breakpoint and Syscall.
3728
3729 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3730
3731         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3732         only used on those hosts that provide it.
3733         * configure.in: Add sqrt() to list of functions to be checked for.
3734         * config.in: Re-generated.
3735         * configure: Re-generated.
3736
3737 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3738
3739         * gencode.c (process_instructions): Call build_endian_shift when
3740         expanding STORE RIGHT, to fix swr.
3741         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3742         clear the high bits.
3743         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3744         Fix float to int conversions to produce signed values.
3745
3746 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
3747
3748         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3749         (process_instructions): Correct handling of nor instruction.
3750         Correct shift count for 32 bit shift instructions. Correct sign
3751         extension for arithmetic shifts to not shift the number of bits in
3752         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
3753         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
3754         Fix madd.
3755         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3756         It's OK to have a mult follow a mult.  What's not OK is to have a
3757         mult follow an mfhi.
3758         (Convert): Comment out incorrect rounding code.
3759
3760 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
3761
3762         * interp.c (sim_monitor): Improved monitor printf
3763         simulation. Tidied up simulator warnings, and added "--log" option
3764         for directing warning message output.
3765         * gencode.c: Use sim_warning() rather than WARNING macro.
3766
3767 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3768
3769         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3770         getopt1.o, rather than on gencode.c.  Link objects together.
3771         Don't link against -liberty.
3772         (gencode.o, getopt.o, getopt1.o): New targets.
3773         * gencode.c: Include <ctype.h> and "ansidecl.h".
3774         (AND): Undefine after including "ansidecl.h".
3775         (ULONG_MAX): Define if not defined.
3776         (OP_*): Don't define macros; now defined in opcode/mips.h.
3777         (main): Call my_strtoul rather than strtoul.
3778         (my_strtoul): New static function.
3779
3780 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
3781
3782         * gencode.c (process_instructions):  Generate word64 and uword64
3783         instead of `long long' and `unsigned long long' data types.
3784         * interp.c:  #include sysdep.h to get signals, and define default
3785         for SIGBUS.
3786         * (Convert):  Work around for Visual-C++ compiler bug with type
3787         conversion.
3788         * support.h:  Make things compile under Visual-C++ by using
3789         __int64 instead of `long long'.  Change many refs to long long
3790         into word64/uword64 typedefs.
3791
3792 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
3793
3794         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3795         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3796         (docdir): Removed.
3797         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3798         (AC_PROG_INSTALL): Added.
3799         (AC_PROG_CC): Moved to before configure.host call.
3800         * configure: Rebuilt.
3801
3802 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
3803
3804         * configure.in: Define @SIMCONF@ depending on mips target.
3805         * configure: Rebuild.
3806         * Makefile.in (run): Add @SIMCONF@ to control simulator
3807         construction.
3808         * gencode.c: Change LOADDRMASK to 64bit memory model only.
3809         * interp.c: Remove some debugging, provide more detailed error
3810         messages, update memory accesses to use LOADDRMASK.
3811
3812 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
3813
3814         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3815         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
3816         stamp-h.
3817         * configure: Rebuild.
3818         * config.in: New file, generated by autoheader.
3819         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
3820         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
3821         HAVE_ANINT and HAVE_AINT, as appropriate.
3822         * Makefile.in (run): Use @LIBS@ rather than -lm.
3823         (interp.o): Depend upon config.h.
3824         (Makefile): Just rebuild Makefile.
3825         (clean): Remove stamp-h.
3826         (mostlyclean): Make the same as clean, not as distclean.
3827         (config.h, stamp-h): New targets.
3828
3829 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3830
3831         * interp.c (ColdReset): Fix boolean test. Make all simulator
3832         globals static.
3833
3834 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
3835
3836         * interp.c (xfer_direct_word, xfer_direct_long,
3837         swap_direct_word, swap_direct_long, xfer_big_word,
3838         xfer_big_long, xfer_little_word, xfer_little_long,
3839         swap_word,swap_long): Added.
3840         * interp.c (ColdReset): Provide function indirection to
3841         host<->simulated_target transfer routines.
3842         * interp.c (sim_store_register, sim_fetch_register): Updated to
3843         make use of indirected transfer routines.
3844
3845 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
3846
3847         * gencode.c (process_instructions): Ensure FP ABS instruction
3848         recognised.
3849         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3850         system call support.
3851
3852 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
3853
3854         * interp.c (sim_do_command): Complain if callback structure not
3855         initialised.
3856
3857 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
3858
3859         * interp.c (Convert): Provide round-to-nearest and round-to-zero
3860         support for Sun hosts.
3861         * Makefile.in (gencode): Ensure the host compiler and libraries
3862         used for cross-hosted build.
3863
3864 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
3865
3866         * interp.c, gencode.c: Some more (TODO) tidying.
3867
3868 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
3869
3870         * gencode.c, interp.c: Replaced explicit long long references with
3871         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3872         * support.h (SET64LO, SET64HI): Macros added.
3873
3874 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
3875
3876         * configure: Regenerate with autoconf 2.7.
3877
3878 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
3879
3880         * interp.c (LoadMemory): Enclose text following #endif in /* */.
3881         * support.h: Remove superfluous "1" from #if.
3882         * support.h (CHECKSIM): Remove stray 'a' at end of line.
3883
3884 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
3885
3886         * interp.c (StoreFPR): Control UndefinedResult() call on
3887         WARN_RESULT manifest.
3888
3889 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
3890
3891         * gencode.c: Tidied instruction decoding, and added FP instruction
3892         support.
3893
3894         * interp.c: Added dineroIII, and BSD profiling support. Also
3895         run-time FP handling.
3896
3897 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
3898
3899         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3900         gencode.c, interp.c, support.h: created.