1 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
3 * mips.igen: Add model filter field to records.
5 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
7 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
9 interp.c (sim_engine_run): Do not compile function sim_engine_run
12 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
15 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
16 igen. Replace with configuration variables sim_igen_flags /
20 * r5900.igen: New file. Copy v5900 insns here.
23 * vr5400.igen: New file.
25 * m16.igen: New file. Copy mips16 insns here.
26 * mips.igen: From here.
28 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
31 * mips.igen: Tag all mipsIV instructions with vr5400 model.
33 * configure.in: Add mips64vr5400 target.
34 * configure: Re-generate.
37 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
39 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
41 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
43 * gencode.c (build_instruction): Follow sim_write's lead in using
44 BigEndianMem instead of !ByteSwapMem.
46 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
48 * configure.in (sim_gen): Dependent on target, select type of
49 generator. Always select old style generator.
51 configure: Re-generate.
53 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
55 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
56 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
57 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
58 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
59 SIM_@sim_gen@_*, set by autoconf.
61 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
63 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
65 * interp.c (ColdReset): Remove #ifdef HASFPU, check
66 CURRENT_FLOATING_POINT instead.
68 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
69 (address_translation): Raise exception InstructionFetch when
70 translation fails and isINSTRUCTION.
72 * interp.c (sim_open, sim_write, sim_monitor, store_word,
73 sim_engine_run): Change type of of vaddr and paddr to
75 (address_translation, prefetch, load_memory, store_memory,
76 cache_op): Change type of vAddr and pAddr to address_word.
78 * gencode.c (build_instruction): Change type of vaddr and paddr to
81 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
83 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
84 macro to obtain result of ALU op.
86 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
88 * interp.c (sim_info): Call profile_print.
90 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
92 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
94 * sim-main.h (WITH_PROFILE): Do not define, defined in
95 common/sim-config.h. Use sim-profile module.
96 (simPROFILE): Delete defintion.
98 * interp.c (PROFILE): Delete definition.
99 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
100 (sim_close): Delete code writing profile histogram.
101 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
103 (sim_engine_run): Delete code profiling the PC.
105 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
107 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
109 * interp.c (sim_monitor): Make register pointers of type
112 * sim-main.h: Make registers of type unsigned_word not
115 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
118 * sim-main.h (BYTES_IN_MMI_REGS, ..., SUB_REG_FETCH, ..., GPR_SB,
119 ...): Move to sim-main.h
122 * interp.c (sync_operation): Rename from SyncOperation, make
123 global, add SD argument.
124 (prefetch): Rename from Prefetch, make global, add SD argument.
125 (decode_coproc): Make global.
127 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
129 * gencode.c (build_instruction): Generate DecodeCoproc not
132 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
133 (SizeFGR): Move to sim-main.h
134 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
135 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
136 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
138 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
139 FP_RM_TOMINF, GETRM): Move to sim-main.h.
140 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
141 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
142 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
143 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
145 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
147 (sim-alu.h): Include.
148 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
149 (sim_cia): Typedef to instruction_address.
151 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
153 * Makefile.in (interp.o): Rename generated file engine.c to
158 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
160 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
162 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
164 * gencode.c (build_instruction): For "FPSQRT", output correct
165 number of arguments to Recip.
167 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
169 * Makefile.in (interp.o): Depends on sim-main.h
171 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
173 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
174 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
175 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
176 STATE, DSSTATE): Define
177 (GPR, FGRIDX, ..): Define.
179 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
180 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
181 (GPR, FGRIDX, ...): Delete macros.
183 * interp.c: Update names to match defines from sim-main.h
185 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
187 * interp.c (sim_monitor): Add SD argument.
188 (sim_warning): Delete. Replace calls with calls to
190 (sim_error): Delete. Replace calls with sim_io_error.
191 (open_trace, writeout32, writeout16, getnum): Add SD argument.
192 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
193 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
195 (mips_size): Rename from sim_size. Add SD argument.
197 * interp.c (simulator): Delete global variable.
198 (callback): Delete global variable.
199 (mips_option_handler, sim_open, sim_write, sim_read,
200 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
201 sim_size,sim_monitor): Use sim_io_* not callback->*.
202 (sim_open): ZALLOC simulator struct.
203 (PROFILE): Do not define.
205 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
207 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
208 support.h with corresponding code.
210 * sim-main.h (word64, uword64), support.h: Move definition to
212 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
215 * Makefile.in: Update dependencies
216 * interp.c: Do not include.
218 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
220 * interp.c (address_translation, load_memory, store_memory,
221 cache_op): Rename to from AddressTranslation et.al., make global,
224 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
227 * interp.c (SignalException): Rename to signal_exception, make
230 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
232 * sim-main.h (SignalException, SignalExceptionInterrupt,
233 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
234 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
235 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
238 * interp.c, support.h: Use.
240 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
242 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
243 to value_fpr / store_fpr. Add SD argument.
244 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
245 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
247 * sim-main.h (ValueFPR, StoreFPR): Define.
249 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
251 * interp.c (sim_engine_run): Check consistency between configure
252 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
255 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
256 (mips_fpu): Configure WITH_FLOATING_POINT.
257 (mips_endian): Configure WITH_TARGET_ENDIAN.
260 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
262 * configure: Regenerated to track ../common/aclocal.m4 changes.
265 Mon Aug 25 19:11:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
267 * interp.c (MAX_REG): Allow up-to 128 registers.
268 (LO1, HI1): Define value that matches REGISTER_NAMES in gdb.
269 (REGISTER_SA): Ditto.
270 (sim_open): Initialize register_widths for r5900 specific
272 (sim_fetch_register, sim_store_register): Check for request of
273 r5900 specific SA register. Check for request for hi 64 bits of
274 r5900 specific registers.
277 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
279 * configure: Regenerated.
281 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
283 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
285 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
287 * gencode.c (print_igen_insn_models): Assume certain architectures
288 include all mips* instructions.
289 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
292 * Makefile.in (tmp.igen): Add target. Generate igen input from
295 * gencode.c (FEATURE_IGEN): Define.
296 (main): Add --igen option. Generate output in igen format.
297 (process_instructions): Format output according to igen option.
298 (print_igen_insn_format): New function.
299 (print_igen_insn_models): New function.
300 (process_instructions): Only issue warnings and ignore
301 instructions when no FEATURE_IGEN.
303 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
305 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
308 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
310 * configure: Regenerated to track ../common/aclocal.m4 changes.
312 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
314 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
315 SIM_RESERVED_BITS): Delete, moved to common.
316 (SIM_EXTRA_CFLAGS): Update.
318 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
320 * configure.in: Configure non-strict memory alignment.
321 * configure: Regenerated to track ../common/aclocal.m4 changes.
323 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
325 * configure: Regenerated to track ../common/aclocal.m4 changes.
327 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
329 * gencode.c (SDBBP,DERET): Added (3900) insns.
330 (RFE): Turn on for 3900.
331 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
332 (dsstate): Made global.
333 (SUBTARGET_R3900): Added.
334 (CANCELDELAYSLOT): New.
335 (SignalException): Ignore SystemCall rather than ignore and
336 terminate. Add DebugBreakPoint handling.
337 (decode_coproc): New insns RFE, DERET; and new registers Debug
338 and DEPC protected by SUBTARGET_R3900.
339 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
341 * Makefile.in,configure.in: Add mips subtarget option.
344 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
346 * gencode.c: Add r3900 (tx39).
349 * gencode.c: Fix some configuration problems by improving
350 the relationship between tx19 and tx39.
353 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
355 * gencode.c (build_instruction): Don't need to subtract 4 for
358 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
360 * interp.c: Correct some HASFPU problems.
362 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
364 * configure: Regenerated to track ../common/aclocal.m4 changes.
366 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
368 * interp.c (mips_options): Fix samples option short form, should
371 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
373 * interp.c (sim_info): Enable info code. Was just returning.
375 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
377 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
380 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
382 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
384 (build_instruction): Ditto for LL.
387 Sun Sep 7 16:05:46 1997 Gavin Koch <gavin@cygnus.com>
389 * mips/configure.in, mips/gencode: Add tx19/r1900.
392 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
394 * configure: Regenerated to track ../common/aclocal.m4 changes.
397 Mon Sep 1 18:43:30 1997 Andrew Cagney <cagney@b1.cygnus.com>
399 * gencode.c (build_instruction): For "pabsw" and "pabsh", check
400 for overflow due to ABS of MININT, set result to MAXINT.
401 (build_instruction): For "psrlvw", signextend bit 31.
404 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
406 * configure: Regenerated to track ../common/aclocal.m4 changes.
409 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
411 * interp.c (sim_open): Add call to sim_analyze_program, update
414 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
416 * interp.c (sim_kill): Delete.
417 (sim_create_inferior): Add ABFD argument. Set PC from same.
418 (sim_load): Move code initializing trap handlers from here.
420 (sim_load): Delete, use sim-hload.c.
422 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
424 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
426 * configure: Regenerated to track ../common/aclocal.m4 changes.
429 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
431 * interp.c (sim_open): Add ABFD argument.
432 (sim_load): Move call to sim_config from here.
433 (sim_open): To here. Check return status.
436 * gencode.c (build_instruction): Do not define x8000000000000000,
437 x7FFFFFFFFFFFFFFF, or xFFFFFFFF80000000.
441 Mon Jul 28 19:49:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
443 * gencode.c (build_instruction): For "pdivw", "pdivbw" and
444 "pdivuw" check for overflow due to signed divide by -1.
447 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
449 * gencode.c (build_instruction): Two arg MADD should
450 not assign result to $0.
453 Thu Jul 10 11:58:48 1997 Andrew Cagney <cagney@critters.cygnus.com>
455 * gencode.c (build_instruction): For "ppac5" use unsigned
456 arrithmetic so that the sign bit doesn't smear when right shifted.
457 (build_instruction): For "pdiv" perform sign extension when
458 storing results in HI and LO.
459 (build_instructions): For "pdiv" and "pdivbw" check for
461 (build_instruction): For "pmfhl.slw" update hi part of dest
462 register as well as low part.
463 (build_instruction): For "pmfhl" portably handle long long values.
464 (build_instruction): For "pmfhl.sh" correctly negative values.
465 Store half words 2 and three in the correct place.
466 (build_instruction): For "psllvw", sign extend value after shift.
469 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
471 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
472 * sim/mips/configure.in: Regenerate.
474 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
476 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
477 signed8, unsigned8 et.al. types.
480 * gencode.c (build_instruction): For PMULTU* do not sign extend
481 registers. Make generated code easier to debug.
484 * interp.c (SUB_REG_FETCH): Handle both little and big endian
485 hosts when selecting subreg.
488 Tue Jul 8 18:07:20 1997 Andrew Cagney <cagney@andros.cygnus.com>
490 * gencode.c (type_for_data_len): For 32bit operations concerned
491 with overflow, perform op using 64bits.
492 (build_instruction): For PADD, always compute operation using type
493 returned by type_for_data_len.
494 (build_instruction): For PSUBU, when overflow, saturate to zero as
498 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
501 * gencode.c (build_instruction): Handle "pext5" according to
502 version 1.95 of the r5900 ISA.
504 * gencode.c (build_instruction): Handle "ppac5" according to
505 version 1.95 of the r5900 ISA.
508 * interp.c (sim_engine_run): Reset the ZERO register to zero
509 regardless of FEATURE_WARN_ZERO.
510 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
512 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
514 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
515 (SignalException): For BreakPoints ignore any mode bits and just
517 (SignalException): Always set the CAUSE register.
519 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
521 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
522 exception has been taken.
524 * interp.c: Implement the ERET and mt/f sr instructions.
527 Mon Jun 2 23:28:19 1997 Andrew Cagney <cagney@b1.cygnus.com>
529 * gencode.c (build_instruction): For paddu, extract unsigned
532 * gencode.c (build_instruction): Saturate padds instead of padd
536 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
538 * interp.c (SignalException): Don't bother restarting an
541 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
543 * interp.c (SignalException): Really take an interrupt.
544 (interrupt_event): Only deliver interrupts when enabled.
546 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
548 * interp.c (sim_info): Only print info when verbose.
549 (sim_info) Use sim_io_printf for output.
551 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
553 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
556 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
558 * interp.c (sim_do_command): Check for common commands if a
559 simulator specific command fails.
561 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
563 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
564 and simBE when DEBUG is defined.
566 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
568 * interp.c (interrupt_event): New function. Pass exception event
569 onto exception handler.
571 * configure.in: Check for stdlib.h.
572 * configure: Regenerate.
574 * gencode.c (build_instruction): Add UNUSED attribute to tempS
575 variable declaration.
576 (build_instruction): Initialize memval1.
577 (build_instruction): Add UNUSED attribute to byte, bigend,
579 (build_operands): Ditto.
581 * interp.c: Fix GCC warnings.
582 (sim_get_quit_code): Delete.
584 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
585 * Makefile.in: Ditto.
586 * configure: Re-generate.
588 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
590 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
592 * interp.c (mips_option_handler): New function parse argumes using
594 (myname): Replace with STATE_MY_NAME.
595 (sim_open): Delete check for host endianness - performed by
597 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
598 (sim_open): Move much of the initialization from here.
599 (sim_load): To here. After the image has been loaded and
601 (sim_open): Move ColdReset from here.
602 (sim_create_inferior): To here.
603 (sim_open): Make FP check less dependant on host endianness.
605 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
607 * interp.c (sim_set_callbacks): Delete.
609 * interp.c (membank, membank_base, membank_size): Replace with
610 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
611 (sim_open): Remove call to callback->init. gdb/run do this.
615 * sim-main.h (SIM_HAVE_FLATMEM): Define.
617 * interp.c (big_endian_p): Delete, replaced by
618 current_target_byte_order.
620 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
622 * interp.c (host_read_long, host_read_word, host_swap_word,
623 host_swap_long): Delete. Using common sim-endian.
624 (sim_fetch_register, sim_store_register): Use H2T.
625 (pipeline_ticks): Delete. Handled by sim-events.
627 (sim_engine_run): Update.
629 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
631 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
633 (SignalException): To here. Signal using sim_engine_halt.
634 (sim_stop_reason): Delete, moved to common.
636 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
638 * interp.c (sim_open): Add callback argument.
639 (sim_set_callbacks): Delete SIM_DESC argument.
642 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
644 * Makefile.in (SIM_OBJS): Add common modules.
646 * interp.c (sim_set_callbacks): Also set SD callback.
647 (set_endianness, xfer_*, swap_*): Delete.
648 (host_read_word, host_read_long, host_swap_word, host_swap_long):
649 Change to functions using sim-endian macros.
650 (control_c, sim_stop): Delete, use common version.
651 (simulate): Convert into.
652 (sim_engine_run): This function.
653 (sim_resume): Delete.
655 * interp.c (simulation): New variable - the simulator object.
656 (sim_kind): Delete global - merged into simulation.
657 (sim_load): Cleanup. Move PC assignment from here.
658 (sim_create_inferior): To here.
660 * sim-main.h: New file.
661 * interp.c (sim-main.h): Include.
663 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
665 * configure: Regenerated to track ../common/aclocal.m4 changes.
667 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
669 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
671 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
673 * gencode.c (build_instruction): DIV instructions: check
674 for division by zero and integer overflow before using
675 host's division operation.
677 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
679 * Makefile.in (SIM_OBJS): Add sim-load.o.
680 * interp.c: #include bfd.h.
681 (target_byte_order): Delete.
682 (sim_kind, myname, big_endian_p): New static locals.
683 (sim_open): Set sim_kind, myname. Move call to set_endianness to
684 after argument parsing. Recognize -E arg, set endianness accordingly.
685 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
686 load file into simulator. Set PC from bfd.
687 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
688 (set_endianness): Use big_endian_p instead of target_byte_order.
690 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
692 * interp.c (sim_size): Delete prototype - conflicts with
693 definition in remote-sim.h. Correct definition.
695 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
697 * configure: Regenerated to track ../common/aclocal.m4 changes.
700 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
702 * interp.c (sim_open): New arg `kind'.
704 * configure: Regenerated to track ../common/aclocal.m4 changes.
706 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
708 * configure: Regenerated to track ../common/aclocal.m4 changes.
710 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
712 * interp.c (sim_open): Set optind to 0 before calling getopt.
714 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
716 * configure: Regenerated to track ../common/aclocal.m4 changes.
718 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
720 * interp.c : Replace uses of pr_addr with pr_uword64
721 where the bit length is always 64 independent of SIM_ADDR.
722 (pr_uword64) : added.
724 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
726 * configure: Re-generate.
728 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
730 * configure: Regenerate to track ../common/aclocal.m4 changes.
732 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
734 * interp.c (sim_open): New SIM_DESC result. Argument is now
736 (other sim_*): New SIM_DESC argument.
739 Wed Feb 26 18:32:21 1997 Gavin Koch <gavin@cygnus.com>
741 * gencode.c (POP_AND,POP_OR,POP_NOR,POP_XOR):
742 Change values to avoid overloading DOUBLEWORD which is tested
744 * gencode.c: reinstate "offending code".
747 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
749 * interp.c: Fix printing of addresses for non-64-bit targets.
750 (pr_addr): Add function to print address based on size.
752 * gencode.c: #ifdef out offending code until a permanent fix
753 can be added. Code is causing build errors for non-5900 mips targets.
757 Thu Feb 20 10:40:24 1997 Gavin Koch <gavin@cetus.cygnus.com>
759 * gencode.c (process_instructions): Correct test for ISA dependent
760 architecture bits in isa field of MIPS_DECODE.
763 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
765 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
768 Tue Feb 18 17:03:47 1997 Gavin Koch <gavin@cygnus.com>
770 * gencode.c (MIPS_DECODE): Correct instruction feature flags for
774 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
776 * gencode.c (build_mips16_operands): Correct computation of base
777 address for extended PC relative instruction.
780 Fri Feb 7 11:12:44 1997 Gavin Koch <gavin@cygnus.com>
782 * Makefile.in, configure, configure.in, gencode.c,
783 interp.c, support.h: add r5900.
786 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
788 * interp.c (mips16_entry): Add support for floating point cases.
789 (SignalException): Pass floating point cases to mips16_entry.
790 (ValueFPR): Don't restrict fmt_single and fmt_word to even
792 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
794 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
795 and then set the state to fmt_uninterpreted.
796 (COP_SW): Temporarily set the state to fmt_word while calling
799 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
801 * gencode.c (build_instruction): The high order may be set in the
802 comparison flags at any ISA level, not just ISA 4.
804 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
806 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
807 COMMON_{PRE,POST}_CONFIG_FRAG instead.
808 * configure.in: sinclude ../common/aclocal.m4.
809 * configure: Regenerated.
811 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
813 * configure: Rebuild after change to aclocal.m4.
815 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
817 * configure configure.in Makefile.in: Update to new configure
818 scheme which is more compatible with WinGDB builds.
819 * configure.in: Improve comment on how to run autoconf.
820 * configure: Re-run autoconf to get new ../common/aclocal.m4.
821 * Makefile.in: Use autoconf substitution to install common
824 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
826 * gencode.c (build_instruction): Use BigEndianCPU instead of
829 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
831 * interp.c (sim_monitor): Make output to stdout visible in
832 wingdb's I/O log window.
834 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
836 * support.h: Undo previous change to SIGTRAP
839 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
841 * interp.c (store_word, load_word): New static functions.
842 (mips16_entry): New static function.
843 (SignalException): Look for mips16 entry and exit instructions.
844 (simulate): Use the correct index when setting fpr_state after
845 doing a pending move.
847 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
849 * interp.c: Fix byte-swapping code throughout to work on
850 both little- and big-endian hosts.
852 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
854 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
855 with gdb/config/i386/xm-windows.h.
857 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
859 * gencode.c (build_instruction): Work around MSVC++ code gen bug
860 that messes up arithmetic shifts.
862 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
864 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
865 SIGTRAP and SIGQUIT for _WIN32.
867 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
869 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
870 force a 64 bit multiplication.
871 (build_instruction) [OR]: In mips16 mode, don't do anything if the
872 destination register is 0, since that is the default mips16 nop
875 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
877 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
878 (build_endian_shift): Don't check proc64.
879 (build_instruction): Always set memval to uword64. Cast op2 to
880 uword64 when shifting it left in memory instructions. Always use
881 the same code for stores--don't special case proc64.
883 * gencode.c (build_mips16_operands): Fix base PC value for PC
885 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
887 * interp.c (simJALDELAYSLOT): Define.
888 (JALDELAYSLOT): Define.
889 (INDELAYSLOT, INJALDELAYSLOT): Define.
890 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
892 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
894 * interp.c (sim_open): add flush_cache as a PMON routine
895 (sim_monitor): handle flush_cache by ignoring it
897 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
899 * gencode.c (build_instruction): Use !ByteSwapMem instead of
901 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
902 (BigEndianMem): Rename to ByteSwapMem and change sense.
903 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
904 BigEndianMem references to !ByteSwapMem.
905 (set_endianness): New function, with prototype.
906 (sim_open): Call set_endianness.
907 (sim_info): Use simBE instead of BigEndianMem.
908 (xfer_direct_word, xfer_direct_long, swap_direct_word,
909 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
910 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
911 ifdefs, keeping the prototype declaration.
912 (swap_word): Rewrite correctly.
913 (ColdReset): Delete references to CONFIG. Delete endianness related
914 code; moved to set_endianness.
916 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
918 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
919 * interp.c (CHECKHILO): Define away.
920 (simSIGINT): New macro.
921 (membank_size): Increase from 1MB to 2MB.
922 (control_c): New function.
923 (sim_resume): Rename parameter signal to signal_number. Add local
924 variable prev. Call signal before and after simulate.
925 (sim_stop_reason): Add simSIGINT support.
926 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
928 (sim_warning): Delete call to SignalException. Do call printf_filtered
930 (AddressTranslation): Add #ifdef DEBUG around debugging message and
931 a call to sim_warning.
933 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
935 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
938 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
940 Add support for mips16 (16 bit MIPS implementation):
941 * gencode.c (inst_type): Add mips16 instruction encoding types.
942 (GETDATASIZEINSN): Define.
943 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
944 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
946 (MIPS16_DECODE): New table, for mips16 instructions.
947 (bitmap_val): New static function.
948 (struct mips16_op): Define.
949 (mips16_op_table): New table, for mips16 operands.
950 (build_mips16_operands): New static function.
951 (process_instructions): If PC is odd, decode a mips16
952 instruction. Break out instruction handling into new
953 build_instruction function.
954 (build_instruction): New static function, broken out of
955 process_instructions. Check modifiers rather than flags for SHIFT
956 bit count and m[ft]{hi,lo} direction.
957 (usage): Pass program name to fprintf.
958 (main): Remove unused variable this_option_optind. Change
959 ``*loptarg++'' to ``loptarg++''.
960 (my_strtoul): Parenthesize && within ||.
961 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
962 (simulate): If PC is odd, fetch a 16 bit instruction, and
963 increment PC by 2 rather than 4.
964 * configure.in: Add case for mips16*-*-*.
965 * configure: Rebuild.
967 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
969 * interp.c: Allow -t to enable tracing in standalone simulator.
970 Fix garbage output in trace file and error messages.
972 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
974 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
975 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
976 * configure.in: Simplify using macros in ../common/aclocal.m4.
977 * configure: Regenerated.
978 * tconfig.in: New file.
980 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
982 * interp.c: Fix bugs in 64-bit port.
983 Use ansi function declarations for msvc compiler.
984 Initialize and test file pointer in trace code.
985 Prevent duplicate definition of LAST_EMED_REGNUM.
987 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
989 * interp.c (xfer_big_long): Prevent unwanted sign extension.
991 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
993 * interp.c (SignalException): Check for explicit terminating
995 * gencode.c: Pass instruction value through SignalException()
996 calls for Trap, Breakpoint and Syscall.
998 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
1000 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
1001 only used on those hosts that provide it.
1002 * configure.in: Add sqrt() to list of functions to be checked for.
1003 * config.in: Re-generated.
1004 * configure: Re-generated.
1006 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
1008 * gencode.c (process_instructions): Call build_endian_shift when
1009 expanding STORE RIGHT, to fix swr.
1010 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
1011 clear the high bits.
1012 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
1013 Fix float to int conversions to produce signed values.
1015 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
1017 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
1018 (process_instructions): Correct handling of nor instruction.
1019 Correct shift count for 32 bit shift instructions. Correct sign
1020 extension for arithmetic shifts to not shift the number of bits in
1021 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
1022 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
1024 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
1025 It's OK to have a mult follow a mult. What's not OK is to have a
1026 mult follow an mfhi.
1027 (Convert): Comment out incorrect rounding code.
1029 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
1031 * interp.c (sim_monitor): Improved monitor printf
1032 simulation. Tidied up simulator warnings, and added "--log" option
1033 for directing warning message output.
1034 * gencode.c: Use sim_warning() rather than WARNING macro.
1036 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
1038 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
1039 getopt1.o, rather than on gencode.c. Link objects together.
1040 Don't link against -liberty.
1041 (gencode.o, getopt.o, getopt1.o): New targets.
1042 * gencode.c: Include <ctype.h> and "ansidecl.h".
1043 (AND): Undefine after including "ansidecl.h".
1044 (ULONG_MAX): Define if not defined.
1045 (OP_*): Don't define macros; now defined in opcode/mips.h.
1046 (main): Call my_strtoul rather than strtoul.
1047 (my_strtoul): New static function.
1049 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
1051 * gencode.c (process_instructions): Generate word64 and uword64
1052 instead of `long long' and `unsigned long long' data types.
1053 * interp.c: #include sysdep.h to get signals, and define default
1055 * (Convert): Work around for Visual-C++ compiler bug with type
1057 * support.h: Make things compile under Visual-C++ by using
1058 __int64 instead of `long long'. Change many refs to long long
1059 into word64/uword64 typedefs.
1061 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
1063 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
1064 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
1066 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
1067 (AC_PROG_INSTALL): Added.
1068 (AC_PROG_CC): Moved to before configure.host call.
1069 * configure: Rebuilt.
1071 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
1073 * configure.in: Define @SIMCONF@ depending on mips target.
1074 * configure: Rebuild.
1075 * Makefile.in (run): Add @SIMCONF@ to control simulator
1077 * gencode.c: Change LOADDRMASK to 64bit memory model only.
1078 * interp.c: Remove some debugging, provide more detailed error
1079 messages, update memory accesses to use LOADDRMASK.
1081 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
1083 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
1084 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
1086 * configure: Rebuild.
1087 * config.in: New file, generated by autoheader.
1088 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
1089 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
1090 HAVE_ANINT and HAVE_AINT, as appropriate.
1091 * Makefile.in (run): Use @LIBS@ rather than -lm.
1092 (interp.o): Depend upon config.h.
1093 (Makefile): Just rebuild Makefile.
1094 (clean): Remove stamp-h.
1095 (mostlyclean): Make the same as clean, not as distclean.
1096 (config.h, stamp-h): New targets.
1098 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
1100 * interp.c (ColdReset): Fix boolean test. Make all simulator
1103 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
1105 * interp.c (xfer_direct_word, xfer_direct_long,
1106 swap_direct_word, swap_direct_long, xfer_big_word,
1107 xfer_big_long, xfer_little_word, xfer_little_long,
1108 swap_word,swap_long): Added.
1109 * interp.c (ColdReset): Provide function indirection to
1110 host<->simulated_target transfer routines.
1111 * interp.c (sim_store_register, sim_fetch_register): Updated to
1112 make use of indirected transfer routines.
1114 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
1116 * gencode.c (process_instructions): Ensure FP ABS instruction
1118 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
1119 system call support.
1121 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
1123 * interp.c (sim_do_command): Complain if callback structure not
1126 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
1128 * interp.c (Convert): Provide round-to-nearest and round-to-zero
1129 support for Sun hosts.
1130 * Makefile.in (gencode): Ensure the host compiler and libraries
1131 used for cross-hosted build.
1133 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
1135 * interp.c, gencode.c: Some more (TODO) tidying.
1137 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
1139 * gencode.c, interp.c: Replaced explicit long long references with
1140 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
1141 * support.h (SET64LO, SET64HI): Macros added.
1143 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
1145 * configure: Regenerate with autoconf 2.7.
1147 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
1149 * interp.c (LoadMemory): Enclose text following #endif in /* */.
1150 * support.h: Remove superfluous "1" from #if.
1151 * support.h (CHECKSIM): Remove stray 'a' at end of line.
1153 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
1155 * interp.c (StoreFPR): Control UndefinedResult() call on
1156 WARN_RESULT manifest.
1158 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
1160 * gencode.c: Tidied instruction decoding, and added FP instruction
1163 * interp.c: Added dineroIII, and BSD profiling support. Also
1164 run-time FP handling.
1166 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1168 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
1169 gencode.c, interp.c, support.h: created.